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    <title>S12 / MagniV MicrocontrollersのトピックRe: XIRQ and IRQ</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509800#M12415</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Both can be disable/enable, but the XIRQ does not have dedicated register like IRQCR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In case of XIRQ, after minimum system initialization, software can clear the Xbit in CCR register using an instruction such as ANDCC #$BF.&lt;/P&gt;&lt;P&gt;This way the /XIRQ interrupts are enabled.&lt;/P&gt;&lt;P&gt;After return-from-interrupt (RTI) instruction at the end of the interrupt service routine (ISR), the X bit is restored to initial value (set to logic once) and XIRQ is disabled.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 08 Mar 2016 11:24:05 GMT</pubDate>
    <dc:creator>iggi</dc:creator>
    <dc:date>2016-03-08T11:24:05Z</dc:date>
    <item>
      <title>XIRQ and IRQ</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509797#M12412</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I would like to know what is the difference between XIRQ and IRQ of DP512 MCU.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Mar 2016 03:40:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509797#M12412</guid>
      <dc:creator>monstor</dc:creator>
      <dc:date>2016-03-07T03:40:47Z</dc:date>
    </item>
    <item>
      <title>Re: XIRQ and IRQ</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509798#M12413</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The information you can find in S12CPUV2 manual:&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.nxp.com/files/microcontrollers/doc/ref_manual/S12CPUV2.pdf?fsrch=1&amp;amp;sr=1&amp;amp;pageNum=1"&gt;&lt;SPAN class="l"&gt;&lt;SPAN class="goog-trans-section l"&gt;S12CPUV2 - Reference Manual&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/A&gt;&lt;SPAN class="toggle-preview"&gt; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;See chapter 7.5 Interrupts&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In stop mode for example, low signal on IRQ pin triggers IRQ_ISR. Prior to stop mode IRQ must be enabled by setting IRQCR register and bit IRQEN.&lt;/P&gt;&lt;P&gt; Also, low level on XIRQ pin wake up the MCU.&lt;/P&gt;&lt;P&gt; However, if XIRQ interrupt is disabled then the code continues on the next instruction after STOP.&lt;/P&gt;&lt;P&gt;If the XIRQ interrupt is enabled then the XIRQ_ISR is triggered.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope the information helps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;iggi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Mar 2016 16:09:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509798#M12413</guid>
      <dc:creator>iggi</dc:creator>
      <dc:date>2016-03-07T16:09:52Z</dc:date>
    </item>
    <item>
      <title>Re: XIRQ and IRQ</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509799#M12414</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Iggi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you mean XIRQ cannot be enable/disable and IRQ can be enable/disable?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;and both can wake up MCU from STOP, right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Henry&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Mar 2016 01:22:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509799#M12414</guid>
      <dc:creator>monstor</dc:creator>
      <dc:date>2016-03-08T01:22:27Z</dc:date>
    </item>
    <item>
      <title>Re: XIRQ and IRQ</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509800#M12415</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Both can be disable/enable, but the XIRQ does not have dedicated register like IRQCR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In case of XIRQ, after minimum system initialization, software can clear the Xbit in CCR register using an instruction such as ANDCC #$BF.&lt;/P&gt;&lt;P&gt;This way the /XIRQ interrupts are enabled.&lt;/P&gt;&lt;P&gt;After return-from-interrupt (RTI) instruction at the end of the interrupt service routine (ISR), the X bit is restored to initial value (set to logic once) and XIRQ is disabled.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Mar 2016 11:24:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/XIRQ-and-IRQ/m-p/509800#M12415</guid>
      <dc:creator>iggi</dc:creator>
      <dc:date>2016-03-08T11:24:05Z</dc:date>
    </item>
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