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    <title>topic the sequence of Enterring into the stack [XS128] in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/the-sequence-of-Enterring-into-the-stack-XS128/m-p/477061#M11947</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;there is a problem. when a interrupt come ,how dose XS128 save the imformations into stack,what registers it save? and what is the sequence.&lt;/P&gt;&lt;P&gt;with my &lt;SPAN style="color: #000000; font-family: arial, sans-serif; font-size: 12px; background-color: #f8f8f8;"&gt;appreciate。&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 30 Jan 2016 01:41:45 GMT</pubDate>
    <dc:creator>xianyu</dc:creator>
    <dc:date>2016-01-30T01:41:45Z</dc:date>
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      <title>the sequence of Enterring into the stack [XS128]</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/the-sequence-of-Enterring-into-the-stack-XS128/m-p/477061#M11947</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;there is a problem. when a interrupt come ,how dose XS128 save the imformations into stack,what registers it save? and what is the sequence.&lt;/P&gt;&lt;P&gt;with my &lt;SPAN style="color: #000000; font-family: arial, sans-serif; font-size: 12px; background-color: #f8f8f8;"&gt;appreciate。&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 30 Jan 2016 01:41:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/the-sequence-of-Enterring-into-the-stack-XS128/m-p/477061#M11947</guid>
      <dc:creator>xianyu</dc:creator>
      <dc:date>2016-01-30T01:41:45Z</dc:date>
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      <title>Re: the sequence of Enterring into the stack [XS128]</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/the-sequence-of-Enterring-into-the-stack-XS128/m-p/477062#M11948</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A href="http://cache.nxp.com/files/microcontrollers/doc/ref_manual/S12XCPUV2.pdf" title="http://cache.nxp.com/files/microcontrollers/doc/ref_manual/S12XCPUV2.pdf"&gt;http://cache.nxp.com/files/microcontrollers/doc/ref_manual/S12XCPUV2.pdf&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;7.5.3 Interrupt Recognition. Table 7-2. CPU12X Stacking Order on Entry to Interrupts&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Feb 2016 08:16:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/the-sequence-of-Enterring-into-the-stack-XS128/m-p/477062#M11948</guid>
      <dc:creator>kef2</dc:creator>
      <dc:date>2016-02-01T08:16:17Z</dc:date>
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