GDU delay in gate signal application

albertolega — Wed, 22 Jul 2015 15:28:27 GMT

Hi,

I am trying to implement a control for a DC motor using PFM and GDU modules of S12ZVM. I programmed PMF to use channel A base time for all the three legs and I set up other PMF registers to ensure proper symmetrical modulation with dead times.

I monitored PWM signals on PWM pins to check for proper modulation and dead time application. Everithing was as I expected to be a part dead time duration. It seemed to me that dead time value set in PMFDTMA is the total time, the sum of low side and high side dead times.

Anyway, this is a minor problem, probably related to my comprehension of S12ZVM handbooks.

The actual problem I am experiencing is that gate signals are delayed in the respect of PWM singals and the delays of high and low side are different. Moreover, high side gate signal is completely unrelated to PWM signal: gate signal is longer. This can be seen form attached scope screenshots. The ground for all the measurement is the same. For both the pictures, the signal are:

Yellow: low side gate signal.
Light blue: high side gate signal (referred to GND).
Green: leg output.
Violet: difference between signal 2 and 3 (high side Vgs).

Red signal depends on the picture: In Low.BMP file it is low side PWM signal caugth at PWM pin, for High.BMP it is high side PWM signal. Both images have been triggered at the same equivalent time in the period. Duty cycle is fixed.

What can be seen comparing the pictures is that PWM signals are correctly generated. High side PWM is perfectly centered in the respect of low side signal. Unfortunately there is a slight delay between low side PWM and gate signals (red and yellow in Low.BMP).

What is even worse is the behaviour of hig side signals. Gate signal is strongly delayed and the pulse stands high a lot before PWM falls.

Moreover, there is a very huge noise at every commutation which affects the signals.

What should I check or correct to fix the situation?

Thank you very much.

Alberto

S12 / MagniV MicrocontrollersのトピックGDU delay in gate signal application

GDU delay in gate signal application

Re: GDU delay in gate signal application

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