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    <title>topic Re: mc912dg128ccpv  developing /compiling envirement? in S12 / MagniV Microcontrollers</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/431001#M11384</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;For correct CRG register settings, use the PLL calculator for S12 devices:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-103954"&gt;S12X PLL (Filter) Calculator&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In your case, there is some bad calculation and so oscclk, synr and refdv are not in conjuction.&lt;/P&gt;&lt;P&gt;I am not aware of PLLPC register. There is only PLLCTL. And also PLLFLG does not exist as well. Are these your definitions?&lt;/P&gt;&lt;P&gt;Moreover, the CLKSEL has one bit as Write once in Normal mode (no BDM connection) and you write twice that register which might be a problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is an example how to initialize a PLL correctly:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void PLL_init()&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //initialization of PLL:&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;//for example: 4MHz osc -&amp;gt; 1MHz Bus clock (2MHz PLL clock)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; CLKSEL = 0;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //system clocks are derived from OSCCLK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PLLCTL = 177;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;//setting of PLL clock&amp;nbsp; &lt;/P&gt;&lt;P&gt;//PLLCLK = 2 * OSCCLK * (SYNR + 1)/(REFDV + 1)&lt;/P&gt;&lt;P&gt;//PLLCLK = 2 * 16MHz * (0 + 1)/(1 + 1) = 48MHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; SYNR = 2;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; REFDV = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PLLCTL = 241;&lt;/P&gt;&lt;P&gt; //PLLCTL = 0x60;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //PLL is turned on, AUTO bit is set -&amp;gt; PLL will lock automatically&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; while(!CRGFLG_LOCK);&amp;nbsp;&amp;nbsp; //wait until PLL clocks are within desired tolerance of target frequency&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; CLKSEL_PLLSEL = 1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //system clocks are derived from PLLCLK &lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 26 Jun 2015 11:21:42 GMT</pubDate>
    <dc:creator>iggi</dc:creator>
    <dc:date>2015-06-26T11:21:42Z</dc:date>
    <item>
      <title>mc912dg128ccpv  developing /compiling envirement?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/430998#M11381</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,we are programing a&amp;nbsp; mcu (MC912DG128CCPV) to accomplish our requirement.&lt;/P&gt;&lt;P&gt;Because this mcu is out of date, we can obtain only a few materials,&amp;nbsp; we can not definite which developing/compiling envirement&amp;nbsp; we need to use is accurate.&lt;/P&gt;&lt;P&gt;Someone suppose that we should use CODE WARRIOR V5.1,including some freescale FAE .But we can see&amp;nbsp; that CODE WARRIOR V5.1 is using to programme for MC912DG128A mcu on the freescale official website,and MC912DG128C mcu should be programing in COSMIC /ZAP BDM HCS12(paged).&lt;/P&gt;&lt;P&gt;So,&lt;STRONG&gt;we want to definite which developing/compiling envirement&amp;nbsp; is accurate&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;Additionally,we need to using this chip on normal expended norrow mode,and programing to write/read a dual-port RAM.so we need a free example code,no matter that is programing in C.W. or COSMIC.&amp;nbsp;&amp;nbsp; Thank you very much.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 宋体;"&gt;您好，我们最近在使用一款飞思卡尔芯片，&lt;/SPAN&gt;MC912DG128CCPV&lt;SPAN style="font-family: 宋体;"&gt;，我们需要编写这个芯片的程序以完成需要的功能。但是由于芯片比较老旧，我们不清楚这种芯片的开发编译环境，有人认为是&lt;/SPAN&gt;CODE warrior5.1&lt;SPAN style="font-family: 宋体;"&gt;，包括一些飞思卡尔技术支持工程师，但是从官网上看&lt;/SPAN&gt;mc912dg128A&lt;SPAN style="font-family: 宋体;"&gt;系列新品应该是使用&lt;/SPAN&gt;code warrior 5.1&lt;SPAN style="font-family: 宋体;"&gt;，而&lt;/SPAN&gt;mc912dg128c&lt;SPAN style="font-family: 宋体;"&gt;系列芯片应该使用&lt;/SPAN&gt;COSMIC4.8.6/ZAP BDM HCS12&lt;SPAN style="font-family: 宋体;"&gt;（&lt;/SPAN&gt;paged&lt;SPAN style="font-family: 宋体;"&gt;）。所以我们希望能确定到底应该使用哪个环境，因为在&lt;/SPAN&gt;CW5.0&lt;SPAN style="font-family: 宋体;"&gt;环境开发这个程序的时候时钟配置会出现程序跑飞的情况。另外我们需要设置这种这种新品进入外部扩展模式，以完成外部双口&lt;/SPAN&gt;RAM&lt;SPAN style="font-family: 宋体;"&gt;的读写，我们希望得到这种芯片，或者这类芯片的例子程序，无论&lt;/SPAN&gt;COSMIC&lt;SPAN style="font-family: 宋体;"&gt;或&lt;/SPAN&gt;CW&lt;SPAN style="font-family: 宋体;"&gt;环境下的都可以&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Jun 2015 03:53:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/430998#M11381</guid>
      <dc:creator>mengzhang</dc:creator>
      <dc:date>2015-06-05T03:53:52Z</dc:date>
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    <item>
      <title>Re: mc912dg128ccpv  developing /compiling envirement?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/430999#M11382</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can use any of the two (or both) IDEs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;&lt;SPAN style="color: #000000; font-size: 10pt;"&gt;The&lt;/SPAN&gt;&lt;SPAN lang="en-us"&gt; datasheet says:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;&lt;SPAN lang="en-us"&gt; &lt;A href="http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC912DT128A.pdf"&gt;http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC912DT128A.pdf&lt;/A&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en-us" style="font-family: arial,helvetica,sans-serif;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "The MC68HC912DG128C and MC68HC912DG128P are devices similar to the MC68HC912DG128A, but with different oscillator configurations.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en-us" style="font-family: arial,helvetica,sans-serif;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Sections of this book applicable to the MC68HC912DG128A also apply to the MC68HC912DG128C and MC68HC912DG128P, except for the &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="en-us" style="font-family: arial,helvetica,sans-serif;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; differences highlighted in Section 13. Oscillator."&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;&lt;SPAN style="color: #000000;"&gt;The difference between DG128A and DG128C are related only to oscillator architecture, some features were added and improved on 1L05H maskset (DG128C).&lt;BR /&gt; Therefore i don't see any problem to select DG128A in CW51 and program/debug DG128C device.&lt;/SPAN&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;Regarding the example code for expanded narrow mode, i will have to check if we have something like that.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial,helvetica,sans-serif;"&gt;iggi&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jun 2015 09:22:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/430999#M11382</guid>
      <dc:creator>iggi</dc:creator>
      <dc:date>2015-06-10T09:22:34Z</dc:date>
    </item>
    <item>
      <title>Re: mc912dg128ccpv  developing /compiling envirement?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/431000#M11383</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for your answer.&lt;/P&gt;&lt;P&gt;By the way,do you want to tell me that we should not to focus the mcu it is in dg128A series ,or in dg128C series,or in dg128P series? but only use dg128 in short.&lt;/P&gt;&lt;P&gt;I can tell you my situation, when we create a new project in CW V5.1,after that ,we choose the mcu MC68HC912DG128A.&lt;/P&gt;&lt;P&gt;We need to use a sub-function in our program to initial the PLLCLK to be the SYSCLK.&lt;/P&gt;&lt;P&gt;so we write like that:&lt;/P&gt;&lt;P&gt;void PLL_init()            &lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;  CLKSEL = 0x00;           &lt;/P&gt;&lt;P&gt;  PLLPC  = 0x40;         &lt;/P&gt;&lt;P&gt;  SYNR   = 0x02;          &lt;/P&gt;&lt;P&gt;  REFDV  = 0x04;           &lt;/P&gt;&lt;P&gt;   while(!(PLLFLG&amp;amp;0X40));   &lt;/P&gt;&lt;P&gt;   CLKSEL = 0x40;          &lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;when the program jump to the CLKSEL =0x40;&lt;/P&gt;&lt;P&gt;the program will be certainly   running away.&lt;/P&gt;&lt;P&gt;But if SYNR = 0x01,REFDV = 0x01,everything is ok.&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;Another problem,we want to use external dual-port ram,so we should configue some page to be an external flash space,can you tell me how can we do that?thank you&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--&lt;/P&gt;&lt;P&gt;发自我的网易邮箱手机智能版&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;在 2015-06-10 17:23:31，iggi &amp;lt;admin@community.freescale.com&amp;gt; 写道：&lt;/P&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;gt;mc912dg128ccpv  developing /compiling envirement?&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;reply from iggi in S12 / MagniV Microcontrollers - View the full discussion&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;Hi,&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;You can use any of the two (or both) IDEs.&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;The datasheet says:&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC912DT128A.pdf&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;    "The MC68HC912DG128C and MC68HC912DG128P are devices similar to the MC68HC912DG128A, but with different oscillator configurations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;    Sections of this book applicable to the MC68HC912DG128A also apply to the MC68HC912DG128C and MC68HC912DG128P, except for the&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;    differences highlighted in Section 13. Oscillator."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;The difference between DG128A and DG128C are related only to oscillator architecture, some features were added and improved on 1L05H maskset (DG128C).&lt;/P&gt;&lt;P&gt;&amp;gt;Therefore i don't see any problem to select DG128A in CW51 and program/debug DG128C device.&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;Regarding the example code for expanded narrow mode, i will have to check if we have something like that.&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;Regards,&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;iggi&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;| Did your question get answered? If so, say thanks by clicking Correct Answer in the community thread! |&lt;/P&gt;&lt;P&gt;&amp;gt;| Reply to this message by replying to this email, or go to the message on Freescale Community |&lt;/P&gt;&lt;P&gt;&amp;gt;| Start a new discussion in S12 / MagniV Microcontrollers by email or at Freescale Community |&lt;/P&gt;&lt;P&gt;&amp;gt;| Following mc912dg128ccpv  developing /compiling envirement? in these streams: Inbox |&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;This email was sent by Freescale Community because you are a registered user.&lt;/P&gt;&lt;P&gt;&amp;gt;You may unsubscribe instantly from Freescale Community, or adjust email frequency in your email preferences&lt;/P&gt;&lt;BLOCKQUOTE level="1"&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;P&gt;&amp;gt;|&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jun 2015 09:47:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/431000#M11383</guid>
      <dc:creator>mengzhang</dc:creator>
      <dc:date>2015-06-10T09:47:46Z</dc:date>
    </item>
    <item>
      <title>Re: mc912dg128ccpv  developing /compiling envirement?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/431001#M11384</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;For correct CRG register settings, use the PLL calculator for S12 devices:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-103954"&gt;S12X PLL (Filter) Calculator&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In your case, there is some bad calculation and so oscclk, synr and refdv are not in conjuction.&lt;/P&gt;&lt;P&gt;I am not aware of PLLPC register. There is only PLLCTL. And also PLLFLG does not exist as well. Are these your definitions?&lt;/P&gt;&lt;P&gt;Moreover, the CLKSEL has one bit as Write once in Normal mode (no BDM connection) and you write twice that register which might be a problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is an example how to initialize a PLL correctly:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void PLL_init()&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //initialization of PLL:&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;//for example: 4MHz osc -&amp;gt; 1MHz Bus clock (2MHz PLL clock)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; CLKSEL = 0;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //system clocks are derived from OSCCLK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PLLCTL = 177;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;//setting of PLL clock&amp;nbsp; &lt;/P&gt;&lt;P&gt;//PLLCLK = 2 * OSCCLK * (SYNR + 1)/(REFDV + 1)&lt;/P&gt;&lt;P&gt;//PLLCLK = 2 * 16MHz * (0 + 1)/(1 + 1) = 48MHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; SYNR = 2;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; REFDV = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PLLCTL = 241;&lt;/P&gt;&lt;P&gt; //PLLCTL = 0x60;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //PLL is turned on, AUTO bit is set -&amp;gt; PLL will lock automatically&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; while(!CRGFLG_LOCK);&amp;nbsp;&amp;nbsp; //wait until PLL clocks are within desired tolerance of target frequency&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; CLKSEL_PLLSEL = 1;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //system clocks are derived from PLLCLK &lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Jun 2015 11:21:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/mc912dg128ccpv-developing-compiling-envirement/m-p/431001#M11384</guid>
      <dc:creator>iggi</dc:creator>
      <dc:date>2015-06-26T11:21:42Z</dc:date>
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