S12 / MagniV Microcontrollers中的主题 Re: S12ZVL ACLK clock deafault value and COP

S12ZVL ACLK clock deafault value and COP

charudattaingal — Thu, 16 Jul 2015 04:58:30 GMT

Dear Team,

I want to know the default value of ACLK clock available in S12ZVL controller .

It is good to have if I get example of watchdog timer for S12zvl controller.

Thanks & Regards,

Charudatta

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Re: S12ZVL ACLK clock deafault value and COP

RadekS — Fri, 17 Jul 2015 13:04:32 GMT

Hi,

Nominal value of ACLK is 20kHz.

ACLK frequency is divided by 2 when ACLK is selected as clock source for watchdog:

So, 10kHz is source clock frequency for COP watchdog.

Minimum timeout (CPMUCOP_CR=0x01, CPMUCLKS _COPOSCSEL1=1) is 2^7*(1/10kHz)=12,8ms

Maximum timeout (CPMUCOP_CR=0x07, CPMUCLKS _COPOSCSEL1=1) is 2^17*(1/10kHz)= 13,1072s

Note: ACLK frequency could be trimmed by modifying CPMUACLKTR register value. Note: After reset a value is automatically loaded again from the Flash memory.

I hope it helps you.

Have a great day,
RadekS

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Re: S12ZVL ACLK clock deafault value and COP

charudattaingal — Sat, 18 Jul 2015 12:36:20 GMT

Dear RadekS,

Thanks for answer. The value of ACLK is not mention in S12zvl datasheet .

May I know how you got ACLK value.

Thanks & Regards

Charudatta

Re: S12ZVL ACLK clock deafault value and COP

RadekS — Mon, 20 Jul 2015 08:14:51 GMT

Hi,

This information is directly from MC9S12ZVL Family Reference Manual Rev. 1.04

Please look at chapter A.2.1 VREG Electrical Specifications (page 685), parameter 7,

Trimmed ACLK output frequency, typical value fACLK=20kHz.

I hope it helps you.

Have a great day,
RadekS

Re: S12ZVL ACLK clock deafault value and COP

charudattaingal — Mon, 20 Jul 2015 08:59:55 GMT

Thank you very much