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    <title>S12 / MagniV MicrocontrollersのトピックRe: Abraham Test for internal SRAM - block size</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371015#M10702</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am waiting for answer from a design team. As soon as I have it i'll share it.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Ladislav&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Mar 2015 08:06:16 GMT</pubDate>
    <dc:creator>lama</dc:creator>
    <dc:date>2015-03-12T08:06:16Z</dc:date>
    <item>
      <title>Abraham Test for internal SRAM - block size</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371014#M10701</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello embedded world,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are working on an Abraham Ram Test for the internal SRAM of the S12XDP512 µC.&lt;/P&gt;&lt;P&gt;Now the questions arrives how to choose the correct block size to split the test into several partitions.&lt;/P&gt;&lt;P&gt;Is there any description of the RAM structure available or better can anyone give us a hint for the block size ?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks a lot&lt;/P&gt;&lt;P&gt;Karl&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Mar 2015 19:57:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371014#M10701</guid>
      <dc:creator>kam2630</dc:creator>
      <dc:date>2015-03-09T19:57:37Z</dc:date>
    </item>
    <item>
      <title>Re: Abraham Test for internal SRAM - block size</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371015#M10702</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am waiting for answer from a design team. As soon as I have it i'll share it.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Ladislav&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2015 08:06:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371015#M10702</guid>
      <dc:creator>lama</dc:creator>
      <dc:date>2015-03-12T08:06:16Z</dc:date>
    </item>
    <item>
      <title>Re: Abraham Test for internal SRAM - block size</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371016#M10703</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Ladislav,&lt;/P&gt;&lt;P&gt;Might it be possible to escalate this item, we are still standby waiting for help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Many thanks for your efforts,&lt;/P&gt;&lt;P&gt;Karl&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Mar 2015 10:46:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371016#M10703</guid>
      <dc:creator>kam2630</dc:creator>
      <dc:date>2015-03-25T10:46:12Z</dc:date>
    </item>
    <item>
      <title>Re: Abraham Test for internal SRAM - block size</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371017#M10704</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Karl,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Well, the RAM consists of one 32K block on the S12XDP512 device.&lt;/P&gt;&lt;P&gt;You can access directly 4K RAM at address 0x1000 - 0x2000 and 8K RAM part from 0x2000-0x4000. However this is only 12Kbytes.&lt;/P&gt;&lt;P&gt;Entire 32K RAM can be accessed through pages. There is 4K RAM window at local address 0x1000 - 0x2000 and 8 RAM pages 0xF8 to 0xFF.&lt;/P&gt;&lt;P&gt;On the other hand there is global memory map and 32K RAM starts at address 0xF_8000 and ends at 0xF_FFFF.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NOTE:&lt;/P&gt;&lt;P&gt;In the S12 architecture, the biggest size that an object can have is 16kB. This limitation is imposed by the&lt;/P&gt;&lt;P&gt;CPU local map, where the biggest continuous memory space accessible at a time by the CPU is 16kB. In&lt;/P&gt;&lt;P&gt;the S12 architecture attempting to allocate an object bigger than 16kB results in a linker error.&lt;/P&gt;&lt;P&gt;To reduce this limitation, in the S12X architecture, another method for accessing memory has been&lt;/P&gt;&lt;P&gt;introduced: Global addressing.&lt;/P&gt;&lt;P&gt;More about this in the appnote AN3748 &lt;A href="http://cache.freescale.com/files/soft_dev_tools/doc/app_note/AN3784.pdf"&gt;&lt;SPAN class="l"&gt;&lt;SPAN class="goog-trans-section l"&gt;Understanding the Memory Scheme in the S12(X) Architecture&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hopefully the information above can be of help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;regards,&lt;/P&gt;&lt;P&gt;iggi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 27 Mar 2015 11:22:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Abraham-Test-for-internal-SRAM-block-size/m-p/371017#M10704</guid>
      <dc:creator>iggi</dc:creator>
      <dc:date>2015-03-27T11:22:57Z</dc:date>
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