<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S12 / MagniV MicrocontrollersのトピックRe: Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
    <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347492#M10540</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you, it works. But what's the difference? "&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG_RTIF = 1" or "&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG |= &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG&lt;/SPAN&gt;_&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;RTIF_MASK&lt;/SPAN&gt;&lt;/SPAN&gt;"&lt;/SPAN&gt; is translated to "bset &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG&lt;/SPAN&gt;, &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;RTIF&lt;/SPAN&gt;_MASK", why the bset instruction will aftect other bits?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 19 Nov 2014 01:33:48 GMT</pubDate>
    <dc:creator>007</dc:creator>
    <dc:date>2014-11-19T01:33:48Z</dc:date>
    <item>
      <title>Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347490#M10538</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, I found a strange problem on S12G also on S12XE MCU. In our bootloader code, it will clear the RTIF bit (CPMUFLG_RTIF on S12G, CRGFLG_RTIF on S12XE), but I found other bits in the register also were cleared. PORF is used for power on reset judgement in my code, it can't be scratched. &lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My code is below:&lt;/P&gt;&lt;P&gt;S12G128 MCU:&lt;/P&gt;&lt;P&gt;CPMUFLG_RTIF = 1&amp;nbsp;&amp;nbsp; // after this code, PORF is cleared.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;S12XE256 MCU&lt;/P&gt;&lt;P&gt;CRGFLG_RTIF = 1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // after this code, PORF is cleared.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But if the code is as below, the PORF bit was not affected.&lt;/P&gt;&lt;P&gt;CPMUFLG = ~(U8)CPMUFLG_PORF_MASK;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Clear CMPMU int flags - not needed but good practice */&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Nov 2014 06:51:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347490#M10538</guid>
      <dc:creator>007</dc:creator>
      <dc:date>2014-11-18T06:51:48Z</dc:date>
    </item>
    <item>
      <title>Re: Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347491#M10539</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It is normal behavior. It was explained N*N times on this forum. Pls search for clear flags, clearing flags etc. To clear just RTIF you need to either&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CPMUFLG = CPMUFLG_RTIF_MASK;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;or&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CPMUFLG &amp;amp;= CPMUFLG_RTIF_MASK;&amp;nbsp; // pls notice no ~ on the right, like one would use to zero memory bit&amp;nbsp; (x &amp;amp;= ~1;)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Nov 2014 09:13:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347491#M10539</guid>
      <dc:creator>kef2</dc:creator>
      <dc:date>2014-11-18T09:13:31Z</dc:date>
    </item>
    <item>
      <title>Re: Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347492#M10540</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you, it works. But what's the difference? "&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG_RTIF = 1" or "&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG |= &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG&lt;/SPAN&gt;_&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;RTIF_MASK&lt;/SPAN&gt;&lt;/SPAN&gt;"&lt;/SPAN&gt; is translated to "bset &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;CPMUFLG&lt;/SPAN&gt;, &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.727272033691406px;"&gt;RTIF&lt;/SPAN&gt;_MASK", why the bset instruction will aftect other bits?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Nov 2014 01:33:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347492#M10540</guid>
      <dc:creator>007</dc:creator>
      <dc:date>2014-11-19T01:33:48Z</dc:date>
    </item>
    <item>
      <title>Re: Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347493#M10541</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Looks like you ignored my advice to search forums.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In short. Say you have flags registers, two flags are set, register reads as 3. You bset it with #1 mask. 3 | 1 = 3 and both flags are cleared. Simple. It doesn't matter all following variants are wrong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BSET reg, #1&amp;nbsp;&amp;nbsp; ; clear all flags in reg&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LDAA reg&lt;/P&gt;&lt;P&gt;ORAA #1&lt;/P&gt;&lt;P&gt;STAA reg&amp;nbsp;&amp;nbsp; ; clear all flags, which were read as set when LDAA instruction was executed&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;reg_BIT0 = 0; // clear all flags except BIT0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;reg_BIT0 = 1; // clear all flags&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Only these and equivalent are working with flags:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;reg = 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;reg &amp;amp;= 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BCLR reg, #~1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ; or&amp;nbsp; BCLR reg, #0xFE&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LDAA reg&lt;/P&gt;&lt;P&gt;ANDA&amp;nbsp; #1&lt;/P&gt;&lt;P&gt;STAA reg&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LDAA #1&lt;/P&gt;&lt;P&gt;STAA&amp;nbsp; reg&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Nov 2014 07:32:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347493#M10541</guid>
      <dc:creator>kef2</dc:creator>
      <dc:date>2014-11-19T07:32:22Z</dc:date>
    </item>
    <item>
      <title>Re: Why clearing RTIF bit will cause PORF, LVRF bit cleared also for S12 MCU?</title>
      <link>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347494#M10542</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Got it, thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Nov 2014 01:38:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S12-MagniV-Microcontrollers/Why-clearing-RTIF-bit-will-cause-PORF-LVRF-bit-cleared-also-for/m-p/347494#M10542</guid>
      <dc:creator>007</dc:creator>
      <dc:date>2014-11-20T01:38:08Z</dc:date>
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  </channel>
</rss>

