// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 * Copyright 2019 NXP
 *
 * Mingkai Hu <mingkai.hu@nxp.com>
 */  

/dts-v1/;

#include "fsl-ls1046a.dtsi"

/ {
	model = "Neosem HP IBIR Board";
	compatible = "fsl,neosem_ibir", "fsl,ls1046a";

	aliases {
		serial0 = &duart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&duart0 {
	status = "okay";
};



&esdhc {
	mmc-hs200-1_8v;
	sd-uhs-sdr104;
	sd-uhs-sdr50;
	sd-uhs-sdr25;
	sd-uhs-sdr12;
};

&usb1 {
	dr_mode = "otg";
};

/* actually I2C1 in HW spec */
&i2c0 {
	clock-frequency = <100000>;
	status = "okay";
/* RDB
	ina220@40 {
		compatible = "ti,ina220";
		reg = <0x40>;
		shunt-resistor = <1000>;
	};

	temp-sensor@4c {
		compatible = "adi,adt7461";
		reg = <0x4c>;
	};

	eeprom@52 {
		compatible = "atmel,24c512";
		reg = <0x52>;
	};

	eeprom@53 {
		compatible = "atmel,24c512";
		reg = <0x53>;
	};
*/
	at24@54 { /* Blade S/N eeprom */
		compatible = "at,24c128";
		reg = <0x54>;
	};

	/* expanders for UART TX enables*/
	pcf8575@20 {
		compatible = "nxp,pcf8575";
		reg = <0x20>;
	};

	pcf8575@21 {
		compatible = "nxp,pcf8575";
		reg = <0x21>;
	};

	temp-sensor@4c {
		compatible = "adi,adt7461";
		reg = <0x4c>;
	};
	
	/* DAC MCPT4728 @60 - bit-bang same as IBIR */
	/* Clock Gen 6V49205B @69 */
	/* XFI Retimer DS110DF111 @18 */
	/* SFP+ @50,51 */
	/* PMIC 34VR500 @08 */

};

&i2c1 { /* used for Midplane */
	clock-frequency = <100000>;
	status = "okay";
};

&i2c2 { /* used for DUT Module Board */
	clock-frequency = <100000>;
	status = "okay";
};

&i2c3 { /* multimaster off-blade */
	clock-frequency = <100000>;
	status = "okay";
/*  RDB
	rtc@51 {
		compatible = "nxp,pcf2129";
		reg = <0x51>;
	};
*/
	at24@54 { /* Interposer eeprom */
		compatible = "at,24c128";
		reg = <0x54>;
	};
	at24@56 { /* DM eeprom */
		compatible = "at,24c128";
		reg = <0x56>;	
	};
	at24@57 { /* FCM */
		compatible = "at,24c128";
		reg = <0x57>;
	};
};

&qspi {
	status = "okay";

	s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		spi-rx-bus-width = <1>;
		spi-tx-bus-width = <1>;
		reg = <0>;
	};
};

/* Fixed Link at 10,000MB (10G)  Full Duplex 
 This gets mapped to ethernet@8 which is enet6  See the neosem_hp_ibir-sdk.dts*/
#include "fsl-ls1046-post.dtsi"
&fman0 {
	ethernet@f0000 { /* TGEC1 */
		fixed-link = <0 1 1000 0 0>;
	phy-connection-type = "xgmii";
	};
};


/* 
  Below is just code storage if we want to get MDIO based operation
  in U-Boot working.   This is just an example starting point.
*/
/*
&fman0 {
	ethernet@f0000 { 
		phy-handle = <&sgmii_phy_s1_p1>;
		phy-connection-type = "sgmii";
	};
  mdio@fc000 {

    reg = <0x40>;
    #address-cells = <1>;
    #size-cells = <0>;
    status = "disabled";

    sgmii_phy_s1_p1: ethernet-phy@1 {
      reg = <0x1>;
    };
	};
};
*/