/* * MPC8641 HPCN Device Tree Source * * Copyright 2006 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ /dts-v1/; / { model = "MPC8641HPCN"; compatible = "fsl,mpc8641hpcn"; #address-cells = <1>; #size-cells = <1>; aliases { ethernet0 = &enet0; ethernet1 = &enet1; ethernet2 = &enet2; ethernet3 = &enet3; serial0 = &serial0; serial1 = &serial1; timer0 = &timer0; timer1 = &timer1; }; cpus { #address-cells = <1>; #size-cells = <0>; PowerPC,8641@0 { device_type = "cpu"; reg = <0>; d-cache-line-size = <32>; i-cache-line-size = <32>; d-cache-size = <32768>; // L1 i-cache-size = <32768>; // L1 timebase-frequency = <0>; // From uboot bus-frequency = <0>; // From uboot clock-frequency = <0>; // From uboot }; PowerPC,8641@1 { device_type = "cpu"; reg = <1>; d-cache-line-size = <32>; i-cache-line-size = <32>; d-cache-size = <32768>; i-cache-size = <32768>; timebase-frequency = <0>; // From uboot bus-frequency = <0>; // From uboot clock-frequency = <0>; // From uboot }; }; memory { device_type = "memory"; reg = <0x00000000 0x40000000>; // 1G at 0x0 }; localbus@d0005000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,mpc8641-localbus", "simple-bus"; reg = <0xd0005000 0x1000>; interrupts = <19 2>; interrupt-parent = <&mpic>; ranges = <0 0 0xf0000000 0x10000000>; flash@0,0 { compatible = "cfi-flash"; reg = <0 0 0x08000000>; bank-width = <4>; device-width = <4>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; reg = <0x00000000 0x00700000>; }; partition@700000 { label = "dtb"; reg = <0x00700000 0x00100000>; }; partition@800000 { label = "fs"; reg = <0x00800000 0x07800000>; }; }; }; soc8641@d0000000 { #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; ranges = <0x00000000 0xd0000000 0x00100000>; bus-frequency = <0>; mcm-law@0 { compatible = "fsl,mcm-law"; reg = <0x0 0x1000>; fsl,num-laws = <10>; }; mcm@1000 { compatible = "fsl,mpc8641-mcm", "fsl,mcm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; i2c@3000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; compatible = "fsl-i2c"; reg = <0x3000 0x100>; interrupts = <43 2>; interrupt-parent = <&mpic>; dfsrr; hwmon@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; }; i2c@3100 { #address-cells = <1>; #size-cells = <0>; cell-index = <1>; compatible = "fsl-i2c"; reg = <0x3100 0x100>; interrupts = <43 2>; interrupt-parent = <&mpic>; dfsrr; }; dma@21300 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; reg = <0x21300 0x4>; ranges = <0x0 0x21100 0x200>; cell-index = <0>; dma-channel@0 { compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x0 0x80>; cell-index = <0>; interrupt-parent = <&mpic>; interrupts = <20 2>; }; dma-channel@80 { compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupt-parent = <&mpic>; interrupts = <21 2>; }; dma-channel@100 { compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupt-parent = <&mpic>; interrupts = <22 2>; }; dma-channel@180 { compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; reg = <0x180 0x80>; cell-index = <3>; interrupt-parent = <&mpic>; interrupts = <23 2>; }; }; enet0: ethernet@24000 { #address-cells = <1>; #size-cells = <1>; cell-index = <0>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <29 2 30 2 34 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi0>; phy-handle = <&phy0>; phy-connection-type = "rgmii-id"; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-mdio"; reg = <0x520 0x20>; phy0: ethernet-phy@0 { interrupt-parent = <&mpic>; interrupts = <10 1>; reg = <0>; device_type = "ethernet-phy"; }; phy1: ethernet-phy@1 { interrupt-parent = <&mpic>; interrupts = <10 1>; reg = <1>; device_type = "ethernet-phy"; }; phy2: ethernet-phy@2 { interrupt-parent = <&mpic>; interrupts = <10 1>; reg = <2>; device_type = "ethernet-phy"; }; phy3: ethernet-phy@3 { interrupt-parent = <&mpic>; interrupts = <10 1>; reg = <3>; device_type = "ethernet-phy"; }; tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; enet1: ethernet@25000 { #address-cells = <1>; #size-cells = <1>; cell-index = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x25000 0x1000>; ranges = <0x0 0x25000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <35 2 36 2 40 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi1>; phy-handle = <&phy1>; phy-connection-type = "rgmii-id"; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; reg = <0x520 0x20>; tbi1: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; enet2: ethernet@26000 { #address-cells = <1>; #size-cells = <1>; cell-index = <2>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x26000 0x1000>; ranges = <0x0 0x26000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <31 2 32 2 33 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi2>; phy-handle = <&phy2>; phy-connection-type = "rgmii-id"; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; reg = <0x520 0x20>; tbi2: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; enet3: ethernet@27000 { #address-cells = <1>; #size-cells = <1>; cell-index = <3>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x27000 0x1000>; ranges = <0x0 0x27000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <37 2 38 2 39 2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi3>; phy-handle = <&phy3>; phy-connection-type = "rgmii-id"; mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; reg = <0x520 0x20>; tbi3: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; serial0: serial@4500 { cell-index = <0>; device_type = "serial"; compatible = "fsl,ns16550", "ns16550"; reg = <0x4500 0x100>; clock-frequency = <0>; interrupts = <42 2>; interrupt-parent = <&mpic>; }; serial1: serial@4600 { cell-index = <1>; device_type = "serial"; compatible = "fsl,ns16550", "ns16550"; reg = <0x4600 0x100>; clock-frequency = <0>; interrupts = <28 2>; interrupt-parent = <&mpic>; }; mpic: pic@40000 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "fsl,mpic"; device_type = "open-pic"; clock-frequency = <0>; }; timer0: timer@41100 { compatible = "fsl,mpic-global-timer"; device_type = "open-pic"; reg = <0x41100 0x100 0x41300 4>; interrupts = <0 0 3 0 1 0 3 0 2 0 3 0 3 0 3 0>; }; timer1: timer@42100 { compatible = "fsl,mpic-global-timer"; device_type = "open-pic"; reg = <0x42100 0x100 0x42300 4>; interrupts = <4 0 3 0 5 0 3 0 6 0 3 0 7 0 3 0>; }; global-utilities@e0000 { compatible = "fsl,mpc8641-guts"; reg = <0xe0000 0x1000>; fsl,has-rstcr; }; }; };