/dts-v1/;

/ {
    #address-cells = <0x1>;
    #size-cells = <0x1>;
    model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
    compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";

    chosen {
        stdout-path = "/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000";
    };

    memory {
        device_type = "memory";
    };

    aliases {
        ethernet0 = "/soc/aips-bus@2100000/ethernet@2188000";
        can0 = "/soc/aips-bus@2000000/flexcan@2090000";
        can1 = "/soc/aips-bus@2000000/flexcan@2094000";
        gpio0 = "/soc/aips-bus@2000000/gpio@209c000";
        gpio1 = "/soc/aips-bus@2000000/gpio@20a0000";
        gpio2 = "/soc/aips-bus@2000000/gpio@20a4000";
        gpio3 = "/soc/aips-bus@2000000/gpio@20a8000";
        gpio4 = "/soc/aips-bus@2000000/gpio@20ac000";
        gpio5 = "/soc/aips-bus@2000000/gpio@20b0000";
        gpio6 = "/soc/aips-bus@2000000/gpio@20b4000";
        i2c0 = "/soc/aips-bus@2100000/i2c@21a0000";
        i2c1 = "/soc/aips-bus@2100000/i2c@21a4000";
        i2c2 = "/soc/aips-bus@2100000/i2c@21a8000";
        ipu0 = "/soc/ipu@2400000";
        mmc0 = "/soc/aips-bus@2100000/usdhc@2190000";
        mmc1 = "/soc/aips-bus@2100000/usdhc@2194000";
        mmc2 = "/soc/aips-bus@2100000/usdhc@2198000";
        mmc3 = "/soc/aips-bus@2100000/usdhc@219c000";
        serial0 = "/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000";
        serial1 = "/soc/aips-bus@2100000/serial@21e8000";
        serial2 = "/soc/aips-bus@2100000/serial@21ec000";
        serial3 = "/soc/aips-bus@2100000/serial@21f0000";
        serial4 = "/soc/aips-bus@2100000/serial@21f4000";
        spi0 = "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2008000";
        spi1 = "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@200c000";
        spi2 = "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000";
        spi3 = "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000";
        usbphy0 = "/soc/aips-bus@2000000/usbphy@20c9000";
        usbphy1 = "/soc/aips-bus@2000000/usbphy@20ca000";
        i2c3 = "/soc/aips-bus@2100000/i2c@21f8000";
    };

    clocks {

        ckil {
            compatible = "fsl,imx-ckil", "fixed-clock";
            #clock-cells = <0x0>;
            clock-frequency = <0x8000>;
        };

        ckih1 {
            compatible = "fsl,imx-ckih1", "fixed-clock";
            #clock-cells = <0x0>;
            clock-frequency = <0x0>;
        };

        osc {
            compatible = "fsl,imx-osc", "fixed-clock";
            #clock-cells = <0x0>;
            clock-frequency = <0x16e3600>;
        };
    };

    tempmon {
        compatible = "fsl,imx6q-tempmon";
        interrupt-parent = <0x1>;
        interrupts = <0x0 0x31 0x4>;
        fsl,tempmon = <0x2>;
        fsl,tempmon-data = <0x3>;
        clocks = <0x4 0xac>;
    };

    ldb {
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
        gpr = <0x5>;
        status = "okay";
        clocks = <0x4 0x21 0x4 0x22 0x4 0x27 0x4 0x28 0x4 0x87 0x4 0x88>;
        clock-names = "di0_pll", "di1_pll", "di0_sel", "di1_sel", "di0", "di1";

        lvds-channel@0 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            reg = <0x0>;
            status = "disabled";

            port@0 {
                reg = <0x0>;

                endpoint {
                    remote-endpoint = <0x6>;
                    phandle = <0x58>;
                };
            };

            port@1 {
                reg = <0x1>;

                endpoint {
                    remote-endpoint = <0x7>;
                    phandle = <0x5c>;
                };
            };
        };

        lvds-channel@1 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            reg = <0x1>;
            status = "okay";
            fsl,data-mapping = "spwg";
            fsl,data-width = <0x12>;

            port@0 {
                reg = <0x0>;

                endpoint {
                    remote-endpoint = <0x8>;
                    phandle = <0x59>;
                };
            };

            port@1 {
                reg = <0x1>;

                endpoint {
                    remote-endpoint = <0x9>;
                    phandle = <0x5d>;
                };
            };

            port@4 {
                reg = <0x4>;

                endpoint {
                    remote-endpoint = <0xa>;
                    phandle = <0x6e>;
                };
            };
        };
    };

    pmu {
        compatible = "arm,cortex-a9-pmu";
        interrupt-parent = <0x1>;
        interrupts = <0x0 0x5e 0x4>;
    };

    soc {
        #address-cells = <0x1>;
        #size-cells = <0x1>;
        compatible = "simple-bus";
        interrupt-parent = <0x1>;
        ranges;

        dma-apbh@110000 {
            compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
            reg = <0x110000 0x2000>;
            interrupts = <0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4 0x0 0xd 0x4>;
            interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
            #dma-cells = <0x1>;
            dma-channels = <0x4>;
            clocks = <0x4 0x6a>;
            phandle = <0xb>;
        };

        gpmi-nand@112000 {
            compatible = "fsl,imx6q-gpmi-nand";
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            reg = <0x112000 0x2000 0x114000 0x2000>;
            reg-names = "gpmi-nand", "bch";
            interrupts = <0x0 0xf 0x4>;
            interrupt-names = "bch";
            clocks = <0x4 0x98 0x4 0x99 0x4 0x97 0x4 0x96 0x4 0x95>;
            clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch";
            dmas = <0xb 0x0>;
            dma-names = "rx-tx";
            status = "disabled";
        };

        hdmi@120000 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            reg = <0x120000 0x9000>;
            interrupts = <0x0 0x73 0x4>;
            gpr = <0x5>;
            clocks = <0x4 0x7b 0x4 0x7c>;
            clock-names = "iahb", "isfr";
            status = "okay";
            compatible = "fsl,imx6dl-hdmi";
            pinctrl-names = "default";
            pinctrl-0 = <0xc>;
            ddc-i2c-bus = <0xd>;

            port@0 {
                reg = <0x0>;

                endpoint {
                    remote-endpoint = <0xe>;
                    phandle = <0x56>;
                };
            };

            port@1 {
                reg = <0x1>;

                endpoint {
                    remote-endpoint = <0xf>;
                    phandle = <0x5a>;
                };
            };
        };

        gpu@130000 {
            compatible = "vivante,gc";
            reg = <0x130000 0x4000>;
            interrupts = <0x0 0x9 0x4>;
            clocks = <0x4 0x1b 0x4 0x7a 0x4 0x4a>;
            clock-names = "bus", "core", "shader";
            power-domains = <0x10>;
        };

        gpu@134000 {
            compatible = "vivante,gc";
            reg = <0x134000 0x4000>;
            interrupts = <0x0 0xa 0x4>;
            clocks = <0x4 0x1a 0x4 0x79>;
            clock-names = "bus", "core";
            power-domains = <0x10>;
        };

        timer@a00600 {
            compatible = "arm,cortex-a9-twd-timer";
            reg = <0xa00600 0x20>;
            interrupts = <0x1 0xd 0xf01>;
            interrupt-parent = <0x11>;
            clocks = <0x4 0xf>;
        };

        interrupt-controller@a01000 {
            compatible = "arm,cortex-a9-gic";
            #interrupt-cells = <0x3>;
            interrupt-controller;
            reg = <0xa01000 0x1000 0xa00100 0x100>;
            interrupt-parent = <0x11>;
            phandle = <0x11>;
        };

        l2-cache@a02000 {
            compatible = "arm,pl310-cache";
            reg = <0xa02000 0x1000>;
            interrupts = <0x0 0x5c 0x4>;
            cache-unified;
            cache-level = <0x2>;
            arm,tag-latency = <0x4 0x2 0x3>;
            arm,data-latency = <0x4 0x2 0x3>;
            arm,shared-override;
            phandle = <0x5e>;
        };

        pcie@1ffc000 {
            compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
            reg = <0x1ffc000 0x4000 0x1f00000 0x80000>;
            reg-names = "dbi", "config";
            #address-cells = <0x3>;
            #size-cells = <0x2>;
            device_type = "pci";
            bus-range = <0x0 0xff>;
            ranges = <0x81000000 0x0 0x0 0x1f80000 0x0 0x10000 0x82000000 0x0 0x1000000 0x1000000 0x0 0xf00000>;
            num-lanes = <0x1>;
            interrupts = <0x0 0x78 0x4>;
            interrupt-names = "msi";
            #interrupt-cells = <0x1>;
            interrupt-map-mask = <0x0 0x0 0x0 0x7>;
            interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x7b 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0x7a 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0x79 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0x78 0x4>;
            clocks = <0x4 0x90 0x4 0xce 0x4 0xbd>;
            clock-names = "pcie", "pcie_bus", "pcie_phy";
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <0x12>;
            reset-gpio = <0x13 0xc 0x1>;
            vpcie-supply = <0x14>;
        };

        aips-bus@2000000 {
            compatible = "fsl,aips-bus", "simple-bus";
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            reg = <0x2000000 0x100000>;
            ranges;

            spba-bus@2000000 {
                compatible = "fsl,spba-bus", "simple-bus";
                #address-cells = <0x1>;
                #size-cells = <0x1>;
                reg = <0x2000000 0x40000>;
                ranges;

                spdif@2004000 {
                    compatible = "fsl,imx35-spdif";
                    reg = <0x2004000 0x4000>;
                    interrupts = <0x0 0x34 0x4>;
                    dmas = <0x15 0xe 0x12 0x0 0x15 0xf 0x12 0x0>;
                    dma-names = "rx", "tx";
                    clocks = <0x4 0xf4 0x4 0x3 0x4 0xc5 0x4 0x6b 0x4 0x0 0x4 0x76 0x4 0x3e 0x4 0x0 0x4 0x0 0x4 0x9c>;
                    clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3", "rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba";
                    status = "disabled";
                };

                ecspi@2008000 {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;
                    compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
                    reg = <0x2008000 0x4000>;
                    interrupts = <0x0 0x1f 0x4>;
                    clocks = <0x4 0x70 0x4 0x70>;
                    clock-names = "ipg", "per";
                    dmas = <0x15 0x3 0x8 0x1 0x15 0x4 0x8 0x2>;
                    dma-names = "rx", "tx";
                    status = "okay";
                    cs-gpios = <0x16 0x9 0x0>;
                    pinctrl-names = "default";
                    pinctrl-0 = <0x17>;

                    m25p80@0 {
                        #address-cells = <0x1>;
                        #size-cells = <0x1>;
                        compatible = "st,m25p32", "jedec,spi-nor";
                        spi-max-frequency = <0x1312d00>;
                        reg = <0x0>;
                    };
                };

                ecspi@200c000 {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;
                    compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
                    reg = <0x200c000 0x4000>;
                    interrupts = <0x0 0x20 0x4>;
                    clocks = <0x4 0x71 0x4 0x71>;
                    clock-names = "ipg", "per";
                    dmas = <0x15 0x5 0x8 0x1 0x15 0x6 0x8 0x2>;
                    dma-names = "rx", "tx";
                    status = "disabled";
                };

                ecspi@2010000 {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;
                    compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
                    reg = <0x2010000 0x4000>;
                    interrupts = <0x0 0x21 0x4>;
                    clocks = <0x4 0x72 0x4 0x72>;
                    clock-names = "ipg", "per";
                    dmas = <0x15 0x7 0x8 0x1 0x15 0x8 0x8 0x2>;
                    dma-names = "rx", "tx";
                    status = "disabled";
                };

                ecspi@2014000 {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;
                    compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
                    reg = <0x2014000 0x4000>;
                    interrupts = <0x0 0x22 0x4>;
                    clocks = <0x4 0x73 0x4 0x73>;
                    clock-names = "ipg", "per";
                    dmas = <0x15 0x9 0x8 0x1 0x15 0xa 0x8 0x2>;
                    dma-names = "rx", "tx";
                    status = "disabled";
                };

                serial@2020000 {
                    compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                    reg = <0x2020000 0x4000>;
                    interrupts = <0x0 0x1a 0x4>;
                    clocks = <0x4 0xa0 0x4 0xa1>;
                    clock-names = "ipg", "per";
                    dmas = <0x15 0x19 0x4 0x0 0x15 0x1a 0x4 0x0>;
                    dma-names = "rx", "tx";
                    status = "okay";
                    pinctrl-names = "default";
                    pinctrl-0 = <0x18>;
                };

                esai@2024000 {
                    #sound-dai-cells = <0x0>;
                    compatible = "fsl,imx35-esai";
                    reg = <0x2024000 0x4000>;
                    interrupts = <0x0 0x33 0x4>;
                    clocks = <0x4 0xd0 0x4 0xd1 0x4 0x76 0x4 0xd0 0x4 0x9c>;
                    clock-names = "core", "mem", "extal", "fsys", "spba";
                    dmas = <0x15 0x17 0x15 0x0 0x15 0x18 0x15 0x0>;
                    dma-names = "rx", "tx";
                    status = "disabled";
                };

                ssi@2028000 {
                    #sound-dai-cells = <0x0>;
                    compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";
                    reg = <0x2028000 0x4000>;
                    interrupts = <0x0 0x2e 0x4>;
                    clocks = <0x4 0xb2 0x4 0x9d>;
                    clock-names = "ipg", "baud";
                    dmas = <0x15 0x25 0x1 0x0 0x15 0x26 0x1 0x0>;
                    dma-names = "rx", "tx";
                    fsl,fifo-depth = <0xf>;
                    status = "disabled";
                };

                ssi@202c000 {
                    #sound-dai-cells = <0x0>;
                    compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";
                    reg = <0x202c000 0x4000>;
                    interrupts = <0x0 0x2f 0x4>;
                    clocks = <0x4 0xb3 0x4 0x9e>;
                    clock-names = "ipg", "baud";
                    dmas = <0x15 0x29 0x1 0x0 0x15 0x2a 0x1 0x0>;
                    dma-names = "rx", "tx";
                    fsl,fifo-depth = <0xf>;
                    status = "okay";
                    phandle = <0x69>;
                };

                ssi@2030000 {
                    #sound-dai-cells = <0x0>;
                    compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";
                    reg = <0x2030000 0x4000>;
                    interrupts = <0x0 0x30 0x4>;
                    clocks = <0x4 0xb4 0x4 0x9f>;
                    clock-names = "ipg", "baud";
                    dmas = <0x15 0x2d 0x1 0x0 0x15 0x2e 0x1 0x0>;
                    dma-names = "rx", "tx";
                    fsl,fifo-depth = <0xf>;
                    status = "disabled";
                };

                asrc@2034000 {
                    compatible = "fsl,imx53-asrc";
                    reg = <0x2034000 0x4000>;
                    interrupts = <0x0 0x32 0x4>;
                    clocks = <0x4 0xd2 0x4 0xd3 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x0 0x4 0x6b 0x4 0x0 0x4 0x0 0x4 0x9c>;
                    clock-names = "mem", "ipg", "asrck_0", "asrck_1", "asrck_2", "asrck_3", "asrck_4", "asrck_5", "asrck_6", "asrck_7", "asrck_8", "asrck_9", "asrck_a", "asrck_b", "asrck_c", "asrck_d", "asrck_e", "asrck_f", "spba";
                    dmas = <0x15 0x11 0x17 0x1 0x15 0x12 0x17 0x1 0x15 0x13 0x17 0x1 0x15 0x14 0x17 0x1 0x15 0x15 0x17 0x1 0x15 0x16 0x17 0x1>;
                    dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc";
                    fsl,asrc-rate = <0xbb80>;
                    fsl,asrc-width = <0x10>;
                    status = "okay";
                };

                spba@203c000 {
                    reg = <0x203c000 0x4000>;
                };
            };

            vpu@2040000 {
                compatible = "fsl,imx6dl-vpu", "cnm,coda960";
                reg = <0x2040000 0x3c000>;
                interrupts = <0x0 0xc 0x4 0x0 0x3 0x4>;
                interrupt-names = "bit", "jpeg";
                clocks = <0x4 0xa8 0x4 0x8c>;
                clock-names = "per", "ahb";
                power-domains = <0x10>;
                resets = <0x19 0x1>;
                iram = <0x1a>;
            };

            aipstz@207c000 {
                reg = <0x207c000 0x4000>;
            };

            pwm@2080000 {
                #pwm-cells = <0x2>;
                compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                reg = <0x2080000 0x4000>;
                interrupts = <0x0 0x53 0x4>;
                clocks = <0x4 0x3e 0x4 0x91>;
                clock-names = "ipg", "per";
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x1b>;
                phandle = <0x6b>;
            };

            pwm@2084000 {
                #pwm-cells = <0x2>;
                compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                reg = <0x2084000 0x4000>;
                interrupts = <0x0 0x54 0x4>;
                clocks = <0x4 0x3e 0x4 0x92>;
                clock-names = "ipg", "per";
                status = "disabled";
            };

            pwm@2088000 {
                #pwm-cells = <0x2>;
                compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                reg = <0x2088000 0x4000>;
                interrupts = <0x0 0x55 0x4>;
                clocks = <0x4 0x3e 0x4 0x93>;
                clock-names = "ipg", "per";
                status = "disabled";
            };

            pwm@208c000 {
                #pwm-cells = <0x2>;
                compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                reg = <0x208c000 0x4000>;
                interrupts = <0x0 0x56 0x4>;
                clocks = <0x4 0x3e 0x4 0x94>;
                clock-names = "ipg", "per";
                status = "disabled";
            };

            flexcan@2090000 {
                compatible = "fsl,imx6q-flexcan";
                reg = <0x2090000 0x4000>;
                interrupts = <0x0 0x6e 0x4>;
                clocks = <0x4 0x6c 0x4 0x6d>;
                clock-names = "ipg", "per";
                status = "disabled";
            };

            flexcan@2094000 {
                compatible = "fsl,imx6q-flexcan";
                reg = <0x2094000 0x4000>;
                interrupts = <0x0 0x6f 0x4>;
                clocks = <0x4 0x6e 0x4 0x6f>;
                clock-names = "ipg", "per";
                status = "disabled";
            };

            gpt@2098000 {
                compatible = "fsl,imx6dl-gpt";
                reg = <0x2098000 0x4000>;
                interrupts = <0x0 0x37 0x4>;
                clocks = <0x4 0x77 0x4 0x78 0x4 0xed>;
                clock-names = "ipg", "per", "osc_per";
            };

            gpio@209c000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x209c000 0x4000>;
                interrupts = <0x0 0x42 0x4 0x0 0x43 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0x83 0x2 0x1c 0x2 0x89 0x8 0x1c 0xa 0xbd 0x2 0x1c 0xc 0xc2 0x1 0x1c 0xd 0xc1 0x1 0x1c 0xe 0xc0 0x1 0x1c 0xf 0xbf 0x1 0x1c 0x10 0xb9 0x2 0x1c 0x12 0xb8 0x1 0x1c 0x13 0xbb 0x1 0x1c 0x14 0xb7 0x1 0x1c 0x15 0xbc 0x1 0x1c 0x16 0x7b 0x3 0x1c 0x19 0x79 0x1 0x1c 0x1a 0x7f 0x1 0x1c 0x1b 0x7e 0x1 0x1c 0x1c 0x80 0x1 0x1c 0x1d 0x82 0x1 0x1c 0x1e 0x81 0x1 0x1c 0x1f 0x7a 0x1>;
                phandle = <0x36>;
            };

            gpio@20a0000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20a0000 0x4000>;
                interrupts = <0x0 0x44 0x4 0x0 0x45 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0xa1 0x8 0x1c 0x8 0xd0 0x8 0x1c 0x10 0x4a 0x1 0x1c 0x11 0x49 0x1 0x1c 0x12 0x48 0x1 0x1c 0x13 0x47 0x1 0x1c 0x14 0x46 0x1 0x1c 0x15 0x45 0x1 0x1c 0x16 0x44 0x1 0x1c 0x17 0x4f 0x2 0x1c 0x19 0x76 0x2 0x1c 0x1b 0x75 0x1 0x1c 0x1c 0x71 0x4>;
                phandle = <0x38>;
            };

            gpio@20a4000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20a4000 0x4000>;
                interrupts = <0x0 0x46 0x4 0x0 0x47 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0x61 0x2 0x1c 0x2 0x69 0x8 0x1c 0xa 0x63 0x6 0x1c 0x10 0x51 0x10>;
                phandle = <0x65>;
            };

            gpio@20a8000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20a8000 0x4000>;
                interrupts = <0x0 0x48 0x4 0x0 0x49 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x5 0x88 0x1 0x1c 0x6 0x91 0x1 0x1c 0x7 0x96 0x1 0x1c 0x8 0x92 0x1 0x1c 0x9 0x97 0x1 0x1c 0xa 0x93 0x1 0x1c 0xb 0x98 0x1 0x1c 0xc 0x94 0x1 0x1c 0xd 0x99 0x1 0x1c 0xe 0x95 0x1 0x1c 0xf 0x9a 0x1 0x1c 0x10 0x27 0x7 0x1c 0x17 0x38 0x1 0x1c 0x18 0x3d 0x7 0x1c 0x1f 0x2e 0x1>;
                phandle = <0x16>;
            };

            gpio@20ac000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20ac000 0x4000>;
                interrupts = <0x0 0x4a 0x4 0x0 0x4b 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0x78 0x1 0x1c 0x2 0x4d 0x1 0x1c 0x4 0x4c 0x1 0x1c 0x5 0x2f 0x9 0x1c 0xe 0x39 0x4 0x1c 0x12 0x25 0x1 0x1c 0x13 0x24 0x1 0x1c 0x14 0x23 0x1 0x1c 0x15 0x26 0x1 0x1c 0x16 0x1d 0x6 0x1c 0x1c 0x13 0x4>;
            };

            gpio@20b0000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20b0000 0x4000>;
                interrupts = <0x0 0x4c 0x4 0x0 0x4d 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0x17 0x6 0x1c 0x6 0x4b 0x1 0x1c 0x7 0x9c 0x1 0x1c 0x8 0x9b 0x1 0x1c 0x9 0xaa 0x1 0x1c 0xa 0xa9 0x1 0x1c 0xb 0x9d 0x1 0x1c 0xe 0x9e 0x3 0x1c 0x11 0xcc 0x1 0x1c 0x12 0xcb 0x1 0x1c 0x13 0xb6 0x1 0x1c 0x14 0xb1 0x4 0x1c 0x18 0xaf 0x1 0x1c 0x19 0xab 0x1 0x1c 0x1a 0xb5 0x1 0x1c 0x1b 0xac 0x3 0x1c 0x1e 0xb0 0x1 0x1c 0x1f 0x4e 0x1>;
                phandle = <0x46>;
            };

            gpio@20b4000 {
                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                reg = <0x20b4000 0x4000>;
                interrupts = <0x0 0x4e 0x4 0x0 0x4f 0x4>;
                gpio-controller;
                #gpio-cells = <0x2>;
                interrupt-controller;
                #interrupt-cells = <0x2>;
                gpio-ranges = <0x1c 0x0 0xca 0x1 0x1c 0x1 0xc9 0x1 0x1c 0x2 0xc4 0x1 0x1c 0x3 0xc3 0x1 0x1c 0x4 0xc5 0x4 0x1c 0x8 0xcd 0x1 0x1c 0x9 0xcf 0x1 0x1c 0xa 0xce 0x1 0x1c 0xb 0x85 0x3>;
                phandle = <0x13>;
            };

            kpp@20b8000 {
                compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp";
                reg = <0x20b8000 0x4000>;
                interrupts = <0x0 0x52 0x4>;
                clocks = <0x4 0x3e>;
                status = "disabled";
            };

            wdog@20bc000 {
                compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                reg = <0x20bc000 0x4000>;
                interrupts = <0x0 0x50 0x4>;
                clocks = <0x4 0x0>;
                status = "disabled";
            };

            wdog@20c0000 {
                compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                reg = <0x20c0000 0x4000>;
                interrupts = <0x0 0x51 0x4>;
                clocks = <0x4 0x0>;
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x1d>;
                fsl,ext-reset-output;
            };

            ccm@20c4000 {
                compatible = "fsl,imx6q-ccm";
                reg = <0x20c4000 0x4000>;
                interrupts = <0x0 0x57 0x4 0x0 0x58 0x4>;
                #clock-cells = <0x1>;
                assigned-clocks = <0x4 0x21 0x4 0x22>;
                assigned-clock-parents = <0x4 0xac 0x4 0xac>;
                phandle = <0x4>;
            };

            anatop@20c8000 {
                compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
                reg = <0x20c8000 0x1000>;
                interrupts = <0x0 0x31 0x4 0x0 0x36 0x4 0x0 0x7f 0x4>;
                phandle = <0x2>;

                regulator-1p1 {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vdd1p1";
                    regulator-min-microvolt = <0xf4240>;
                    regulator-max-microvolt = <0x124f80>;
                    regulator-always-on;
                    anatop-reg-offset = <0x110>;
                    anatop-vol-bit-shift = <0x8>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-min-bit-val = <0x4>;
                    anatop-min-voltage = <0xc3500>;
                    anatop-max-voltage = <0x14fb18>;
                    anatop-enable-bit = <0x0>;
                };

                regulator-3p0 {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vdd3p0";
                    regulator-min-microvolt = <0x2ab980>;
                    regulator-max-microvolt = <0x3010b0>;
                    regulator-always-on;
                    anatop-reg-offset = <0x120>;
                    anatop-vol-bit-shift = <0x8>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-min-bit-val = <0x0>;
                    anatop-min-voltage = <0x280de8>;
                    anatop-max-voltage = <0x33e140>;
                    anatop-enable-bit = <0x0>;
                };

                regulator-2p5 {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vdd2p5";
                    regulator-min-microvolt = <0x225510>;
                    regulator-max-microvolt = <0x29f630>;
                    regulator-always-on;
                    anatop-reg-offset = <0x130>;
                    anatop-vol-bit-shift = <0x8>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-min-bit-val = <0x0>;
                    anatop-min-voltage = <0x200b20>;
                    anatop-max-voltage = <0x2bde78>;
                    anatop-enable-bit = <0x0>;
                };

                regulator-vddcore {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vddarm";
                    regulator-min-microvolt = <0xb1008>;
                    regulator-max-microvolt = <0x162010>;
                    regulator-always-on;
                    anatop-reg-offset = <0x140>;
                    anatop-vol-bit-shift = <0x0>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-delay-reg-offset = <0x170>;
                    anatop-delay-bit-shift = <0x18>;
                    anatop-delay-bit-width = <0x2>;
                    anatop-min-bit-val = <0x1>;
                    anatop-min-voltage = <0xb1008>;
                    anatop-max-voltage = <0x162010>;
                    vin-supply = <0x1e>;
                    phandle = <0x5f>;
                };

                regulator-vddpu {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vddpu";
                    regulator-min-microvolt = <0xb1008>;
                    regulator-max-microvolt = <0x162010>;
                    regulator-enable-ramp-delay = <0x96>;
                    anatop-reg-offset = <0x140>;
                    anatop-vol-bit-shift = <0x9>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-delay-reg-offset = <0x170>;
                    anatop-delay-bit-shift = <0x1a>;
                    anatop-delay-bit-width = <0x2>;
                    anatop-min-bit-val = <0x1>;
                    anatop-min-voltage = <0xb1008>;
                    anatop-max-voltage = <0x162010>;
                    vin-supply = <0x1f>;
                    phandle = <0x21>;
                };

                regulator-vddsoc {
                    compatible = "fsl,anatop-regulator";
                    regulator-name = "vddsoc";
                    regulator-min-microvolt = <0xb1008>;
                    regulator-max-microvolt = <0x162010>;
                    regulator-always-on;
                    anatop-reg-offset = <0x140>;
                    anatop-vol-bit-shift = <0x12>;
                    anatop-vol-bit-width = <0x5>;
                    anatop-delay-reg-offset = <0x170>;
                    anatop-delay-bit-shift = <0x1c>;
                    anatop-delay-bit-width = <0x2>;
                    anatop-min-bit-val = <0x1>;
                    anatop-min-voltage = <0xb1008>;
                    anatop-max-voltage = <0x162010>;
                    vin-supply = <0x1f>;
                    phandle = <0x60>;
                };
            };

            usbphy@20c9000 {
                compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
                reg = <0x20c9000 0x1000>;
                interrupts = <0x0 0x2c 0x4>;
                clocks = <0x4 0xb6>;
                fsl,anatop = <0x2>;
                phandle = <0x2f>;
            };

            usbphy@20ca000 {
                compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
                reg = <0x20ca000 0x1000>;
                interrupts = <0x0 0x2d 0x4>;
                clocks = <0x4 0xb7>;
                fsl,anatop = <0x2>;
                phandle = <0x33>;
            };

            snvs@20cc000 {
                compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
                reg = <0x20cc000 0x4000>;
                phandle = <0x20>;

                snvs-rtc-lp {
                    compatible = "fsl,sec-v4.0-mon-rtc-lp";
                    regmap = <0x20>;
                    offset = <0x34>;
                    interrupts = <0x0 0x13 0x4 0x0 0x14 0x4>;
                };

                snvs-poweroff {
                    compatible = "syscon-poweroff";
                    regmap = <0x20>;
                    offset = <0x38>;
                    value = <0x60>;
                    mask = <0x60>;
                    status = "okay";
                };

                snvs-lpgpr {
                    compatible = "fsl,imx6q-snvs-lpgpr";
                };
            };

            epit@20d0000 {
                reg = <0x20d0000 0x4000>;
                interrupts = <0x0 0x38 0x4>;
            };

            epit@20d4000 {
                reg = <0x20d4000 0x4000>;
                interrupts = <0x0 0x39 0x4>;
            };

            src@20d8000 {
                compatible = "fsl,imx6q-src", "fsl,imx51-src";
                reg = <0x20d8000 0x4000>;
                interrupts = <0x0 0x5b 0x4 0x0 0x60 0x4>;
                #reset-cells = <0x1>;
                phandle = <0x19>;
            };

            gpc@20dc000 {
                compatible = "fsl,imx6q-gpc";
                reg = <0x20dc000 0x4000>;
                interrupt-controller;
                #interrupt-cells = <0x3>;
                interrupts = <0x0 0x59 0x4 0x0 0x5a 0x4>;
                interrupt-parent = <0x11>;
                clocks = <0x4 0x3e>;
                clock-names = "ipg";
                phandle = <0x1>;

                pgc {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    power-domain@0 {
                        reg = <0x0>;
                        #power-domain-cells = <0x0>;
                    };

                    power-domain@1 {
                        reg = <0x1>;
                        #power-domain-cells = <0x0>;
                        power-supply = <0x21>;
                        clocks = <0x4 0x7a 0x4 0x4a 0x4 0x79 0x4 0x1a 0x4 0x8f 0x4 0xa8>;
                        phandle = <0x10>;
                    };
                };
            };

            iomuxc-gpr@20e0000 {
                compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
                reg = <0x20e0000 0x38>;
                phandle = <0x5>;

                mux-controller {
                    compatible = "mmio-mux";
                    #mux-control-cells = <0x1>;
                    mux-reg-masks = <0x34 0x7 0x34 0x38 0xc 0xc 0xc 0xc0 0xc 0x300 0x28 0x3 0x28 0xc>;
                    phandle = <0x22>;
                };

                ipu1_csi0_mux {
                    compatible = "video-mux";
                    mux-controls = <0x22 0x0>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    port@0 {
                        reg = <0x0>;

                        endpoint {
                            remote-endpoint = <0x23>;
                            phandle = <0x48>;
                        };
                    };

                    port@1 {
                        reg = <0x1>;

                        endpoint {
                            remote-endpoint = <0x24>;
                            phandle = <0x4a>;
                        };
                    };

                    port@2 {
                        reg = <0x2>;

                        endpoint {
                            remote-endpoint = <0x25>;
                            phandle = <0x4c>;
                        };
                    };

                    port@3 {
                        reg = <0x3>;

                        endpoint {
                            remote-endpoint = <0x26>;
                            phandle = <0x4e>;
                        };
                    };

                    port@4 {
                        reg = <0x4>;

                        endpoint {
                            remote-endpoint = <0x27>;
                            phandle = <0x41>;
                        };
                    };

                    port@5 {
                        reg = <0x5>;

                        endpoint {
                            remote-endpoint = <0x28>;
                            phandle = <0x54>;
                        };
                    };
                };

                ipu1_csi1_mux {
                    compatible = "video-mux";
                    mux-controls = <0x22 0x1>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    port@0 {
                        reg = <0x0>;

                        endpoint {
                            remote-endpoint = <0x29>;
                            phandle = <0x49>;
                        };
                    };

                    port@1 {
                        reg = <0x1>;

                        endpoint {
                            remote-endpoint = <0x2a>;
                            phandle = <0x4b>;
                        };
                    };

                    port@2 {
                        reg = <0x2>;

                        endpoint {
                            remote-endpoint = <0x2b>;
                            phandle = <0x4d>;
                        };
                    };

                    port@3 {
                        reg = <0x3>;

                        endpoint {
                            remote-endpoint = <0x2c>;
                            phandle = <0x4f>;
                        };
                    };

                    port@4 {
                        reg = <0x4>;

                        endpoint {
                        };
                    };

                    port@5 {
                        reg = <0x5>;

                        endpoint {
                            remote-endpoint = <0x2d>;
                            phandle = <0x55>;
                        };
                    };
                };
            };

            iomuxc@20e0000 {
                compatible = "fsl,imx6dl-iomuxc";
                reg = <0x20e0000 0x4000>;
                pinctrl-names = "default";
                pinctrl-0 = <0x2e>;
                phandle = <0x1c>;

                imx6qdl-sabresd {

                    hoggrp {
                        fsl,pins = <0x284 0x66c 0x0 0x5 0x0 0x1b0b0 0x288 0x670 0x0 0x5 0x0 0x1b0b0 0x28c 0x674 0x0 0x5 0x0 0x1b0b0 0x290 0x678 0x0 0x5 0x0 0x1b0b0 0x20c 0x5dc 0x0 0x0 0x0 0x130b0 0x270 0x658 0x0 0x5 0x0 0x1b0b0 0x208 0x5d8 0x0 0x5 0x0 0x1b0b0 0x15c 0x52c 0x0 0x5 0x0 0x1b0b0 0x1e4 0x5b4 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x2e>;
                    };

                    audmuxgrp {
                        fsl,pins = <0x80 0x394 0x0 0x4 0x0 0x130b0 0x74 0x388 0x0 0x4 0x0 0x130b0 0x78 0x38c 0x0 0x4 0x0 0x110b0 0x7c 0x390 0x0 0x4 0x0 0x130b0>;
                        phandle = <0x47>;
                    };

                    ecspi1grp {
                        fsl,pins = <0x248 0x630 0x7dc 0x0 0x3 0x100b1 0x258 0x640 0x7e0 0x0 0x3 0x100b1 0x244 0x62c 0x7d8 0x0 0x3 0x100b1 0x25c 0x644 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x17>;
                    };

                    enetgrp {
                        fsl,pins = <0x1ec 0x5bc 0x810 0x1 0x0 0x1b0b0 0x1e8 0x5b8 0x0 0x1 0x0 0x1b0b0 0x2d8 0x6c0 0x0 0x1 0x0 0x1b030 0x2c4 0x6ac 0x0 0x1 0x0 0x1b030 0x2c8 0x6b0 0x0 0x1 0x0 0x1b030 0x2cc 0x6b4 0x0 0x1 0x0 0x1b030 0x2d0 0x6b8 0x0 0x1 0x0 0x1b030 0x2d4 0x6bc 0x0 0x1 0x0 0x1b030 0x1f0 0x5c0 0x0 0x1 0x0 0x1b0b0 0x2c0 0x6a8 0x814 0x1 0x1 0x1b030 0x2ac 0x694 0x818 0x1 0x1 0x1b030 0x2b0 0x698 0x81c 0x1 0x1 0x1b030 0x2b4 0x69c 0x820 0x1 0x1 0x1b030 0x2b8 0x6a0 0x824 0x1 0x1 0x1b030 0x2bc 0x6a4 0x828 0x1 0x1 0x1b030 0x214 0x5e4 0x80c 0x2 0x0 0x4001b0a8>;
                        phandle = <0x35>;
                    };

                    gpio_keysgrp {
                        fsl,pins = <0x178 0x548 0x0 0x5 0x0 0x1b0b0 0x22c 0x5fc 0x0 0x5 0x0 0x1b0b0 0x230 0x600 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x68>;
                    };

                    hdmicecgrp {
                        fsl,pins = <0x260 0x648 0x85c 0x6 0x1 0x1f8b0>;
                        phandle = <0xc>;
                    };

                    i2c1grp {
                        fsl,pins = <0x84 0x398 0x86c 0x4 0x0 0x4001b8b1 0x88 0x39c 0x868 0x4 0x0 0x4001b8b1>;
                        phandle = <0x3b>;
                    };

                    i2c2grp {
                        fsl,pins = <0x250 0x638 0x870 0x4 0x1 0x4001b8b1 0x264 0x64c 0x874 0x4 0x1 0x4001b8b1>;
                        phandle = <0x42>;
                    };

                    i2c3grp {
                        fsl,pins = <0x228 0x5f8 0x878 0x2 0x1 0x4001b8b1 0x234 0x604 0x87c 0x2 0x2 0x4001b8b1>;
                        phandle = <0x45>;
                    };

                    ipu1csi0grp {
                        fsl,pins = <0x54 0x368 0x0 0x0 0x0 0x1b0b0 0x58 0x36c 0x0 0x0 0x0 0x1b0b0 0x5c 0x370 0x0 0x0 0x0 0x1b0b0 0x60 0x374 0x0 0x0 0x0 0x1b0b0 0x64 0x378 0x0 0x0 0x0 0x1b0b0 0x68 0x37c 0x0 0x0 0x0 0x1b0b0 0x6c 0x380 0x0 0x0 0x0 0x1b0b0 0x70 0x384 0x0 0x0 0x0 0x1b0b0 0x94 0x3a8 0x0 0x0 0x0 0x1b0b0 0x90 0x3a4 0x0 0x0 0x0 0x1b0b0 0x98 0x3ac 0x0 0x0 0x0 0x1b0b0>;
                        phandle = <0x53>;
                    };

                    ov5640grp {
                        fsl,pins = <0x2ec 0x6d4 0x0 0x5 0x0 0x1b0b0 0x2dc 0x6c4 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x43>;
                    };

                    ov5642grp {
                        fsl,pins = <0x2e4 0x6cc 0x0 0x5 0x0 0x1b0b0 0x2e8 0x6d0 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x3d>;
                    };

                    pciegrp {
                        fsl,pins = <0x218 0x5e8 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x12>;
                    };

                    pciereggrp {
                        fsl,pins = <0x150 0x520 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x67>;
                    };

                    pwm1grp {
                        fsl,pins = <0x2f0 0x6d8 0x0 0x3 0x0 0x1b0b1>;
                        phandle = <0x1b>;
                    };

                    uart1grp {
                        fsl,pins = <0x4c 0x360 0x0 0x3 0x0 0x1b0b1 0x50 0x364 0x8fc 0x3 0x1 0x1b0b1>;
                        phandle = <0x18>;
                    };

                    usbotggrp {
                        fsl,pins = <0x1f4 0x5c4 0x790 0x0 0x0 0x17059>;
                        phandle = <0x32>;
                    };

                    usdhc2grp {
                        fsl,pins = <0x2f8 0x6e0 0x0 0x0 0x0 0x17059 0x2f4 0x6dc 0x930 0x0 0x1 0x10059 0x2fc 0x6e4 0x0 0x0 0x0 0x17059 0x300 0x6e8 0x0 0x0 0x0 0x17059 0x304 0x6ec 0x0 0x0 0x0 0x17059 0x308 0x6f0 0x0 0x0 0x0 0x17059 0x294 0x67c 0x0 0x1 0x0 0x17059 0x298 0x680 0x0 0x1 0x0 0x17059 0x29c 0x684 0x0 0x1 0x0 0x17059 0x2a0 0x688 0x0 0x1 0x0 0x17059>;
                        phandle = <0x37>;
                    };

                    usdhc3grp {
                        fsl,pins = <0x310 0x6f8 0x0 0x0 0x0 0x17059 0x30c 0x6f4 0x934 0x0 0x1 0x10059 0x314 0x6fc 0x0 0x0 0x0 0x17059 0x318 0x700 0x0 0x0 0x0 0x17059 0x31c 0x704 0x0 0x0 0x0 0x17059 0x320 0x708 0x0 0x0 0x0 0x17059 0x324 0x70c 0x0 0x0 0x0 0x17059 0x328 0x710 0x0 0x0 0x0 0x17059 0x32c 0x714 0x0 0x0 0x0 0x17059 0x330 0x718 0x0 0x0 0x0 0x17059>;
                        phandle = <0x39>;
                    };

                    usdhc4grp {
                        fsl,pins = <0x33c 0x724 0x0 0x0 0x0 0x17059 0x338 0x720 0x938 0x0 0x1 0x10059 0x340 0x728 0x0 0x1 0x0 0x17059 0x344 0x72c 0x0 0x1 0x0 0x17059 0x348 0x730 0x0 0x1 0x0 0x17059 0x34c 0x734 0x0 0x1 0x0 0x17059 0x350 0x738 0x0 0x1 0x0 0x17059 0x354 0x73c 0x0 0x1 0x0 0x17059 0x358 0x740 0x0 0x1 0x0 0x17059 0x35c 0x744 0x0 0x1 0x0 0x17059>;
                        phandle = <0x3a>;
                    };

                    wdoggrp {
                        fsl,pins = <0x210 0x5e0 0x0 0x1 0x0 0x1b0b0>;
                        phandle = <0x1d>;
                    };
                };

                gpio_leds {

                    gpioledsgrp {
                        fsl,pins = <0x224 0x5f4 0x0 0x5 0x0 0x1b0b0>;
                        phandle = <0x6c>;
                    };
                };
            };

            dcic@20e4000 {
                reg = <0x20e4000 0x4000>;
                interrupts = <0x0 0x7c 0x4>;
            };

            dcic@20e8000 {
                reg = <0x20e8000 0x4000>;
                interrupts = <0x0 0x7d 0x4>;
            };

            sdma@20ec000 {
                compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
                reg = <0x20ec000 0x4000>;
                interrupts = <0x0 0x2 0x4>;
                clocks = <0x4 0x3e 0x4 0x9b>;
                clock-names = "ipg", "ahb";
                #dma-cells = <0x3>;
                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
                phandle = <0x15>;
            };

            pxp@20f0000 {
                reg = <0x20f0000 0x4000>;
                interrupts = <0x0 0x62 0x4>;
            };

            epdc@20f4000 {
                reg = <0x20f4000 0x4000>;
                interrupts = <0x0 0x61 0x4>;
            };
        };

        aips-bus@2100000 {
            compatible = "fsl,aips-bus", "simple-bus";
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            reg = <0x2100000 0x100000>;
            ranges;

            caam@2100000 {
                compatible = "fsl,sec-v4.0";
                #address-cells = <0x1>;
                #size-cells = <0x1>;
                reg = <0x2100000 0x10000>;
                ranges = <0x0 0x2100000 0x10000>;
                clocks = <0x4 0xf1 0x4 0xf2 0x4 0xf3 0x4 0xc4>;
                clock-names = "mem", "aclk", "ipg", "emi_slow";

                jr0@1000 {
                    compatible = "fsl,sec-v4.0-job-ring";
                    reg = <0x1000 0x1000>;
                    interrupts = <0x0 0x69 0x4>;
                };

                jr1@2000 {
                    compatible = "fsl,sec-v4.0-job-ring";
                    reg = <0x2000 0x1000>;
                    interrupts = <0x0 0x6a 0x4>;
                };
            };

            aipstz@217c000 {
                reg = <0x217c000 0x4000>;
            };

            usb@2184000 {
                compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                reg = <0x2184000 0x200>;
                interrupts = <0x0 0x2b 0x4>;
                clocks = <0x4 0xa2>;
                fsl,usbphy = <0x2f>;
                fsl,usbmisc = <0x30 0x0>;
                ahb-burst-config = <0x0>;
                tx-burst-size-dword = <0x10>;
                rx-burst-size-dword = <0x10>;
                status = "okay";
                vbus-supply = <0x31>;
                pinctrl-names = "default";
                pinctrl-0 = <0x32>;
                disable-over-current;
            };

            usb@2184200 {
                compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                reg = <0x2184200 0x200>;
                interrupts = <0x0 0x28 0x4>;
                clocks = <0x4 0xa2>;
                fsl,usbphy = <0x33>;
                fsl,usbmisc = <0x30 0x1>;
                dr_mode = "host";
                ahb-burst-config = <0x0>;
                tx-burst-size-dword = <0x10>;
                rx-burst-size-dword = <0x10>;
                status = "okay";
                vbus-supply = <0x34>;
            };

            usb@2184400 {
                compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                reg = <0x2184400 0x200>;
                interrupts = <0x0 0x29 0x4>;
                clocks = <0x4 0xa2>;
                fsl,usbmisc = <0x30 0x2>;
                dr_mode = "host";
                ahb-burst-config = <0x0>;
                tx-burst-size-dword = <0x10>;
                rx-burst-size-dword = <0x10>;
                status = "disabled";
            };

            usb@2184600 {
                compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
                reg = <0x2184600 0x200>;
                interrupts = <0x0 0x2a 0x4>;
                clocks = <0x4 0xa2>;
                fsl,usbmisc = <0x30 0x3>;
                dr_mode = "host";
                ahb-burst-config = <0x0>;
                tx-burst-size-dword = <0x10>;
                rx-burst-size-dword = <0x10>;
                status = "disabled";
            };

            usbmisc@2184800 {
                #index-cells = <0x1>;
                compatible = "fsl,imx6q-usbmisc";
                reg = <0x2184800 0x200>;
                clocks = <0x4 0xa2>;
                phandle = <0x30>;
            };

            ethernet@2188000 {
                compatible = "fsl,imx6q-fec";
                reg = <0x2188000 0x4000>;
                interrupt-names = "int0", "pps";
                interrupts = <0x0 0x76 0x4 0x0 0x77 0x4>;
                clocks = <0x4 0x75 0x4 0x75 0x4 0xbe>;
                clock-names = "ipg", "ahb", "ptp";
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x35>;
                phy-mode = "rgmii";
                phy-reset-gpios = <0x36 0x19 0x1>;
            };

            mlb@218c000 {
                reg = <0x218c000 0x4000>;
                interrupts = <0x0 0x35 0x4 0x0 0x75 0x4 0x0 0x7e 0x4>;
            };

            usdhc@2190000 {
                compatible = "fsl,imx6q-usdhc";
                reg = <0x2190000 0x4000>;
                interrupts = <0x0 0x16 0x4>;
                clocks = <0x4 0xa3 0x4 0xa3 0x4 0xa3>;
                clock-names = "ipg", "ahb", "per";
                bus-width = <0x4>;
                status = "disabled";
            };

            usdhc@2194000 {
                compatible = "fsl,imx6q-usdhc";
                reg = <0x2194000 0x4000>;
                interrupts = <0x0 0x17 0x4>;
                clocks = <0x4 0xa4 0x4 0xa4 0x4 0xa4>;
                clock-names = "ipg", "ahb", "per";
                bus-width = <0x8>;
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x37>;
                cd-gpios = <0x38 0x2 0x1>;
                wp-gpios = <0x38 0x3 0x0>;
            };

            usdhc@2198000 {
                compatible = "fsl,imx6q-usdhc";
                reg = <0x2198000 0x4000>;
                interrupts = <0x0 0x18 0x4>;
                clocks = <0x4 0xa5 0x4 0xa5 0x4 0xa5>;
                clock-names = "ipg", "ahb", "per";
                bus-width = <0x8>;
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x39>;
                cd-gpios = <0x38 0x0 0x1>;
                wp-gpios = <0x38 0x1 0x0>;
            };

            usdhc@219c000 {
                compatible = "fsl,imx6q-usdhc";
                reg = <0x219c000 0x4000>;
                interrupts = <0x0 0x19 0x4>;
                clocks = <0x4 0xa6 0x4 0xa6 0x4 0xa6>;
                clock-names = "ipg", "ahb", "per";
                bus-width = <0x8>;
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x3a>;
                non-removable;
                no-1-8-v;
            };

            i2c@21a0000 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                reg = <0x21a0000 0x4000>;
                interrupts = <0x0 0x24 0x4>;
                clocks = <0x4 0x7d>;
                status = "okay";
                clock-frequency = <0x186a0>;
                pinctrl-names = "default";
                pinctrl-0 = <0x3b>;

                wm8962@1a {
                    compatible = "wlf,wm8962";
                    reg = <0x1a>;
                    clocks = <0x4 0xc9>;
                    DCVDD-supply = <0x3c>;
                    DBVDD-supply = <0x3c>;
                    AVDD-supply = <0x3c>;
                    CPVDD-supply = <0x3c>;
                    MICVDD-supply = <0x3c>;
                    PLLVDD-supply = <0x3c>;
                    SPKVDD1-supply = <0x3c>;
                    SPKVDD2-supply = <0x3c>;
                    gpio-cfg = <0x0 0x0 0x13 0x0 0x8014 0x0>;
                    phandle = <0x6a>;
                };

                camera@3c {
                    compatible = "ovti,ov5642";
                    pinctrl-names = "default";
                    pinctrl-0 = <0x3d>;
                    clocks = <0x4 0xc9>;
                    clock-names = "xclk";
                    reg = <0x3c>;
                    DOVDD-supply = <0x3e>;
                    AVDD-supply = <0x3f>;
                    DVDD-supply = <0x40>;
                    powerdown-gpios = <0x36 0x10 0x0>;
                    reset-gpios = <0x36 0x11 0x1>;
                    status = "disabled";

                    port {

                        endpoint {
                            remote-endpoint = <0x41>;
                            bus-width = <0x8>;
                            hsync-active = <0x1>;
                            vsync-active = <0x1>;
                            phandle = <0x27>;
                        };
                    };
                };
            };

            i2c@21a4000 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                reg = <0x21a4000 0x4000>;
                interrupts = <0x0 0x25 0x4>;
                clocks = <0x4 0x7e>;
                status = "okay";
                clock-frequency = <0x186a0>;
                pinctrl-names = "default";
                pinctrl-0 = <0x42>;
                phandle = <0xd>;

                camera@3c {
                    compatible = "ovti,ov5640";
                    pinctrl-names = "default";
                    pinctrl-0 = <0x43>;
                    reg = <0x3c>;
                    clocks = <0x4 0xc9>;
                    clock-names = "xclk";
                    DOVDD-supply = <0x3e>;
                    AVDD-supply = <0x3f>;
                    DVDD-supply = <0x40>;
                    powerdown-gpios = <0x36 0x13 0x0>;
                    reset-gpios = <0x36 0x14 0x1>;

                    port {

                        endpoint {
                            remote-endpoint = <0x44>;
                            clock-lanes = <0x0>;
                            data-lanes = <0x1 0x2>;
                            phandle = <0x50>;
                        };
                    };
                };

                pfuze100@8 {
                    compatible = "fsl,pfuze100";
                    reg = <0x8>;

                    regulators {

                        sw1ab {
                            regulator-min-microvolt = <0x493e0>;
                            regulator-max-microvolt = <0x1c9c38>;
                            regulator-boot-on;
                            regulator-always-on;
                            regulator-ramp-delay = <0x186a>;
                            phandle = <0x1e>;
                        };

                        sw1c {
                            regulator-min-microvolt = <0x493e0>;
                            regulator-max-microvolt = <0x1c9c38>;
                            regulator-boot-on;
                            regulator-always-on;
                            regulator-ramp-delay = <0x186a>;
                            phandle = <0x1f>;
                        };

                        sw2 {
                            regulator-min-microvolt = <0xc3500>;
                            regulator-max-microvolt = <0x325aa0>;
                            regulator-boot-on;
                            regulator-always-on;
                            regulator-ramp-delay = <0x186a>;
                        };

                        sw3a {
                            regulator-min-microvolt = <0x61a80>;
                            regulator-max-microvolt = <0x1e22d8>;
                            regulator-boot-on;
                            regulator-always-on;
                        };

                        sw3b {
                            regulator-min-microvolt = <0x61a80>;
                            regulator-max-microvolt = <0x1e22d8>;
                            regulator-boot-on;
                            regulator-always-on;
                        };

                        sw4 {
                            regulator-min-microvolt = <0xc3500>;
                            regulator-max-microvolt = <0x325aa0>;
                            regulator-always-on;
                        };

                        swbst {
                            regulator-min-microvolt = <0x4c4b40>;
                            regulator-max-microvolt = <0x4e9530>;
                            phandle = <0x66>;
                        };

                        vsnvs {
                            regulator-min-microvolt = <0xf4240>;
                            regulator-max-microvolt = <0x2dc6c0>;
                            regulator-boot-on;
                            regulator-always-on;
                        };

                        vrefddr {
                            regulator-boot-on;
                            regulator-always-on;
                        };

                        vgen1 {
                            regulator-min-microvolt = <0xc3500>;
                            regulator-max-microvolt = <0x17a6b0>;
                        };

                        vgen2 {
                            regulator-min-microvolt = <0xc3500>;
                            regulator-max-microvolt = <0x17a6b0>;
                            phandle = <0x40>;
                        };

                        vgen3 {
                            regulator-min-microvolt = <0x1b7740>;
                            regulator-max-microvolt = <0x325aa0>;
                            phandle = <0x3f>;
                        };

                        vgen4 {
                            regulator-min-microvolt = <0x1b7740>;
                            regulator-max-microvolt = <0x325aa0>;
                            regulator-always-on;
                            phandle = <0x3e>;
                        };

                        vgen5 {
                            regulator-min-microvolt = <0x1b7740>;
                            regulator-max-microvolt = <0x325aa0>;
                            regulator-always-on;
                        };

                        vgen6 {
                            regulator-min-microvolt = <0x1b7740>;
                            regulator-max-microvolt = <0x325aa0>;
                            regulator-always-on;
                        };
                    };
                };
            };

            i2c@21a8000 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                reg = <0x21a8000 0x4000>;
                interrupts = <0x0 0x26 0x4>;
                clocks = <0x4 0x7f>;
                status = "okay";
                clock-frequency = <0x186a0>;
                pinctrl-names = "default";
                pinctrl-0 = <0x45>;

                egalax_ts@4 {
                    compatible = "eeti,egalax_ts";
                    reg = <0x4>;
                    interrupt-parent = <0x46>;
                    interrupts = <0x7 0x2>;
                    wakeup-gpios = <0x46 0x7 0x0>;
                };
            };

            romcp@21ac000 {
                reg = <0x21ac000 0x4000>;
            };

            mmdc@21b0000 {
                compatible = "fsl,imx6q-mmdc";
                reg = <0x21b0000 0x4000>;
            };

            mmdc@21b4000 {
                reg = <0x21b4000 0x4000>;
            };

            weim@21b8000 {
                #address-cells = <0x2>;
                #size-cells = <0x1>;
                compatible = "fsl,imx6q-weim";
                reg = <0x21b8000 0x4000>;
                interrupts = <0x0 0xe 0x4>;
                clocks = <0x4 0xc4>;
                fsl,weim-cs-gpr = <0x5>;
                status = "disabled";
            };

            ocotp@21bc000 {
                compatible = "fsl,imx6q-ocotp", "syscon";
                reg = <0x21bc000 0x4000>;
                clocks = <0x4 0x80>;
                phandle = <0x3>;
            };

            tzasc@21d0000 {
                reg = <0x21d0000 0x4000>;
                interrupts = <0x0 0x6c 0x4>;
            };

            tzasc@21d4000 {
                reg = <0x21d4000 0x4000>;
                interrupts = <0x0 0x6d 0x4>;
            };

            audmux@21d8000 {
                compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
                reg = <0x21d8000 0x4000>;
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0x47>;
            };

            mipi@21dc000 {
                compatible = "fsl,imx6-mipi-csi2";
                reg = <0x21dc000 0x4000>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                interrupts = <0x0 0x64 0x4 0x0 0x65 0x4>;
                clocks = <0x4 0x8a 0x4 0xee 0x4 0x61>;
                clock-names = "dphy", "ref", "pix";
                status = "okay";

                port@1 {
                    reg = <0x1>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    endpoint@0 {
                        reg = <0x0>;
                        remote-endpoint = <0x48>;
                        phandle = <0x23>;
                    };

                    endpoint@1 {
                        reg = <0x1>;
                        remote-endpoint = <0x49>;
                        phandle = <0x29>;
                    };
                };

                port@2 {
                    reg = <0x2>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    endpoint@0 {
                        reg = <0x0>;
                        remote-endpoint = <0x4a>;
                        phandle = <0x24>;
                    };

                    endpoint@1 {
                        reg = <0x1>;
                        remote-endpoint = <0x4b>;
                        phandle = <0x2a>;
                    };
                };

                port@3 {
                    reg = <0x3>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    endpoint@0 {
                        reg = <0x0>;
                        remote-endpoint = <0x4c>;
                        phandle = <0x25>;
                    };

                    endpoint@1 {
                        reg = <0x1>;
                        remote-endpoint = <0x4d>;
                        phandle = <0x2b>;
                    };
                };

                port@4 {
                    reg = <0x4>;
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    endpoint@0 {
                        reg = <0x0>;
                        remote-endpoint = <0x4e>;
                        phandle = <0x26>;
                    };

                    endpoint@1 {
                        reg = <0x1>;
                        remote-endpoint = <0x4f>;
                        phandle = <0x2c>;
                    };
                };

                port@0 {
                    reg = <0x0>;

                    endpoint {
                        remote-endpoint = <0x50>;
                        clock-lanes = <0x0>;
                        data-lanes = <0x1 0x2>;
                        phandle = <0x44>;
                    };
                };
            };

            mipi@21e0000 {
                reg = <0x21e0000 0x4000>;
                status = "disabled";

                ports {
                    #address-cells = <0x1>;
                    #size-cells = <0x0>;

                    port@0 {
                        reg = <0x0>;

                        endpoint {
                            remote-endpoint = <0x51>;
                            phandle = <0x57>;
                        };
                    };

                    port@1 {
                        reg = <0x1>;

                        endpoint {
                            remote-endpoint = <0x52>;
                            phandle = <0x5b>;
                        };
                    };
                };
            };

            vdoa@21e4000 {
                compatible = "fsl,imx6q-vdoa";
                reg = <0x21e4000 0x4000>;
                interrupts = <0x0 0x12 0x4>;
                clocks = <0x4 0xca>;
            };

            serial@21e8000 {
                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                reg = <0x21e8000 0x4000>;
                interrupts = <0x0 0x1b 0x4>;
                clocks = <0x4 0xa0 0x4 0xa1>;
                clock-names = "ipg", "per";
                dmas = <0x15 0x1b 0x4 0x0 0x15 0x1c 0x4 0x0>;
                dma-names = "rx", "tx";
                status = "disabled";
            };

            serial@21ec000 {
                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                reg = <0x21ec000 0x4000>;
                interrupts = <0x0 0x1c 0x4>;
                clocks = <0x4 0xa0 0x4 0xa1>;
                clock-names = "ipg", "per";
                dmas = <0x15 0x1d 0x4 0x0 0x15 0x1e 0x4 0x0>;
                dma-names = "rx", "tx";
                status = "disabled";
            };

            serial@21f0000 {
                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                reg = <0x21f0000 0x4000>;
                interrupts = <0x0 0x1d 0x4>;
                clocks = <0x4 0xa0 0x4 0xa1>;
                clock-names = "ipg", "per";
                dmas = <0x15 0x1f 0x4 0x0 0x15 0x20 0x4 0x0>;
                dma-names = "rx", "tx";
                status = "disabled";
            };

            serial@21f4000 {
                compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
                reg = <0x21f4000 0x4000>;
                interrupts = <0x0 0x1e 0x4>;
                clocks = <0x4 0xa0 0x4 0xa1>;
                clock-names = "ipg", "per";
                dmas = <0x15 0x21 0x4 0x0 0x15 0x22 0x4 0x0>;
                dma-names = "rx", "tx";
                status = "disabled";
            };

            i2c@21f8000 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                reg = <0x21f8000 0x4000>;
                interrupts = <0x0 0x23 0x4>;
                clocks = <0x4 0x74>;
                status = "disabled";
            };
        };

        ipu@2400000 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            compatible = "fsl,imx6q-ipu";
            reg = <0x2400000 0x400000>;
            interrupts = <0x0 0x6 0x4 0x0 0x5 0x4>;
            clocks = <0x4 0x82 0x4 0x83 0x4 0x84>;
            clock-names = "bus", "di0", "di1";
            resets = <0x19 0x2>;

            port@0 {
                reg = <0x0>;
                pinctrl-names = "default";
                pinctrl-0 = <0x53>;
                phandle = <0x61>;

                endpoint {
                    remote-endpoint = <0x54>;
                    bus-width = <0x8>;
                    data-shift = <0xc>;
                    hsync-active = <0x1>;
                    vsync-active = <0x1>;
                    phandle = <0x28>;
                };
            };

            port@1 {
                reg = <0x1>;
                phandle = <0x62>;

                endpoint {
                    remote-endpoint = <0x55>;
                    clock-lanes = <0x0>;
                    data-lanes = <0x1 0x2>;
                    phandle = <0x2d>;
                };
            };

            port@2 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                reg = <0x2>;
                phandle = <0x63>;

                endpoint@0 {
                    reg = <0x0>;
                };

                endpoint@1 {
                    reg = <0x1>;
                    remote-endpoint = <0x56>;
                    phandle = <0xe>;
                };

                endpoint@2 {
                    reg = <0x2>;
                    remote-endpoint = <0x57>;
                    phandle = <0x51>;
                };

                endpoint@3 {
                    reg = <0x3>;
                    remote-endpoint = <0x58>;
                    phandle = <0x6>;
                };

                endpoint@4 {
                    reg = <0x4>;
                    remote-endpoint = <0x59>;
                    phandle = <0x8>;
                };
            };

            port@3 {
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                reg = <0x3>;
                phandle = <0x64>;

                endpoint@0 {
                    reg = <0x0>;
                };

                endpoint@1 {
                    reg = <0x1>;
                    remote-endpoint = <0x5a>;
                    phandle = <0xf>;
                };

                endpoint@2 {
                    reg = <0x2>;
                    remote-endpoint = <0x5b>;
                    phandle = <0x52>;
                };

                endpoint@3 {
                    reg = <0x3>;
                    remote-endpoint = <0x5c>;
                    phandle = <0x7>;
                };

                endpoint@4 {
                    reg = <0x4>;
                    remote-endpoint = <0x5d>;
                    phandle = <0x9>;
                };
            };
        };

        sram@900000 {
            compatible = "mmio-sram";
            reg = <0x900000 0x20000>;
            clocks = <0x4 0x8e>;
            phandle = <0x1a>;
        };
    };

    cpus {
        #address-cells = <0x1>;
        #size-cells = <0x0>;

        cpu@0 {
            compatible = "arm,cortex-a9";
            device_type = "cpu";
            reg = <0x0>;
            next-level-cache = <0x5e>;
            operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x118c30>;
            fsl,soc-operating-points = <0xf32a0 0x11edd8 0xc15c0 0x11edd8 0x60ae0 0x11edd8>;
            clock-latency = <0xee6c>;
            #cooling-cells = <0x2>;
            clocks = <0x4 0x68 0x4 0x6 0x4 0x10 0x4 0x11 0x4 0xaa>;
            clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys";
            arm-supply = <0x5f>;
            pu-supply = <0x21>;
            soc-supply = <0x60>;
        };

        cpu@1 {
            compatible = "arm,cortex-a9";
            device_type = "cpu";
            reg = <0x1>;
            next-level-cache = <0x5e>;
            operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x118c30>;
            fsl,soc-operating-points = <0xf32a0 0x11edd8 0xc15c0 0x11edd8 0x60ae0 0x11edd8>;
            clock-latency = <0xee6c>;
            clocks = <0x4 0x68 0x4 0x6 0x4 0x10 0x4 0x11 0x4 0xaa>;
            clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys";
            arm-supply = <0x5f>;
            pu-supply = <0x21>;
            soc-supply = <0x60>;
        };
    };

    capture-subsystem {
        compatible = "fsl,imx-capture-subsystem";
        ports = <0x61 0x62>;
    };

    display-subsystem {
        compatible = "fsl,imx-display-subsystem";
        ports = <0x63 0x64>;
    };

    memory@10000000 {
        reg = <0x10000000 0x40000000>;
    };

    regulators {
        compatible = "simple-bus";
        #address-cells = <0x1>;
        #size-cells = <0x0>;

        regulator@0 {
            compatible = "regulator-fixed";
            reg = <0x0>;
            regulator-name = "usb_otg_vbus";
            regulator-min-microvolt = <0x4c4b40>;
            regulator-max-microvolt = <0x4c4b40>;
            gpio = <0x65 0x16 0x0>;
            enable-active-high;
            vin-supply = <0x66>;
            phandle = <0x31>;
        };

        regulator@1 {
            compatible = "regulator-fixed";
            reg = <0x1>;
            regulator-name = "usb_h1_vbus";
            regulator-min-microvolt = <0x4c4b40>;
            regulator-max-microvolt = <0x4c4b40>;
            gpio = <0x36 0x1d 0x0>;
            enable-active-high;
            vin-supply = <0x66>;
            phandle = <0x34>;
        };

        regulator@2 {
            compatible = "regulator-fixed";
            reg = <0x2>;
            regulator-name = "wm8962-supply";
            gpio = <0x16 0xa 0x0>;
            enable-active-high;
            phandle = <0x3c>;
        };

        regulator@3 {
            compatible = "regulator-fixed";
            reg = <0x3>;
            pinctrl-names = "default";
            pinctrl-0 = <0x67>;
            regulator-name = "MPCIE_3V3";
            regulator-min-microvolt = <0x325aa0>;
            regulator-max-microvolt = <0x325aa0>;
            gpio = <0x65 0x13 0x0>;
            enable-active-high;
            phandle = <0x14>;
        };
    };

    gpio-keys {
        compatible = "gpio-keys";
        pinctrl-names = "default";
        pinctrl-0 = <0x68>;

        power {
            label = "Power Button";
            gpios = <0x65 0x1d 0x1>;
            wakeup-source;
            linux,code = <0x74>;
        };

        volume-up {
            label = "Volume Up";
            gpios = <0x36 0x4 0x1>;
            wakeup-source;
            linux,code = <0x73>;
        };

        volume-down {
            label = "Volume Down";
            gpios = <0x36 0x5 0x1>;
            wakeup-source;
            linux,code = <0x72>;
        };
    };

    sound {
        compatible = "fsl,imx6q-sabresd-wm8962", "fsl,imx-audio-wm8962";
        model = "wm8962-audio";
        ssi-controller = <0x69>;
        audio-codec = <0x6a>;
        audio-routing = "Headphone Jack", "HPOUTL", "Headphone Jack", "HPOUTR", "Ext Spk", "SPKOUTL", "Ext Spk", "SPKOUTR", "AMIC", "MICBIAS", "IN3R", "AMIC";
        mux-int-port = <0x2>;
        mux-ext-port = <0x3>;
    };

    backlight-lvds {
        compatible = "pwm-backlight";
        pwms = <0x6b 0x0 0x4c4b40>;
        brightness-levels = <0x0 0x4 0x8 0x10 0x20 0x40 0x80 0xff>;
        default-brightness-level = <0x7>;
        status = "okay";
        phandle = <0x6d>;
    };

    leds {
        compatible = "gpio-leds";
        pinctrl-names = "default";
        pinctrl-0 = <0x6c>;

        red {
            gpios = <0x36 0x2 0x0>;
            default-state = "on";
        };
    };

    panel {
        compatible = "hannstar,hsd100pxn1";
        backlight = <0x6d>;

        port {

            endpoint {
                remote-endpoint = <0x6e>;
                phandle = <0xa>;
            };
        };
    };
};