
Marking local functions:


Marking externally visible functions: SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00 Wdg_43_VR5510_schm_read_msr


Marking externally visible variables:


Reclaiming functions:
Reclaiming variables:
Clearing address taken flags:
Symbol table:

Sys_GetCoreID/29 (Sys_GetCoreID) @06b37380
  Type: function
  Visibility: external public
  References: 
  Referring: 
  Availability: not_available
  Function flags: optimize_size
  Called by: SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 
  Calls: 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06) @06b37b60
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (write)msr_WDG_EXCLUSIVE_AREA_06/12 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06) @06b378c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)msr_WDG_EXCLUSIVE_AREA_06/12 (write)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (read)reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05) @06b37540
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (write)msr_WDG_EXCLUSIVE_AREA_05/10 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05) @06b372a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)msr_WDG_EXCLUSIVE_AREA_05/10 (write)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (read)reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04) @06b31d20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (write)msr_WDG_EXCLUSIVE_AREA_04/8 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04) @06b31700
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)msr_WDG_EXCLUSIVE_AREA_04/8 (write)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (read)reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03) @06b31ee0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (write)msr_WDG_EXCLUSIVE_AREA_03/6 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03) @06b31c40
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)msr_WDG_EXCLUSIVE_AREA_03/6 (write)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (read)reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02) @06b318c0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (write)msr_WDG_EXCLUSIVE_AREA_02/4 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02) @06b31620
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)msr_WDG_EXCLUSIVE_AREA_02/4 (write)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (read)reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01) @06b312a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (write)msr_WDG_EXCLUSIVE_AREA_01/2 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01) @06b31000
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)msr_WDG_EXCLUSIVE_AREA_01/2 (write)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (read)reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 (SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00) @06b2c7e0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (write)msr_WDG_EXCLUSIVE_AREA_00/0 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Sys_GetCoreID/29 
SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 (SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00) @06b2cd20
  Type: function definition analyzed
  Visibility: externally_visible public
  References: reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)msr_WDG_EXCLUSIVE_AREA_00/0 (write)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (read)reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (write)
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: 
  Calls: Wdg_43_VR5510_schm_read_msr/14 Sys_GetCoreID/29 
Wdg_43_VR5510_schm_read_msr/14 (Wdg_43_VR5510_schm_read_msr) @06b2c9a0
  Type: function definition analyzed
  Visibility: externally_visible public
  References: 
  Referring: 
  Availability: available
  Function flags: body optimize_size
  Called by: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 
  Calls: 
reentry_guard_WDG_EXCLUSIVE_AREA_06/13 (reentry_guard_WDG_EXCLUSIVE_AREA_06) @06b27ee8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_06/12 (msr_WDG_EXCLUSIVE_AREA_06) @06b27e58
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/27 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06/28 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_05/11 (reentry_guard_WDG_EXCLUSIVE_AREA_05) @06b27dc8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_05/10 (msr_WDG_EXCLUSIVE_AREA_05) @06b27d38
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/25 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05/26 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_04/9 (reentry_guard_WDG_EXCLUSIVE_AREA_04) @06b27ca8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_04/8 (msr_WDG_EXCLUSIVE_AREA_04) @06b27c18
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/23 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04/24 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_03/7 (reentry_guard_WDG_EXCLUSIVE_AREA_03) @06b27b88
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_03/6 (msr_WDG_EXCLUSIVE_AREA_03) @06b27af8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/21 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03/22 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_02/5 (reentry_guard_WDG_EXCLUSIVE_AREA_02) @06b27a68
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_02/4 (msr_WDG_EXCLUSIVE_AREA_02) @06b279d8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/19 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02/20 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_01/3 (reentry_guard_WDG_EXCLUSIVE_AREA_01) @06b27948
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_01/2 (msr_WDG_EXCLUSIVE_AREA_01) @06b278b8
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/17 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01/18 (read)
  Availability: available
  Varpool flags:
reentry_guard_WDG_EXCLUSIVE_AREA_00/1 (reentry_guard_WDG_EXCLUSIVE_AREA_00) @06b27828
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 (read)SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 (read)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 (read)
  Availability: available
  Varpool flags:
msr_WDG_EXCLUSIVE_AREA_00/0 (msr_WDG_EXCLUSIVE_AREA_00) @06b27798
  Type: variable definition analyzed
  Visibility: force_output prevailing_def_ironly
  References: 
  Referring: SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/15 (write)SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00/16 (read)
  Availability: available
  Varpool flags:
SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_06[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_06 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_06[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_06[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_05[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_05 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_05[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_05[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_04[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_04 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_04[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_04[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_03[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_03 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_03[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_03[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_02[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_02 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_02[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_02[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_01[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_01 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_01[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_01[u32CoreId] = _5;
  return;

}


SchM_Exit_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId];
  _3 = _2 + 4294967295;
  reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId] = _3;
  # DEBUG BEGIN_STMT
  _4 = msr_WDG_EXCLUSIVE_AREA_00[u32CoreId];
  _5 = _4 & 1;
  if (_5 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 3> :
  _6 = reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId];
  if (_6 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsie i");

  <bb 5> :
  return;

}


SchM_Enter_Wdg_43_VR5510_WDG_EXCLUSIVE_AREA_00 ()
{
  uint32 u32CoreId;
  uint32 msr;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = Sys_GetCoreID ();
  u32CoreId = (uint32) _1;
  # DEBUG BEGIN_STMT
  _2 = reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId];
  if (_2 == 0)
    goto <bb 3>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  msr = Wdg_43_VR5510_schm_read_msr ();
  # DEBUG BEGIN_STMT
  _3 = msr & 1;
  if (_3 == 0)
    goto <bb 4>; [INV]
  else
    goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" cpsid i");

  <bb 5> :
  # DEBUG BEGIN_STMT
  msr_WDG_EXCLUSIVE_AREA_00[u32CoreId] = msr;

  <bb 6> :
  # DEBUG BEGIN_STMT
  _4 = reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId];
  _5 = _4 + 1;
  reentry_guard_WDG_EXCLUSIVE_AREA_00[u32CoreId] = _5;
  return;

}


Wdg_43_VR5510_schm_read_msr ()
{
  register uint32 reg_tmp;
  uint32 D.5732;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  __asm__ __volatile__(" mrs %0, primask " : "=r" reg_tmp);
  # DEBUG BEGIN_STMT
  D.5732 = reg_tmp;
  return D.5732;

}


