pfe_fail_stop_cfg_irq_unmask_all (addr_t base_va)
{
  unsigned int _1;
  volatile uint32_t * _2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_3(D) + 192;
  _2 = (volatile uint32_t *) _1;
  *_2 ={v} 3;
  # DEBUG BEGIN_STMT
  return;

}


pfe_fail_stop_cfg_irq_unmask (addr_t base_va)
{
  uint32_t reg;
  unsigned int _1;
  volatile uint32_t * _2;
  long unsigned int _3;
  unsigned int _4;
  volatile uint32_t * _5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_6(D) + 192;
  _2 = (volatile uint32_t *) _1;
  _3 ={v} *_2;
  reg_8 = _3 | 1;
  # DEBUG reg => reg_8
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _4 = base_va_6(D) + 192;
  _5 = (volatile uint32_t *) _4;
  *_5 ={v} reg_8;
  # DEBUG BEGIN_STMT
  return;

}


pfe_fail_stop_cfg_irq_mask (addr_t base_va)
{
  uint32_t reg;
  unsigned int _1;
  volatile uint32_t * _2;
  long unsigned int _3;
  unsigned int _4;
  volatile uint32_t * _5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_6(D) + 192;
  _2 = (volatile uint32_t *) _1;
  _3 ={v} *_2;
  reg_8 = _3 & 4294967294;
  # DEBUG reg => reg_8
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _4 = base_va_6(D) + 192;
  _5 = (volatile uint32_t *) _4;
  *_5 ={v} reg_8;
  # DEBUG BEGIN_STMT
  return;

}


pfe_fail_stop_cfg_isr (addr_t base_va)
{
  static const pfe_hm_evt_t event_id[6] = {140, 141, 142, 143, 144, 145};
  uint8_t index;
  uint32_t trig_en_interrupts;
  errno_t ret;
  uint32_t reg_source;
  uint32_t reg_src;
  uint32_t reg_en;
  unsigned int _1;
  volatile uint32_t * _2;
  unsigned int _3;
  volatile uint32_t * _4;
  long unsigned int _5;
  unsigned int _6;
  volatile uint32_t * _7;
  long unsigned int _8;
  long unsigned int _9;
  unsigned int _10;
  volatile uint32_t * _11;
  long unsigned int _12;
  unsigned int _13;
  volatile uint32_t * _14;
  long unsigned int _15;
  long unsigned int _16;
  int _17;
  <unnamed type> _18;
  unsigned char index.0_19;
  errno_t _42;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  ret_27 = 2;
  # DEBUG ret => ret_27
  # DEBUG BEGIN_STMT
  trig_en_interrupts_28 = 0;
  # DEBUG trig_en_interrupts => trig_en_interrupts_28
  # DEBUG BEGIN_STMT
  index_29 = 0;
  # DEBUG index => index_29
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_30(D) + 192;
  _2 = (volatile uint32_t *) _1;
  reg_en_32 ={v} *_2;
  # DEBUG reg_en => reg_en_32
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _3 = base_va_30(D) + 192;
  _4 = (volatile uint32_t *) _3;
  _5 = reg_en_32 & 4294967294;
  *_4 ={v} _5;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _6 = base_va_30(D) + 188;
  _7 = (volatile uint32_t *) _6;
  reg_src_34 ={v} *_7;
  # DEBUG reg_src => reg_src_34
  # DEBUG BEGIN_STMT
  _8 = reg_src_34 & reg_en_32;
  _9 = _8 & 3;
  if (_9 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _10 = base_va_30(D) + 296;
  _11 = (volatile uint32_t *) _10;
  _12 ={v} *_11;
  _13 = base_va_30(D) + 180;
  _14 = (volatile uint32_t *) _13;
  _15 ={v} *_14;
  reg_source_36 = _12 & _15;
  # DEBUG reg_source => reg_source_36
  goto <bb 5>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  reg_source_35 = 0;
  # DEBUG reg_source => reg_source_35

  <bb 5> :
  # reg_source_20 = PHI <reg_source_36(3), reg_source_35(4)>
  # DEBUG reg_source => reg_source_20
  # DEBUG BEGIN_STMT
  if (reg_source_20 != 0)
    goto <bb 6>; [INV]
  else
    goto <bb 12>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  trig_en_interrupts_37 = reg_source_20;
  # DEBUG trig_en_interrupts => trig_en_interrupts_37
  # DEBUG BEGIN_STMT
  goto <bb 10>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  _16 = trig_en_interrupts_22 & 1;
  if (_16 != 0)
    goto <bb 8>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _17 = (int) index_23;
  _18 = event_id[_17];
  pfe_hm_report (7, 2, _18, "");

  <bb 9> :
  # DEBUG BEGIN_STMT
  trig_en_interrupts_40 = trig_en_interrupts_22 >> 1;
  # DEBUG trig_en_interrupts => trig_en_interrupts_40
  # DEBUG BEGIN_STMT
  index.0_19 = index_23;
  index_41 = index.0_19 + 1;
  # DEBUG index => index_41

  <bb 10> :
  # trig_en_interrupts_22 = PHI <trig_en_interrupts_37(6), trig_en_interrupts_40(9)>
  # index_23 = PHI <index_29(6), index_41(9)>
  # DEBUG index => index_23
  # DEBUG trig_en_interrupts => trig_en_interrupts_22
  # DEBUG BEGIN_STMT
  if (trig_en_interrupts_22 != 0)
    goto <bb 7>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  ret_38 = 0;
  # DEBUG ret => ret_38

  <bb 12> :
  # ret_21 = PHI <ret_27(5), ret_38(11)>
  # DEBUG ret => ret_21
  # DEBUG BEGIN_STMT
  _42 = ret_21;
  return _42;

}


