pfe_bus_err_cfg_irq_unmask_all (addr_t base_va)
{
  unsigned int _1;
  volatile uint32_t * _2;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_3(D) + 212;
  _2 = (volatile uint32_t *) _1;
  *_2 ={v} 2097151;
  # DEBUG BEGIN_STMT
  return;

}


pfe_bus_err_cfg_irq_unmask (addr_t base_va)
{
  uint32_t reg;
  unsigned int _1;
  volatile uint32_t * _2;
  long unsigned int _3;
  unsigned int _4;
  volatile uint32_t * _5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_6(D) + 212;
  _2 = (volatile uint32_t *) _1;
  _3 ={v} *_2;
  reg_8 = _3 | 1;
  # DEBUG reg => reg_8
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _4 = base_va_6(D) + 212;
  _5 = (volatile uint32_t *) _4;
  *_5 ={v} reg_8;
  # DEBUG BEGIN_STMT
  return;

}


pfe_bus_err_cfg_irq_mask (addr_t base_va)
{
  uint32_t reg;
  unsigned int _1;
  volatile uint32_t * _2;
  long unsigned int _3;
  unsigned int _4;
  volatile uint32_t * _5;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_6(D) + 212;
  _2 = (volatile uint32_t *) _1;
  _3 ={v} *_2;
  reg_8 = _3 & 4294967294;
  # DEBUG reg => reg_8
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _4 = base_va_6(D) + 212;
  _5 = (volatile uint32_t *) _4;
  *_5 ={v} reg_8;
  # DEBUG BEGIN_STMT
  return;

}


pfe_bus_err_cfg_isr (addr_t base_va)
{
  static const pfe_hm_evt_t event_id[20] = {60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79};
  uint8_t index;
  uint32_t trig_en_interrupts;
  errno_t ret;
  uint32_t reg_src;
  uint32_t reg_en;
  unsigned int _1;
  volatile uint32_t * _2;
  unsigned int _3;
  volatile uint32_t * _4;
  long unsigned int _5;
  unsigned int _6;
  volatile uint32_t * _7;
  unsigned int _8;
  volatile uint32_t * _9;
  long unsigned int _10;
  long unsigned int _11;
  int _12;
  <unnamed type> _13;
  unsigned char index.0_14;
  long unsigned int _15;
  unsigned int _16;
  volatile uint32_t * _17;
  long unsigned int _18;
  errno_t _40;

  <bb 2> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  ret_25 = 2;
  # DEBUG ret => ret_25
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  index_26 = 0;
  # DEBUG index => index_26
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _1 = base_va_27(D) + 212;
  _2 = (volatile uint32_t *) _1;
  reg_en_29 ={v} *_2;
  # DEBUG reg_en => reg_en_29
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _3 = base_va_27(D) + 212;
  _4 = (volatile uint32_t *) _3;
  _5 = reg_en_29 & 4294967294;
  *_4 ={v} _5;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _6 = base_va_27(D) + 208;
  _7 = (volatile uint32_t *) _6;
  reg_src_31 ={v} *_7;
  # DEBUG reg_src => reg_src_31
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _8 = base_va_27(D) + 208;
  _9 = (volatile uint32_t *) _8;
  *_9 ={v} reg_src_31;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _10 = reg_src_31 & reg_en_29;
  trig_en_interrupts_33 = _10 & 2097150;
  # DEBUG trig_en_interrupts => trig_en_interrupts_33
  # DEBUG BEGIN_STMT
  if (trig_en_interrupts_33 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 9>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  trig_en_interrupts_34 = trig_en_interrupts_33 >> 1;
  # DEBUG trig_en_interrupts => trig_en_interrupts_34
  # DEBUG BEGIN_STMT
  goto <bb 7>; [INV]

  <bb 4> :
  # DEBUG BEGIN_STMT
  _11 = trig_en_interrupts_20 & 1;
  if (_11 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _12 = (int) index_21;
  _13 = event_id[_12];
  pfe_hm_report (5, 2, _13, "");

  <bb 6> :
  # DEBUG BEGIN_STMT
  trig_en_interrupts_37 = trig_en_interrupts_20 >> 1;
  # DEBUG trig_en_interrupts => trig_en_interrupts_37
  # DEBUG BEGIN_STMT
  index.0_14 = index_21;
  index_38 = index.0_14 + 1;
  # DEBUG index => index_38

  <bb 7> :
  # trig_en_interrupts_20 = PHI <trig_en_interrupts_34(3), trig_en_interrupts_37(6)>
  # index_21 = PHI <index_26(3), index_38(6)>
  # DEBUG index => index_21
  # DEBUG trig_en_interrupts => trig_en_interrupts_20
  # DEBUG BEGIN_STMT
  if (trig_en_interrupts_20 != 0)
    goto <bb 4>; [INV]
  else
    goto <bb 8>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  ret_35 = 0;
  # DEBUG ret => ret_35

  <bb 9> :
  # ret_19 = PHI <ret_25(2), ret_35(8)>
  # DEBUG ret => ret_19
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _15 = ~reg_src_31;
  _16 = base_va_27(D) + 212;
  _17 = (volatile uint32_t *) _16;
  _18 = reg_en_29 & _15;
  *_17 ={v} _18;
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _40 = ret_19;
  return _40;

}


