Clock_Ip_SetPlldigPll0divDeDivOutput (const struct Clock_Ip_DividerConfigType * Config)
{
  uint32 RegValue;
  uint32 DividerIndex;
  uint32 Instance;
  <unnamed type> _1;
  int _2;
  unsigned char _3;
  <unnamed type> _4;
  int _5;
  unsigned char _6;
  struct PLLDIG_Type * _7;
  long unsigned int _8;
  struct PLLDIG_Type * _9;
  long unsigned int _10;
  long unsigned int _11;
  struct PLLDIG_Type * _12;
  long unsigned int _13;
  long unsigned int _14;
  long unsigned int _15;
  long unsigned int _16;
  struct PLLDIG_Type * _17;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Config_20(D)->Name;
  _2 = (int) _1;
  _3 = Clock_Ip_au8ClockFeatures[_2][0];
  Instance_21 = (uint32) _3;
  # DEBUG Instance => Instance_21
  # DEBUG BEGIN_STMT
  _4 = Config_20(D)->Name;
  _5 = (int) _4;
  _6 = Clock_Ip_au8ClockFeatures[_5][5];
  DividerIndex_22 = (uint32) _6;
  # DEBUG DividerIndex => DividerIndex_22
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _7 = Clock_Ip_pxPll[Instance_21];
  _8 ={v} _7->PLLODIV[DividerIndex_22];
  _9 = Clock_Ip_pxPll[Instance_21];
  _10 = _8 & 2147483647;
  _9->PLLODIV[DividerIndex_22] ={v} _10;
  # DEBUG BEGIN_STMT
  _11 = Config_20(D)->Value;
  if (_11 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _12 = Clock_Ip_pxPll[Instance_21];
  RegValue_24 ={v} _12->PLLODIV[DividerIndex_22];
  # DEBUG RegValue => RegValue_24
  # DEBUG BEGIN_STMT
  RegValue_25 = RegValue_24 | 2147483648;
  # DEBUG RegValue => RegValue_25
  # DEBUG BEGIN_STMT
  RegValue_26 = RegValue_25 & 4278255615;
  # DEBUG RegValue => RegValue_26
  # DEBUG BEGIN_STMT
  _13 = Config_20(D)->Value;
  _14 = _13 + 4294967295;
  _15 = _14 << 16;
  _16 = _15 & 16711680;
  RegValue_27 = RegValue_26 | _16;
  # DEBUG RegValue => RegValue_27
  # DEBUG BEGIN_STMT
  _17 = Clock_Ip_pxPll[Instance_21];
  _17->PLLODIV[DividerIndex_22] ={v} RegValue_27;

  <bb 4> :
  return;

}


Clock_Ip_SetCgmXDeDivWithoutPhase (const struct Clock_Ip_DividerConfigType * Config)
{
  uint32 RegValue;
  uint32 DividerShift;
  uint32 DividerMask;
  uint32 DividerIndex;
  uint32 SelectorIndex;
  uint32 Instance;
  <unnamed type> _1;
  int _2;
  unsigned char _3;
  <unnamed type> _4;
  int _5;
  unsigned char _6;
  <unnamed type> _7;
  int _8;
  unsigned char _9;
  <unnamed type> _10;
  int _11;
  unsigned char _12;
  int _13;
  <unnamed type> _14;
  int _15;
  unsigned char _16;
  int _17;
  long unsigned int _18;
  volatile struct Clock_Ip_CgmMuxType * _19;
  long unsigned int _20;
  long unsigned int _21;
  long unsigned int _22;
  long unsigned int _23;
  long unsigned int _24;
  volatile struct Clock_Ip_CgmMuxType * _25;
  long unsigned int _26;
  volatile struct Clock_Ip_CgmMuxType * _27;
  long unsigned int _28;
  volatile struct Clock_Ip_CgmMuxType * _29;
  long unsigned int _30;
  volatile struct Clock_Ip_CgmMuxType * _31;
  long unsigned int _32;
  volatile struct Clock_Ip_CgmMuxType * _33;
  long unsigned int _34;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Config_38(D)->Name;
  _2 = (int) _1;
  _3 = Clock_Ip_au8ClockFeatures[_2][0];
  Instance_39 = (uint32) _3;
  # DEBUG Instance => Instance_39
  # DEBUG BEGIN_STMT
  _4 = Config_38(D)->Name;
  _5 = (int) _4;
  _6 = Clock_Ip_au8ClockFeatures[_5][4];
  SelectorIndex_40 = (uint32) _6;
  # DEBUG SelectorIndex => SelectorIndex_40
  # DEBUG BEGIN_STMT
  _7 = Config_38(D)->Name;
  _8 = (int) _7;
  _9 = Clock_Ip_au8ClockFeatures[_8][5];
  DividerIndex_41 = (uint32) _9;
  # DEBUG DividerIndex => DividerIndex_41
  # DEBUG BEGIN_STMT
  _10 = Config_38(D)->Name;
  _11 = (int) _10;
  _12 = Clock_Ip_au8ClockFeatures[_11][2];
  _13 = (int) _12;
  DividerMask_42 = Clock_Ip_axFeatureExtensions[_13].DividerValueMask;
  # DEBUG DividerMask => DividerMask_42
  # DEBUG BEGIN_STMT
  _14 = Config_38(D)->Name;
  _15 = (int) _14;
  _16 = Clock_Ip_au8ClockFeatures[_15][2];
  _17 = (int) _16;
  DividerShift_43 = Clock_Ip_axFeatureExtensions[_17].DividerValueShift;
  # DEBUG DividerShift => DividerShift_43
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _18 = Config_38(D)->Value;
  if (_18 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _19 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  RegValue_44 ={v} _19->Divider[DividerIndex_41];
  # DEBUG RegValue => RegValue_44
  # DEBUG BEGIN_STMT
  _20 = ~DividerMask_42;
  RegValue_45 = RegValue_44 & _20;
  # DEBUG RegValue => RegValue_45
  # DEBUG BEGIN_STMT
  _21 = Config_38(D)->Value;
  _22 = _21 + 4294967295;
  _23 = _22 << DividerShift_43;
  _24 = DividerMask_42 & _23;
  RegValue_46 = RegValue_45 | _24;
  # DEBUG RegValue => RegValue_46
  # DEBUG BEGIN_STMT
  _25 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  _25->Divider[DividerIndex_41] ={v} RegValue_46;

  <bb 4> :
  # DEBUG BEGIN_STMT
  _26 = Config_38(D)->Value;
  if (_26 != 0)
    goto <bb 5>; [INV]
  else
    goto <bb 6>; [INV]

  <bb 5> :
  # DEBUG BEGIN_STMT
  _27 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  _28 ={v} _27->Divider[DividerIndex_41];
  _29 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  _30 = _28 | 2147483648;
  _29->Divider[DividerIndex_41] ={v} _30;
  goto <bb 7>; [INV]

  <bb 6> :
  # DEBUG BEGIN_STMT
  _31 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  _32 ={v} _31->Divider[DividerIndex_41];
  _33 = Clock_Ip_apxCgm[Instance_39][SelectorIndex_40];
  _34 = _32 & 2147483647;
  _33->Divider[DividerIndex_41] ={v} _34;

  <bb 7> :
  return;

}


Clock_Ip_SetCgmXDeDivStatWithoutPhase (const struct Clock_Ip_DividerConfigType * Config)
{
  uint32 DividerStatus;
  uint32 TimeoutTicks;
  uint32 ElapsedTime;
  uint32 StartTime;
  boolean TimeoutOccurred;
  uint32 RegValue;
  uint32 DividerShift;
  uint32 DividerMask;
  uint32 DividerIndex;
  uint32 SelectorIndex;
  uint32 Instance;
  <unnamed type> _1;
  int _2;
  unsigned char _3;
  <unnamed type> _4;
  int _5;
  unsigned char _6;
  <unnamed type> _7;
  int _8;
  unsigned char _9;
  <unnamed type> _10;
  int _11;
  unsigned char _12;
  int _13;
  <unnamed type> _14;
  int _15;
  unsigned char _16;
  int _17;
  long unsigned int _18;
  volatile struct Clock_Ip_CgmMuxType * _19;
  long unsigned int _20;
  long unsigned int _21;
  long unsigned int _22;
  long unsigned int _23;
  long unsigned int _24;
  volatile struct Clock_Ip_CgmMuxType * _25;
  volatile struct Clock_Ip_CgmMuxType * _26;
  long unsigned int _27;
  long unsigned int TimeoutTicks.0_28;
  long unsigned int _29;
  volatile struct Clock_Ip_CgmMuxType * _30;
  long unsigned int _31;
  volatile struct Clock_Ip_CgmMuxType * _32;
  long unsigned int _33;
  volatile struct Clock_Ip_CgmMuxType * _34;
  long unsigned int _35;
  volatile struct Clock_Ip_CgmMuxType * _36;
  long unsigned int _37;
  <unnamed type> _38;

  <bb 2> :
  # DEBUG BEGIN_STMT
  _1 = Config_43(D)->Name;
  _2 = (int) _1;
  _3 = Clock_Ip_au8ClockFeatures[_2][0];
  Instance_44 = (uint32) _3;
  # DEBUG Instance => Instance_44
  # DEBUG BEGIN_STMT
  _4 = Config_43(D)->Name;
  _5 = (int) _4;
  _6 = Clock_Ip_au8ClockFeatures[_5][4];
  SelectorIndex_45 = (uint32) _6;
  # DEBUG SelectorIndex => SelectorIndex_45
  # DEBUG BEGIN_STMT
  _7 = Config_43(D)->Name;
  _8 = (int) _7;
  _9 = Clock_Ip_au8ClockFeatures[_8][5];
  DividerIndex_46 = (uint32) _9;
  # DEBUG DividerIndex => DividerIndex_46
  # DEBUG BEGIN_STMT
  _10 = Config_43(D)->Name;
  _11 = (int) _10;
  _12 = Clock_Ip_au8ClockFeatures[_11][2];
  _13 = (int) _12;
  DividerMask_47 = Clock_Ip_axFeatureExtensions[_13].DividerValueMask;
  # DEBUG DividerMask => DividerMask_47
  # DEBUG BEGIN_STMT
  _14 = Config_43(D)->Name;
  _15 = (int) _14;
  _16 = Clock_Ip_au8ClockFeatures[_15][2];
  _17 = (int) _16;
  DividerShift_48 = Clock_Ip_axFeatureExtensions[_17].DividerValueShift;
  # DEBUG DividerShift => DividerShift_48
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  TimeoutOccurred_49 = 0;
  # DEBUG TimeoutOccurred => TimeoutOccurred_49
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _18 = Config_43(D)->Value;
  if (_18 != 0)
    goto <bb 3>; [INV]
  else
    goto <bb 4>; [INV]

  <bb 3> :
  # DEBUG BEGIN_STMT
  _19 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  RegValue_50 ={v} _19->Divider[DividerIndex_46];
  # DEBUG RegValue => RegValue_50
  # DEBUG BEGIN_STMT
  _20 = ~DividerMask_47;
  RegValue_51 = RegValue_50 & _20;
  # DEBUG RegValue => RegValue_51
  # DEBUG BEGIN_STMT
  _21 = Config_43(D)->Value;
  _22 = _21 + 4294967295;
  _23 = _22 << DividerShift_48;
  _24 = DividerMask_47 & _23;
  RegValue_52 = RegValue_51 | _24;
  # DEBUG RegValue => RegValue_52
  # DEBUG BEGIN_STMT
  _25 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _25->Divider[DividerIndex_46] ={v} RegValue_52;

  <bb 4> :
  # DEBUG BEGIN_STMT
  Clock_Ip_StartTimeout (&StartTime, &ElapsedTime, &TimeoutTicks, 50000);

  <bb 5> :
  # DEBUG BEGIN_STMT
  # DEBUG BEGIN_STMT
  _26 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _27 ={v} _26->MUX_DIV_UPD_STAT;
  DividerStatus_55 = _27 & 1;
  # DEBUG DividerStatus => DividerStatus_55
  # DEBUG BEGIN_STMT
  TimeoutTicks.0_28 = TimeoutTicks;
  TimeoutOccurred_57 = Clock_Ip_TimeoutExpired (&StartTime, &ElapsedTime, TimeoutTicks.0_28);
  # DEBUG TimeoutOccurred => TimeoutOccurred_57
  # DEBUG BEGIN_STMT
  if (DividerStatus_55 == 1)
    goto <bb 6>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 6> :
  if (TimeoutOccurred_57 == 0)
    goto <bb 5>; [INV]
  else
    goto <bb 7>; [INV]

  <bb 7> :
  # DEBUG BEGIN_STMT
  if (TimeoutOccurred_57 == 0)
    goto <bb 8>; [INV]
  else
    goto <bb 11>; [INV]

  <bb 8> :
  # DEBUG BEGIN_STMT
  _29 = Config_43(D)->Value;
  if (_29 != 0)
    goto <bb 9>; [INV]
  else
    goto <bb 10>; [INV]

  <bb 9> :
  # DEBUG BEGIN_STMT
  _30 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _31 ={v} _30->Divider[DividerIndex_46];
  _32 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _33 = _31 | 2147483648;
  _32->Divider[DividerIndex_46] ={v} _33;
  goto <bb 12>; [INV]

  <bb 10> :
  # DEBUG BEGIN_STMT
  _34 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _35 ={v} _34->Divider[DividerIndex_46];
  _36 = Clock_Ip_apxCgm[Instance_44][SelectorIndex_45];
  _37 = _35 & 2147483647;
  _36->Divider[DividerIndex_46] ={v} _37;
  goto <bb 12>; [INV]

  <bb 11> :
  # DEBUG BEGIN_STMT
  _38 = Config_43(D)->Name;
  Clock_Ip_ReportClockErrors (1, _38);

  <bb 12> :
  StartTime ={v} {CLOBBER};
  ElapsedTime ={v} {CLOBBER};
  TimeoutTicks ={v} {CLOBBER};
  return;

}


Clock_Ip_Callback_DividerEmpty (const struct Clock_Ip_DividerConfigType * Config)
{
  <bb 2> :
  # DEBUG BEGIN_STMT
  return;

}


