#include <ti/drivers/I2C.h>
#include "ti_drivers_config.h"
#include <string.h>
#include <stdio.h>
#include <unistd.h>
#include "clrc663.h"
#include <ti/sysbios/BIOS.h>
#include <ti/sysbios/knl/Task.h>
#include <ti/sysbios/knl/Clock.h>
#include <ti/drivers/GPIO.h>
# include "I2C_drv.h"

static bool isSleeping = false;


void delay(uint32_t ms) {
    uint32_t ticks = (ms * 1000) / Clock_tickPeriod;
    if (ticks == 0) ticks = 1;
    Task_sleep(ticks);
}

void Clrc663_init(Clrc663* clrc663, uint8_t address) {
    clrc663->addr = address;
    I2C_init();
}
/*
uint8_t Clrc663_read_reg(Clrc663* clrc663, uint8_t reg) {
    uint8_t data = 0xFF;
    I2C_Params i2cParams;
    I2C_Transaction i2cTransaction;

    I2C_init();
    I2C_Params_init(&i2cParams);
    I2C_Handle handle = I2C_open(CONFIG_I2C_0, &i2cParams);
    if (handle == NULL) {
        printf("Error: I2C open failed for read");
        return data;
    }

    i2cTransaction.targetAddress = clrc663->addr;
    i2cTransaction.writeBuf = &reg;
    i2cTransaction.writeCount = 1;
    i2cTransaction.readBuf = &data;
    i2cTransaction.readCount = 1;

    if (!I2C_transfer(handle, &i2cTransaction)) {
        printf("I2C Read Error");
        data = 0xFF;
    }

    I2C_close(handle);
    return data;
}

void Clrc663_write_reg(Clrc663* clrc663, uint8_t reg, uint8_t val) {
    uint8_t data[2] = { reg, val };
    I2C_Transaction i2cTransaction;
    I2C_Params i2cParams;
    I2C_init();
    I2C_Params_init(&i2cParams);
    I2C_Handle handle = I2C_open(CONFIG_I2C_0, &i2cParams);
    if (handle == NULL) {
        printf("Error: I2C open failed for write");
        return;
    }



    i2cTransaction.targetAddress = clrc663->addr;
    i2cTransaction.writeBuf = data;
    i2cTransaction.writeCount = 2;
    i2cTransaction.readBuf = NULL;
    i2cTransaction.readCount = 0;

    if (!I2C_transfer(handle, &i2cTransaction)) {
        printf("I2C Write Error");
    }

    I2C_close(handle);
}
*/
void Clrc663_write_reg(Clrc663* clrc663, uint8_t reg, uint8_t val) {
    uint8_t frame[2] = { reg, val };
    I2C_Write(clrc663->addr, frame, 2);
}

uint8_t Clrc663_read_reg(Clrc663* clrc663, uint8_t reg) {
    uint8_t val = 0xFF;
    if (!I2C_Read(clrc663->addr, reg, &val, 1)) {
        return 0xFF;
    }
    return val;
}



void Clrc663_set_pdown(Clrc663* clrc663, bool pdown) {
    if (pdown) {
       Clrc663_write_reg(clrc663, Command, 0x07);  // Soft power-down    // break point to see it goes to sleep mode
        delay(1);  // Settle
        GPIO_write(M_FAULT, 1);  // PDOWN HIGH

    } else {

        GPIO_write(M_FAULT, 0);  // PDOWN LOW
        delay(2);  // Startup
        Clrc663_write_reg(clrc663, Command, Idle);
    }
}
void detectAndReadTag() {
    uint8_t tagUid[10];
    uint8_t atqa[2];
    bool tagDetected = false;

    Clrc663 clrc663;
    Clrc663_init(&clrc663, 0x28);  // Initialize with I2C address
    delay(50);

    // Wake up the chip
    Clrc663_set_pdown(&clrc663, false);
    delay(10);

    // Check version register to confirm chip is alive
    uint8_t version = Clrc663_read_reg(&clrc663, Version);
    if (version == 0x00 || version == 0xFF) {
        printf("Error: Invalid version. Check connection or power.\r\n");
        return;
    }

    // Start RFID operations
    Clrc663_iso_14443A_init(&clrc663);
    Clrc663_transmit_enable(&clrc663, true);

    int rc = Clrc663_iso_14443A_reqa(&clrc663, atqa);
    if (rc == 2) {
        int uid_len = Clrc663_iso_14443A_select(&clrc663, tagUid);
        if (uid_len > 0) {
            char uid_msg[100] = "Tag UID: ";
            for (int i = 0; i < uid_len; i++) {
                char hex[4];
                sprintf(hex, "%02X ", tagUid[i]);
                strcat(uid_msg, hex);
            }
            printf("%s\r\n", uid_msg);   // put breakpoint to see tag uid
            tagDetected = true;
        }
    }

    Clrc663_transmit_enable(&clrc663, false);
    delay(500);  // settle delay

    if (tagDetected) {
        printf("Card detected successfully. Powering down...\r\n");
    } else {
        printf("No card detected. Powering down...\r\n");
    }

    // Put chip into hard power-down
    Clrc663_set_pdown(&clrc663, true);
}




// IRQ wait function for Clrc663
void Clrc663_irq_wait(Clrc663* clrc663, uint8_t irq0en, uint8_t irq1en) {
    Clrc663_write_reg(clrc663, IRQ0En, irq0en);
    Clrc663_write_reg(clrc663, IRQ1En, irq1en);
    while (!(Clrc663_read_reg(clrc663, IRQ1) & 0x40)); // Wait until global interrupt is set
    Clrc663_write_reg(clrc663, IRQ0En, 0x00);
    Clrc663_write_reg(clrc663, IRQ1En, 0x00);
}

// Initialize ISO 14443A communication
void Clrc663_iso_14443A_init(Clrc663* clrc663) {
    // Initialize registers based on the configuration in the original code
    Clrc663_write_reg(clrc663, T0Control, 0x98);
    Clrc663_write_reg(clrc663, T1Control, 0x92);
    Clrc663_write_reg(clrc663, T2Control, 0x20);
    Clrc663_write_reg(clrc663, T2ReloadHi, 0x03);
    Clrc663_write_reg(clrc663, T2ReloadLo, 0xFF);
    Clrc663_write_reg(clrc663, T3Control, 0x00);
    Clrc663_write_reg(clrc663, FIFOControl, 0x10);
    Clrc663_write_reg(clrc663, WaterLevel, 0xFE);
    Clrc663_write_reg(clrc663, RxBitCtrl, 0x80);
    Clrc663_write_reg(clrc663, DrvMod, 0x80);
    Clrc663_write_reg(clrc663, TxAmp, 0x00);
    Clrc663_write_reg(clrc663, DrvCon, 0x01);
    Clrc663_write_reg(clrc663, Txl, 0x05);
    Clrc663_write_reg(clrc663, RxSofD, 0x00);
    Clrc663_write_reg(clrc663, Rcv, 0x12);
    Clrc663_write_reg(clrc663, Command, Idle);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);
    Clrc663_write_reg(clrc663, IRQ0, 0x7F);
    Clrc663_write_reg(clrc663, IRQ1, 0x7F);
    Clrc663_write_reg(clrc663, FIFOData, 0x00);
    Clrc663_write_reg(clrc663, FIFOData, 0x00);
    Clrc663_write_reg(clrc663, Command, LoadProtocol);
    Clrc663_irq_wait(clrc663, 0x10, 0x00);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);
    Clrc663_write_reg(clrc663, TxCrcPreset, 0x18);
    Clrc663_write_reg(clrc663, RxCrcPreset, 0x18);
    Clrc663_write_reg(clrc663, TxDataNum, 0x08);
    Clrc663_write_reg(clrc663, TxModWidth, 0x20);
    Clrc663_write_reg(clrc663, TxSym10BurstLen, 0x00);
    Clrc663_write_reg(clrc663, FrameCon, 0xCF);
    Clrc663_write_reg(clrc663, RxCtrl, 0x04);
    Clrc663_write_reg(clrc663, RxThreshold, 0x32);
    Clrc663_write_reg(clrc663, RxAna, 0x00);
    Clrc663_write_reg(clrc663, RxWait, 0x90);
    Clrc663_write_reg(clrc663, TXWaitCtrl, 0xC0);
    Clrc663_write_reg(clrc663, TxWaitLo, 0x0B);
    Clrc663_write_reg(clrc663, T0ReloadHi, 0x08);
    Clrc663_write_reg(clrc663, T0ReloadLo, 0xD8);
    Clrc663_write_reg(clrc663, T1ReloadHi, 0x00);
    Clrc663_write_reg(clrc663, T1ReloadLo, 0x00);
    Clrc663_write_reg(clrc663, DrvMod, 0x81);
    Clrc663_write_reg(clrc663, Status, 0x00);
}

// Enable or disable transmission
void Clrc663_transmit_enable(Clrc663* clrc663, bool enable) {
    Clrc663_write_reg(clrc663, DrvMod, enable ? 0x89 : 0x81);
}


// ISO 14443A REQA function
int Clrc663_iso_14443A_reqa(Clrc663* clrc663, uint8_t *atqa) {
    atqa[0] = 0;
    atqa[1] = 0;

    Clrc663_write_reg(clrc663, TXWaitCtrl, 0xC0);
    Clrc663_write_reg(clrc663, TxWaitLo, 0x0B);
    Clrc663_write_reg(clrc663, T0ReloadHi, 0x08);
    Clrc663_write_reg(clrc663, T0ReloadLo, 0x94);
    Clrc663_write_reg(clrc663, T1ReloadHi, 0x00);
    Clrc663_write_reg(clrc663, T1ReloadLo, 0x00);
    Clrc663_write_reg(clrc663, RxWait, 0x90);
    Clrc663_write_reg(clrc663, TxDataNum, 0x0F);
    Clrc663_write_reg(clrc663, Command, Idle);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);
    Clrc663_write_reg(clrc663, IRQ0, 0x7F);
    Clrc663_write_reg(clrc663, IRQ1, 0x7F);

    delay(10);
    Clrc663_write_reg(clrc663, FIFOData, 0x26);
    Clrc663_write_reg(clrc663, Command, Transceive);
    Clrc663_irq_wait(clrc663, 0x18, 0x2);

    uint8_t len = Clrc663_read_reg(clrc663, FIFOLength);
    for (int i = 0; i < len; ++i) {
        atqa[i] = Clrc663_read_reg(clrc663, FIFOData);
    }

    return len;
}

// ISO 14443A SELECT function
int Clrc663_iso_14443A_select(Clrc663* clrc663, uint8_t *uid) {
    Clrc663_write_reg(clrc663, TxDataNum, 0x08);
    Clrc663_write_reg(clrc663, RxBitCtrl, 0x00);
    Clrc663_write_reg(clrc663, Command, Idle);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);

    Clrc663_write_reg(clrc663, FIFOData, 0x93);
    Clrc663_write_reg(clrc663, FIFOData, 0x20);
    Clrc663_write_reg(clrc663, Command, Transceive);
    Clrc663_irq_wait(clrc663, 0x18, 0x02);

    uint8_t len = Clrc663_read_reg(clrc663, FIFOLength);
    for (int i = 0; i < len; i++) {
        uid[i] = Clrc663_read_reg(clrc663, FIFOData);
    }

    Clrc663_write_reg(clrc663, TxCrcPreset, 0x19);
    Clrc663_write_reg(clrc663, RxCrcPreset, 0x19);
    Clrc663_write_reg(clrc663, Command, Idle);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);

    Clrc663_write_reg(clrc663, FIFOData, 0x93);
    Clrc663_write_reg(clrc663, FIFOData, 0x70);
    for (int i = 0; i < 5; ++i) {
        Clrc663_write_reg(clrc663, FIFOData, uid[i]);
    }

    Clrc663_write_reg(clrc663, Command, Transceive);
    Clrc663_irq_wait(clrc663, 0x18, 0x02);

    uint8_t sak = Clrc663_read_reg(clrc663, FIFOData);
    return len;
}

// ISO 14443A RATS function
int Clrc663_iso_14443A_rats(Clrc663* clrc663, uint8_t *ats) {
    Clrc663_write_reg(clrc663, TxCrcPreset, 0x19);
    Clrc663_write_reg(clrc663, RxCrcPreset, 0x19);
    Clrc663_write_reg(clrc663, Command, Idle);
    Clrc663_write_reg(clrc663, FIFOControl, 0xB0);
    Clrc663_write_reg(clrc663, FIFOData, 0xE0);
    Clrc663_write_reg(clrc663, FIFOData, 0x80);
    Clrc663_write_reg(clrc663, Command, Transceive);
    Clrc663_irq_wait(clrc663, 0x18, 0x2);

    uint8_t len = Clrc663_read_reg(clrc663, FIFOLength);
    for (int i = 0; i < len; i++) {
        ats[i] = Clrc663_read_reg(clrc663, FIFOData);
    }

    return len;
}