/* * main implementation: use this 'C' sample to create your own application * */ #include "derivative.h" /* include peripheral declarations */ #include "sh_mem.h" /* include peripheral declarations */ #include "peripherals\esci.h" #include "string.h" #include "MPC577xC.h" #include "peripherals\pit.h" #define ESCI_A_IRQ_SOURCE 146 #define ESCI_A_IRQ_PRIORITY 9 #define eSCI_IFSR1_RDRF_MASK 0x2000u #define eSCI_IFSR1_TDRE_MASK 0x8000u #define eSCI_IFSR1_TC_MASK 0x4000u #define PIT0_IRQ_SOURCE 301 #define PIT0_IRQ_PRIORITY 10 #define BUFFER_SIZE (16) #define TIME_NS 2000000000 //External extern void xcptn_xmpl(void); //extern void SIU_init(void); //extern void mcu_mode_clock_init(void); //Local functions void eSCI_ISR (void); void PIT0_ISR (void); void transmitUARTbuffer(); void my_esci_init(uint8_t mode); //Shared memory extern DataUART __shared_struct1[]; volatile DataUART *px1 = __shared_struct1; extern DataMotor __shared_struct2[]; volatile DataMotor *px2 = __shared_struct2; //vars tBool UARTbusy = TRUE; uint16_t counter = 0; tBool startByteSent = FALSE; tBool stopByteSent = FALSE; uint8_t RXindex = 0; unsigned char bufferIn[16]; uint8_t TXindex = 0; unsigned char bufferOut[12]; DataUART data_in; DataMotor data_out; int main(void) { /* MCU initialization */ // mcu_mode_clock_init(); xcptn_xmpl(); /* SIUL2 pin configuration */ SIU.PCR[89].B.PA = 1; /* Pin assigned to ESCI A Tx */ SIU.PCR[89].B.OBE = 1; /* Output buffer enable */ SIU.PCR[90].B.PA = 1; /* Pin asigned to ESCI A Rx */ SIU.PCR[90].B.IBE = 1; /* Input buffer enable */ /* Initialize eSCI for UART */ my_esci_init(0); my_interrupt_init(ESCI_A_IRQ_SOURCE,ESCI_A_IRQ_PRIORITY); INTC.PSR[ESCI_A_IRQ_SOURCE].B.PRC_SELn = 0x3; my_interrupt_init(PIT0_IRQ_SOURCE,PIT0_IRQ_PRIORITY); INTC.PSR[PIT0_IRQ_SOURCE].B.PRC_SELn = 0x3; PIT.TIMER[0].TCTRL.B.TEN = 0; /* Disable PIT first */ PIT.MCR.B.MDIS = 0; PIT.TIMER[0].LDVAL.R = ((100 * (TIME_NS / 1000)) - 1); /* Timer clk is 100 MHz (period 10 ns) */ PIT.TIMER[0].TCTRL.B.TIE = 1; PIT.TIMER[0].TCTRL.B.TEN = 1; /* Loop forever */ for(;;) { while (status != CORE1_LOCK) { status = Lock_Gate(GATE_0); } writeSharedMem(px1, &data_in, IN); data_out = *px2; while(status == CORE1_LOCK) { status = Unlock_Gate(GATE_0); } memcpy(bufferOut, &data_out, sizeof(DataMotor)); } } void eSCI_ISR (void){ if (eSCI_A.IFSR1.B.RDRF) { if (RXindex < sizeof(bufferIn)) { bufferIn[RXindex] = eSCI_A.SDR.B.RDTD; RXindex++; } if (RXindex >= sizeof(bufferIn)) { RXindex = 0; memcpy(&data_in, bufferIn, sizeof(DataUART)); } eSCI_A.IFSR1.R = eSCI_IFSR1_RDRF_MASK; } if (eSCI_A.IFSR1.B.TDRE && (eSCI_A.IFSR1.B.TC || UARTbusy)) // Check both TDRE and TC flags { UARTbusy = FALSE; if (startByteSent == FALSE){ eSCI_A.SDR.B.RDTD = 0x02; //start byte startByteSent = TRUE; } else if (TXindex < sizeof(bufferOut)) { eSCI_A.SDR.B.RDTD = bufferOut[TXindex]; TXindex++; } else if(stopByteSent == FALSE) { eSCI_A.SDR.B.RDTD = 0x03; //stop byte stopByteSent = TRUE; } if(stopByteSent == TRUE && eSCI_A.IFSR1.B.TC){ // Check TC flag again before concluding transmission TXindex = 0; counter++; startByteSent = FALSE; stopByteSent = FALSE; eSCI_A.CR1.B.TIE = 0; // Disable transmit interrupt } eSCI_A.IFSR1.R = eSCI_IFSR1_TDRE_MASK | eSCI_IFSR1_TC_MASK; } } void PIT0_ISR (void){ if (eSCI_A.CR1.B.TIE == 0) { transmitUARTbuffer(); } PIT.TIMER[0].TFLG.B.TIF = 1; } void transmitUARTbuffer() { eSCI_A.CR1.B.TIE = 1; // enable tx interrupt } void my_esci_init (uint8_t mode){ eSCI_A.CR2.B.MDIS = 0; eSCI_A.LCR1.B.LIN = mode; /* Select between LIN or SCI functionality */ eSCI_A.CR1.B.TE = 1; /* Transmitter enable */ eSCI_A.CR1.B.RE = 1; /* Receiver enable */ eSCI_A.CR1.B.PT = 0; /* Parity is even */ eSCI_A.CR1.B.PE = 0; /* Parity control disable */ eSCI_A.BRR.B.SBR = 651; /* Baud rate = 115200: 54 9600 : 651 MCLK = (200MHz/2), Txclk = MCLK/(16*SBR) */ //Control eSCI_A.CR3.B.M2 = 0; eSCI_A.CR1.B.M = 0; eSCI_A.CR1.B.PE = 0; eSCI_A.CR1.B.LOOPS = 0; eSCI_A.CR1.B.RSRC = 0; eSCI_A.CR1.B.SBK = 0; //Interrupt sources eSCI_A.CR1.B.TIE = 0; eSCI_A.CR1.B.RIE = 1; eSCI_A.CR1.B.ILIE = 0; //error eSCI_A.CR3.B.ERFE = 1; eSCI_A.CR3.B.EROE = 1; eSCI_A.CR3.B.ERPE = 1; //Clear TX Interrupt // eSCI_A.IFSR1.R = eSCI_IFSR1_TDRE_MASK; }