/**
*   @file    RegLockMacros.h
*   @version 1.0.0
*
*   @brief   AUTOSAR Base - IP module versions.
*   @details Implements macros for soft and hard lock on PA hardware platform
*
*   @addtogroup BASE_COMPONENT
*   @{
*/
/*==================================================================================================
*   Project              : AUTOSAR 4.3 MCAL
*   Platform             : PA
*   Peripheral           : MPC5777C
*   Dependencies         : none
*
*   Autosar Version      : 4.3.1
*   Autosar Revision     : ASR_REL_4_3_REV_0001
*   Autosar Conf.Variant :
*   SW Version           : 1.0.0
*   Build Version        : MPC5777C_MCAL_1_0_0_RTM_ASR_REL_4_3_REV_0001_20190315
*
*   (c) Copyright 2006-2016 Freescale Semiconductor, Inc. 
*       Copyright 2017-2019 NXP
*   All Rights Reserved.
==================================================================================================*/
/*==================================================================================================
==================================================================================================*/

/** 
* @page misra_violations MISRA-C:2012 violations
*
* @section RegLockMacros_h_REF_1
* Violates MISRA 2012 Advisory Directive 4.9, A function should be used in preference to a function-like
* macro. Compiler abstraction need to implement function-like macros to hide compiler specifics from
* the implementation.
*
* @section [global]
* Violates MISRA 2012 Advisory Rule 2.5, A project should not contain unused macro declaration.
* Macro are required to make code easier in maintainability. Some macro are required by ASR even they are not use in MCAL layer
*/


#ifndef REGLOCKMACROS_H
#define REGLOCKMACROS_H

#ifdef __cplusplus
extern "C"{
#endif

/*==================================================================================================
*                                         INCLUDE FILES
* 1) system and project includes
* 2) needed interfaces from external units
* 3) internal and external interfaces from this unit
==================================================================================================*/

#include "Platform_Types.h"
#include "Mcal.h"
#include "StdRegMacros.h"

/*==================================================================================================
*                               SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define REGLOCKMACROS_VENDOR_ID                    43
#define REGLOCKMACROS_MODULE_ID                    0
#define REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION     4
#define REGLOCKMACROS_AR_RELEASE_MINOR_VERSION     3
#define REGLOCKMACROS_AR_RELEASE_REVISION_VERSION  1
#define REGLOCKMACROS_SW_MAJOR_VERSION             1
#define REGLOCKMACROS_SW_MINOR_VERSION             0
#define REGLOCKMACROS_SW_PATCH_VERSION             0

/*==================================================================================================
*                                      FILE VERSION CHECKS
==================================================================================================*/
#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
    /* Check if source file and Platform_Types.h header file are of the same Autosar version */
    #if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != PLATFORM_AR_RELEASE_MAJOR_VERSION) || \
         (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != PLATFORM_AR_RELEASE_MINOR_VERSION))
        #error "AutoSar Version Numbers of RegLockMacros.h and Platform_Types.h are different"
    #endif
#endif

/* Check if source file and Mcal.h header file have same versions */
#if (REGLOCKMACROS_VENDOR_ID != MCAL_VENDOR_ID)
#error "RegLockMacros.h and Mcal.h have different vendor IDs"
#endif
#if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != MCAL_AR_RELEASE_MAJOR_VERSION) || \
     (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != MCAL_AR_RELEASE_MINOR_VERSION) || \
     (REGLOCKMACROS_AR_RELEASE_REVISION_VERSION != MCAL_AR_RELEASE_REVISION_VERSION))
#error "AutoSar Version Numbers of RegLockMacros.h and Mcal.h are different"
#endif
#if ((REGLOCKMACROS_SW_MAJOR_VERSION != MCAL_SW_MAJOR_VERSION) || \
     (REGLOCKMACROS_SW_MINOR_VERSION != MCAL_SW_MINOR_VERSION) || \
     (REGLOCKMACROS_SW_PATCH_VERSION != MCAL_SW_PATCH_VERSION))
#error "Software Version Numbers of RegLockMacros.h and Mcal.h are different"
#endif

/* Check if source file and StdRegMacros.h header file have same versions */
#if (REGLOCKMACROS_VENDOR_ID != STDREGMACROS_VENDOR_ID)
#error "SilRegMacros.h and StdRegMacros.h have different vendor IDs"
#endif
#if ((REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION != STDREGMACROS_AR_RELEASE_MAJOR_VERSION) || \
     (REGLOCKMACROS_AR_RELEASE_MINOR_VERSION != STDREGMACROS_AR_RELEASE_MINOR_VERSION) || \
     (REGLOCKMACROS_AR_RELEASE_REVISION_VERSION != STDREGMACROS_AR_RELEASE_REVISION_VERSION))
#error "AutoSar Version Numbers of SilRegMacros.h and StdRegMacros.h are different"
#endif
#if ((REGLOCKMACROS_SW_MAJOR_VERSION != STDREGMACROS_SW_MAJOR_VERSION) || \
     (REGLOCKMACROS_SW_MINOR_VERSION != STDREGMACROS_SW_MINOR_VERSION) || \
     (REGLOCKMACROS_SW_PATCH_VERSION != STDREGMACROS_SW_PATCH_VERSION))
#error "Software Version Numbers of SilRegMacros.h and StdRegMacros.h are different"
#endif

/*==================================================================================================
*                                           CONSTANTS
==================================================================================================*/

/*==================================================================================================
*                                       DEFINES AND MACROS
==================================================================================================*/
/* Sanity check on USER_MODE_REG_PROT_ENABLED. This define must exist and has to have one of the 
following 2 values: STD_ON or STD_OFF */
#ifndef USER_MODE_REG_PROT_ENABLED
    #error "USER_MODE_REG_PROT_ENABLED is not defined" 
#endif
#if ((USER_MODE_REG_PROT_ENABLED != STD_ON) && (USER_MODE_REG_PROT_ENABLED != STD_OFF))
    #error "USER_MODE_REG_PROT_ENABLED has a wrong value"
#endif


/**
* @brief Mask for setting a SLB bit in a SLBR register
*/
#define SLBR_SET_BIT_MASK_U8              ((uint8)0x88U)

/**
* @brief Mask for clearing a SLB bit in a SLBR register
*/
#define SLBR_CLR_BIT_MASK_U8              ((uint8)0x80U)

/**
* @brief Mask for reading a SLB bit in a SLBR register
*/
#define SLBR_GET_BIT_MASK_U8              ((uint8)0x08U)

/**
* @brief Mask used for getting the alignment of an address
*        inside a 32 bit word
*/
#define MODULO_4_BIT_MASK_U32             ((uint32)0x3UL)

#ifdef IPV_REG_PROT
    #if (IPV_REG_PROT == IPV_REG_PROT_00_01_02_04)
        /**
        * @brief Offset to REG_PROT mirrored registers area 
        *        of an IP module
        */
        #define MIRRORED_ADDR_OFFSET_U32          ((uint32)0x400UL)
    #else
        /**
        * @brief Offset to REG_PROT mirrored registers area 
        *        of an IP module
        */
        #define MIRRORED_ADDR_OFFSET_U32          ((uint32)0x2000UL)
    #endif
#else
    /**
    * @brief Offset to REG_PROT mirrored registers area 
    *        of an IP module
    */
    #define MIRRORED_ADDR_OFFSET_U32          ((uint32)0x2000UL)
#endif

#ifdef IPV_REG_PROT
    #if (IPV_REG_PROT == IPV_REG_PROT_00_01_02_04)
        /**
        * @brief Offset to baseAddress of the SLBR registers area
        *        of an IP module
        */
        #define SLBR_ADDR_OFFSET_U32              ((uint32)0x800UL)
    #else
        /**
        * @brief Offset to baseAddress of the REG_PROT GCR register
        *        of an IP module
        */
        #define SLBR_ADDR_OFFSET_U32              ((uint32)0x3800UL)   
    #endif
#else
    /**
    * @brief Offset to baseAddress of the SLBR registers area
    *        of an IP module
    */
    #define SLBR_ADDR_OFFSET_U32              ((uint32)0x3800UL)
#endif

/**
* @brief Macro for getting the address of a lockable
*        register's corresponding SLBR register 
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
#define SLBR_ADDR32(baseAddr, regAddr, prot_mem)  (((uint32)(baseAddr)) + ((prot_mem) * SLBR_ADDR_OFFSET_U32) +      \
                                                    ((uint32)((((uint32)(regAddr)) - ((uint32)(baseAddr)))>>0x2U))) 

#ifdef IPV_REG_PROT
    #if (IPV_REG_PROT == IPV_REG_PROT_00_01_02_04)
        /**
        * @brief Offset to baseAddress of the REG_PROT GCR register
        *        of an IP module
        */
        #define GCR_OFFSET_U32                    ((uint32)0x900UL)
    #else
        /**
        * @brief Offset to baseAddress of the REG_PROT GCR register
        *        of an IP module
        */
        #define GCR_OFFSET_U32                    ((uint32)0x3FFCUL)   
    #endif
#else
    /**
    * @brief Offset to baseAddress of the REG_PROT GCR register
    *        of an IP module
    */
    #define GCR_OFFSET_U32                    ((uint32)0x3FFCUL)
#endif

/**
* @brief REG_PROT GCR bit masks
*/
#define REGPROT_GCR_HLB_MASK_U32          (BIT31)
#define REGPROT_GCR_UAA_MASK_U32          (BIT23)

/**
* @brief REG_PROT GCR bit positions
*/
#define REGPROT_GCR_HLB_POS_U32           ((uint32)31UL)
#define REGPROT_GCR_UAA_POS_U32           ((uint32)23UL)



/*==================================================================================================
*                     MACROS FOR WORKING WITH SW AND HW LOCK    
==================================================================================================*/


/**
* @brief      Soft locks a register by setting it's corresponding soft lock bit
*
* @details    Based on the address of the register to be soft locked and on the address
*             of the IP where the register belongs to, the corresponding soft lock bit
*             is set    
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to soft lock
* @param[in]  prot_mem - protection size of the IP
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_SET_SOFT_LOCK(baseAddr, regAddr, prot_mem)                                                  \
        {                                                                                                   \
            REG_WRITE8(SLBR_ADDR32((baseAddr), (regAddr), (prot_mem)),                                      \
                    (uint8)(SLBR_SET_BIT_MASK_U8 >> (((regAddr) - (baseAddr)) & MODULO_4_BIT_MASK_U32)));   \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_SET_SOFT_LOCK(baseAddr, regAddr, prot_mem)
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Soft unlocks a register by clearing it's corresponding soft lock bit
*
* @details    Based on the address of the register to be soft unlocked and on the address
*             of the IP where the register belongs to, the corresponding soft lock bit
*             is cleared    
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to soft unlock
* @param[in]  prot_mem - protection size of the IP
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_CLR_SOFT_LOCK(baseAddr, regAddr, prot_mem)                                                  \
        {                                                                                                   \
            REG_WRITE8(SLBR_ADDR32((baseAddr), (regAddr), (prot_mem)),                                      \
                    (uint8)(SLBR_CLR_BIT_MASK_U8 >> (((regAddr) - (baseAddr)) & MODULO_4_BIT_MASK_U32)));   \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_CLR_SOFT_LOCK(baseAddr, regAddr, prot_mem)
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Reads the status of the soft lock bit of a register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register for which to get soft lock bit status
* @param[in]  prot_mem - protection size of the IP
*
* @return     uint8  - 1 if the register's soft lock is enabled
*                    - 0 if the register's soft lock is disabled
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_GET_SOFT_LOCK(baseAddr, regAddr, prot_mem)                                                     \
            ((uint8)((REG_READ8(SLBR_ADDR32((baseAddr), (regAddr), (prot_mem))) &                              \
                    ((uint8)(SLBR_GET_BIT_MASK_U8 >> (((regAddr) - (baseAddr)) & MODULO_4_BIT_MASK_U32)))) >>  \
                        (MODULO_4_BIT_MASK_U32 - (((regAddr) - (baseAddr)) & MODULO_4_BIT_MASK_U32))))
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_GET_SOFT_LOCK(baseAddr, regAddr, prot_mem)      ((uint8)0x0UL)
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Sets one bit in a 8 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK8(baseAddr, regAddr, prot_mem, mask)                        \
        {                                                                               \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                       \
            REG_BIT_SET8((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));   \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK8(baseAddr, regAddr, prot_mem, mask)                        \
        REG_BIT_SET8((regAddr),(mask))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Sets one bit in a 16 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK16(baseAddr, regAddr, prot_mem, mask)                         \
        {                                                                                 \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                         \
            REG_BIT_SET16((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));    \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK16(baseAddr, regAddr, prot_mem, mask)                         \
        REG_BIT_SET16((regAddr),(mask))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Sets one bit in a 32 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK32(baseAddr, regAddr, prot_mem, mask)                         \
        {                                                                                 \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                         \
            REG_BIT_SET32((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));    \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_SET_LOCK32(baseAddr, regAddr, prot_mem, mask)                         \
        REG_BIT_SET32((regAddr),(mask))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Clears one bit in a 8 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK8(baseAddr, regAddr, prot_mem, mask)                                 \
        {                                                                                          \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                  \
            REG_BIT_CLEAR8((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));            \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK8(baseAddr, regAddr, prot_mem, mask)                                 \
        REG_BIT_CLEAR8((regAddr),(mask))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Clears one bit in a 16 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK16(baseAddr, regAddr, prot_mem, mask)                                \
        {                                                                                          \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                  \
            REG_BIT_CLEAR16((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));           \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK16(baseAddr, regAddr, prot_mem, mask)                                \
        REG_BIT_CLEAR16((regAddr),(mask))                                  
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Clears one bit in a 32 bit register and locks the register automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register the bit belongs to, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the bit belongs to 
* @param[in]  regAddr  - address of the register the bit belongs to
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask of the bit
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK32(baseAddr, regAddr, prot_mem, mask)                                \
        {                                                                                          \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                  \
            REG_BIT_CLEAR32((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32),(mask));           \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_BIT_CLEAR_LOCK32(baseAddr, regAddr, prot_mem, mask)                                \
        REG_BIT_CLEAR32((regAddr),(mask))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Writes the content of a 8 bit register and locks it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  value    - 8 bit value the register will be written with 
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value)                            \
        {                                                                                  \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                          \
            REG_WRITE8(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value));    \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK8(baseAddr, regAddr, prot_mem, value)                            \
        REG_WRITE8((regAddr), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Writes the content of a 16 bit register and locks it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  value    - 16 bit value the register will be written with 
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK16(baseAddr, regAddr, prot_mem, value)                             \
        {                                                                                    \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                            \
            REG_WRITE16(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value));     \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK16(baseAddr, regAddr, prot_mem, value)                             \
        REG_WRITE16((regAddr), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Writes the content of a 32 bit register and locks it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT mirrored value
*             of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  value    - 32 bit value the register will be written with 
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK32(baseAddr, regAddr, prot_mem, value)                             \
        {                                                                                    \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                            \
            REG_WRITE32(((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32)), (value));     \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_WRITE_LOCK32(baseAddr, regAddr, prot_mem, value)                             \
        REG_WRITE32((regAddr), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */


/**
* @brief      Clears the content of a 8 bit register, writes it with the value in
*             'value' parameter masked with the one in 'mask' parameter and locks 
*             it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT 
*             mirrored value of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 8 bit mask the register will be written with 
* @param[in]  value    - 8 bit value the register will be written with 
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_RMW_LOCK8(baseAddr, regAddr, prot_mem, mask, value)                              \
        {                                                                                        \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                \
            REG_RMW8((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32), (mask), (value));      \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_RMW_LOCK8(baseAddr, regAddr, prot_mem, mask, value)                              \
        REG_RMW8((regAddr), (mask), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */


/**
* @brief      Clears the content of a 16 bit register, writes it with the value in
*             'value' parameter masked with the one in 'mask' parameter and locks 
*             it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT 
*             mirrored value of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 16 bit mask the register will be written with 
* @param[in]  value    - 16 bit value the register will be written with 
*
* @return     void
*/

#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_RMW_LOCK16(baseAddr, regAddr, prot_mem, mask, value)                             \
        {                                                                                        \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                \
            REG_RMW16((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32), (mask), (value));     \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/    
    #define REG_RMW_LOCK16(baseAddr, regAddr, prot_mem, mask, value)                             \
        REG_RMW16((regAddr), (mask), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Clears the content of a 32 bit register, writes it with the value in
*             'value' parameter masked with the one in 'mask' parameter and locks 
*             it automatically 
*
* @details    Clears first the corresponding soft lock bit and writes the REG_PROT 
*             mirrored value of the register, which automatically soft locks the register
*
* @param[in]  baseAddr - base address of the IP the register belongs to 
* @param[in]  regAddr  - address of the register to write and soft lock
* @param[in]  prot_mem - protection size of the IP
* @param[in]  mask     - 32 bit mask the register will be written with 
* @param[in]  value    - 32 bit value the register will be written with 
*
* @return     void
*/
#if (STD_ON == USER_MODE_REG_PROT_ENABLED)
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_RMW_LOCK32(baseAddr, regAddr, prot_mem, mask, value)                             \
        {                                                                                        \
            REG_CLR_SOFT_LOCK((baseAddr), (regAddr), (prot_mem));                                \
            REG_RMW32((regAddr) + ((prot_mem) * MIRRORED_ADDR_OFFSET_U32), (mask), (value));     \
        }
#else
    /* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined.*/
    #define REG_RMW_LOCK32(baseAddr, regAddr, prot_mem, mask, value)                             \
        REG_RMW32((regAddr), (mask), (value))
#endif /* (STD_ON == USER_MODE_REG_PROT_ENABLED) */

/**
* @brief      Sets the hardlock bit of an IP module 
*
* @param[in]  baseAddr - base address of the IP to be hard locked 
* @param[in]  prot_mem - the protection size of the IP
*
* @return     void
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined. */
#define SET_HARD_LOCK(baseAddr, prot_mem)  \
        REG_BIT_SET32((baseAddr) + ((prot_mem) * GCR_OFFSET_U32), REGPROT_GCR_HLB_MASK_U32)

/**
* @brief      Reads the Hard Lock bit of an IP module 
*
* @param[in]  baseAddr - base address of the IP for which hard lock status is read 
* @param[in]  prot_mem - the protection size of the IP
*
* @return     uint8  - 1 if hard lock is enabled
*                    - 0 if hard lock is disabled
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined. */
#define GET_HARD_LOCK(baseAddr, prot_mem)  \
        ((uint8)(REG_BIT_GET32((baseAddr) + ((prot_mem) * GCR_OFFSET_U32), REGPROT_GCR_HLB_MASK_U32) >> REGPROT_GCR_HLB_POS_U32))

/**
* @brief      Sets the User Access Allowed bit of an IP module 
*
* @param[in]  baseAddr - base address of the IP for which UAA bit is set 
* @param[in]  prot_mem - the protection size of the IP
*
* @return     void
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined. */
#define SET_USER_ACCESS_ALLOWED(baseAddr, prot_mem )  \
        REG_BIT_SET32((baseAddr) + ((prot_mem) * GCR_OFFSET_U32), REGPROT_GCR_UAA_MASK_U32)

/**
* @brief      Clears the User Access Allowed bit of an IP module 
*
* @param[in]  baseAddr - base address of the IP for which UAA bit is cleared 
* @param[in]  prot_mem - the protection size of the IP
*
* @return     void
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined. */
#define CLR_USER_ACCESS_ALLOWED(baseAddr, prot_mem)  \
        REG_BIT_CLEAR32((baseAddr) + ((prot_mem) * GCR_OFFSET_U32), REGPROT_GCR_UAA_MASK_U32)

/**
* @brief      Reads the User Access Allowed bit of an IP module 
*
* @param[in]  baseAddr - base address of the IP for which UAA is read 
* @param[in]  prot_mem - the protection size of the IP
*
* @return     uint8  - 1 if User Access Allow is enabled
*                    - 0 if User Access Allow is disabled
*/
/* @violates @ref RegLockMacros_h_REF_1 MISRA 2012 Advisory Rule 4.9, Function-like macro defined. */
#define GET_USER_ACCESS_ALLOWED(baseAddr, prot_mem)  \
        ((uint8)(REG_BIT_GET32((baseAddr) + ((prot_mem) * GCR_OFFSET_U32), REGPROT_GCR_UAA_MASK_U32) >> REGPROT_GCR_UAA_POS_U32))

/*==================================================================================================
*                                             ENUMS
==================================================================================================*/

/*==================================================================================================
*                                 STRUCTURES AND OTHER TYPEDEFS
==================================================================================================*/

/*==================================================================================================
*                                 GLOBAL VARIABLE DECLARATIONS
==================================================================================================*/

/*==================================================================================================
*                                     FUNCTION PROTOTYPES
==================================================================================================*/


#ifdef __cplusplus
}
#endif

#endif /* #ifndef REGLOCKMACROS_H */

/** @} */
