/**
*   @file    Adc_Eqadc_Irq.c
*   @version 1.0.0
*
*   @brief   AUTOSAR Adc - ADCDig Interrupt source file.
*   @details  Autosar Adc Interrupt source file.
*
*   @addtogroup ADC
*   @{
*/
/*==================================================================================================
*   Project              : AUTOSAR 4.3 MCAL
*   Platform             : PA
*   Peripheral           : EQADC
*   Dependencies         : none
*
*   Autosar Version      : 4.3.1
*   Autosar Revision     : ASR_REL_4_3_REV_0001
*   Autosar Conf.Variant :
*   SW Version           : 1.0.0
*   Build Version        : MPC5777C_MCAL_1_0_0_RTM_ASR_REL_4_3_REV_0001_20190315
*
*   (c) Copyright 2006-2016 Freescale Semiconductor, Inc. 
*       Copyright 2017-2019 NXP
*   All Rights Reserved.
==================================================================================================*/
/*==================================================================================================
==================================================================================================*/

#ifdef __cplusplus
extern "C"{
#endif

/**
* @page misra_violations MISRA-C:2012 violations
*
* @section Adc_Eqadc_Irq_c_REF_1
*          Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents
*          of a header file being included more than once. This violation is not fixed since the inclusion of
*          Adc_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
*
* @section Adc_Eqadc_Irq_c_REF_2
*          Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor
*          directives or comments. Adc_MemMap.h is included after each section define in order to set the current
*          memory section as defined by AUTOSAR
*
* @section Adc_Eqadc_Irq_c_REF_3
*          Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed between a pointer to object and an integer type.
*          The cast is used to access memory mapped registers.
*
* @section Adc_Eqadc_Irq_c_REF_4
*          Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed between pointer to void and an arithmetic type.
*          This macro computes the address of any register by using the hardware offset of the controller.
*          The address calculated as an unsigned int is passed to a macro for initializing the pointer with that address.
*
* @section Adc_Eqadc_Irq_c_REF_5
*          Violates MISRA 2012 Required Rule 10.8, The value of a composite expression shall not be cast to a different essential type category or a wider essential type.
*          This rule is only violated where the base address of the instance has to be selected according to the instance number.
*
* @section Adc_Eqadc_Irq_c_REF_6
*          Violates MISRA 2012 Advisory Rule 8.7,Functions and objects should not be defined with external linkage if they are referenced in only one translation unit.
*          This function needs external linkage if interrupts are enabled in the configuration.
*
* @section Adc_Eqadc_Irq_c_REF_7
*          Violates MISRA 2012 Advisory Rule 15.5, A function should have a single point of exit at the end.
*          This multiple return statements are used for reducing cyclomatic complexity.
*
* @section Adc_Eqadc_Irq_c_REF_8
*          Violates MISRA 2012 Required Rule 14.4, The controlling expression of an if statement and 
*          the controlling expression of an iteration-statement shall have essentially Boolean type.
*          Multi-statement macros shall be wrapped in a do-while loop, so the macro can appear safely inside if 
*          clauses or other places that expect a single statement or a statement block
*
* @section [global]
*          Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
*          The used compilers use more than 31 chars for identifiers.
*
* @section [global]
*          Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
*          The used compilers use more than 31 chars for identifiers.
*
* @section [global]
*          Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
*          The used compilers use more than 31 chars for identifiers.
*
* @section [global]
*          Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
*          The used compilers use more than 31 chars for identifiers.
*
*/

/*==================================================================================================
*                                        INCLUDE FILES
* 1) system and project includes
* 2) needed interfaces from external Units
* 3) internal and external interfaces from this Unit
==================================================================================================*/
#include "Adc_Ipw.h"
#define USER_MODE_REG_PROT_ENABLED                (ADC_USER_MODE_REG_PROT_ENABLED)
#include "SilRegMacros.h"
#include "Mcal.h"
#include "SchM_Adc.h"
#ifdef ADC_DMA_SUPPORTED
  #include "CDD_Mcl.h"
#endif
#include "Adc_Siu.h"
#include "Adc.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define ADC_EQADC_AR_VENDOR_ID_IRQ_C                 43
#define ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C     4
#define ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C     3
#define ADC_EQADC_AR_RELEASE_REVISION_VERSION_IRQ_C  1
#define ADC_EQADC_SW_MAJOR_VERSION_IRQ_C             1
#define ADC_EQADC_SW_MINOR_VERSION_IRQ_C             0
#define ADC_EQADC_SW_PATCH_VERSION_IRQ_C             0

/*==================================================================================================
*                                     FILE VERSION CHECKS
==================================================================================================*/
/* Check if source file and ADC IPW header file are from the same vendor */
#if (ADC_EQADC_AR_VENDOR_ID_IRQ_C != ADC_VENDOR_ID_IPW_H)
    #error "Adc_Eqadc_Irq.c and Adc_Ipw.h have different vendor ids"
#endif

/* Check if source file and ADC IPW header file are of the same Autosar version */
#if ((ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C != ADC_AR_RELEASE_MAJOR_VERSION_IPW_H) || \
     (ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C != ADC_AR_RELEASE_MINOR_VERSION_IPW_H) || \
     (ADC_EQADC_AR_RELEASE_REVISION_VERSION_IRQ_C != ADC_AR_RELEASE_REVISION_VERSION_IPW_H) \
    )
    #error "AutoSar Version Numbers of Adc_Eqadc_Irq.c and Adc_Ipw.h are different"
#endif

/* Check if source file and ADC IPW header file are of the same Software version */
#if ((ADC_EQADC_SW_MAJOR_VERSION_IRQ_C != ADC_SW_MAJOR_VERSION_IPW_H) || \
     (ADC_EQADC_SW_MINOR_VERSION_IRQ_C != ADC_SW_MINOR_VERSION_IPW_H) || \
     (ADC_EQADC_SW_PATCH_VERSION_IRQ_C != ADC_SW_PATCH_VERSION_IPW_H) \
    )
    #error "Software Version Numbers of Adc_Eqadc_Irq.c and Adc_Ipw.h are different"
#endif

#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
 /* Check if source file and Mcal header file are of the same AutoSar version */
 #if ((ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C != MCAL_AR_RELEASE_MAJOR_VERSION) || \
      (ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C != MCAL_AR_RELEASE_MINOR_VERSION) \
     )
 #error "AutoSar Version Numbers of Adc_Eqadc_Irq.c and Mcal.h are different"
 #endif 
 /* Check if source file and SilREgMacros header file are of the same AutoSar version */
 #if ((ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C != SILREGMACROS_AR_RELEASE_MAJOR_VERSION) || \
      (ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C != SILREGMACROS_AR_RELEASE_MINOR_VERSION) \
     )
 #error "AutoSar Version Numbers of Adc_Eqadc_Irq.c and SilRegMacros.h are different"
 #endif 

 #ifdef ADC_DMA_SUPPORTED
  /* Check if source file and DMA header file are of the same Autosar version */
  #if ((ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C != MCL_AR_RELEASE_MAJOR_VERSION) || \
       (ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C != MCL_AR_RELEASE_MINOR_VERSION)  \
      )
      #error "AutoSar Version Numbers of Adc_Eqadc_Irq.c and CDD_Mcl.h are different"
  #endif
  /* Check if source file and Mcl_Types.h are of the same Autosar version */
  #if ((ADC_EQADC_AR_RELEASE_MAJOR_VERSION_IRQ_C != MCL_TYPES_AR_RELEASE_MAJOR_VERSION) || \
       (ADC_EQADC_AR_RELEASE_MINOR_VERSION_IRQ_C != MCL_TYPES_AR_RELEASE_MINOR_VERSION)  \
      )
      #error "AutoSar Version Numbers of Adc_Eqadc_Irq.c and Mcl_Types.h are different"
  #endif
 #endif
#endif

/*==================================================================================================
*                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
==================================================================================================*/

/*==================================================================================================
*                                       LOCAL MACROS
==================================================================================================*/

/*==================================================================================================
*                                      LOCAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
*                                      LOCAL VARIABLES
==================================================================================================*/

/*==================================================================================================
*                                      GLOBAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
*                                      GLOBAL VARIABLES
==================================================================================================*/
/*==================================================================================================
*                                   LOCAL FUNCTION PROTOTYPES
==================================================================================================*/
#define ADC_START_SEC_CODE
/** @violates @ref Adc_Eqadc_Irq_c_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
/** @violates @ref Adc_Eqadc_Irq_c_REF_2 #include directives should only be preceded by preprocessor directives or comments. */
#include "Adc_MemMap.h"

#if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult0(void);
#endif /* #if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult1(void);
#endif /* #if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult2(void);
#endif /* #if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult3(void);
#endif /* #if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON)*/

#if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult4(void);
#endif /* #if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult5(void);
#endif /* #if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult0(void);
#endif /* #if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult1(void);
#endif /* #if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult2(void);
#endif /* #if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult3(void);
#endif /* #if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON)*/

#if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult4(void);
#endif /* #if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON)

FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult5(void);
#endif /* #if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON) */

#ifdef ADC_DMA_SUPPORTED
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_LimitCheckValueInRange
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(Adc_GroupType, AUTOMATIC) Group
);
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DmaLimitCheck
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(Mcl_ChannelType, AUTOMATIC) DmaCommandChannel,
    VAR(Mcl_ChannelType, AUTOMATIC) DmaDataChannel
);
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DisableLinearConversion
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
#ifdef ADC_ENABLE_DOUBLE_BUFFERING
#if (STD_ON == ADC_ENABLE_DOUBLE_BUFFERING)
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DoubleBuffering
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* STD_ON == ADC_ENABLE_DOUBLE_BUFFERING */
#endif /* define ADC_ENABLE_DOUBLE_BUFFERING */
#if(STD_ON == ADC_GRP_NOTIF_CAPABILITY)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_DmaCheckNotification
(
    VAR(Adc_GroupType, AUTOMATIC) Group
);
#endif /* STD_ON == ADC_GRP_NOTIF_CAPABILITY */

LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_DmaInterruptCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* #ifdef ADC_DMA_SUPPORTED */

#if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo0Empty);
ISR(Adc_Eqadc_EqadcARFifo0Full);
#endif /* #if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo1Empty);
ISR(Adc_Eqadc_EqadcARFifo1Full);
#endif /* #if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo2Empty);
ISR(Adc_Eqadc_EqadcARFifo2Full);
#endif /* #if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo3Empty);
ISR(Adc_Eqadc_EqadcARFifo3Full);
#endif /* #if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo4Empty);
ISR(Adc_Eqadc_EqadcARFifo4Full);
#endif /* #if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcACFifo5Empty);
ISR(Adc_Eqadc_EqadcARFifo5Full);
#endif /* #if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo0Empty);
ISR(Adc_Eqadc_EqadcBRFifo0Full);
#endif /* #if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo1Empty);
ISR(Adc_Eqadc_EqadcBRFifo1Full);
#endif /* #if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo2Empty);
ISR(Adc_Eqadc_EqadcBRFifo2Full);
#endif /* #if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo3Empty);
ISR(Adc_Eqadc_EqadcBRFifo3Full);
#endif /* #if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo4Empty);
ISR(Adc_Eqadc_EqadcBRFifo4Full);
#endif /* #if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON)
ISR(Adc_Eqadc_EqadcBCFifo5Empty);
ISR(Adc_Eqadc_EqadcBRFifo5Full);
#endif /* #if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON) */

#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_CFIFO_ENABLED == STD_ON)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_CFifoEmptyCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */

#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_RFifoFullCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);

#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_FifoDisableFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */

#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_UpdateQueue
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */

#if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
LOCAL_INLINE FUNC(boolean, ADC_CODE) Adc_Eqadc_CheckNotification
(
    VAR(Adc_GroupType, AUTOMATIC) Group
);
#endif /* ADC_GRP_NOTIF_CAPABILITY == STD_ON */

LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_RecordResult
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);

#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_UpdateGroupState
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
);
#endif /* (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */

/*==================================================================================================
*                                       LOCAL FUNCTIONS
==================================================================================================*/
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_UpdateQueue
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    /* Remove ongoing group from array */
    Adc_Eqadc_aFifoOngoingGroup[u8EqadcIdx][u8FifoIndex] = ADC_INVALID_GROUPS_ID;
#if (ADC_ENABLE_QUEUING == STD_ON)
    Adc_RemoveFromQueue(Unit, 0U);
    #if (ADC_ENABLE_START_STOP_GROUP_API == STD_ON)
    if (Adc_aUnitStatus[Unit].SwNormalQueueIndex > 0U)
    {
        Adc_Eqadc_StartNormalConversion(Unit);
    }
    #endif /* (ADC_ENABLE_START_STOP_GROUP_API == STD_ON) */
#else
    /* no element will be present in the queue */
    Adc_aUnitStatus[Unit].SwNormalQueueIndex = 0U;
#endif /* (ADC_ENABLE_QUEUING == STD_ON) */
}
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */

#if (ADC_GRP_NOTIF_CAPABILITY == STD_ON)
LOCAL_INLINE FUNC(boolean, ADC_CODE) Adc_Eqadc_CheckNotification
(
    VAR(Adc_GroupType, AUTOMATIC) Group
)
{
    VAR(boolean, AUTOMATIC) bCallNotification = (boolean) FALSE;

    if ((ADC_NOTIFICATION_ENABLED == Adc_aGroupStatus[Group].eNotification) && \
        (NULL_PTR != Adc_pCfgPtr->pGroups[Group].Notification)
       )
    {
        bCallNotification = (boolean)TRUE;
    }
    return bCallNotification;
}
#endif /* ADC_GRP_NOTIF_CAPABILITY == STD_ON */

LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_RecordResult
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(Adc_ValueGroupType, AUTOMATIC) ResultIdx;
    VAR(Adc_StreamNumSampleType, AUTOMATIC) GroupSamples;
    P2VAR(Adc_ValueGroupType, AUTOMATIC, ADC_APPL_DATA) pResult = NULL_PTR;
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;
    VAR(Adc_ValueGroupType, AUTOMATIC) AdcCdrvalue = (Adc_ValueGroupType)0U;
#if ((ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT) || ((ADC_RESULT_ALIGNMENT == ADC_ALIGN_LEFT) && (ADC_ENABLE_LIMIT_CHECK == STD_ON)))
    VAR(uint8, AUTOMATIC) u8Shift;
    VAR(Adc_HwUnitType, AUTOMATIC) HwIndex;
#endif /* (ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT)... */
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)
    /* bFlag to set if ADC results are in the range selected */
    VAR(boolean,AUTOMATIC) bFlag = (boolean)TRUE;
    VAR(Adc_ValueGroupType, AUTOMATIC) AdcTemp = 0U;
    VAR(Adc_ChannelType, AUTOMATIC) ChIndex;
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */

    pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
    pResult = (pGroupPtr->pResultsBufferPtr[Group]);
    GroupSamples = (pGroupPtr->NumSamples);
    ResultIdx = ((GroupSamples * Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex]) + Adc_aGroupStatus[Group].ResultIndex);
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)    
    ChIndex = Adc_GroupChannelIndex(Group, Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex]);
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */
#if ((ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT) || ((ADC_RESULT_ALIGNMENT == ADC_ALIGN_LEFT) && (ADC_ENABLE_LIMIT_CHECK == STD_ON)))
    HwIndex = Adc_pCfgPtr->Misc.aHwLogicalId[Unit];
    u8Shift = (14U - (Adc_pCfgPtr->pAdc[HwIndex].Res));
#endif /* (ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT)... */

    /* Read RFIFO into RAM buffer after right aligned */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/    
    AdcCdrvalue = REG_READ16(EQADC_RFPR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex) + 2U);

    /* Clear the RFDF bit in FISR0 register by writing 1 to it */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/    
    REG_WRITE32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_FISR_RFDF_U32);

#if (ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT)
    AdcCdrvalue = (Adc_ValueGroupType)((uint32)AdcCdrvalue & EQADC_DATA_MASK_U32) >> u8Shift;
#endif /* (ADC_RESULT_ALIGNMENT == ADC_ALIGN_RIGHT) */

#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)

    if((boolean)TRUE == Adc_aChannelsLimitCheckingCfg[Unit][ChIndex].bChannelLimitCheck)
    {
    #if (ADC_RESULT_ALIGNMENT == ADC_ALIGN_LEFT)
        AdcTemp = (Adc_ValueGroupType)((uint32)AdcCdrvalue >> u8Shift);
    #else
        AdcTemp = AdcCdrvalue;
    #endif /* (ADC_RESULT_ALIGNMENT == ADC_ALIGN_LEFT) */
        bFlag = (boolean)Adc_CheckConversionValuesInRange(AdcTemp, Unit, ChIndex);
        if (bFlag == (boolean)TRUE)
        {
            Adc_aGroupStatus[Group].bLimitCheckFailed = (boolean)FALSE;
            pResult[ResultIdx] = (Adc_ValueGroupType)AdcCdrvalue;
        }
        else
        {
            Adc_aGroupStatus[Group].bLimitCheckFailed = (boolean)TRUE;
            Adc_aGroupStatus[Group].eAlreadyConverted = ADC_ALREADY_CONVERTED;
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return (Std_ReturnType)E_NOT_OK;
        }
    }
    else
    {

        pResult[ResultIdx] = (Adc_ValueGroupType)AdcCdrvalue;
    }
#else
    pResult[ResultIdx] = (Adc_ValueGroupType)AdcCdrvalue;
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */

    return (Std_ReturnType)E_OK;
}

#if defined(ADC_DMA_SUPPORTED) || defined(__DOXYGEN__)
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)
/**
* @brief          This function checks if value from DMA internal result buffer are in the configured range.
* @details        This function checks if value from DMA internal result buffer are in the configured range.
*
* @param[in]      Unit         The current HW Unit.
* @param[in]      Group        The group to be converted.
*
* @return         Std_ReturnType    Checking result
* @retval         E_OK              If conversion values are in the configured range.
* @retval         E_NOT_OK          If conversion values are not in the configured range.
*
*/
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_LimitCheckValueInRange
(
    VAR(Adc_HwUnitType, AUTOMATIC) Unit,
    VAR(Adc_GroupType, AUTOMATIC) Group
)
{
    VAR(Adc_ChannelType, AUTOMATIC) ChIndex;
    VAR(Std_ReturnType, AUTOMATIC) ReadGroupRet = (Std_ReturnType)E_OK;
    P2VAR(Adc_ValueGroupType, AUTOMATIC, ADC_APPL_DATA) pResult = NULL_PTR;
    VAR(Adc_ValueGroupType, AUTOMATIC) ResultValue;
    VAR(Adc_ValueGroupType, AUTOMATIC) ResultTemp;
    VAR(uint8, AUTOMATIC) u8Shift;
    VAR(Adc_HwUnitType, AUTOMATIC) HwIndex;
    VAR(Adc_StreamNumSampleType, AUTOMATIC) ResultIndex;

    HwIndex = Adc_pCfgPtr->Misc.aHwLogicalId[Unit];

    ChIndex = Adc_pCfgPtr->pGroups[Group].pAssignment[0];

    u8Shift = (14U - (Adc_pCfgPtr->pAdc[HwIndex].Res));

    ResultValue = (Adc_ValueGroupType)(Adc_Eqadc_aDmaInternalResultBuffer[Unit] & EQADC_DATA_MASK_U32);
    ResultTemp = ResultValue >> u8Shift;

    if((boolean)FALSE == Adc_CheckConversionValuesInRange(ResultTemp, Unit, ChIndex))
    {
        Adc_aGroupStatus[Group].bLimitCheckFailed = (boolean)TRUE;
        ReadGroupRet = (Std_ReturnType)E_NOT_OK;
    }
    else
    {
        Adc_aGroupStatus[Group].bLimitCheckFailed = (boolean)FALSE;
        ResultIndex = Adc_aGroupStatus[Group].ResultIndex;
        pResult = (Adc_ValueGroupType *)(&(Adc_pCfgPtr->pGroups[Group].pResultsBufferPtr[Group][ResultIndex]));
        *pResult = ResultValue;
    }
    return ReadGroupRet;
}
/**
* @brief          This function handles Enable/Disable HW request for limit checking in DMA interrupt function.
* @details        This function handles Enable/Disable HW request for limit checking in DMA interrupt function.
*
* @param[in]      Group                 The group to be converted.
* @param[in]      DmaCommandChannel     The current DMA Command channel.
* @param[in]      DmaDataChannel        The current DMA Result channel.
*
* @return         E_OK or E_NOT_OK
*
*/
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DmaLimitCheck
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(Mcl_ChannelType, AUTOMATIC) DmaCommandChannel,
    VAR(Mcl_ChannelType, AUTOMATIC) DmaDataChannel
)
{
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Adc_ChannelType, AUTOMATIC) ChIndex;
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;

    Unit = Adc_GroupUnit(Group);
    pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
    ChIndex = Adc_pCfgPtr->pGroups[Group].pAssignment[0];
    if ((boolean)TRUE == Adc_aChannelsLimitCheckingCfg[Unit][ChIndex].bChannelLimitCheck)
    {
        if((Std_ReturnType)E_NOT_OK == Adc_Eqadc_LimitCheckValueInRange(Unit, Group))
        {
            if (ADC_CONV_MODE_ONESHOT == pGroupPtr->eMode)
            {
                if(ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource)
                {
                    /* Disable the DMA command channel*/
                    Mcl_DmaDisableHwRequest(DmaCommandChannel);
                    /* Disable the DMA result channel*/
                    Mcl_DmaDisableHwRequest(DmaDataChannel);
                }
            }
            else
            {
                /* Start the DMA command channel */
                Mcl_DmaEnableHwRequest(DmaCommandChannel);
                /* Start the DMA result channel */
                Mcl_DmaEnableHwRequest(DmaDataChannel);
            }
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return (Std_ReturnType)E_NOT_OK;
        }
    }
    return (Std_ReturnType)E_OK;
}
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */

#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
/**
* @brief          This function handles disable conversion if group is Linear mode in DMA interrupt function.
* @details        This function handles disable conversion if group is Linear mode in DMA interrupt function.
*
* @param[in]      Group        The group to be converted.
* @param[in]      u8EqadcIdx   EQADC Unit
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         E_OK or E_NOT_OK
* @retval         E_OK            If Group isn't Linear mode.
* @retval         E_NOT_OK        If Group is Linear mode.
*/
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DisableLinearConversion
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Std_ReturnType, AUTOMATIC) FuncReturn = (Std_ReturnType)E_OK;
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;

    Unit = Adc_GroupUnit(Group);
    pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
    if((ADC_STREAM_BUFFER_LINEAR == pGroupPtr->eBufferMode) && (ADC_ACCESS_MODE_STREAMING == pGroupPtr->eAccessMode))
    {
        /* Stop Conversion [ADC316] */
        /* the below func will stop the conversion and abort the current group conversion,
        is important to abort the current, otherwise, another interrupt occurs after the stop */
        FuncReturn = Adc_Eqadc_FifoDisableFunc(u8EqadcIdx, u8FifoIndex);

        if((Std_ReturnType)E_OK == FuncReturn)
        {
#if(STD_ON == ADC_HW_TRIGGER_API)
            /* hardware triggered group */
            if (ADC_TRIGG_SRC_HW == pGroupPtr->eTriggerSource)
            {
                /* Filled slots in the Hw queue */
                Adc_aUnitStatus[Unit].HwNormalQueue[0] = 0U;
                Adc_aUnitStatus[Unit].HwNormalQueueIndex = 0U;
                /* Disable the hardware trigger source */
                Adc_Siu_DisableHwTrigger((uint8)u8EqadcIdx, (uint8)u8FifoIndex);
            }
            else
#endif /* (STD_ON == ADC_HW_TRIGGER_API) */
            {
                Adc_Eqadc_UpdateQueue(Unit, u8EqadcIdx, u8FifoIndex);
            }
#if(STD_ON == ADC_GRP_NOTIF_CAPABILITY)
            Adc_Eqadc_DmaCheckNotification(Group);
#endif /* (STD_ON == ADC_GRP_NOTIF_CAPABILITY) */
        }
        /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
        return (Std_ReturnType)E_NOT_OK;
    }

    return (Std_ReturnType)E_OK;
}
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */

#ifdef ADC_ENABLE_DOUBLE_BUFFERING
#if (STD_ON == ADC_ENABLE_DOUBLE_BUFFERING)
/**
* @brief          This function handles for Double Buffering Feature in DMA interrupt function.
* @details        This function handles for Double Buffering Feature in DMA interrupt function.
*
* @param[in]      Group        The group to be converted.
* @param[in]      u8EqadcIdx   EQADC Unit
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         E_OK or E_NOT_OK
*/
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_DoubleBuffering
(
    VAR(Adc_GroupType, AUTOMATIC) Group,
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(uint16, AUTOMATIC) u16Iter;
    VAR(Adc_ChannelIndexType, AUTOMATIC) ChCount;
    VAR(Mcl_ChannelType, AUTOMATIC) DmaChannel = 255U; /* Invalid DMA channel*/
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;
    VAR(Mcl_ChannelType, AUTOMATIC) DmaCommandChannel = 0U;
    VAR(Mcl_ChannelType, AUTOMATIC) DmaDataChannel = 0U;
    VAR(Mcl_DmaTcdType*, AUTOMATIC) TcdAddress;
    P2VAR(Adc_ValueGroupType, AUTOMATIC, ADC_APPL_DATA) pResult = NULL_PTR;
    VAR(Adc_StreamNumSampleType, AUTOMATIC) GroupSamples = (Adc_StreamNumSampleType)1U;

    pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
    ChCount = pGroupPtr->AssignedChannelCount;
    GroupSamples = pGroupPtr->NumSamples;
    /*Get the DMA cmd channel*/
    DmaCommandChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(uint8)(u8FifoIndex << 1U)];
    /*Get the DMA result channel*/
    DmaDataChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(uint8)(u8FifoIndex << 1U) + 1U];
    if(ChCount > 1U)
    {
        /*Get the DMA link channel */
        DmaChannel=(Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaDoubleBuffer[u8EqadcIdx][u8FifoIndex];
    }
    else
    {
        /*Get the DMA result channel*/
        DmaChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(uint8)(u8FifoIndex << 1U) + 1U];
    }
    TcdAddress = (Mcl_DmaTcdType *)Mcl_DmaGetChannelTcdAddress((Mcl_ChannelType)DmaChannel);
    u16Iter = Mcl_DmaTcdGetIterCount(TcdAddress);
    if(GroupSamples == u16Iter)
    {
        Adc_aGroupStatus[Group].eConversion = ADC_STREAM_COMPLETED;
        if ((ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource) && (ChCount > 1U))
        {
            /* Disable the DMA command channel*/
            Mcl_DmaDisableHwRequest(DmaCommandChannel);
            /* Disable the DMA result channel*/
            Mcl_DmaDisableHwRequest(DmaDataChannel);
        }
        /* Disable conversion if group is Linear mode */
        if((Std_ReturnType)E_NOT_OK == Adc_Eqadc_DisableLinearConversion(Group, u8EqadcIdx, u8FifoIndex))
        {
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return (Std_ReturnType)E_NOT_OK;
        }
        /* Configure the destination result address in TCD of the DMA result channels */
        TcdAddress = (Mcl_DmaTcdType *)Mcl_DmaGetChannelTcdAddress((Mcl_ChannelType)DmaDataChannel);
        pResult = pGroupPtr->pResultsBufferPtr[Group];
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        Mcl_DmaTcdSetDaddr(TcdAddress, (uint32)pResult);
        if((ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource) || (1U == ChCount))
        {
            /* Start the DMA command channel */
            Mcl_DmaEnableHwRequest(DmaCommandChannel);
            /* Start the DMA result channel */
            Mcl_DmaEnableHwRequest(DmaDataChannel);
        }
    }
    else
    {
        Adc_aGroupStatus[Group].eConversion = ADC_COMPLETED;
    }
    
    return (Std_ReturnType)E_OK;
}
#endif /* STD_ON == ADC_ENABLE_DOUBLE_BUFFERING */
#endif /* define ADC_ENABLE_DOUBLE_BUFFERING */
#if(STD_ON == ADC_GRP_NOTIF_CAPABILITY)
/**
* @brief          This function invokes the user notification if it is available in case of DMA is used
* @details        This function invokes the user notification if it is available in case of DMA is used
*
* @param[in]      Group        The group to be converted.
*
* @return         void
*
*/
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_DmaCheckNotification
(
    VAR(Adc_GroupType, AUTOMATIC) Group
)
{
    VAR(boolean, AUTOMATIC) bCallNotification = (boolean) FALSE;

    bCallNotification = Adc_Eqadc_CheckNotification(Group);

    if((boolean)TRUE == bCallNotification)
    {
        /* Execute user notification */
        Adc_pCfgPtr->pGroups[Group].Notification();
    }
}
#endif /* STD_ON == ADC_GRP_NOTIF_CAPABILITY */
/**
* @brief          This function handles the DMA Interrupt common function for all FIFOs
*                 on all eQADC units.
* @details        This function handles the DMA Interrupt common function.
*
* @param[in]      u8EqadcIdx   EQADC Unit
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         void
*
*/
LOCAL_INLINE FUNC(void, ADC_CODE)Adc_Eqadc_DmaInterruptCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(Adc_GroupType, AUTOMATIC) Group = (Adc_GroupType)0U;
    P2VAR(Adc_ValueGroupType, AUTOMATIC, ADC_APPL_DATA) pResult = NULL_PTR;
    /* Streaming num samples should be atleast 1U */
    VAR(Adc_StreamNumSampleType, AUTOMATIC) GroupSamples = (Adc_StreamNumSampleType)1U;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Std_ReturnType, AUTOMATIC) FuncReturn = (Std_ReturnType)E_OK;
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;
    VAR(Mcl_ChannelType, AUTOMATIC) DmaCommandChannel = 0U;
    VAR(Mcl_ChannelType, AUTOMATIC) DmaDataChannel = 0U;
    VAR(Mcl_DmaTcdType*, AUTOMATIC) TcdAddress;
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)
    VAR(Std_ReturnType, AUTOMATIC) RetVal;
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */

    if(NULL_PTR != Adc_pCfgPtr)
    {
        /* enter critical region */
        SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_13();

        /*Obtain the active group*/
        Group = Adc_Eqadc_aFifoOngoingGroup[u8EqadcIdx][u8FifoIndex];
        if(ADC_INVALID_GROUPS_ID == Group)
        {
            /* exit critical region */
            SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13();
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return;
        }
        Adc_aGroupStatus[Group].eAlreadyConverted = ADC_ALREADY_CONVERTED;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
        Unit = Adc_GroupUnit(Group);
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
        pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
        GroupSamples = pGroupPtr->NumSamples;
        /*Get the DMA cmd channel*/
        DmaCommandChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(uint8)(u8FifoIndex << 1U)];
        /*Get the DMA result channel*/
        DmaDataChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(uint8)(u8FifoIndex << 1U) + 1U];
#ifdef ADC_ENABLE_DOUBLE_BUFFERING
#if (STD_ON == ADC_ENABLE_DOUBLE_BUFFERING)
        if ((boolean) TRUE == pGroupPtr->bAdcDoubleBuffering)
        {
            if((Std_ReturnType)E_NOT_OK == Adc_Eqadc_DoubleBuffering(Group, u8EqadcIdx, u8FifoIndex))
            {
                /* exit critical region */
                SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13();
                /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
                return;
            } 
        }
        else
#endif /* (STD_ON == ADC_ENABLE_DOUBLE_BUFFERING) */
#endif /* define ADC_ENABLE_DOUBLE_BUFFERING */
        {
#if (ADC_ENABLE_LIMIT_CHECK == STD_ON)
        RetVal = Adc_Eqadc_DmaLimitCheck(Group, DmaCommandChannel, DmaDataChannel);
        if((Std_ReturnType)E_NOT_OK == RetVal)
        {
            /* Exit critical region */
            SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13();
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return;
        }
#endif /* (ADC_ENABLE_LIMIT_CHECK == STD_ON) */
            /* increment ResultIndex with modulo 'NumSamples' to remember that another sample is completed */
            Adc_aGroupStatus[Group].ResultIndex++;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
            if(ADC_BUSY == Adc_aGroupStatus[Group].eConversion)
            {
                Adc_aGroupStatus[Group].eConversion = ADC_COMPLETED;
            }
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
            /* if all samples completed, wrap to 0 */

            if (Adc_aGroupStatus[Group].ResultIndex >= GroupSamples)
            {
                Adc_aGroupStatus[Group].eConversion = ADC_STREAM_COMPLETED;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
                /* Disable conversion if group is Linear mode */    
                if((Std_ReturnType)E_NOT_OK == Adc_Eqadc_DisableLinearConversion(Group, u8EqadcIdx, u8FifoIndex))
                {
                    /* exit critical region */
                    SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13();
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
                    return;
                }
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
            }
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
            if (ADC_CONV_MODE_CONTINUOUS == pGroupPtr->eMode)
            {
                if (ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource)
                {
                    /* if all samples completed, wrap to 0 */
                    if (Adc_aGroupStatus[Group].ResultIndex >= pGroupPtr->NumSamples)
                    {
                        Adc_aGroupStatus[Group].ResultIndex = 0U;
                        pResult = pGroupPtr->pResultsBufferPtr[Group];
                        TcdAddress = (Mcl_DmaTcdType *)Mcl_DmaGetChannelTcdAddress(DmaDataChannel);
                        /* configure the destination result address in TCD of the DMA channels */
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
                        Mcl_DmaTcdSetDaddr(TcdAddress, (uint32)pResult);
                    }
                }
                /* Start the DMA command channel */
                Mcl_DmaEnableHwRequest(DmaCommandChannel);
                /* Start the DMA result channel */
                Mcl_DmaEnableHwRequest(DmaDataChannel);
            }
            else
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
            {
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
                /* one-shot conversion */
                if (ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource) /* software trigger group */
                {
                    Adc_aGroupStatus[Group].ResultIndex = 0U;
                    /* Disable the FIFO */
                    FuncReturn = Adc_Eqadc_FifoDisableFunc(u8EqadcIdx, u8FifoIndex);
                    if ((Std_ReturnType)E_OK == FuncReturn)
                    {
                        Adc_Eqadc_UpdateQueue(Unit, u8EqadcIdx, u8FifoIndex);
                    }
                }
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
#if(STD_ON == ADC_HW_TRIGGER_API)
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
                else  /* hardware trigger group */
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
                {
                    /* if all samples completed, wrap to 0 */
                    if (Adc_aGroupStatus[Group].ResultIndex >= pGroupPtr->NumSamples)
                    {
                        Adc_aGroupStatus[Group].ResultIndex = 0U;
                        pResult = pGroupPtr->pResultsBufferPtr[Group];
                        TcdAddress = (Mcl_DmaTcdType *)Mcl_DmaGetChannelTcdAddress(DmaDataChannel);
                        /* Configure the destination result address in TCD of the DMA channels */
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/                   
                        Mcl_DmaTcdSetDaddr(TcdAddress, (uint32)pResult);
                    }
                    /* Start the DMA command channel */
                    Mcl_DmaEnableHwRequest(DmaCommandChannel);
                    /* Start the DMA result channel */
                    Mcl_DmaEnableHwRequest(DmaDataChannel);
                }
#endif /* (STD_ON == ADC_HW_TRIGGER_API) */
            }
        }
#if(STD_ON == ADC_GRP_NOTIF_CAPABILITY)
    Adc_Eqadc_DmaCheckNotification(Group);
#endif /* (STD_ON == ADC_GRP_NOTIF_CAPABILITY) */
    /* exit critical region */
    SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_13();
    }
}
#endif /* #if defined(ADC_DMA_SUPPORTED) */

#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the Irq CFIFO Empt Interrupt common function for all FIFOs
*                 on all qEADC units.
* @details        This function handles Irq CFIFO Empt Interrupt common function for all FIFOs.
*
* @param[in]      u8EqadcIdx   EQADC Unit.
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         void
*
*/
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_CFifoEmptyCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(Adc_ChannelIndexType, AUTOMATIC) ChannelsInGrp;
    VAR(Adc_ChannelIndexType, AUTOMATIC) ChIndex;
    VAR(uint32, AUTOMATIC) u32FifoCmdmsg;
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Adc_GroupType, AUTOMATIC) Group;

    if(NULL_PTR != Adc_pCfgPtr)
    {
        /* Enter critical region */
        SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_14();
        /* Obtain the active group */
        Group = Adc_Eqadc_aFifoOngoingGroup[u8EqadcIdx][u8FifoIndex];
        if(ADC_INVALID_GROUPS_ID == Group)
        {
            /* Clear the CFFF bit in FISR1 register by writing 1 to it */
            /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
            /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
            /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
            REG_WRITE32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_FISR_CFFF_U32);
            /* exit critical region */
            SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14();
            /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
            return;
        }

        Unit = Adc_GroupUnit(Group);
        
        ChannelsInGrp = Adc_pCfgPtr->pGroups[Group].AssignedChannelCount;

        ChIndex = Adc_GroupChannelIndex(Group, Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex]);

        if ((Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex] == (ChannelsInGrp-1U)) && \
            (ADC_CONV_MODE_ONESHOT == Adc_pCfgPtr->pGroups[Group].eMode) \
           )
        {
            /* Last ADC channel, hence set the EOQ Flag */
            u32FifoCmdmsg = ((Adc_pCfgPtr->pChannels[Unit][ChIndex].u32Msg)|(EQADC_RESULT_FIFO_OFFSET_U32*u8FifoIndex) |
                          EQADC_ADC_WRITE_CONFIG_EOQ_U32);
        }
        else
        {
            u32FifoCmdmsg = ((Adc_pCfgPtr->pChannels[Unit][ChIndex].u32Msg)|(EQADC_RESULT_FIFO_OFFSET_U32*u8FifoIndex));
        }

        /* Write command data to CFIFO PUSH register*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_CFPR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), u32FifoCmdmsg);
        /* Clear the CFFF bit in FISR1 register by writing 1 to it */

        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_FISR_CFFF_U32);

        /* Increment count for number of messages transferred to CFIFO*/
        Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex]++;

        /* Disable till conversion is complete */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_BIT_CLEAR16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_IDCR_CFFE_U16);

        /* exit critical region */
        SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_14();
    }
    else
    {
        /* Clear the CFFF bit in FISR1 register by writing 1 to it */
       /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
       /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
       /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
       REG_WRITE32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_FISR_CFFF_U32);
    }
}
#endif /* #IF (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */

#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_UpdateGroupState
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(Adc_GroupType, AUTOMATIC) Group;
    VAR(Adc_ChannelIndexType, AUTOMATIC) ChannelsInGrp;
    VAR(Adc_StreamNumSampleType, AUTOMATIC) GroupSamples;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Std_ReturnType, AUTOMATIC) FuncReturn = (Std_ReturnType)E_OK;
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;
#if (STD_ON == ADC_GRP_NOTIF_CAPABILITY)
    VAR(boolean, AUTOMATIC) bCallNotification = (boolean)FALSE;
#endif /* STD_ON == ADC_GRP_NOTIF_CAPABILITY */

    /* Obtain the active group */
    Group = Adc_Eqadc_aFifoOngoingGroup[u8EqadcIdx][u8FifoIndex];
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
    Unit = Adc_GroupUnit(Group);
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
    pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
    ChannelsInGrp = pGroupPtr->AssignedChannelCount;
    GroupSamples = pGroupPtr->NumSamples;

    /* Increment count for messages read from RFIFO */
    Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex]++;

    if (Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex] == ChannelsInGrp)
    {
        /* Clear variable for next use */
        Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex] = 0U;
        Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex] = 0U;

        /* Disable CFIFO and RFIFO interrupt */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_BIT_CLEAR16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), (uint16)(EQADC_IDCR_CFFE_U16 | EQADC_IDCR_RFDE_U16));

        /* increment ResultIndex with modulo 'NumSamples' to remember that another sample is completed */
        Adc_aGroupStatus[Group].ResultIndex++;
        /* at least once the group was converted */
        Adc_aGroupStatus[Group].eAlreadyConverted = ADC_ALREADY_CONVERTED;
        
        if(ADC_BUSY == Adc_aGroupStatus[Group].eConversion)
        {
            Adc_aGroupStatus[Group].eConversion = ADC_COMPLETED;
        }

        if(Adc_aGroupStatus[Group].ResultIndex >= GroupSamples) /* if all samples completed, wrap to 0 */
        {
            Adc_aGroupStatus[Group].eConversion = ADC_STREAM_COMPLETED;
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
            if((ADC_STREAM_BUFFER_LINEAR == pGroupPtr->eBufferMode) && (ADC_ACCESS_MODE_STREAMING == pGroupPtr->eAccessMode))
            {
                /* ADC078 Disable Interrupt Status*/
                /* Stop Conversion [ADC316] */
                /* the following func stop the conversion and abort the current group conversion,
                is important to abort the current, otherwise, another interrupt occurs after the stop */
                FuncReturn = Adc_Eqadc_FifoDisableFunc(u8EqadcIdx, u8FifoIndex);
                if ((Std_ReturnType)E_OK == FuncReturn)
                {
#if(STD_ON == ADC_HW_TRIGGER_API)
                    /* hardware triggered group */
                    if (ADC_TRIGG_SRC_HW == pGroupPtr->eTriggerSource)
                    {
                        Adc_aUnitStatus[Unit].HwNormalQueue[0] =0U;
                        /* Filled slots in the Hw queue */
                        Adc_aUnitStatus[Unit].HwNormalQueueIndex = 0U;
                        /* Disable the hardware trigger source */
                        Adc_Siu_DisableHwTrigger((uint8)u8EqadcIdx, (uint8)u8FifoIndex);
                    }
                    else
#endif /* (STD_ON == ADC_HW_TRIGGER_API) */
                    {
                        Adc_Eqadc_UpdateQueue(Unit, u8EqadcIdx, u8FifoIndex);
                    }
#if (STD_ON == ADC_GRP_NOTIF_CAPABILITY)
                    bCallNotification = Adc_Eqadc_CheckNotification(Group);
#endif /* (STD_ON == ADC_GRP_NOTIF_CAPABILITY) */
                }
                /* exit critical region */
                SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();

#if (STD_ON == ADC_GRP_NOTIF_CAPABILITY)
                if((boolean)TRUE == bCallNotification)
                {
                    pGroupPtr->Notification();
                }
#endif /* (STD_ON == ADC_GRP_NOTIF_CAPABILITY) */
                /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
                return;
            }
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
            Adc_aGroupStatus[Group].ResultIndex = 0U;
        }
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
        if((ADC_CONV_MODE_ONESHOT == pGroupPtr->eMode) && (ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource))
        {
            /* Disable the FIFO */
            FuncReturn = Adc_Eqadc_FifoDisableFunc(u8EqadcIdx, u8FifoIndex);
            if ((Std_ReturnType)E_OK == FuncReturn)
            {
                Adc_Eqadc_UpdateQueue(Unit, u8EqadcIdx, u8FifoIndex);
            }
        }
        else
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
        {
            /* Enable CFIFO Fill and RFIFO Drain Interrupts */

            /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
            /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
            /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
            REG_BIT_SET16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex),  (uint16)(EQADC_IDCR_CFFE_U16 | EQADC_IDCR_RFDE_U16));
        }

        /* exit critical region */
        SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();
#if(STD_ON == ADC_GRP_NOTIF_CAPABILITY)
        bCallNotification = Adc_Eqadc_CheckNotification(Group);
        if ((boolean)TRUE == bCallNotification)
        {
            /* Call group notification */
            pGroupPtr->Notification();
        }
#endif /* (STD_ON == ADC_GRP_NOTIF_CAPABILITY) */
    }
    else
    {
        /* Enable the CFIFO interrupt */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_BIT_SET16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_IDCR_CFFE_U16);
        /* exit critical region */
        SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();
    }
}
#endif /* (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */

#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the Irq RFIFO Full Interrupt common function for all FIFOs
*                 on all eQADC units.
* @details        This function handles Irq RFIFO Full Interrupt common function for all FIFO.
*
* @param[in]      u8EqadcIdx    EQADC unit.
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         void
*
*/
LOCAL_INLINE FUNC(void, ADC_CODE) Adc_Eqadc_RFifoFullCommonFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(boolean, AUTOMATIC) bSpurious = (boolean)FALSE;
    VAR(Adc_GroupType, AUTOMATIC) Group;
    VAR(Adc_HwUnitType, AUTOMATIC) Unit;
    VAR(Adc_ChannelIndexType, AUTOMATIC) ChannelsInGrp;
    VAR(Std_ReturnType, AUTOMATIC) FuncReturn = (Std_ReturnType)E_OK;
    P2CONST(Adc_GroupConfigurationType, AUTOMATIC, ADC_APPL_CONST) pGroupPtr = NULL_PTR;

    if(NULL_PTR != Adc_pCfgPtr)
    {
        /* enter critical region */
        SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_15();
        /* To make sure that the command is placed in the FIFO's push register to avoid any wrong result to be returned */
        if (Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex] != 0U)
        {
            bSpurious = (boolean)TRUE;
            /* Obtain the active group */
            Group = Adc_Eqadc_aFifoOngoingGroup[u8EqadcIdx][u8FifoIndex];
            if(ADC_INVALID_GROUPS_ID == Group)
            {
                /* Clear the RFDF bit in FISR0 register by writing 1 to it */
                Adc_Eqadc_ClearRFifo(u8EqadcIdx, u8FifoIndex);
                /* Exit critical region */
                SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();
                /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
                return;
            }
            Unit = Adc_GroupUnit(Group);
            pGroupPtr = &(Adc_pCfgPtr->pGroups[Group]);
            ChannelsInGrp = pGroupPtr->AssignedChannelCount;
            FuncReturn = Adc_Eqadc_RecordResult(Unit, Group, u8EqadcIdx, u8FifoIndex);

            if((Std_ReturnType)E_NOT_OK == FuncReturn)
            {
                /* Increment count for messages read from RFIFO */
                Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex]++;
                if (Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex] == ChannelsInGrp)
                {
                    /* Clear variable for next use */
                    Adc_Eqadc_aCFifoChannelCount[u8EqadcIdx][u8FifoIndex] = 0U;
                    Adc_Eqadc_aRFifoChannelCount[u8EqadcIdx][u8FifoIndex] = 0U;

                    /* Disable CFIFO and RFIFO interrupt */
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
                    REG_BIT_CLEAR16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), (uint16)(EQADC_IDCR_CFFE_U16 | EQADC_IDCR_RFDE_U16));
#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
                    if((ADC_CONV_MODE_ONESHOT == pGroupPtr->eMode) && (ADC_TRIGG_SRC_SW == pGroupPtr->eTriggerSource))
                    {
                        /* Disable the FIFO */
                        FuncReturn = Adc_Eqadc_FifoDisableFunc(u8EqadcIdx, u8FifoIndex);
                        (void)FuncReturn;
                    }
                    else /* If group is continuous or hardware trigger */
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
                    {
                        /* Enable CFIFO Fill and RFIFO Drain Interrupts */
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
                        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
                        REG_BIT_SET16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), (uint16)(EQADC_IDCR_CFFE_U16 | EQADC_IDCR_RFDE_U16));
                    }
                }
                else
                {
                    /* Enable the CFIFO interrupt */
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
                    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
                    REG_BIT_SET16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_IDCR_CFFE_U16);
                }
                /* Exit critical region */
                SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();
                /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
                return;
            }

            Adc_Eqadc_UpdateGroupState(u8EqadcIdx, u8FifoIndex);
        }
        else
        {
            /* Exit critical region */
            SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_15();
        }
    }
    if ((boolean)FALSE == bSpurious)
    {
        /* Clear the RFDF bit in FISR0 register by writing 1 to it */
        Adc_Eqadc_ClearRFifo(u8EqadcIdx, u8FifoIndex);
    }
}

#if (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER)
/**
* @brief          This function is called from the ISR to disable one of the FIFOs of an EQADC unit.
*
* @details        This function is called from the ISR to disable one of the FIFOs of an EQADC unit.
*
* @param[in]      u8EqadcIdx    eQADC unit.
* @param[in]      u8FifoIndex  FIFO from 0 to 5.
*
* @return         Std_ReturnType  Standard return type.
* @retval         E_OK: return on successful functionality execution.
* @retval         E_NOT_OK: return when the functionality is failed to execute due to production error.
*
* @api
*
*/
LOCAL_INLINE FUNC(Std_ReturnType, ADC_CODE) Adc_Eqadc_FifoDisableFunc
(
    VAR(uint8, AUTOMATIC) u8EqadcIdx,
    VAR(uint8, AUTOMATIC) u8FifoIndex
)
{
    VAR(uint32, AUTOMATIC) u32Timeout;
    VAR(Std_ReturnType, AUTOMATIC) TempReturn = (Std_ReturnType)E_OK;
#ifdef ADC_DMA_SUPPORTED
    VAR(Mcl_ChannelType, AUTOMATIC) DmaChannel;
#endif

    /* Disable the CFIFO */

    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    REG_WRITE16(EQADC_CFCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_CFCR_MODE_DISABLED_U16);

    /* Reload counter */
    u32Timeout = ADC_TIMEOUT_COUNTER;

    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    while(((REG_READ32(EQADC_CFSR_REG_ADDR32(u8EqadcIdx)) & EQADC_CFSR_FIFO_STATUS_U32(u8FifoIndex)) != EQADC_CFSR_FIFO_STATUS_IDLE_U32) && \
          (u32Timeout > 0UL) \
         )
    {
        /* Decrease counter */
        u32Timeout--;
    }
    /* Test for FIFO's Status failure. */
    if (0UL == u32Timeout)
    {
        TempReturn = (Std_ReturnType)E_NOT_OK;
        /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
        return(TempReturn);
    }
    /* Invalidate CFIFOi */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    REG_BIT_SET16(EQADC_CFCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_CFCR_CFINV_U16);

    /* Disable all Interrupts and eDMA for CFIFOi */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    REG_WRITE16(EQADC_IDCR_REG_ADDR16(u8EqadcIdx, (uint32)u8FifoIndex), EQADC_IDCR_CLEAR_U16);

    /* Clear RFIFO counter */
    /* Reload counter */
    u32Timeout = ADC_TIMEOUT_COUNTER;

    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    while((((REG_READ32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex))) & EQADC_FISR_RFCTR_U32) != EQADC_FISR_RFCTR_EMPTY_U32) && \
          (u32Timeout > (uint32)0U) \
         )
    {
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        (void)REG_READ32(EQADC_RFPR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex));
        /* Decrease counter */
        u32Timeout--;
    }
    /* Test for FIFO's status failure. */
    if (0UL == u32Timeout)
    {
        TempReturn = (Std_ReturnType)E_NOT_OK;
        /** @violates @ref Adc_Eqadc_Irq_c_REF_7 A function should have a single point of exit at the end.*/
        return(TempReturn);
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    REG_WRITE32(EQADC_FISR_REG_ADDR32(u8EqadcIdx, (uint32)u8FifoIndex), (EQADC_FISR_EOQF_U32 | EQADC_FISR_RFDF_U32 | EQADC_FISR_CFUF_U32));

#ifdef ADC_DMA_SUPPORTED
    /* Disable EQADC_AorB DMA interrupt */
    DmaChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][u8FifoIndex*2U];
    Mcl_DmaDisableHwRequest(DmaChannel);
#if (MCL_DMA_NOTIFICATION_SUPPORTED == STD_ON)
    Mcl_DmaDisableNotification(DmaChannel);
#endif

    DmaChannel = (Mcl_ChannelType)Adc_pCfgPtr->Misc.aDmaChannel[u8EqadcIdx][(u8FifoIndex*2U)+1U];
    Mcl_DmaDisableHwRequest(DmaChannel);
#if (MCL_DMA_NOTIFICATION_SUPPORTED == STD_ON)
    Mcl_DmaDisableNotification(DmaChannel);
#endif
#endif /* #ifdef ADC_DMA_SUPPORTED */

    return(TempReturn);
}
#endif /* (STD_OFF == ADC_OPTIMIZE_ONESHOT_HW_TRIGGER) */
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */

/*==================================================================================================
*                                       GLOBAL FUNCTIONS
==================================================================================================*/
#if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO0.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult0(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_0);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO1.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult1(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_1);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO2.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult2(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_2);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO3.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult3(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_3);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO4.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult4(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_4);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_A Unit, RFIFO5.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_A_DmaPopResult5(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_5);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO0.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult0(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_0);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO1.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult1(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_1);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO2.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult2(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_2);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO3.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult3(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_3);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO4.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult4(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_4);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles internal ADC updates after a DMA transfer is completed.
* @details        The function is a notification called by MCL module after the transfer
*                 is completed for the EQADC_B Unit, RFIFO5.
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_X_DmaPopResultN_Activity
*
*/
/** @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
*   referenced in only one translation unit.*/
FUNC(void, ADC_CODE) Adc_Eqadc_B_DmaPopResult5(void)
{
#ifdef ADC_DMA_SUPPORTED
    Adc_Eqadc_DmaInterruptCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_5);
#endif /* #ifdef ADC_DMA_SUPPORTED */
}
#endif /* #if defined(ADC_DMA_SUPPORTED) */

#if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO0 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO0 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo0Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_0)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_0)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_0);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_0), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO0 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO0 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*/
/* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo0Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_0)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_0)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_0);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_0);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_A_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO1 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO1 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo1Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_1)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_1)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_1);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_1), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO1 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO1 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo1Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_1)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_1)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_1);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_1);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_A_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO2 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO2 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo2Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_2)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_2)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_2);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/                
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_2), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO2 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO2 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo2Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_2)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_2)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_2);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_2);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_A_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO3_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO3 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO3 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo3Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */    
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_3)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_3)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_3);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_3), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO3 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO3 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo3Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_3)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_3)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_3);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_3);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_A_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO4 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO4 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo4Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_4)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_4)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_4);
#endif /* #if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_4), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO4 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO4 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo4Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_4)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_4)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_4);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_4);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_A_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO5 of eQADC_A is not full.
* @details        This function handles the ISR that is called when CFIFO5 of eQADC_A is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcACFifo5Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_5)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_5)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_5);
#endif /* (ADC_EQADC_A_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_5), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO5 has data for eQADC_A.
* @details        The function handles the ISR that is called when RFIFO5 has data for eQADC_A.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcARFifo5Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_A, (uint32)ADC_FIFO_5)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_A, (uint32)ADC_FIFO_5)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_5);
#endif /* #if (ADC_EQADC_A_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */

        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_A, (uint8)ADC_FIFO_5);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_A_FIFO5_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO0 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO0 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo0Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_0)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_0)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_0);
#endif /* #if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_0), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO0 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO0 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo0Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_0)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_0)) & EQADC_IDCR_RFDE_U16;
    
    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_0);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_0);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_B_FIFO0_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO1 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO1 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo1Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_1)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_1)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_1);
#endif /* #if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_1), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO1 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO1 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo1Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_1)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_1)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_1);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_1);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_B_FIFO1_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO2 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO2 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo2Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_2)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_2)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_2);
#endif /* #if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_2), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO2 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO2 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo2Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_2)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_2)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_2);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */

        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_2);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_B_FIFO2_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO3_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO3 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO3 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo3Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_3)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_3)) & EQADC_IDCR_CFFE_U16;
    
    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_3);
#endif /* #if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_3), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO3 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO3 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo3Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_3)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_3)) & EQADC_IDCR_RFDE_U16;
    
    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_3);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_3);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_B_FIFO3_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO4 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO4 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo4Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_4)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_4)) & EQADC_IDCR_CFFE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_4);
#endif /* #if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_4), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO4 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO4 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo4Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_4)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_4)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_4);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */

        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_4);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* (ADC_EQADC_B_FIFO4_ENABLED == STD_ON) */

#if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON) || defined(__DOXYGEN__)
/**
* @brief          This function handles the ISR that is called when CFIFO5 of eQADC_B is not full.
* @details        This function handles the ISR that is called when CFIFO5 of eQADC_B is not full.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXCFifoNEmpty_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBCFifo5Empty)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_5)) & EQADC_FISR_CFFF_U32;

    /* Get the interrupt enable status for the corresponding DMA channel */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_5)) & EQADC_IDCR_CFFE_U16;
    
    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus))
    {
        /* Interrupt flag is cleared in Adc_Eqadc_CFifoEmptyCommonFunc */
#if (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_CFifoEmptyCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_5);
#endif /* (ADC_EQADC_B_CFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the interrupt flag */
        /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
        /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
        REG_WRITE32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_5), EQADC_FISR_CFFF_U32);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}

/**
* @brief          This function handles the ISR that is called when RFIFO5 has data for eQADC_B.
* @details        The function handles the ISR that is called when RFIFO5 has data for eQADC_B.
*
* @isr
*
* @param[in]      void.
*
* @return         void
*
* @implements     Adc_Eqadc_EqadcXRFifoNFull_Activity
*
* @violates @ref Adc_Eqadc_Irq_c_REF_6 Functions and objects should not be defined with external linkage if they are
* referenced in only one translation unit.
*/
ISR(Adc_Eqadc_EqadcBRFifo5Full)
{
    VAR(uint32, AUTOMATIC) u32IsrStatus = 0UL;
    VAR(uint16, AUTOMATIC) u16IsrEnable = 0U;

    /* Get the interrupt flag status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u32IsrStatus = REG_READ32(EQADC_FISR_REG_ADDR32(ADC_EQADC_B, (uint32)ADC_FIFO_5)) & EQADC_FISR_RFDF_U32;

    /* Get the interrupt enable status */
    /** @violates @ref Adc_Eqadc_Irq_c_REF_3 A conversion should not be performed between a pointer to object and an integer type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_4 A cast shall not be performed between pointer to void and an arithmetic type.*/
    /** @violates @ref Adc_Eqadc_Irq_c_REF_5 The value of a composite expression shall not be cast to a different essential type category*/
    u16IsrEnable = REG_READ16(EQADC_IDCR_REG_ADDR16(ADC_EQADC_B, (uint32)ADC_FIFO_5)) & EQADC_IDCR_RFDE_U16;

    if ((0U != u16IsrEnable) && (0UL != u32IsrStatus) )
    {
        /* Interrupt flag is cleared in Adc_Eqadc_RFifoFullCommonFunc */
#if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) || defined(__DOXYGEN__)
        Adc_Eqadc_RFifoFullCommonFunc((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_5);
#endif /* #if (ADC_EQADC_B_RFIFO_ENABLED == STD_ON) */
    }
    else if (0UL != u32IsrStatus)
    {
        /* Clear the Interrupt flag */
        Adc_Eqadc_ClearRFifo((uint8)ADC_EQADC_B, (uint8)ADC_FIFO_5);
    }
    else
    {
        /* do nothing for MISRA */
    }
    /** @violates @ref Adc_Eqadc_Irq_c_REF_8 The controlling expression of an if statement and the
    *   controlling expression of an iteration-statement shall have essentially Boolean type.*/
    EXIT_INTERRUPT();
}
#endif /* #if (ADC_EQADC_B_FIFO5_ENABLED == STD_ON) */

#define ADC_STOP_SEC_CODE
/** @violates @ref Adc_Eqadc_Irq_c_REF_1 Precautions shall be taken in order to prevent the contents of a header file being included more than once. */
/** @violates @ref Adc_Eqadc_Irq_c_REF_2 #include directives should only be preceded by preprocessor directives or comments. */

#include "Adc_MemMap.h"

#ifdef __cplusplus
}
#endif

/** @} */
