<?xml version="1.0"?>
<AUTOSAR xmlns="http://autosar.org/schema/r4.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://autosar.org/schema/r4.0 AUTOSAR_00044.xsd">
  <AR-PACKAGES>
    <AR-PACKAGE UUID="ECUC:5fe16860-10a9-42e8-ba32-129de4bf6ac3">
      <SHORT-NAME>TS_T2D41M10I0R0</SHORT-NAME>
      <ELEMENTS>
        <ECUC-DEFINITION-COLLECTION UUID="ECUC:c5d9411f-2fff-545c-8395-901b51b401de">
          <SHORT-NAME>Mcu_EcuParameterDefinition</SHORT-NAME>
          <MODULE-REFS>
            <MODULE-REF DEST="ECUC-MODULE-DEF">/TS_T2D41M10I0R0/Mcu</MODULE-REF>
          </MODULE-REFS>
        </ECUC-DEFINITION-COLLECTION>
        <ECUC-MODULE-DEF UUID="ECUC:b510368b-ff12-4d58-aaad-a5e9c1cb3e2b">
          <SHORT-NAME>Mcu</SHORT-NAME>
          <DESC>
            <L-2 L="EN">
                                        Configuration of the MicroController Unit (MCU) module.
                                    </L-2>
          </DESC>
          <ADMIN-DATA>
            <LANGUAGE>EN</LANGUAGE>
            <DOC-REVISIONS>
              <DOC-REVISION>
                <REVISION-LABEL>1.0.0</REVISION-LABEL>
                <ISSUED-BY>AUTOSAR</ISSUED-BY>
                <DATE>2010-12-03</DATE>
              </DOC-REVISION>
            </DOC-REVISIONS>
          </ADMIN-DATA>
          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
          <POST-BUILD-VARIANT-SUPPORT>true</POST-BUILD-VARIANT-SUPPORT>
          <REFINED-MODULE-DEF-REF DEST="ECUC-MODULE-DEF">/AUTOSAR/EcucDefs/Mcu</REFINED-MODULE-DEF-REF>
          <SUPPORTED-CONFIG-VARIANTS>
            <SUPPORTED-CONFIG-VARIANT>VARIANT-POST-BUILD</SUPPORTED-CONFIG-VARIANT>
            <SUPPORTED-CONFIG-VARIANT>VARIANT-PRE-COMPILE</SUPPORTED-CONFIG-VARIANT>
          </SUPPORTED-CONFIG-VARIANTS>
          <CONTAINERS>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:b91249b0-4a29-496c-86b9-4cf3ec281e92">
              <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            This container contains the general configuration for the MCU driver.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <PARAMETERS>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:564e05d8-8922-4a7d-b112-ebfa5e67d2d8">
                  <SHORT-NAME>McuDevErrorDetect</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Pre-processor switch for enabling the default error detection and reporting to the DET. 
                                                The switch McuDevErrorDetect shall switch the Default Error Tracer (Det) detection and notification ON or OFF. 
                                                The detection of default errors is configurable (ON/OFF) at precompile time.
                                                #define MCU_DEV_ERROR_DETECT (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:7ea93c38-3acb-4571-a374-c6c67d6746b1">
                  <SHORT-NAME>McuVersionInfoApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Pre-processor switch to enable/disable the API to read out the modules version information.
                                                #define MCU_VERSION_INFO_API (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:0ca12151-32c7-4f1f-a161-9c18ae70acb1">
                  <SHORT-NAME>McuGetRamStateApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Pre-processor switch to enable/disable the API Mcu_GetRamState. 
                                                #define MCU_GET_RAM_STATE_API (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:0f51cb81-7dcd-4510-a24d-317bc194aaed">
                  <SHORT-NAME>McuInitClock</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                If this parameter is set to FALSE, the clock initialization has to be disabled from the MCU driver. This concept applies when there are some write once clock registers and a bootloader is present. If this parameter is set to TRUE, the MCU driver is responsible with the clock initialization.
                                                #define MCU_INIT_CLOCK (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>true</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:6d9b74b1-4bf5-4cea-820d-53f6326975fd">
                  <SHORT-NAME>McuNoPll</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This parameter shall be set True, if the H/W does not have a PLL or the PLL circuitry is enabled after the power on without S/W intervention. In this case MCU_DistributePllClock has to be disabled and  MCU_GetPllStatus has to return MCU_PLL_STATUS_UNDEFINED. Otherwise this parameters has to be set False.
                                                #define MCU_NO_PLL (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>true</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:4121632d-b60e-4d48-8e66-480991dbde5d">
                  <SHORT-NAME>McuEnterLowPowerMode</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                If this parameter has been configured to 'TRUE', the function 'Mcu_SetMode()' shall not be impacted and behave as specified.
                                                If this parameter has been configured to 'FALSE', the function 'Mcu_SetMode()' shall not perform the transition to any low power modes as are 'STOP' or 'HALT' or any other mode, where the core stops execution.
                                                #define MCU_ENTER_LOW_POWER_MODE (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>true</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:3b8b947e-d4c1-492b-b866-c8d140d0866f">
                  <SHORT-NAME>McuTimeout</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This parameter is used for internal loop, oscillator stability.
                                                It represents the maximum number of loops for blocking functionality.
                                                Member of &quot;McuLLD_ConfigType&quot; structure.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>10000</DEFAULT-VALUE>
                  <MAX>4294967295</MAX>
                  <MIN>0</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fdf29f79-dbae-4cd2-abf2-c0941851a05e">
                  <SHORT-NAME>McuEnableUserModeSupport</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                When this parameter is enabled, the MDL module will adapt to run from User Mode, with the following measures:
                                                a) configuring REG_PROT for ABC1, ABC2 IPs so that the registers under protection can be accessed from user mode by setting UAA bit in REG_PROT_GCR to 1
                                                b) using 'call trusted function' stubs for all internal function calls that access registers requiring supervisor mode.
                                                c) other module specific measures
                                                for more information, please see chapter 5.7 User Mode Support in IM 
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:8c6ec070-2607-49d0-96f1-35d02c4a62ef">
                  <SHORT-NAME>McuPerformResetApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Pre-processor switch to enable/disable the use the Mcu_PerformReset() API.
                                                OFF - Mcu_PerformReset() API is not used.
                                                ON - Mcu_PerformReset() API is used.
                                                #define MCU_PERFORM_RESET_API (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fa43da28-01e8-4ca1-aeca-2cb72d9bd132">
                  <SHORT-NAME>McuCalloutBeforePerformReset</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Check this if you want a callout function, called by MCU right before Mcu_PerformReset().
                                                This parameter is available for configuration only if &quot;McuPerformResetApi&quot; is ON.
                                                #define MCU_RESET_CALLOUT_USED (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-FUNCTION-NAME-DEF UUID="ECUC:025e1b74-4c6e-4a1a-aef0-c03a979bbd0a">
                  <SHORT-NAME>McuPerformResetCallout</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Function name of callout.
                                                The field is editable only if &quot;McuCalloutBeforePerformReset&quot; is ON.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <ECUC-FUNCTION-NAME-DEF-VARIANTS>
                    <ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                      <DEFAULT-VALUE>NULL_PTR</DEFAULT-VALUE>
                    </ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                  </ECUC-FUNCTION-NAME-DEF-VARIANTS>
                </ECUC-FUNCTION-NAME-DEF>
                <ECUC-FUNCTION-NAME-DEF UUID="ECUC:d762bbe9-6025-4f80-a407-2c680a2d3231">
                  <SHORT-NAME>McuCmuNotification</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                        
                                          Function pointer to callback function.
                                        </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <ECUC-FUNCTION-NAME-DEF-VARIANTS>
                    <ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                      <DEFAULT-VALUE>NULL_PTR</DEFAULT-VALUE>
                    </ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                  </ECUC-FUNCTION-NAME-DEF-VARIANTS>
                </ECUC-FUNCTION-NAME-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fa43da28-01e8-4ca1-aeca-2cb32ad9c116">
                  <SHORT-NAME>McuCmuErrorIsrUsed</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Check this if clock source failure notifications are enabled (i.e. McuModuleConfiguration/McuClockSrcFailureNotification = 'ENABLED'). 
                                                #define MCU_CMU_ERROR_ISR_USED (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-FUNCTION-NAME-DEF UUID="ECUC:17291a1c-163b-4343-87d0-f1ed80367f5b">
                  <SHORT-NAME>McuErrorIsrNotification</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Function name of callout. This function will be called by the error ISR.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <ECUC-FUNCTION-NAME-DEF-VARIANTS>
                    <ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                      <DEFAULT-VALUE>NULL_PTR</DEFAULT-VALUE>
                    </ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                  </ECUC-FUNCTION-NAME-DEF-VARIANTS>
                </ECUC-FUNCTION-NAME-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:133a1136-9fb7-40ee-be19-8599edfef487">
                  <SHORT-NAME>McuDisableRamWaitStatesConfig</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Check this if you want the PRAMC configuration to be bypassed.
                                                If this is checked, the settings configured in McuRam (from McuClockSettingConfig) will not be used.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:133a1136-9fb7-40ee-beae-85f9decaf487">
                  <SHORT-NAME>McuDisableFlashConfigFromRam</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Check this if you want the Flash configuration from RAM to be bypassed.
                                                If this is checked, the settings configured in McuPlatformFlashConfig and the settings 
                                                from McuFlash (from McuClockSettingConfig) will not be used. 
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-FUNCTION-NAME-DEF UUID="ECUC:17291a1c-163b-4343-87d0-f1ed80312f5b">
                  <SHORT-NAME>McuPrepareMemoryConfig</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Function name of a callout that will be called before and after configuring
                                                the flash and ram controllers. It will have a parameter that will specify if it is
                                                the entry or the exit point of the controllers configuration.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <ECUC-FUNCTION-NAME-DEF-VARIANTS>
                    <ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                      <DEFAULT-VALUE>NULL_PTR</DEFAULT-VALUE>
                    </ECUC-FUNCTION-NAME-DEF-CONDITIONAL>
                  </ECUC-FUNCTION-NAME-DEF-VARIANTS>
                </ECUC-FUNCTION-NAME-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:884f373d-7ba4-479e-a4c9-67dcb82e2bee">
                  <SHORT-NAME>McuDisableSscmInit</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                If this parameter is set to TRUE, the System Status and Configuration Module (SSCM) initialization has to be disabled in the MCU driver.
                                                #define MCU_DISABLE_SSCM_INIT (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:884f320d-7ba4-479e-a4c9-67dcb82e2bee">
                  <SHORT-NAME>McuDisableResetInit</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                If this parameter is set to TRUE, the System Integration Unit (SIU) reset initialization has to be disabled in the MCU driver.
                                                This concept applies when the AppInit section 6.9 functionality(Reset Configuration) is enabled. If this parameter is set to FALSE, the MCU driver is responsible of the Reset initialization.
                                                #define MCU_DISABLE_RESET_INIT (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:124f373d-7ba4-479e-a4c9-67dcb82e2bee">
                  <SHORT-NAME>McuDisablePmcInit</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                If this parameter is set to TRUE, the Power Management Controller (PMC) initialization has to be disabled in the MCU driver.
                                                #define MCU_DISABLE_PMC_INIT (STD_ON)/(STD_OFF) will be generated in Mcu_Cfg.h file.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
              </PARAMETERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:2634afa2-e3c1-4e96-bf1c-e1c2d61861fc">
              <SHORT-NAME>McuDebugConfiguration</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            This container contains option for non-ASR APIs used for debug or extra-implementation.
                                            Note: Implementation Specific Parameter.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <PARAMETERS>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fdf29f79-dbae-4cd7-bbf7-c0941851a05e">
                  <SHORT-NAME>McuDisableDemReportErrorStatus</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for reporting the Dem Error.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:d6d429d1-417b-4bba-9733-97945b5b5f00">
                  <SHORT-NAME>McuGetPeriphStateApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for checking peripheral states in the current mode from MC_ME configuration: Mcu_GetPeripheral_State().
                                                E_OK means Peripheral with ID as parameter is clocked.
                                                E_NOT_OK means Peripheral with ID as parameter is not clocked.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:90ecc49c-a22b-4391-9a58-8d5fcdcd4fc7">
                  <SHORT-NAME>McuGetSystemStatetApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for System state information: Mcu_GetSystem_State().
                                                Information extracted from SSCM hw IP.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a43c3aa1-3bd9-4a8e-aefc-bddf5d9508db">
                  <SHORT-NAME>McuGetPowerModeStatetApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for MC_ME state: Mcu_GetPowerMode_State().
                                                Get information regarding current power mode, enabled clocks, etc (content of ME_GS register).
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:6e3cba6f-d704-4fea-9611-fc001713d1da">
                  <SHORT-NAME>McuGetPowerDomainApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for MC_PCU state: Mcu_GetPowerDomain_Status().
                                                Get information from PCU_STAT register.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1358731c-e26e-4134-b80d-a08d078c51a4">
                  <SHORT-NAME>McuSscmGetMemConfigApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for Mcu_SscmGetMemConfig().
                                                Get information from SSCM_MEMCONFIG register.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f7bb3084-cf7b-40e5-b705-8781f2ac9b85">
                  <SHORT-NAME>McuSscmGetStatusApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for Mcu_SscmGetStatus().
                                                Get information from SSCM_STATUS register.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:279ac3de-275b-44b3-af21-5718275e277d">
                  <SHORT-NAME>McuSscmGetUopsApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for Mcu_SscmGetUops().
                                                Get information from SSCM_UOPS register.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:3b7d0da5-6a6c-4c9f-bfbb-7bead7870b5f">
                  <SHORT-NAME>McuGetMidrStructureApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for Mcu_GetMidrStructure().
                                                Get information from SIUL2 MIDRn registers.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:11d5f12b-1576-471b-9ee2-c9af2af5ffb1">
                  <SHORT-NAME>McuEmiosConfigureGprenApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for Mcu_EmiosConfigureGpren().
                                                Changes the GPREN bit of the EMIOSMCR register of an addressed eMIOS instance.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a42a1cde-ec51-44ba-9d88-0c5142cbb5fc">
                  <SHORT-NAME>McuDisableCmuApi</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enable/Disable the API for disabling the clock monitoring unit.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
              </PARAMETERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:ba92317c-fb38-40a9-97b0-ae006307d78b">
              <SHORT-NAME>McuEMIOSConfiguration</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            This configuration holds global control over the platform specific eMIOS control features.
                                            This container is implementation specific.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <PARAMETERS>
                <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:077bf386-cf58-4810-bcb7-0fbe6bf41250">
                  <SHORT-NAME>McuEMIOSControl</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Global ENABLE / DISABLE of the code that writes the eMIOS200_MCR registers.
                                                From the user manual: The MCR register contains Global Control bits for the eMIOS200 block.
                                                If this check box is ON, the registers will be written during each Mcu_InitClock() call.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>false</DEFAULT-VALUE>
                </ECUC-BOOLEAN-PARAM-DEF>
              </PARAMETERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:2c646e7d-747c-457d-8b7b-26fb61c052e2">
              <SHORT-NAME>McuPublishedInformation</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            Container holding all MCU specific published information parameters.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <SUB-CONTAINERS>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:247f42f0-055a-404e-aba2-130d0887fffc">
                  <SHORT-NAME>McuResetReasonConf</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                    This container contains the configuration for the different type of reset reason that can be retrieved from Mcu_GetResetReason Api.
                                                </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b58895cf-c4c7-4d07-a0be-7180c8b57a5e">
                      <SHORT-NAME>McuResetReason</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        The parameter represents the different type of reset that a Micro supports. This parameter is referenced by the parameter EcuMResetReason in the ECU State manager module. 
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>true</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>7</DEFAULT-VALUE>
                      <MAX>255</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                  </PARAMETERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
              </SUB-CONTAINERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:acb0123b-4400-4cf6-9048-3b802ed2c755">
              <SHORT-NAME>CommonPublishedInformation</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            Common container, aggregated by all modules.
                                            It contains published information about vendor and versions.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <PARAMETERS>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:1a61b436-b723-47b1-8f4d-b568b3c77bce">
                  <SHORT-NAME>ArReleaseMajorVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Major version number of AUTOSAR specification on which the appropriate implementation is based on. 
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>4</DEFAULT-VALUE>
                  <MAX>4</MAX>
                  <MIN>4</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:6b04c7cc-fcf4-40d5-b589-579f3b690bca">
                  <SHORT-NAME>ArReleaseMinorVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Minor version number of AUTOSAR specification on which the appropriate implementation is based on. 
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>3</DEFAULT-VALUE>
                  <MAX>3</MAX>
                  <MIN>3</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:856eb3f2-36bf-4d6f-b404-6a873fbbe0e7">
                  <SHORT-NAME>ArReleaseRevisionVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Revision version number of AUTOSAR specification on which the appropriate implementation is based on. 
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>1</DEFAULT-VALUE>
                  <MAX>1</MAX>
                  <MIN>1</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:c8d8c033-3334-459e-b45c-705a3ff4787d">
                  <SHORT-NAME>ModuleId</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Module ID of this module from Module List.
                                                Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>101</DEFAULT-VALUE>
                  <MAX>101</MAX>
                  <MIN>101</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:9dd0879c-f26b-4ea9-bf0e-013bfa0f3584">
                  <SHORT-NAME>SwMajorVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Major version number of the vendor specific implementation of the module. The numbering is vendor specific.
                                                Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>1</DEFAULT-VALUE>
                  <MAX>1</MAX>
                  <MIN>1</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:18ede1df-ceac-4080-a4c8-1eb4cf4cd276">
                  <SHORT-NAME>SwMinorVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Minor version number of the vendor specific implementation of the module. The numbering is vendor specific.
                                                Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>0</DEFAULT-VALUE>
                  <MAX>0</MAX>
                  <MIN>0</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:f5563407-a9bd-4cae-810d-cf4327c59a88">
                  <SHORT-NAME>SwPatchVersion</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific.
                                                Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>0</DEFAULT-VALUE>
                  <MAX>0</MAX>
                  <MIN>0</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-STRING-PARAM-DEF UUID="ECUC:dd6060f6-7040-4479-a64c-802197581a72">
                  <SHORT-NAME>VendorApiInfix</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                             In driver modules which can be instantiated several times on a single ECU, BSW00347 requires that the name of APIs is extended by the VendorId and a vendor specific name.
                                               This parameter is used to specify the vendor specific name. In total, the Implementation specific name is generated as follows:
                                               &lt;ModuleName&gt;_&gt;VendorId&gt;_&lt;VendorApiInfix&gt;.
                                               E.g. assuming that the VendorId of the implementor is 123 and the implementer chose a VendorApiInfix of &quot;v11r456&quot; a api name
                                               Can_Write defined in the SWS will translate to Can_123_v11r456Write.
                                               This parameter is mandatory for all modules with upper multiplicity &gt;
                                               1. It shall not be used for modules with upper multiplicity =1.
                                               Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <ECUC-STRING-PARAM-DEF-VARIANTS>
                    <ECUC-STRING-PARAM-DEF-CONDITIONAL>
                      <DEFAULT-VALUE>
                      </DEFAULT-VALUE>
                    </ECUC-STRING-PARAM-DEF-CONDITIONAL>
                  </ECUC-STRING-PARAM-DEF-VARIANTS>
                </ECUC-STRING-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:ccb6488d-97c2-478c-bcc7-3146549af0ef">
                  <SHORT-NAME>VendorId</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Vendor ID of the dedicated implementation of this module according to the AUTOSAR vendor list.
                                                Note: Implementation Specific Parameter
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PUBLISHED-INFORMATION</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>43</DEFAULT-VALUE>
                  <MAX>43</MAX>
                  <MIN>43</MIN>
                </ECUC-INTEGER-PARAM-DEF>
              </PARAMETERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
            <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:cd185304-074e-4397-8451-4704f1dc38fc">
              <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>
              <DESC>
                <L-2 L="EN">
                                            This container contains the configuration for the MCU driver.
                                        </L-2>
              </DESC>
              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
              <PARAMETERS>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:06fdcdfb-522d-4b35-bd5c-b377b9b373e1">
                  <SHORT-NAME>McuNumberOfMcuModes</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This parameter shall represent the number of Modes available for the MCU (from &quot;McuModeSettingConf&quot; list).
                                                CalculationFormula = Number of configured &quot;McuModeSettingConf&quot;.
                                                This parameter is not used.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>1</DEFAULT-VALUE>
                  <MAX>255</MAX>
                  <MIN>1</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:45d0e94c-b26f-46b9-9c42-a5f5da89f2ca">
                  <SHORT-NAME>McuRamSectors</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This parameter shall represent the number of RAM sectors available for the MCU (from &quot;McuRamSectorSettingConf&quot; list).
                                                CalculationFormula = Number of configured &quot;McuRamSectorSettingConf&quot;.
                                                This parameter is not used.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>1</DEFAULT-VALUE>
                  <MAX>4294967295</MAX>
                  <MIN>1</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-INTEGER-PARAM-DEF UUID="ECUC:72a01813-8739-43f1-9d02-87a0ab579374">
                  <SHORT-NAME>McuResetSetting</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This parameters applies to the function Mcu_PerformReset(), which performs a microcontroller reset using the hardware feature of the microcontroller.
                                                 Note: This parameter is not used by the current Implementation.
                                                Software Reset occurs when Mcu_PerformReset() function is called.
                                                This parameter is not used.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>1</DEFAULT-VALUE>
                  <MAX>255</MAX>
                  <MIN>1</MIN>
                </ECUC-INTEGER-PARAM-DEF>
                <ECUC-FLOAT-PARAM-DEF UUID="ECUC:8f4de8c2-8152-4e3b-8f8a-c1f5490e36a4">
                  <SHORT-NAME>McuCrystalFrequencyHz</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Crystal Frequency or External Reference Frequency [Hz].
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                  <MAX>4.4E7</MAX>
                  <MIN>8000000.0</MIN>
                </ECUC-FLOAT-PARAM-DEF>
                <ECUC-FLOAT-PARAM-DEF UUID="ECUC:729554c6-f143-4644-924a-a9d6984489eb">
                  <SHORT-NAME>McuSIPIRefClockFrequencyHz</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Crystal Frequency of SIPI Reference Clock [Hz].
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>NXP</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                  <MAX>2.0E8</MAX>
                  <MIN>0.0</MIN>
                </ECUC-FLOAT-PARAM-DEF>
                <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:0c9113e5-94aa-4d18-ad8e-36502b5e1ffa">
                  <SHORT-NAME>McuClockSrcFailureNotification</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Enables/Disables clock failure notification. 
                                                In case this feature is not supported by HW, the setting should be disabled.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SCOPE>LOCAL</SCOPE>
                  <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                  <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                  <VALUE-CONFIG-CLASSES>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                    <ECUC-VALUE-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-VALUE-CONFIGURATION-CLASS>
                  </VALUE-CONFIG-CLASSES>
                  <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                  <DEFAULT-VALUE>ENABLED</DEFAULT-VALUE>
                  <LITERALS>
                    <ECUC-ENUMERATION-LITERAL-DEF>
                      <SHORT-NAME>ENABLED</SHORT-NAME>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                    </ECUC-ENUMERATION-LITERAL-DEF>
                    <ECUC-ENUMERATION-LITERAL-DEF>
                      <SHORT-NAME>DISABLED</SHORT-NAME>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                    </ECUC-ENUMERATION-LITERAL-DEF>
                  </LITERALS>
                </ECUC-ENUMERATION-PARAM-DEF>
              </PARAMETERS>
              <SUB-CONTAINERS>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:6d197fc7-452a-4168-af62-a0155509f250">
                  <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                    This container contains the configuration for the Clock settings of the MCU.
                                                </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:023d4661-0937-4487-8200-87d06f84bc34">
                      <SHORT-NAME>McuClockSettingId</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        The Id of this McuClockSettingConfig to be used as argument for the API call Mcu_InitClock().
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>true</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>0</DEFAULT-VALUE>
                      <MAX>255</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:ecd0f30f-c51f-47b8-bd0a-4b457a2ed5bf">
                      <SHORT-NAME>McuSysClockUnderMcuControl</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        0 - System clock tree is NOT under mcu control.
                                                        1 - System clock is under mcu control.
                                                        If this is set to false, the MCU code will not configure the SIU_SYSDIV register when Mcu_InitClock is called
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>true</DEFAULT-VALUE>
                    </ECUC-BOOLEAN-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:da95c51b-8f0a-4d5b-8bb0-0117f3c39b04">
                      <SHORT-NAME>McuSystemClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        System clock and Core clock
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                      <MAX>2.2E8</MAX>
                      <MIN>500000.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:920b7ea7-bcc7-42a5-a570-0e21603a40ff">
                      <SHORT-NAME>McuPlatClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        Platform modules: Cross-Bar, Peripheral Bridges, Memories, DMA, Flash Controller, Debug.
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>2.0E7</DEFAULT-VALUE>
                      <MAX>1.1E8</MAX>
                      <MIN>250000.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:e2c3b5a6-4dfa-4eb7-914c-e9edc410b77d">
                      <SHORT-NAME>McuSystemClockSwitch</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        System Clock Select. Configure the SIU_SYSDIV[SYSCLKSEL] register field.
                                                        The system clock is either:
                                                        - Internal 16Mhz oscillator IRC (SIU_SYSDIV[SYSCLKSEL][SYSCLKSEL]=0)
                                                        - External oscillator XOSC (SIU_SYSDIV[SYSCLKSEL][SYSCLKSEL]=1)
                                                        - FM PLL (PLL1) (SIU_SYSDIV[SYSCLKSEL][SYSCLKSEL]=2)
                                                        - non-FM PLL (PLL0) (SIU_SYSDIV[SYSCLKSEL][SYSCLKSEL]=3)
                                                        Value extracted from Resource: MCU.SystemClkSource.List
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>IRC</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>IRC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>XOSC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>PLL0_PHI</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>PLL1_PHI</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:3a658ec9-4571-4f8a-8def-056a9df3813c">
                      <SHORT-NAME>McuSystemClockDivider</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                
                                                  
                                                    This parameter represents the system clock divider. It configures the SIU_SYSDIV[SYSCLKDIV] bit.
                                                    Note: implementation specific parameter.
                                                  
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>1</DEFAULT-VALUE>
                      <MAX>16</MAX>
                      <MIN>1</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:bbefc9d2-cebc-4d43-8163-5a63eed9dfc2">
                      <SHORT-NAME>McuPll0ClockReference</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            This parameter specifies if the input clock of the PLL0 is XOSC or IRC in SIU_SYSDIV[PLL0SEL]. 
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>XOSC</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>XOSC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>IRC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:58e22dc8-74cc-424f-ad4b-3220b2dcd9e1">
                      <SHORT-NAME>McuPll1ClockReference</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            This parameter specifies if the input clock of the PLL1 is XOSC or PLL0_PHI1 in SIU_SYSDIV[PLL1SEL]. 
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>XOSC</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>XOSC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>PLL0_PHI1</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:b460e012-1862-497a-afd0-7123054cc28b">
                      <SHORT-NAME>McuFMPeripheralClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        Memory mapped registers of peripherals.
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>2.0E7</DEFAULT-VALUE>
                      <MAX>1.1E8</MAX>
                      <MIN>62500.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:e9ead595-d101-46a7-99ff-7f71ca25332d">
                      <SHORT-NAME>McuFMClockPeripheralDivider</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            Configures SIU_SYSDIV[FMPERDIV]
                                                            FM Clock Peripheral Divider. Selects the divider value for the clock that feeds the memory mapped portion
                                                            of the peripheral interfaces, and also feeds peripheral engines that can tolerate FM modulation. Note that
                                                            the maximum FEC operating frequency is 100 MHz, therefore the PERDIV field must be programmed to
                                                            either divide-by-4 or divide-by-8 if the CPU is operating above 200 MHz.
                                                            2 - Divide by 2 
                                                            4 - Divide by 4 
                                                            8 - Divide by 8 
                                                            11 - Reserved 
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>2</DEFAULT-VALUE>
                      <MAX>8</MAX>
                      <MIN>1</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:251eb1dc-482c-4914-960e-34b78285c01a">
                      <SHORT-NAME>McuPeripheralClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        Protocol and communication engines of peripherals
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>2.0E7</DEFAULT-VALUE>
                      <MAX>1.1E8</MAX>
                      <MIN>62500.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:4b407204-05db-4e9a-9e99-f741ccf49566">
                      <SHORT-NAME>McuPerClockReference</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            Configures SIU_SYSDIV[PERCLKSEL]
                                                            Peripheral Clock Select. Selects the clock source for eTPU and other communication peripherals that
                                                            require non-FM clock for their protocol engines.
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>SYSTEM_CLK</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>PLL0_PHI</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>SYSTEM_CLK</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:c5194338-7794-4651-bacd-1151947c258a">
                      <SHORT-NAME>McuNonFMClockPeripheralDivider</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            Configures SIU_SYSDIV[PERDIV]
                                                            Non-FM Clock Peripheral Divider. Selects the divider value for the clock that feeds protocol engines of
                                                            peripherals that must be clocked by a stable non-FM clock.
                                                            2 - Divide by 2 
                                                            4 - Divide by 4 
                                                            8 - Divide by 8 
                                                            11 - Reserved 
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>2</DEFAULT-VALUE>
                      <MAX>8</MAX>
                      <MIN>1</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:6163f55d-ee0b-4cb1-8a55-45920408bc59">
                      <SHORT-NAME>McuETPUClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        ETPU A,B,C.
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                      <MAX>2.0E8</MAX>
                      <MIN>250000.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:e543f16b-8c7a-47e9-9175-0bc93e3b71e4">
                      <SHORT-NAME>McuETPUClockDivider</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            Configures SIU_SYSDIV[ETPUDIV]
                                                            eTPU Clock Divider. Selects the divider value for the eTPU clock.
                                                            1 - Divide by 1 
                                                            2 - Divide by 2 
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>1</DEFAULT-VALUE>
                      <MAX>2</MAX>
                      <MIN>1</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-FLOAT-PARAM-DEF UUID="ECUC:4dc9a551-d391-4833-863f-aad5211c8d6e">
                      <SHORT-NAME>McuMCANClockFrequency</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                        MCAN Protocol Engine Clock.
                                                        Value calculated for user info. It is given in Hz.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                      <MAX>1.32E8</MAX>
                      <MIN>62500.0</MIN>
                    </ECUC-FLOAT-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:b9b3ee50-6053-4487-8312-fa858a89ec7c">
                      <SHORT-NAME>McuMCANClockReference</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        
                                                            Configures SIU_SYSDIV[MCANSEL]
                                                            MCAN Select. Selects the clock source for both MCAN modules.
                                                            Note: Implementation specific Parameter.
                                                        
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>XOSC</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>XOSC</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>PER_CLK</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5de87c3c-1e01-40ca-bbfd-b92cf7d1cad5">
                      <SHORT-NAME>McuPcsEnable</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        Configures SIU_SYSDIV[PCSEN]
                                                        Progressibe Clock Switch Enable. Enables or disables the progressive clock switching (PCS) feature on the system clock. 
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>true</DEFAULT-VALUE>
                    </ECUC-BOOLEAN-PARAM-DEF>
                  </PARAMETERS>
                  <SUB-CONTAINERS>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:73db9074-0c1a-4722-9ec7-ff0b30df504e">
                      <SHORT-NAME>McuExternalClock</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                      Configures SIU_ECCR register.
                                                      This container contains the configuration parameters that control the relantionship between the
                                                      system clock and the external clocks ENGCLK and CLKOUT.
                                                      Note: Implementation specific Container.
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:89570d72-07b2-486d-9ffb-219df67c3460">
                          <SHORT-NAME>McuExternalClockUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            0 - External clock register is NOT under mcu control.
                                                            1 - External clock register is under mcu control.
                                                            If this is set to false, the MCU code will not configure the SIU_ECCR register when Mcu_InitClock is called
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:1cb3439e-3918-4f2d-9271-89c141e4d852">
                          <SHORT-NAME>McuEngineeringClockFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                This is the external clock frequency for the specific instance of the
                                                                McuClockReferencePoint container. It is expressed in Hz.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>625000.0</DEFAULT-VALUE>
                          <MAX>2.64E8</MAX>
                          <MIN>400.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:adaf540c-0948-4068-ac45-41d068f2f1f1">
                          <SHORT-NAME>McuEngineeringClockDivisonFactor</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                Configures SIU_ECCR[ENGDIV] bit.
                                                                Engineering clock division factor.
                                                                Specifies the frequency ratio between the system clock and ENGCLK. 
                                                                EngineeringClockFrequency = PlatformClockFrequency div (2 * ENGDIV)
                                                                Setting ENGDIV to 0 makes ENGCLK frequency equal to PLAT_CLK
                                                                Note: Implementation specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>32</DEFAULT-VALUE>
                          <MAX>255</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:41efc1fe-40e5-441b-9115-097f8f8a7f77">
                          <SHORT-NAME>McuEngineeringClockSource</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                            Configures SIU_ECCR[ECCS] bit.
                                                            Engineering clock source select. The ECSS bit selects the source clock to be divided to generate the ENGCLK clock.
                                                            Note: Implementation specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>PLAT_CLK</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>PLAT_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>XOSC</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f4de3054-ac3c-48b5-9af2-75f6f449c22d">
                          <SHORT-NAME>McuExternalBusTapSelect</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                            Configures SIU_ECCR[EBTS] bit.
                                                            External Bus Tap Select. Changes the phase relationship between the system clock and CLKOUT.
                                                            Changing the phase relationship so that CLKOUT is advanced in relation to system clock increases the
                                                            output hold time of the external bus signals to a non-zero value. It also increases the output delay times,
                                                            increases the input hold times to non-zero values, and decreases the input setup times. Refer to the Data
                                                            Sheet document for how the EBTS bit affects the electrical specifications.
                                                            NOTE: The EBTS bit must not be modified while an external bus transaction is in progress.
                                                            
                                                            0 External bus signals have zero output hold times.
                                                            1 External bus signals have non-zero output hold times.
                                                            Note: Implementation specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:e3810035-3cd4-40ec-9693-24095a5351be">
                          <SHORT-NAME>McuCLKOUTFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                            EBI CLKOUT pin.
                                                            Value calculated for user info. It is given in Hz.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>2.0E7</DEFAULT-VALUE>
                          <MAX>2.64E8</MAX>
                          <MIN>62500.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:3a99b623-b773-42e2-827f-ce7b6ed11be5">
                          <SHORT-NAME>McuExternalBusDivisonFactor</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                            Configures SIU_ECCR[EBDF] bit.
                                                            External Bus Division Factor. Specifies the frequency ratio between the system clock and CLKOUT. The
                                                            EBDF field must not be changed during an external bus access or while an access is pending.
                                                            Note: Implementation specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>2</DEFAULT-VALUE>
                          <MAX>4</MAX>
                          <MIN>1</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:8f244daa-dfe6-4d0e-9343-7701cc602978">
                      <SHORT-NAME>McuSigmaDeltaClockConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                      Configures SIU_SDCLKCFG register.
                                                      This container contains the configuration parameters that control the relationship between the
                                                      system clock and the external clocks ENGCLK and CLKOUT.
                                                      Note: Implementation specific Container.
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:be7ae612-91dd-4fe2-a5cc-a075bbd24574">
                          <SHORT-NAME>McuSDClockUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            0 - Sigma Delta clock register is NOT under mcu control.
                                                            1 - Sigma Delta clock register is under mcu control.
                                                            If this is set to false, the MCU code will not configure the SIU_SDCLKCFG register when Mcu_InitClock is called
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:b487862d-56a1-41bb-8341-d4ae7f87890b">
                          <SHORT-NAME>McuSigmaDeltaClockFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                This is the Sigma Delta clock frequency for the specific instance of the
                                                                McuClockReferencePoint container. It is expressed in Hz.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                          <MAX>1.32E8</MAX>
                          <MIN>3900.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:402a1853-1d4f-4f0a-83f6-02101834c271">
                          <SHORT-NAME>McuSigmaDeltaClockDivider</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                Configures SIU_SDCLKCFG[SDDIV]
                                                                Sigma Delta Clock Divider. Selects the divider value for the clock that feeds the Sigma Delta ADCs,
                                                                according to the following formula:
                                                                DivisionFactor = SDDIV + 1
                                                                Note: Implementation specific Parameter.
                                                            
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>1</DEFAULT-VALUE>
                          <MAX>128</MAX>
                          <MIN>1</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:50858992-be08-489d-85d1-1eead2340540">
                      <SHORT-NAME>McuLFASTClockConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                      Configures SIU_LFCLKCFG register.
                                                      This container contains the configuration parameters that define the clock division factor to 
                                                      generate the clock to the LFAST module.
                                                      Note: Implementation specific Container.
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c8b8a14f-ff99-4a37-a345-55c7b269127b">
                          <SHORT-NAME>McuLFASTClockUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            0 - LFAST clock register is NOT under mcu control.
                                                            1 - LFAST clock register is under mcu control.
                                                            If this is set to false, the MCU code will not configure the SIU_LFCLKCFG register when Mcu_InitClock is called
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:98a25c98-2e8e-4302-9eb5-8f2368f05170">
                          <SHORT-NAME>McuLFASTClockFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                This is the LFAST clock frequency for the specific instance of the
                                                                McuClockReferencePoint container. It is expressed in Hz.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                          <MAX>1.32E8</MAX>
                          <MIN>0.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:f65e78b4-7eef-41d7-9818-66e5ec69c263">
                          <SHORT-NAME>McuLFASTClockSource</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                            Configures SIU_LFCLKCFG[LFCLKSEL] bit.
                                                            LFAST Clock Select. This field selects the clock source of the divider that generates the clock to the LFAST.
                                                            Note: Implementation specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>None</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>None</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:81f141a8-fcb0-4304-b00a-c975612e739a">
                          <SHORT-NAME>McuLFASTClockDivider</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                Configures SIU_LFCLKCFG[LFDIV]
                                                                LFAST Clock Divider. Selects the divider value for the clock that feeds the LFAST module, according to
                                                                the following formula:
                                                                DivisionFactor = LFDIV + 1
                                                                Note: Implementation specific Parameter.
                                                            
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>1</DEFAULT-VALUE>
                          <MAX>128</MAX>
                          <MIN>1</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:289b09b8-2a38-4a3e-917d-8aaea63a87b9">
                      <SHORT-NAME>McuPSI5ClockConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                      Configures SIU_PSCLKCFG register.
                                                      This container contains the configuration parameters that define the clock division factors to 
                                                      generate the clocks to the PSI5 module.
                                                      Note: Implementation specific Container.
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:980d28f0-71e9-42d4-b6c2-e800cb007049">
                          <SHORT-NAME>McuPSI5ClockUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            0 - PSI5 clock register is NOT under mcu control.
                                                            1 - PSI5 clock register is under mcu control.
                                                            If this is set to false, the MCU code will not configure the SIU_PSCLKCFG register when Mcu_InitClock is called
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:407c9a4b-e388-4ec3-8d62-c52e9be9a92a">
                          <SHORT-NAME>McuPSI5RxClockFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                This is the PSI5 Rx clock frequency for the specific instance of the
                                                                McuClockReferencePoint container. It is expressed in Hz.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                          <MAX>1.32E8</MAX>
                          <MIN>1900.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b82283b5-2ad1-4a02-ace2-96aa5dbacf0a">
                          <SHORT-NAME>McuPSI5ClockDivider</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                Configures SIU_PSCLKCFG[PSDIV]
                                                                PSI5 Clock Divider. Selects the divider value for the clock that feeds the PSI5 module,
                                                                according to the following formula:
                                                                DivisionFactor = PSDIV + 1
                                                                Note: Implementation specific Parameter.
                                                            
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>1</DEFAULT-VALUE>
                          <MAX>256</MAX>
                          <MIN>1</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:7133be28-c918-42f9-bf15-2cde09d548a6">
                          <SHORT-NAME>McuPSI51UsClockFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                This is the PSI5 1us clock frequency for the specific instance of the
                                                                McuClockReferencePoint container. It is expressed in Hz.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4.0E7</DEFAULT-VALUE>
                          <MAX>1.32E8</MAX>
                          <MIN>450.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:83cbaaa2-b951-4e6f-9028-9e85934c5792">
                          <SHORT-NAME>McuPSI5ClockDivider1Mhz</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            
                                                                Configures SIU_PSCLKCFG[PSDIV1M]
                                                                PSI5 Clock Divider 1MHz. Selects the divider value for the clock that feeds the 1MHz input of the PSI5
                                                                module, according to the following formula:
                                                                DivisionFactor = PSDIV1M + 1
                                                                Note: Implementation specific Parameter.
                                                            
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>1</DEFAULT-VALUE>
                          <MAX>1024</MAX>
                          <MIN>1</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:cb2def5d-c687-4de4-820a-abd9e712193b">
                      <SHORT-NAME>McuProgClkSwitch</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container provides the specific configuration for Progresisve Clock Switch.
                                                        Note: Implementation Specific Container.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:50b1254b-7a36-479c-b7aa-01c5b6e40aa0">
                          <SHORT-NAME>McuProgresSwitchDuration</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PCS_SDUR register configuration.
                                                            This value defines the duration of one PCS clock switch step in terms of 16 MHz int. RC osc. cycles.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>255</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                      <SUB-CONTAINERS>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:cbabcf5d-c687-4de4-555a-abd9e712193b">
                          <SHORT-NAME>McuPcsConfig</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                This register defines the rate of frequency change and initial change value for the
                                                                progressive system clock switching when switching the system clock source to or from
                                                                the XOSC_CLK on ramp-up and ramp-down, respectively.
                                                                Note: Implementation Specific Container.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>3</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>3</UPPER-MULTIPLICITY>
                          <MULTIPLICITY-CONFIG-CLASSES>
                            <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                            <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          </MULTIPLICITY-CONFIG-CLASSES>
                          <PARAMETERS>
                            <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:8f5d498e-8c77-45aa-ba8f-aafc188dc019">
                              <SHORT-NAME>McuPCS_Name</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                    PCS_DIVCx register configuration name.
                                                                    This is the name of the PCS module.
                                                                    Note: Implementation Specific Parameter.
                                                                </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>PCS_1</DEFAULT-VALUE>
                              <LITERALS>
                                <ECUC-ENUMERATION-LITERAL-DEF>
                                  <SHORT-NAME>PCS_1</SHORT-NAME>
                                  <ORIGIN>NXP</ORIGIN>
                                </ECUC-ENUMERATION-LITERAL-DEF>
                                <ECUC-ENUMERATION-LITERAL-DEF>
                                  <SHORT-NAME>PCS_2</SHORT-NAME>
                                  <ORIGIN>NXP</ORIGIN>
                                </ECUC-ENUMERATION-LITERAL-DEF>
                                <ECUC-ENUMERATION-LITERAL-DEF>
                                  <SHORT-NAME>PCS_3</SHORT-NAME>
                                  <ORIGIN>NXP</ORIGIN>
                                </ECUC-ENUMERATION-LITERAL-DEF>
                              </LITERALS>
                            </ECUC-ENUMERATION-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:8f3d498e-8a66-45aa-bd8f-aafc558dc019">
                              <SHORT-NAME>McuPCS_DivInit</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                    PCS_DIVCx[INIT] register configuration.
                                                                    This is initial change value of the clock divider for the clock ramp-up phase when switching to the 8-40 MHz crystal osc.
                                                                    Note: Implementation Specific Parameter.
                                                                </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>999</DEFAULT-VALUE>
                              <MAX>65535</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:dbfac938-ade8-43d5-b09a-41f5c1ce8280">
                              <SHORT-NAME>McuPCS_DivRate</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                    PCS_DIVCx[RATE] register configuration.
                                                                    This value controls the change value of the clock divider for the clock ramp-up and ramp-down phase when switching to/from the 8-40 MHz crystal osc.
                                                                    Note: Implementation Specific Parameter.
                                                                </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>127</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:ca3c8a57-421e-49c0-9039-1dbbf2138fa1">
                              <SHORT-NAME>McuPCS_DivStart</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                    PCS_DIVSx register configuration.
                                                                    This is the start value of the clock divider for the clock ramp-up phase when switching to the crystal osc.
                                                                    Note: Implementation Specific Parameter.
                                                                </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>999</DEFAULT-VALUE>
                              <MAX>1048575</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:affedc17-a0d9-43d6-9ac7-e997f2174834">
                              <SHORT-NAME>McuPCS_DivEnd</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                    PCS_DIVSx register configuration.
                                                                    Divider End Value - This is the clock divider end value for the clock ramp-down phase when switching from the crystal osc.
                                                                    Note: Implementation Specific Parameter.
                                                                </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>999</DEFAULT-VALUE>
                              <MAX>1048575</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                      </SUB-CONTAINERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:b13c9afd-e8b0-4050-9e1c-88e6ab4cbb97">
                      <SHORT-NAME>McuPll_0</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container provides the specific configuration for the PLL0.
                                                        The PLL can be switched off when not required to achieve lower consumption by programming the
                                                            ME_x_MC registers in the MC_ME module.
                                                        Note: Implementation Specific Container.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:54f39fa2-ed5d-4de3-8179-0dcdf6733d26">
                          <SHORT-NAME>McuPllUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Set this to TRUE if PLL0 is under mcu control
                                                            If it is FALSE then the mcu driver will not write the corresponding registers.
                                                            The user must still set the values - they are used by the clock refference points 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:a8ad0d7b-3412-41d3-a819-5a42dd44304a">
                          <SHORT-NAME>McuPllClockConfiguration</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Clock Configuration:
                                                                - PLL off.
                                                                - Normal mode with PLL running.
                                                            Configure the PLLDIG_PLL0CR[CLKCFG] field register.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>PLL_OFF</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>PLL_OFF</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NORMAL_MODE_WITH_PLL_RUNNING</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                      </PARAMETERS>
                      <SUB-CONTAINERS>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:ef7b2047-f2be-4662-9a08-a89e07ce48b0">
                          <SHORT-NAME>McuPll0_Parameter</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            General configuration for PLL0 IP.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:86ecf7d4-2acd-44dd-a59d-7b48bcfb1da1">
                              <SHORT-NAME>PLL0_PHI_Frequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Output value for PLL0_PHI.
                                                                The valid range is [4.762 ... 200] MHz.
                                                                PLL_0_PHI_Frequency = (PLL0_ReferenceClock * McuLoopMultiplicationClkDivider) /
                                                                                      (McuInputClkPreDivider * McuPHI_ReducedFreqDivider)
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>3.2E7</DEFAULT-VALUE>
                              <MAX>2.0E8</MAX>
                              <MIN>4762000.0</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:42e55911-7e4f-447c-a790-e29bea610755">
                              <SHORT-NAME>PLL0_PHI1_Frequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Output value for PLL0_PHI1.
                                                                The valid range is [4.762 ... 200] MHz.
                                                                PLL_0_PHI1_Frequency = (PLL0_ReferenceClock * McuLoopMultiplicationClkDivider) /
                                                                                       (McuInputClkPreDivider * McuPHI1_ReducedFreqDivider)
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>8.0E7</DEFAULT-VALUE>
                              <MAX>2.0E8</MAX>
                              <MIN>4762000.0</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:fc3d3128-6d63-4559-86d5-0f45edd7122c">
                              <SHORT-NAME>PLL0_VCO_Frequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Voltage Controlled Oscillator Frequency.
                                                                Fvco = (2 * PLL0_ReferenceClock * McuLoopMultiplicationClkDivider) / McuInputClkPreDivider.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1.2E9</DEFAULT-VALUE>
                              <MAX>1.25E9</MAX>
                              <MIN>6.0E8</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:2d55498c-1bd6-44ce-84e1-1eca4f5ebc8a">
                              <SHORT-NAME>McuInputClkPreDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL0 Input Clock Pre-Divider.
                                                                Set the PLL0: PLLDIG_PLL0DV[PREDIV] field register.
                                                                
                                                                    
                                                                        Value
                                                                        Division factor
                                                                    
                                                                    
                                                                        0
                                                                        Clock INHIBIT
                                                                    
                                                                    
                                                                        1
                                                                        Divide by 1
                                                                    
                                                                    
                                                                        2
                                                                        Divide by 2
                                                                    
                                                                    
                                                                         ... 
                                                                    
                                                                    
                                                                        7
                                                                        Divide by 7
                                                                    
                                                                
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1</DEFAULT-VALUE>
                              <MAX>7</MAX>
                              <MIN>1</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:d843f98a-2f92-4a59-a925-fd3b18ee158d">
                              <SHORT-NAME>McuPHI_ReducedFreqDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL0 PHI reduced frequency divider.
                                                                Set the PLL0: PLLDIG_PLL0DV[RFDPHI] field register.
                                                                Valid values are 1..63.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>4</DEFAULT-VALUE>
                              <MAX>63</MAX>
                              <MIN>1</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b1dcbb80-f22c-4888-80b2-10ca734e7cfe">
                              <SHORT-NAME>McuPHI1_ReducedFreqDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL0 PHI reduced frequency divider.
                                                                Set the PLL0: PLLDIG_PLL0DV[RFDPHI1] field register.
                                                                Valid values are 4..15.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>4</DEFAULT-VALUE>
                              <MAX>15</MAX>
                              <MIN>4</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:f2f3bec4-1519-4131-ac16-e020d1346268">
                              <SHORT-NAME>McuLoopMultiplicationClkDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL0 Loop Multiplication Factor divider.
                                                                Set the PLL0: PLLDIG_PLL0DV[MFD] field register.
                                                                Valid range is in [8..127].
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>8</DEFAULT-VALUE>
                              <MAX>127</MAX>
                              <MIN>8</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5d2a3d6f-e459-491a-b42c-88c1af7c77af">
                              <SHORT-NAME>McuLossOfLockInt</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Loss of lock interrupt enable.
                                                                Set the PLL0: PLLDIG_PLL0CR[LOLIE] field register.
                                                                0 - Interrupt disabled.
                                                                1 - Interrupt enabled.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                      </SUB-CONTAINERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:283e5cac-effc-40a0-83f9-fcd652e6579e">
                      <SHORT-NAME>McuPll_1</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container provides the specific configuration for the PLL1.
                                                        The FMPLL can be switched off when not required to achieve lower consumption by programming the
                                                            ME_x_MC registers in the MC_ME module.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:54f39fa2-ed5d-4de3-8179-0dcdf6733d78">
                          <SHORT-NAME>McuPllUnderMcuControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Set this to TRUE if PLL1 is under mcu control
                                                            If it is FALSE then the mcu driver will not write the corresponding registers.
                                                            The user must still set the values - they are used by the clock refference points 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:56d3653e-ca4f-4dc6-8df8-a2d5682c596d">
                          <SHORT-NAME>McuPllClockConfiguration</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Clock Configuration:
                                                                - PLL off.
                                                                - Normal mode with PLL running.
                                                            Configure the PLLDIG_PLL1CR[CLKCFG] field register.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>PLL_OFF</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>PLL_OFF</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NORMAL_MODE_WITH_PLL_RUNNING</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                      </PARAMETERS>
                      <SUB-CONTAINERS>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:3b590ce3-0b48-4f8b-bfd8-37eec1d4953d">
                          <SHORT-NAME>McuPll1_Parameter</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            General configuration for PLL1 IP.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:00999052-d4ea-4928-b73c-fc85b51058d9">
                              <SHORT-NAME>PLL1_PHI_Frequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Clock value for PLL1_PHI.
                                                                The valid range is [4.762 ... 264] MHz.
                                                                PLL_0_Frequency = (McuAuxClk4_Frequency * (McuLoopMultiplicationClkDivider + (McuFractionalDivider / 4096))) /
                                                                                  (2 * McuPHI_ReducedFreqDivider)
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>3.2E7</DEFAULT-VALUE>
                              <MAX>2.64E8</MAX>
                              <MIN>4762000.0</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:e7455e11-747d-48db-a660-7f7b5e24e792">
                              <SHORT-NAME>PLL1_VCO_Frequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Voltage Controlled Oscillator Frequency.
                                                                Fvco = McuAuxClk4_Frequency * (McuLoopMultiplicationClkDivider + McuFractionalDivider / 4096).
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1.2E9</DEFAULT-VALUE>
                              <MAX>1.25E9</MAX>
                              <MIN>6.0E8</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:6175fa67-e2d7-4041-a7d4-c7aff247929b">
                              <SHORT-NAME>McuPHI_ReducedFreqDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL1 PHI reduced frequency divider.
                                                                Set the PLL1: PLLDIG_PLL1DV[RFDPHI] field register.
                                                                Valid values are 1..63.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>12</DEFAULT-VALUE>
                              <MAX>63</MAX>
                              <MIN>1</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:8fce3624-9d2d-47a6-8f4d-a579d350aa81">
                              <SHORT-NAME>McuLoopMultiplicationClkDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Set PLL1 Loop Multiplication Factor divider.
                                                                Set the PLL1: PLLDIG_PLL0DV[MFD] field register.
                                                                Valid range is in [16..34].
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>24</DEFAULT-VALUE>
                              <MAX>34</MAX>
                              <MIN>16</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:9514adcc-dbce-4b6f-ab73-f115e854d742">
                              <SHORT-NAME>McuLossOfLockInt</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Loss of lock interrupt enable.
                                                                Set the PLL1: PLLDIG_PLL1CR[LOLIE] field register.
                                                                0 - Interrupt disabled.
                                                                1 - Interrupt enabled.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:57865315-7823-43a0-8464-937a0977b4b2">
                              <SHORT-NAME>McuModulationEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Modulation Enable.
                                                                Set the PLL1: PLLDIG_PLL1FM[MODEN] field register.
                                                                0 - Frequency modulation disabled.
                                                                1 - Frequency modulation enabled.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f4a87647-05c6-4426-916b-6a2ac30aaaa7">
                              <SHORT-NAME>McuFracDivEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Fractional Divide Enable.
                                                                Set the PLL1: PLLDIG_PLL1FD[FDEN] field register.
                                                                0 - Fractional divide disabled.
                                                                1 - Fractional divide enabled.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:5c4993a7-9fbd-416b-b4f8-7893e070d97a">
                          <SHORT-NAME>McuFmPll1_Parameter</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            This parameter is enabled only if McuModulationEnable = true.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:5e863971-f9c3-423e-adaa-7f3d514b6243">
                              <SHORT-NAME>McuModulationPeriod</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Frequency for the triangular wave modulation (Fmod).
                                                                The units is in Hz.
                                                                The maximum configurable value for this parameter has to be configured based on the formula:
                                                                Modulation Frequency = (Reference_Frequency) / (4 * Modulation_Period). See MR[MOD_PERIOD] field description from RM.
                                                                Modulation_Period can be in range [0 .. 0x1FFF].
                                                                Reference_Frequency represent the output freq of the feedback divider:
                                                                   Reference_Frequency = Fvco/NDIV = ((CLKIN*NDIV)/IDF)/NIDV = CLKIN/IDF
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>8191</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:c3c55351-828f-4d1f-b1b7-1c508cd1d781">
                              <SHORT-NAME>McuModulationIncrementStep</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Modulation increment step.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>32767</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:1ef11a06-8452-4aea-8b38-ff55c62b054e">
                              <SHORT-NAME>McuSpreadSelection</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Modulation Selection:
                                                                    - Center around nominal frequency.
                                                                    - Spread below nominal frequency.
                                                                Configure the PLLDIG_PLL1FM[MODSEL] field register.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>Down_Spread</DEFAULT-VALUE>
                              <LITERALS>
                                <ECUC-ENUMERATION-LITERAL-DEF>
                                  <SHORT-NAME>Down_Spread</SHORT-NAME>
                                  <ORIGIN>NXP</ORIGIN>
                                </ECUC-ENUMERATION-LITERAL-DEF>
                                <ECUC-ENUMERATION-LITERAL-DEF>
                                  <SHORT-NAME>Center_Spread</SHORT-NAME>
                                  <ORIGIN>NXP</ORIGIN>
                                </ECUC-ENUMERATION-LITERAL-DEF>
                              </LITERALS>
                            </ECUC-ENUMERATION-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:d443b8c5-339e-425a-b5c0-15eaa6f5a6d7">
                          <SHORT-NAME>McuFdPll1_Parameter</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            This parameter is enabled only if McuFracDivEnable = true.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:6e2ccf70-b4cf-4108-9841-1cc571bc57fd">
                              <SHORT-NAME>McuDthDisable1</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Rectangular Dither Disable.
                                                                Disables the Rectangular Phase/Frequency Detector dither.
                                                                0 - Dither enabled
                                                                1 - Dither disabled
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:6fcb4718-10dd-4f2a-a6e1-e548a9d37ef0">
                              <SHORT-NAME>McuDthDisable0</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Triangular Dither Disable.
                                                                Disables the Triangular Phase/Frequency Detector dither.
                                                                0 - Dither enabled
                                                                1 - Dither disabled
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:3fa25be6-46ba-4059-b48a-c038d14121f3">
                              <SHORT-NAME>McuFractionalDivider</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Fractional divide input.
                                                                When the fractional divide is disabled, the VCO clock frequency is the product of the input clock
                                                                and the loop divide factor (MFD).
                                                                When fractional divide is enabled, the mean VCO clock frequency is given by the equation in the Clock configuration section.
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>4095</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                      </SUB-CONTAINERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:88d4fd72-886a-43c2-b3a9-d6907147b189">
                      <SHORT-NAME>McuEMIOS</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container controls eMIOS.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SUB-CONTAINERS>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:0ac04050-b19f-4ffd-9037-b5e47b5deeab">
                          <SHORT-NAME>McuEMIOS_0</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            This container controls eMIOS 0.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:fb75127d-eefe-4929-b0ae-cc59c6fddd4d">
                              <SHORT-NAME>McuEMIOS0ClockFrequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                                Value calculated for user info. It is given in Hz.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1.0E8</DEFAULT-VALUE>
                              <MAX>1.0E8</MAX>
                              <MIN>0.0</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:d6157ba6-f4a7-401c-8cfe-d029b5f29681">
                              <SHORT-NAME>McuMdisBit</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Check this to put the eMIOS200 in low power mode. The MDIS bit is used to stop the clock
                                                                of the block, except the access to registers EMIOSMCR, EMIOSOUDIS and EMIOSUCDIS.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:e0683f4a-0e61-41e5-83a4-ce9a5e378524">
                              <SHORT-NAME>McuFreezeBit</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Freeze Bit (FRZ in EMIOS_MCR_A register).Enable the eMIOS200 to freeze the registers
                                                                of the unified channels when debug mode is requested at MCU level. Each unified channel
                                                                must have FREN bit set in order to enter freeze mode.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:d9f511c0-50bf-43c9-882b-5e1ee1652247">
                              <SHORT-NAME>McuGlobalTimeBaseEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Time Base Enable Bit (GTBE in EMIOS_MCR register).The GTBE bit is used to export
                                                                a global time base enable from the module and provide a method to start time bases of several
                                                                blocks simultaneously.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>true</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:bac5f232-643d-455a-ae67-5799c5b71db7">
                              <SHORT-NAME>McuExternalTimeBase</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                The ETB bit selects the time base source that drives counter bus.
                                                                0 - Counter bus assigned to Unified Channel.
                                                                1 - ReservedCounter bus assigned to STAC.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>true</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:44dee598-7012-41a9-af60-ce916e215837">
                              <SHORT-NAME>McuGlobalPrescalerEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Prescaler Enable bit.
                                                                The GPREN bit enables the prescaler counter.
                                                                0 - Prescaler disabled (no clock) and prescaler counter is cleared.
                                                                1 - Prescaler enabled.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:628d0641-22ff-45bb-9557-c54388d66e5a">
                              <SHORT-NAME>McuServerTimeSlot</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                The SRV bits select the address of a specific STAC server to which the STAC is assigned.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>15</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:9f8d2987-9359-4604-bf03-44b815a718af">
                              <SHORT-NAME>McuGlobalPrescaler</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Prescaler Bits (GPRE[0:7] in EMIOS_MCR register).
                                                                The bits select the clock divider value for the global prescaler.
                                                                The allowed values are 0 up to 255 (divide ratio 1 up to 256).
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1</DEFAULT-VALUE>
                              <MAX>256</MAX>
                              <MIN>1</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                        <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c0c2b07d-a18a-4284-b536-2c64a3f6c0b8">
                          <SHORT-NAME>McuEMIOS_1</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            This container controls eMIOS 1.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <PARAMETERS>
                            <ECUC-FLOAT-PARAM-DEF UUID="ECUC:28b480ec-2c2e-4a70-be32-8ed509f3fc48">
                              <SHORT-NAME>McuEMIOS1ClockFrequency</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                This is the frequency for the specific instance of the &quot;McuClockReferencePoint&quot; container.
                                                                Value calculated for user info. It is given in Hz.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1.0E8</DEFAULT-VALUE>
                              <MAX>1.0E8</MAX>
                              <MIN>0.0</MIN>
                            </ECUC-FLOAT-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2a8192ff-d65d-4e0e-8ce7-2f04b76190ce">
                              <SHORT-NAME>McuMdisBit</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Check this to put the eMIOS200 in low power mode. The MDIS bit is used to stop the clock
                                                                of the block, except the access to registers EMIOSMCR, EMIOSOUDIS and EMIOSUCDIS.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:4088f223-c330-4ad9-96b7-9ed6db38b977">
                              <SHORT-NAME>McuFreezeBit</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Freeze Bit (FRZ in EMIOS_MCR_A register).Enable the eMIOS200 to freeze the registers
                                                                of the unified channels when debug mode is requested at MCU level. Each unified channel
                                                                must have FREN bit set in order to enter freeze mode.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:410715c1-d9b4-4711-a27e-93d805518570">
                              <SHORT-NAME>McuGlobalTimeBaseEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Time Base Enable Bit (GTBE in EMIOS_MCR register).The GTBE bit is used to export
                                                                a global time base enable from the module and provide a method to start time bases of several
                                                                blocks simultaneously.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>true</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:91976473-cbe1-4944-bd3d-ef413eb466ca">
                              <SHORT-NAME>McuExternalTimeBase</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                The ETB bit selects the time base source that drives counter bus.
                                                                0 - Counter bus assigned to Unified Channel.
                                                                1 - ReservedCounter bus assigned to STAC.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>true</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f43cff66-dbfe-4e5c-9ec0-9592565f70d0">
                              <SHORT-NAME>McuGlobalPrescalerEnable</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Prescaler Enable bit.
                                                                The GPREN bit enables the prescaler counter.
                                                                0 - Prescaler disabled (no clock) and prescaler counter is cleared.
                                                                1 - Prescaler enabled.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>false</DEFAULT-VALUE>
                            </ECUC-BOOLEAN-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:c8f81e9b-ece1-4c02-9659-838e5ab4772b">
                              <SHORT-NAME>McuServerTimeSlot</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                The SRV bits select the address of a specific STAC server to which the STAC is assigned.
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>0</DEFAULT-VALUE>
                              <MAX>15</MAX>
                              <MIN>0</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                            <ECUC-INTEGER-PARAM-DEF UUID="ECUC:cdf43389-04e2-4f79-9f2a-cf6084dc9ff3">
                              <SHORT-NAME>McuGlobalPrescaler</SHORT-NAME>
                              <DESC>
                                <L-2 L="EN">
                                                                Global Prescaler Bits (GPRE[0:7] in EMIOS_MCR register).
                                                                The bits select the clock divider value for the global prescaler.
                                                                The allowed values are 0 up to 255 (divide ratio 1 up to 256).
                                                                Note:implementation specific parameter.
                                                            </L-2>
                              </DESC>
                              <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                              <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                              <SCOPE>LOCAL</SCOPE>
                              <ORIGIN>NXP</ORIGIN>
                              <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                              <VALUE-CONFIG-CLASSES>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                                <ECUC-VALUE-CONFIGURATION-CLASS>
                                  <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                                  <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                                </ECUC-VALUE-CONFIGURATION-CLASS>
                              </VALUE-CONFIG-CLASSES>
                              <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                              <DEFAULT-VALUE>1</DEFAULT-VALUE>
                              <MAX>256</MAX>
                              <MIN>1</MIN>
                            </ECUC-INTEGER-PARAM-DEF>
                          </PARAMETERS>
                        </ECUC-PARAM-CONF-CONTAINER-DEF>
                      </SUB-CONTAINERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:8cbac65c-6a3d-4b29-b3a4-b1bebf97a468">
                      <SHORT-NAME>McuClkMonitor</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                            This container contains the specific configuration (parameters) of the Clock Monitor Unit.
                                                            Detailed information on the CMUs can be found in the Clock Monitor Unit chapter.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>7</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                      <MULTIPLICITY-CONFIG-CLASSES>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      </MULTIPLICITY-CONFIG-CLASSES>
                      <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:0fef779b-bf2c-466a-9110-56a48d8e3e16">
                          <SHORT-NAME>McuCmuName</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                This is the name of the CMU.
                                                                With name convention: CMU_[Number Of CMU Unit]_[Name of Monitored clock].
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>CMU_0_XOSC_AND_PLL_PHI0_CLK</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_0_XOSC_AND_PLL_PHI0_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_1_CORE_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_2_PLAT_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_3_FM_PER_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_4_ETPU_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_5_PER_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CMU_6_SD_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c7aee6bc-63df-462e-b6d3-ff74458067e5">
                          <SHORT-NAME>McuClkMonitorEn</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                Enables/Disables the clock monitor (CMU_CSR[CME]).
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:df6cef49-d7c8-411b-8e2e-8a0025075446">
                          <SHORT-NAME>McuRCDivisorFactor</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                Set the CMU0: CMU_CSR[RCDIV] field register.
                                                                CMU0 detects if the Fxosc is smaller than 16000000/(2^CMU_CSR[RCDIV]) when is used for XOSC clock monitoring.
                                                                Note: 
                                                                - This node is only supported by CMU0.
                                                                - Implementation Specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>DIV_8</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>DIV_1</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>DIV_2</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>DIV_4</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>DIV_8</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:be942be0-cdd4-4e1c-8ca1-5b66865b9652">
                          <SHORT-NAME>McuHighFrequencyRef</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                The value of the Max Frequency.
                                                                CMU detects if the monitored clock is greater than McuHighFrequencyRef.
                                                                The reference value is given by: (HFREF /16) * (fCLKMT0_RMN / 4 ).
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4095</DEFAULT-VALUE>
                          <MAX>4095</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:acfec810-17d6-46db-9bc3-b9e1440f6247">
                          <SHORT-NAME>McuLowFrequencyRef</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                The value of the Min Frequency.
                                                                CMU detects if the monitored clock is smaller than McuLowFrequencyRef.
                                                                The reference value is given by: (LFREF / 16) * (fCLKMT0_RMN / 4). 
                                                                Note: Implementation Specific Parameter.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>4095</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:b4d260c1-a276-4fb3-9e0b-c64c6ee2af63">
                      <SHORT-NAME>McuFlash</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container contains the specific configuration (parameters) of the Mcu Flash PFCR1 register.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:cad29041-a4aa-455d-95b3-796dd85e7c95">
                          <SHORT-NAME>McuFlashAddrPipelineControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PFCR1[APC] field configuration register.
                                                            This field controls the number of cycles that a subsequent flash
                                                                read from the opposite AHB port can be initiated prior to the previous read data being valid.
                                                            000 - Pipelined access to the flash disabled.
                                                            001 - A pipelined access can be initiated 1 cycle before the previous data is valid
                                                            010 - A pipelined access can be initiated 2 cycles before the previous data is valid
                                                            011 - A pipelined access can be initiated 3 cycles before the previous data is valid
                                                            100 - Pipelined access to the flash is disabled and one wait state is inserted before a subsequent access
                                                                    can be initiated
                                                            101 - Pipelined access to the flash is disabled and one wait state is inserted before a subsequent access
                                                                    can be initiated
                                                            110 - Pipelined access to the flash is disabled and one wait state is inserted before a subsequent access
                                                                    can be initiated
                                                            111 - Pipelined access to the flash is disabled and one wait state is inserted before a subsequent access
                                                                    can be initiated
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>7</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:bb914fb0-13c9-4851-8903-cbe097c04ca6">
                          <SHORT-NAME>McuFlashReadWaitStateControl</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Configure PFCR1[RWSC] field of FLASH module.
                                                            This field controls the number of wait-states to be added to the best-case flash array access time for reads. 
                                                            The best-case flash array access time for reads is one cycle.
                                                            00000 No additional wait-states are added
                                                            00001 One additional wait-state is added
                                                            ...
                                                            11111 Thirty-one additional wait-states are added
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>31</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:6bbb1391-fc4a-4fda-8ff4-449f3215158e">
                      <SHORT-NAME>McuRam</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This container contains the specific configuration (parameters) for Platform RAM wait-state control.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c34442d7-91c2-4e9a-b62e-0edf579d0afb">
                          <SHORT-NAME>McuRam_PRAMC_0_P0_BO_DIS</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PRAMC_0_PRCR1[P0_BO_DIS] field configuration.
                                                            Port p0 read burst optimization disable.
                                                            
                                                                
                                                                    Value
                                                                    Meaning
                                                                
                                                                
                                                                    0
                                                                    
                                                                        64-bit WRP4 read bursts are optimized such that the controller returns a 2-1-1-1
                                                                        response when PRCR1[FT_DIS]=1
                                                                    
                                                                
                                                                
                                                                    1
                                                                    
                                                                        64-bit WRP4 read bursts are not optimized; the controller returns a 2-2-2-2
                                                                        response when PRCR1[FT_DIS]=1
                                                                    
                                                                
                                                            
                                                            
                                                            Note:
                                                            The number of cycles taken for a RAM access can vary +/-1 clock cycle depending on the RAM
                                                            speed relative to the PRAMC controller clock frequency. If system RAM is running at the same
                                                            frequency as the PRAMC controller, a random initial access takes 2 clock cycles. If system RAM
                                                            is running at a slower frequency, a random initial access may take 3 clock cycles. Subsequent
                                                            burst beats take either 1 or 2 cycles depending on RAM speed relative to the PRAMC controller
                                                            clock frequency.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:812ce9ca-60ca-47a8-a241-2e0846e48af8">
                          <SHORT-NAME>McuRam_PRAMC_0_FT_DIS</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PRAMC_0_PRCR1[FT_DIS] field configuration.
                                                            Flow through disabled.
                                                            This field defines the AHB response on reads. The state of this field has no impact on the response latency on writes. This bit is cleared by hardware reset.
                                                            
                                                                
                                                                    Value
                                                                    Meaning
                                                                
                                                                
                                                                    0
                                                                    RAM read data is passed directly to the system bus, incurring no additional latency
                                                                
                                                                
                                                                    1
                                                                    RAM read data is registered prior to returning on the system bus, incurring 1 extra cycle of latency
                                                                
                                                            
                                                            
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f92debcd-9b5e-41b0-9461-a6a825ee17be">
                          <SHORT-NAME>McuRam_PRAMC_1_P0_BO_DIS</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PRAMC_1_PRCR1[P0_BO_DIS] field configuration.
                                                            Port p0 read burst optimization disable.
                                                            
                                                                
                                                                    Value
                                                                    Meaning
                                                                
                                                                
                                                                    0
                                                                    
                                                                        64-bit WRP4 read bursts are optimized such that the controller returns a 2-1-1-1
                                                                        response when PRCR1[FT_DIS]=1
                                                                    
                                                                
                                                                
                                                                    1
                                                                    
                                                                        64-bit WRP4 read bursts are not optimized; the controller returns a 2-2-2-2
                                                                        response when PRCR1[FT_DIS]=1
                                                                    
                                                                
                                                            
                                                            
                                                            Note:
                                                            The number of cycles taken for a RAM access can vary +/-1 clock cycle depending on the RAM
                                                            speed relative to the PRAMC controller clock frequency. If system RAM is running at the same
                                                            frequency as the PRAMC controller, a random initial access takes 2 clock cycles. If system RAM
                                                            is running at a slower frequency, a random initial access may take 3 clock cycles. Subsequent
                                                            burst beats take either 1 or 2 cycles depending on RAM speed relative to the PRAMC controller
                                                            clock frequency.
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f92debcd-9b5e-42b3-a461-a6a825ee17be">
                          <SHORT-NAME>McuRam_PRAMC_1_FT_DIS</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            PRAMC_1_PRCR1[FT_DIS] field configuration.
                                                            Flow through disabled.
                                                            This field defines the AHB response on reads. The state of this field has no impact on the response latency on writes. This bit is cleared by hardware reset.
                                                            
                                                                
                                                                    Value
                                                                    Meaning
                                                                
                                                                
                                                                    0
                                                                    RAM read data is passed directly to the system bus, incurring no additional latency
                                                                
                                                                
                                                                    1
                                                                    RAM read data is registered prior to returning on the system bus, incurring 1 extra cycle of latency
                                                                
                                                            
                                                            
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:dcc84cdf-93ef-4cca-821b-b1a7f56dcfec">
                      <SHORT-NAME>McuClockReferencePoint</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                            This container defines a reference point in the Mcu Clock tree. It defines the frequency which then can be used by other modules as an input value. Lower multiplictiy is 1, as even in the simpliest case (only one frequency is used), there is one frequency to be defined.
                                                        </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                      <MULTIPLICITY-CONFIG-CLASSES>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      </MULTIPLICITY-CONFIG-CLASSES>
                      <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-FLOAT-PARAM-DEF UUID="ECUC:56f2133a-6d79-4c14-8608-708988a4fd7e">
                          <SHORT-NAME>McuClockReferencePointFrequency</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                This is the frequency for the specific instance of the McuClockReferencePoint container.
                                                                It shall be given in Hz.
                                                                Calculated value.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>1.6E7</DEFAULT-VALUE>
                          <MAX>3.2E8</MAX>
                          <MIN>0.0</MIN>
                        </ECUC-FLOAT-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:e699f695-3db5-4f60-a174-5aa4454a697f">
                          <SHORT-NAME>McuClockFrequencySelect</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                                Select clock source for the specific instance of the McuClockReferencePoint container.
                                                            </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>SYS_CLK</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CUSTOM</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>IRC_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>XOSC_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>SYS_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CORE_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>PLAT_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>FM_PER_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>PER_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>ETPU_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>MCAN_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>ENG_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>CLKOUT_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>SD_CLK</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>EMIOS0</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>EMIOS1</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                  </SUB-CONTAINERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:092fb5e2-9ecc-45ad-8121-e1210e335cec">
                  <SHORT-NAME>McuDemEventParameterRefs</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Container for the references to DemEventParameter elements which shall be invoked using the API Dem_SetEventStatus API in case the corresponding error occurs. 
                                                The EventId is taken from the referenced DemEventParameter's DemEventId value. 
                                                The standardized errors are provided in the container and can be extended by vendor specific error references.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <REFERENCES>
                    <ECUC-SYMBOLIC-NAME-REFERENCE-DEF UUID="ECUC:8f45d08b-315d-421b-8457-c3c09bc5feda">
                      <SHORT-NAME>MCU_E_TIMEOUT_FAILURE</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Reference to configured DEM event to report Timeout failure.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <MULTIPLICITY-CONFIG-CLASSES>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      </MULTIPLICITY-CONFIG-CLASSES>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <DESTINATION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DESTINATION-REF>
                    </ECUC-SYMBOLIC-NAME-REFERENCE-DEF>
                    <ECUC-SYMBOLIC-NAME-REFERENCE-DEF UUID="ECUC:76fa5609-e337-4a98-bf05-c17da3ccee64">
                      <SHORT-NAME>MCU_E_SSCM_CER_FAILURE</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Reference to configured DEM event to report a SSCM Configuration Error.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <MULTIPLICITY-CONFIG-CLASSES>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      </MULTIPLICITY-CONFIG-CLASSES>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <DESTINATION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DESTINATION-REF>
                    </ECUC-SYMBOLIC-NAME-REFERENCE-DEF>
                    <ECUC-SYMBOLIC-NAME-REFERENCE-DEF UUID="ECUC:7b1e9402-2922-49e6-a094-efe3ce59f8c0">
                      <SHORT-NAME>MCU_E_CLOCK_FAILURE</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Reference to configured DEM event to report Clock source failure.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <MULTIPLICITY-CONFIG-CLASSES>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                        <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      </MULTIPLICITY-CONFIG-CLASSES>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <DESTINATION-REF DEST="ECUC-PARAM-CONF-CONTAINER-DEF">/AUTOSAR/EcucDefs/Dem/DemConfigSet/DemEventParameter</DESTINATION-REF>
                    </ECUC-SYMBOLIC-NAME-REFERENCE-DEF>
                  </REFERENCES>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:9d338d97-6006-469a-8111-ac7c93ba66ec">
                  <SHORT-NAME>McuModeSettingConf</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                    This container contains the configuration for the Mode setting of the MCU.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:f296ee65-d7f7-4f6d-ae0c-562449d649b4">
                      <SHORT-NAME>McuMode</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter shall represent the ID of the MCU mode.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>true</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>0</DEFAULT-VALUE>
                      <MAX>255</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:4e601bd3-e1bf-40ea-8318-740303d8615e">
                      <SHORT-NAME>McuPowerMode</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter selects the Power Mode to be used. 
                                                        If WAIT mode is selected, CPU will run to WFI(wait for interrupt) state.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>RUN</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>RUN</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>WAIT</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                  </PARAMETERS>
                  <SUB-CONTAINERS>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:b5e8629b-8445-4156-9a11-8530202ebb33">
                      <SHORT-NAME>McuCore0ResetVectorRegister</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                    
                                                      This container contains the SPECIFIC configuration (parameters) of the SIU_RSTVEC0 Register Configuration.
                                                      Note: Implementation specific Container.
                                                    
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:715a7314-e038-4a15-85b3-c3f5c5d88d75">
                          <SHORT-NAME>McuCore0ResetVector</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            The RSTVEC value determines the initial program counter upon exiting reset.
                                                            The value from this field will be masked with 0xFFFFFFFC. 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4294967292</DEFAULT-VALUE>
                          <MAX>4294967295</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5cf5a62c-6f8f-4456-bceb-e10c893d082c">
                          <SHORT-NAME>McuCore0ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Controls the assertion of RESET to the core. Writing 1 to this bit causes the 
                                                            core to enter reset, provided the respective SIU_HLT1 bit is also set. 
                                                            Reads of this bit indicate whether the core is being held in reset. 
                                                            0 - Core is not in reset 
                                                            1 - Reset request 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:94a51c69-6237-4c60-9e12-f856c357e698">
                          <SHORT-NAME>McuCore0VLESelect</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            VLE Select. The VLE bit selects whether the core executes VLE or Book E code at the 
                                                            reset vector address. 
                                                            0 - Book E 
                                                            1 - VLE 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:7a45e1e4-a5d7-49ff-9dd2-bcd9f4bfb48b">
                      <SHORT-NAME>McuCore1ResetVectorRegister</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                    
                                                      This container contains the SPECIFIC configuration (parameters) of the SIU_RSTVEC1 Register Configuration.
                                                      Note: Implementation specific Container.
                                                    
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:27c8731e-f449-4915-ba23-43cbdfbaaf11">
                          <SHORT-NAME>McuCore1ResetVector</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            The RSTVEC value determines the initial program counter upon exiting reset.
                                                            The value from this field will be masked with 0xFFFFFFFC. 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>4294967292</DEFAULT-VALUE>
                          <MAX>4294967295</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:57967d29-9fe2-4a6c-8155-48e285c08f23">
                          <SHORT-NAME>McuCore1ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            Controls the assertion of RESET to the core. Writing 1 to this bit causes the 
                                                            core to enter reset, provided the respective SIU_HLT1 bit is also set. 
                                                            Reads of this bit indicate whether the core is being held in reset. 
                                                            0 - Core is not in reset 
                                                            1 - Reset request 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5b645118-13f1-4ddb-9eff-3938a7267e87">
                          <SHORT-NAME>McuCore1VLESelect</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                            VLE Select. The VLE bit selects whether the core executes VLE or Book E code at the 
                                                            reset vector address. 
                                                            0 - Book E 
                                                            1 - VLE 
                                                            Note: Implementation Specific Parameter.
                                                        </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:29dee793-86e0-4095-ba26-fc4502cffc26">
                      <SHORT-NAME>Halt1Register</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                    
                                                      This container contains the SPECIFIC configuration (parameters) of the SIU_HLT1 Register Configuration.
                                                      Note: Implementation specific Container.
                                                    
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a7cd4318-d686-4cc0-bc52-0ac17ad42336">
                          <SHORT-NAME>HaltCORE0</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[CORE0] bit.
                                                        Halt Core 0. Halt the clock inputs of Core 1 after the execution of the WAIT instruction.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:64904c39-a474-4799-ae17-9f6b9b08b7df">
                          <SHORT-NAME>HaltCORE1</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[CORE1] bit.
                                                        Halt Core 1. Halt the clock inputs of Core 1 after the execution of the WAIT instruction.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c59d48ca-264e-4115-a30d-67cfa0458b11">
                          <SHORT-NAME>HaltCSE</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[CSE] bit.
                                                        Halt CSE. Halt the clock inputs of the Cryptographic Services Engine. The clocks are halted immediatly
                                                        after this bit is set, therefore software must guarantee that the CSE module can be stopped prior to
                                                        asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f2f83df7-fbc9-4b0e-9fb4-4c0a3d05af53">
                          <SHORT-NAME>HaltETPUC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ETPUC] bit.
                                                        Halt eTPU C. Dispatch a halt request to Enhanced Timing Processing Unit C and to the Reaction Module.
                                                        These modules will hold the request until all internal activities are concluded, then they will allow their
                                                        clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fa3caad4-f7c6-4a32-ad7a-bf6d8e68bd60">
                          <SHORT-NAME>HaltETPUA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ETPUA] bit.
                                                        Halt eTPU A/B. Dispatch a halt request to Enhanced Timing Processing Unit A/B. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c589de6b-4260-423e-9fcd-043a26db9d08">
                          <SHORT-NAME>HaltNPC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[NPC] bit.
                                                        Halt NPC. Dispatch a halt request to the Nexus Port Controller. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:47cbaadd-eb67-471f-acbc-63433b6bac56">
                          <SHORT-NAME>HaltEBI</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EBI] bit.
                                                        Halt EBI. Dispatch a halt request to the External Bus Interface module. The module will hold the request
                                                        until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        External Bus Interface (EBI) is not available on 416 PBGA.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:dcf85eaa-da11-49ed-a264-956400d8f2d1">
                          <SHORT-NAME>HaltEQADCB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EQADCB] bit.
                                                        Halt eQADC B. Dispatch a halt request to the Enhanced Queued Analog-to-Digital Converter B. The
                                                        module will hold the request until all internal activities are concluded, then it will allow its clock inputs to be
                                                        halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:74689143-6261-48a6-89b5-0a570b82190f">
                          <SHORT-NAME>HaltEQADCA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EQADCA] bit.
                                                        Halt eQADC A. Dispatch a halt request to the Enhanced Queued Analog-to-Digital Converter A. The
                                                        module will hold the request until all internal activities are concluded, then it will allow its clock inputs to be
                                                        halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:b3a6aa27-c46c-41da-b4ab-a8551514fc67">
                          <SHORT-NAME>HaltEMIOS0</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EMIOS0] bit.
                                                        Halt eMIOS 0. Halt the clock inputs of the Enhanced Modular I/O System 0. The clocks are halted
                                                        immediatly after this bit is set, therefore software must guarantee that the eMIOS_0 module can be
                                                        stopped prior to asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a3f8c4e4-66cf-4d70-8355-2000bda968c8">
                          <SHORT-NAME>HaltDECFIL</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[DECFIL] bit.
                                                        Halt DECFIL. Dispatch a halt request to all Decimation Filter modules. The modules will hold the request
                                                        until all internal activities are concluded, then they will allow their clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:11b5311d-fb2a-4e52-9f35-540867537164">
                          <SHORT-NAME>HaltEMIOS1</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EMIOS1] bit.
                                                        Halt eMIOS 1. Halt the clock inputs of the Enhanced Modular I/O System 1. The clocks are halted
                                                        immediatly after this bit is set, therefore software must guarantee that the eMIOS_1 module can be
                                                        stopped prior to asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:dd7350e5-f9c1-42f8-965a-afdeca3fc3b9">
                          <SHORT-NAME>HaltPIT</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[PIT] bit.
                                                        Halt PIT. Dispatch a halt request to the Periodic Interval Timer. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:e495b967-3ce9-4e1b-a7e9-dfdc781ef7dd">
                          <SHORT-NAME>HaltFLEXCAND</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[FLEXCAND] bit.
                                                        Halt FlexCAN D. Dispatch a halt request to the Flexible Controller Area Network D. The module will hold
                                                        the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:87743e99-abab-46db-b41e-3b7425bfed37">
                          <SHORT-NAME>HaltFLEXCANC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[FLEXCANC] bit.
                                                        Halt FlexCAN C. Dispatch a halt request to the Flexible Controller Area Network C. The module will hold
                                                        the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f35c19db-68e8-4446-85da-604a4146e165">
                          <SHORT-NAME>HaltFLEXCANB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[FLEXCANB] bit.
                                                        Halt FlexCAN B. Dispatch a halt request to the Flexible Controller Area Network B. The module will hold
                                                        the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f9284324-8732-4a38-8b10-389a90f1365b">
                          <SHORT-NAME>HaltFLEXCANA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[FLEXCANA] bit.
                                                        Halt FlexCAN A. Dispatch a halt request to the Flexible Controller Area Network A. The module will hold
                                                        the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:e883b46e-160d-4089-b66d-96222cfefbf3">
                          <SHORT-NAME>HaltDSPID</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[DSPID] bit.
                                                        Halt DSPI D. Dispatch a halt request to the Deserial/Serial Peripheral Interface D. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c5ed74b6-83f8-4ae0-8690-73fe04a7cbdf">
                          <SHORT-NAME>HaltDSPIC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[DSPIC] bit.
                                                        Halt DSPI C. Dispatch a halt request to the Deserial/Serial Peripheral Interface C. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:70e58f58-dd3e-4fd0-90f4-992829a8ed01">
                          <SHORT-NAME>HaltDSPIB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[DSPIB] bit.
                                                        Halt DSPI B. Dispatch a halt request to the Deserial/Serial Peripheral Interface B. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5e92067e-c9ab-414c-8b91-efb273ea432e">
                          <SHORT-NAME>HaltDSPIA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[DSPIA] bit.
                                                        Halt DSPI A. Dispatch a halt request to the Deserial/Serial Peripheral Interface A. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:0ba4bd5e-b52f-47c1-bbde-23c071553f99">
                          <SHORT-NAME>HaltDSPIE</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[EQADCB] bit.
                                                        Halt DSPI E. Dispatch a halt request to the Deserial/Serial Peripheral Interface E. The module will hold the
                                                        request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2276a543-9112-4fe2-9b5b-578f9b47820f">
                          <SHORT-NAME>HaltESCIF</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCIF] bit.
                                                        Halt eSCI F. Dispatch a halt request to the Enhanced Serial Communication Interface F. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1cf48436-a919-43a8-8e36-dfcb10d4d845">
                          <SHORT-NAME>HaltESCIE</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCIE] bit.
                                                        Halt eSCI E. Dispatch a halt request to the Enhanced Serial Communication Interface E. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:cf2c243c-cc08-4e56-ac87-8b621d8486bc">
                          <SHORT-NAME>HaltESCID</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCID] bit.
                                                        Halt eSCI D. Dispatch a halt request to the Enhanced Serial Communication Interface D. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:b03e6c53-5ba7-413f-a364-2e56fc48257d">
                          <SHORT-NAME>HaltESCIC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCIC] bit.
                                                        Halt eSCI C. Dispatch a halt request to the Enhanced Serial Communication Interface C. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5e5fd616-9e75-4ed3-a9b1-1051dbf52e35">
                          <SHORT-NAME>HaltESCIB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCIB] bit.
                                                        Halt eSCI B. Dispatch a halt request to the Enhanced Serial Communication Interface B. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:ed89ed98-e693-4044-a281-be080c7c84fe">
                          <SHORT-NAME>HaltESCIA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT1[ESCIA] bit.
                                                        Halt eSCI A. Dispatch a halt request to the Enhanced Serial Communication Interface A. The module will
                                                        hold the request until all internal activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:6b4b388c-3c18-4317-88d3-747923e962d3">
                      <SHORT-NAME>Halt2Register</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                  
                                                    
                                                      This container contains the SPECIFIC configuration (parameters) of the SIU_HLT2 Register Configuration.
                                                      Note: Implementation specific Container.
                                                    
                                                  </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:9e2354f5-9768-4791-a412-ad06e92a6ec2">
                          <SHORT-NAME>HaltFEC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[FEC] bit.
                                                        Halt FEC. Halt the clock inputs of the Fast Ethernet Controller. The clocks are halted immediatly after this
                                                        bit is set, therefore software must guarantee that the FEC module can be stopped prior to asserting the
                                                        halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5caa2658-f7cf-47cb-8209-449db3f30373">
                          <SHORT-NAME>HaltSDD</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SDD] bit.
                                                        Halt Sigma Delta D. Dispatch a halt request to Sigma Delta D. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted (digital and analog).
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:d49c3c18-841f-429d-8962-47e5664111ba">
                          <SHORT-NAME>HaltSDC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SDC] bit.
                                                        Halt Sigma Delta C. Dispatch a halt request to Sigma Delta C. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted (digital and analog).
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:489be870-1ca3-4152-b885-5d037cf13939">
                          <SHORT-NAME>HaltSDB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SDB] bit.
                                                        Halt Sigma Delta B. Dispatch a halt request to Sigma Delta B. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted (digital and analog).
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:bee53659-be25-42a4-bf2b-10a39aaaab92">
                          <SHORT-NAME>HaltSDA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SDA] bit.
                                                        Halt Sigma Delta A. Dispatch a halt request to Sigma Delta A. The module will hold the request until all
                                                        internal activities are concluded, then it will allow its clock inputs to be halted (digital and analog).
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1c3e5eda-afa9-478d-ba6f-b3aed3c1822d">
                          <SHORT-NAME>HaltSIPI</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SIPI] bit.
                                                        Halt SIPI / LFAST. Halt the clocks to the SIPI and LFAST modules. The clocks are halted immediatly after
                                                        this bit is set, therefore software must guarantee that the SIPI and LFAST modules can be stopped prior to
                                                        asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:ee779ebb-ba1b-4e34-9ab2-8a1252e52995">
                          <SHORT-NAME>HaltCRC</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[CRC] bit.
                                                        Halt CRC. Halt the clocks to the CRC. The clocks are halted immediatly after this bit is set, therefore
                                                        software must guarantee that the CRC can be stopped prior to asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:5fbafb95-13ad-4eb1-89b1-80487e444dda">
                          <SHORT-NAME>HaltSTCU</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[STCU] bit.
                                                        Halt STCU. Halt the clocks to the STCU. The clocks are halted immediatly after this bit is set, therefore
                                                        software must guarantee that the STCU can be stopped prior to asserting the halt request.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1460c4c0-ec79-41dc-a9d8-50b9335b6a59">
                          <SHORT-NAME>HaltSRX1</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SRX1] bit.
                                                        Halt SENT 1. Dispatch a halt request to the SENT 1. The module will hold the request until all internal
                                                        activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:749b7583-925d-46de-81ab-0d99032b93f1">
                          <SHORT-NAME>HaltSRX0</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[SRX0] bit.
                                                        Halt SENT 0. Dispatch a halt request to the SENT 0. The module will hold the request until all internal
                                                        activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:4ebea574-81e9-4fbe-84dc-a576e8ee9051">
                          <SHORT-NAME>HaltPSI5B</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[PSI5B] bit.
                                                        Halt PSI5 B. Dispatch a halt request to PSI5 B. The module will hold the request until all internal activities
                                                        are concluded, then they will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f5cfc801-f1e6-4bfa-aa94-6a78c55e0b4b">
                          <SHORT-NAME>HaltPSI5A</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[PSI5A] bit.
                                                        Halt PSI5 A. Dispatch a halt request to PSI5 A. The module will hold the request until all internal activities
                                                        are concluded, then they will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:b34833d8-0120-4a08-bf35-e7a3eaaff3cd">
                          <SHORT-NAME>HaltMCANB</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[MCANB] bit.
                                                        Halt MCAN B. Dispatch a halt request to MCAN B. The module will hold the request until all internal
                                                        activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:91fbcc00-3bda-4c8f-82a2-22027e083f39">
                          <SHORT-NAME>HaltMCANA</SHORT-NAME>
                          <DESC>
                            <L-2 L="FOR-ALL">Configures SIU_HLT2[MCANA] bit.
                                                        Halt MCAN A. Dispatch a halt request to MCAN A. The module will hold the request until all internal
                                                        activities are concluded, then it will allow its clock inputs to be halted.
                                                            0 No halt request.
                                                            1 Dispatch halt request.
                                                        Note: Implementation Specific Parameter.</L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                  </SUB-CONTAINERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:2ec4ce5f-1c38-47ec-b1c6-9d01a6589e0d">
                  <SHORT-NAME>McuRamSectorSettingConf</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                    This container contains the configuration for the RAM Sector setting.
                                                </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>0</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY-INFINITE>1</UPPER-MULTIPLICITY-INFINITE>
                  <MULTIPLICITY-CONFIG-CLASSES>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                    <ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                      <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                      <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                    </ECUC-MULTIPLICITY-CONFIGURATION-CLASS>
                  </MULTIPLICITY-CONFIG-CLASSES>
                  <POST-BUILD-VARIANT-MULTIPLICITY>false</POST-BUILD-VARIANT-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:2e5b0f55-dce2-46d3-ac26-2b8fd1fd7772">
                      <SHORT-NAME>McuRamSectorId</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter shall represent the ID of the MCU RAM Sector configuration.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>true</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>0</DEFAULT-VALUE>
                      <MAX>4294967295</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:9d2319c7-8658-4e05-af6e-db52438353dc">
                      <SHORT-NAME>McuRamDefaultValue</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter shall represent the Data pre-setting to be initialized.
                                                        Default value is 0xbabababa.
                                                        Note: Implementation Specific Parameter.
                                                        </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>0</DEFAULT-VALUE>
                      <MAX>255</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:4ed60578-049f-4504-a189-0121d770c42a">
                      <SHORT-NAME>McuRamSectionBaseAddress</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter represents the RAM section base address.
                                                        The address must be aligned to 4 bytes.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>1073741824</DEFAULT-VALUE>
                      <MAX>1074266111</MAX>
                      <MIN>1073741824</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b8e5c869-b036-4015-a0c4-d38886825a25">
                      <SHORT-NAME>McuRamSectionSize</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter represents the RAM section size in bytes.
                                                        The size must be multiple of 4.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>1024</DEFAULT-VALUE>
                      <MAX>524288</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b8e5c869-b036-4015-ac04-38d86885a225">
                      <SHORT-NAME>McuRamSectionWriteSize</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter shall define the size in bytes of data which can be written into RAM at once.
                                                        The ram write size is currently restricted to {1, 2, 4, 8} bytes.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>AUTOSAR_ECUC</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>8</DEFAULT-VALUE>
                      <MAX>4294967295</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                    <ECUC-STRING-PARAM-DEF UUID="ECUC:5179e367-2481-4677-b488-15f5be2dc797">
                      <SHORT-NAME>McuRamSectionBaseAddrLinkerSym</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter represents the RAM section base address.
                                                        The address must be aligned to 4 bytes.
                                                        If this parameter is empty, then the integer values from &quot;McuRamSectionBaseAddress&quot; will be used.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <ECUC-STRING-PARAM-DEF-VARIANTS>
                        <ECUC-STRING-PARAM-DEF-CONDITIONAL>
                          <DEFAULT-VALUE>
                          </DEFAULT-VALUE>
                        </ECUC-STRING-PARAM-DEF-CONDITIONAL>
                      </ECUC-STRING-PARAM-DEF-VARIANTS>
                    </ECUC-STRING-PARAM-DEF>
                    <ECUC-STRING-PARAM-DEF UUID="ECUC:2abc7efe-8cea-407a-a89a-fe033dc7c3a8">
                      <SHORT-NAME>McuRamSectionSizeLinkerSym</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                        This parameter represents the RAM section size in bytes.
                                                        The size must be multiple of 4.
                                                        If this parameter is empty, then the integer values from &quot;McuRamSectionSize&quot; will be used.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <ECUC-STRING-PARAM-DEF-VARIANTS>
                        <ECUC-STRING-PARAM-DEF-CONDITIONAL>
                          <DEFAULT-VALUE>
                          </DEFAULT-VALUE>
                        </ECUC-STRING-PARAM-DEF-CONDITIONAL>
                      </ECUC-STRING-PARAM-DEF-VARIANTS>
                    </ECUC-STRING-PARAM-DEF>
                  </PARAMETERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:8d3400b2-2252-45d7-a447-1c30a4c54b77">
                  <SHORT-NAME>McuSSCMConfiguration</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Configuration of SSCM peripheral.
                                                Note: Implementation specific Container.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:4723c46d-da7e-4b2b-94d9-a65a478b1ebd">
                      <SHORT-NAME>McuSscmPae</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    SSCM_ERROR[PAE] value. 
                                                    Peripheral Bus Abort Enable. This bit enables bus aborts on any access to a peripheral slot that is not
                                                    used on the device. This feature is intended to aid in debugging when developing application code.
                                                    
                                                    0 Illegal accesses to non-existing peripherals do not produce a Prefetch or Data Abort exception 
                                                    1 Illegal accesses to non-existing peripherals produce a Prefetch or Data Abort exception
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>true</DEFAULT-VALUE>
                    </ECUC-BOOLEAN-PARAM-DEF>
                  </PARAMETERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:ccd65f4b-996e-4e43-8d2b-1f8465525859">
                  <SHORT-NAME>McuInterruptEvents</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                Configuration for different interrupts handled by MCU.
                                                Note: Implementation specific Container.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:e9ce6bca-50aa-482b-93be-2d3a6723ba93">
                      <SHORT-NAME>McuVoltageErrorEvent</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Power Management Unit Fault Monitoring Interrupts.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>false</DEFAULT-VALUE>
                    </ECUC-BOOLEAN-PARAM-DEF>
                    <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c6fa3e61-8728-411b-9be5-c90b0b987f91">
                      <SHORT-NAME>McuTemperatureErrorEvent</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Temperature Management Unit Fault Monitoring Interrupts.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>false</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>false</DEFAULT-VALUE>
                    </ECUC-BOOLEAN-PARAM-DEF>
                  </PARAMETERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:64678396-91b0-4542-8bd3-7472916493fd">
                  <SHORT-NAME>McuPlatformFlashConfig</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                This container contains the specific configuration (parameters) of the flash memory array.
                                                Note: Implementation Specific Container.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SUB-CONTAINERS>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:ee91c24d-9464-48df-8f44-c5d69486a14b">
                      <SHORT-NAME>McuPFCR1</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    This container contains the specific configuration (parameters) of PFCR1.
                                                    Note: Implementation Specific Container.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2b6da2bd-431a-4ca1-88b3-be12654d0dbd">
                          <SHORT-NAME>McuPort0Master15Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1fbe93ff-172d-43a7-a740-05229fc7a490">
                          <SHORT-NAME>McuPort0Master14Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:bbc03240-9879-4b75-a8b1-3eac27d95bd1">
                          <SHORT-NAME>McuPort0Master13Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:9f72e44d-c74a-4ba3-b24e-e36bad1ef924">
                          <SHORT-NAME>McuPort0Master12Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:7e6664a8-e390-4b77-9288-c31c96f663f2">
                          <SHORT-NAME>McuPort0Master11Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:7c74befd-72c1-4b24-8303-12847b332fbb">
                          <SHORT-NAME>McuPort0Master10Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:47866989-a062-4dd0-a7fd-9c5c9c487a1d">
                          <SHORT-NAME>McuPort0Master9Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:986bd78e-b72e-47a6-a60e-e6ecf4a382f6">
                          <SHORT-NAME>McuPort0Master8Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:95f24dd1-2923-4935-a1a8-68b38f67229e">
                          <SHORT-NAME>McuPort0Master7Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c1cc8eb8-660a-4d8f-81b4-49db86f0375c">
                          <SHORT-NAME>McuPort0Master6Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:76241d7d-204d-4b61-9fd3-eda14f9fd749">
                          <SHORT-NAME>McuPort0Master5Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:86ef75e7-fac3-4491-8f81-3b32fe9fce27">
                          <SHORT-NAME>McuPort0Master4Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:4cd94c41-152d-47f5-bd80-02af93f15418">
                          <SHORT-NAME>McuPort0Master3Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:58c69bc9-fe59-4bb5-9a04-d3e42b9218ec">
                          <SHORT-NAME>McuPort0Master2Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:66ab4c81-808b-4755-a7e9-a09011af99f2">
                          <SHORT-NAME>McuPort0Master1Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1dc7eef4-2919-40be-9d3d-b2f6f1b63124">
                          <SHORT-NAME>McuPort0Master0Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:927727a7-a8fa-4d3b-b4da-95d933cb1b44">
                          <SHORT-NAME>McuPort0DataPrefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_DPFEN] field register configuration.
                                                        This field enables or disables prefetching initiated by a data read access.
                                                        This field is cleared by hardware reset.
                                                        0 - No prefetching is triggered by a data read access.
                                                        1 - Prefetching may be triggered by any data read access.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:6a02b31d-e720-44bc-80ee-cd1e96eef63c">
                          <SHORT-NAME>McuPort0InstructionPrefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_IPFEN] field register configuration.
                                                        This bit enables or disables prefetching initiated by an instruction read access.
                                                        This field is cleared by hardware reset.
                                                        0 - No prefetching is triggered by an instruction read access.
                                                        1 - Prefetching may be triggered by any instruction read access.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:b19e1903-854b-404e-8851-86aff6fd6e0f">
                          <SHORT-NAME>McuPort0PrefetchLimit</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_PFLIM] field register configuration.
                                                        This field controls the prefetch algorithm used by the prefetch controller.
                                                        This field defines a limit on the maximum number of sequential prefetches which will be attempted between buffer misses.
                                                        In all situations when enabled, only a single prefetch is initiated on each buffer miss or hit.
                                                        00 No prefetching is performed.
                                                        01 The referenced line is prefetched on a buffer miss, that is, prefetch on miss.
                                                        1- The referenced line is prefetched on a buffer miss, or the next sequential page is prefetched on a buffer hit (if not already present), that is, prefetch on miss or hit.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:9bd76956-ce0b-4c04-9c39-23e51bb405c3">
                          <SHORT-NAME>McuPort0ReadBufferEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR1[P0_BFEN] field register configuration.
                                                        This bit enables or disables line read buffer hits.
                                                        It is also used to invalidate the buffers.
                                                        0 - The line read buffers are disabled from satisfying read requests, and all buffer valid bits are cleared.
                                                        1 - The line read buffers are enabled to satisfy read requests on hits. Buffer valid bits may be set when the buffers are successfully filled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:23766020-b2d5-44a7-93f9-27dc826b517d">
                      <SHORT-NAME>McuPFCR2</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    This container contains the specific configuration (parameters) of PFCR2.
                                                    Note: Implementation Specific Container.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:651763a2-4d53-4291-9724-c143a7325775">
                          <SHORT-NAME>McuPort1Master15Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:cc1e7efb-08dd-4f4c-8e1d-b6579b0773f1">
                          <SHORT-NAME>McuPort1Master14Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:796a6e99-ca5b-4506-8e38-50ea10f84105">
                          <SHORT-NAME>McuPort1Master13Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:ff27e349-8b7e-4078-979b-ee7120f6295f">
                          <SHORT-NAME>McuPort1Master12Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c29af317-197d-48ab-9aa9-bd979f5638a5">
                          <SHORT-NAME>McuPort1Master11Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:201b8779-5d1a-4fd9-abe5-a9a2b1220fd4">
                          <SHORT-NAME>McuPort1Master10Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:16290ab5-3351-4cea-a393-26eb74c6a3c5">
                          <SHORT-NAME>McuPort1Master9Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:74821ab2-5d62-4f59-b8b5-e44e6c0e6300">
                          <SHORT-NAME>McuPort1Master8Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:0b512f93-b439-4bad-938e-625635ff989e">
                          <SHORT-NAME>McuPort1Master7Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:1189182a-6092-420f-8b21-195f486843c3">
                          <SHORT-NAME>McuPort1Master6Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:eec208a5-7282-44c1-a9ba-6718436972fc">
                          <SHORT-NAME>McuPort1Master5Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:40eda223-fbd5-4d45-8e2c-140574e55912">
                          <SHORT-NAME>McuPort1Master4Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:812579ef-89bb-4521-9e7b-58a0e4af45f6">
                          <SHORT-NAME>McuPort1Master3Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:90163b9b-f893-44e0-af18-0a9f911142d7">
                          <SHORT-NAME>McuPort1Master2Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:35b629d7-31a7-4e05-bf21-823dc4239500">
                          <SHORT-NAME>McuPort1Master1Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:413ee7fc-6ab8-4763-974b-b4c0acaa724b">
                          <SHORT-NAME>McuPort1Master0Prefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_MxPFE] field register configuration.
                                                        Master x Prefetch Enable.
                                                        0 - No prefetching may be triggered by this master.
                                                        1 - Prefetching may be triggered by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:b3ac75f1-0218-4779-9ae9-b16446fc6189">
                          <SHORT-NAME>McuPort1DataPrefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_DPFEN] field register configuration.
                                                        This field enables or disables prefetching initiated by a data read access.
                                                        This field is cleared by hardware reset.
                                                        0 - No prefetching is triggered by a data read access.
                                                        1 - Prefetching may be triggered by any data read access.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2e8f28e0-fe47-4f58-8f01-f588d5b89343">
                          <SHORT-NAME>McuPort1InstructionPrefetch</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_IPFEN] field register configuration.
                                                        This bit enables or disables prefetching initiated by an instruction read access.
                                                        This field is cleared by hardware reset.
                                                        0 - No prefetching is triggered by an instruction read access.
                                                        1 - Prefetching may be triggered by any instruction read access.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:50901c39-8b6f-4243-ad2e-cc81f4ae4f19">
                          <SHORT-NAME>McuPort1PrefetchLimit</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_PFLIM] field register configuration.
                                                        This field controls the prefetch algorithm used by the prefetch controller.
                                                        This field defines a limit on the maximum number of sequential prefetches which will be attempted between buffer misses.
                                                        In all situations when enabled, only a single prefetch is initiated on each buffer miss or hit.
                                                        00 No prefetching is performed.
                                                        01 The referenced line is prefetched on a buffer miss, that is, prefetch on miss.
                                                        1- The referenced line is prefetched on a buffer miss, or the next sequential page is prefetched on a buffer hit (if not already present), that is, prefetch on miss or hit.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:24b40181-c0b1-405b-b6cb-65db6be5941e">
                          <SHORT-NAME>McuPort1ReadBufferEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR2[P1_BFEN] field register configuration.
                                                        This bit enables or disables line read buffer hits.
                                                        It is also used to invalidate the buffers.
                                                        0 - The line read buffers are disabled from satisfying read requests, and all buffer valid bits are cleared.
                                                        1 - The line read buffers are enabled to satisfy read requests on hits. Buffer valid bits may be set when the buffers are successfully filled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c80f7bc0-f718-4e8c-9737-59fe43841fe7">
                      <SHORT-NAME>McuPFCR3</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    This container contains the specific configuration (parameters) of PFCR3.
                                                    Note: Implementation Specific Container.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:92a8c4e6-efa4-44d7-91ec-37060916556f">
                          <SHORT-NAME>McuPort0PageBufferConfiguration</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR3[P0_WCFG] field register configuration.
                                                        This field controls the configuration of the four page buffers in the PFLASH controller.
                                                        The buffers can be organized as a &quot;pool&quot; of available resources, or with a fixed partition between instruction and data buffers.
                                                        00 - Both buffers in an indexed set are available for any flash access, that is, there is no
                                                             partitioning of the buffers based on the access type.
                                                        01 - Reserved
                                                        10 - The buffers in an indexed set are partitioned into two groups with way 0 allocated for
                                                             instruction fetches and way 1 for data accesses.
                                                        11 - Reserved.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:71bd73a8-46b6-402d-971b-1a6f4c41bc67">
                          <SHORT-NAME>McuPort1LineBufferConfiguration</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR3[P1_WCFG] field register configuration.
                                                        This field controls the configuration of the line buffers for a given set across two ways in the controller cache.
                                                        00 - Both buffers are available for any flash access, that is, there is no partitioning of the
                                                             buffers based on the access type.
                                                        01 - Reserved
                                                        10 - The buffers are partitioned into two groups with buffer 0 allocated for instruction fetches
                                                             and buffer 1 for data accesses.
                                                        11 - Reserved
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c8bd25cc-1ceb-21c2-bf21-3ca9e560059f">
                          <SHORT-NAME>McuBFENLock</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR3[BFEN_LK] field register configuration.
                                                        This field controls access to the PFCRm[Pn_BFEN] fields, which enable or disable line read buffer hits and are also used to invalidate the buffers. 
                                                        0 (unchecked) - PFCRm[Pn_BFEN] fields are R/W. 
                                                        1 (checked) - PFCRm[Pn_BFEN] fields are Read-only. 
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:29092f38-2b77-4585-9e29-bfd8f5072cf2">
                          <SHORT-NAME>McuArbitrationMode</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR3[ARBM] field register configuration.
                                                        This 2-bit field controls the arbitration of concurrent flash access requests from the two AHB ports
                                                        of the flash memory controller. In both fixed priority or round-robin modes.
                                                        This field is initialized by hardware reset.
                                                        00 - Fixed priority arbitration with AHB p0&gt;p1.
                                                        01 - Fixed priority arbitration with AHB p1&gt;p0.
                                                        1- - Round-robin arbitration.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>0</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:21f5e1cc-631a-44f4-98b5-133a0ab807c6">
                          <SHORT-NAME>McuDataErrorSuppression</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFCR3[DERR_SUP] field register configuration.
                                                        Refer to the Embedded Flash Memory configuration information for which Flash blocks are affected by this field.
                                                        This field is cleared by hardware reset.
                                                        0 - ECC events on data flash accesses are reported.
                                                        1 - ECC events on data flash accesses are suppressed.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:25063548-09c9-41ac-96dd-aa624d1457d2">
                      <SHORT-NAME>McuPFAPR</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    This container contains the specific configuration (parameters) of PFAPR.
                                                    Note: Implementation Specific Container.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:5858323e-c41c-46f5-9743-fb87342452b1">
                          <SHORT-NAME>McuMaster0AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:319f18dc-39c4-4459-b4f1-02134e3e3b59">
                          <SHORT-NAME>McuMaster1AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:d5086e33-5f21-40c3-9355-37ab40d6dfb4">
                          <SHORT-NAME>McuMaster2AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:5315e38b-d699-4abc-8cc4-7d2ec8016c72">
                          <SHORT-NAME>McuMaster3AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:740b2feb-6e33-446b-8230-619063930d99">
                          <SHORT-NAME>McuMaster4AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:382dd578-93fb-4b75-8359-1e6292efd250">
                          <SHORT-NAME>McuMaster5AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:09e47e74-345b-428a-b67c-0bebf1893091">
                          <SHORT-NAME>McuMaster6AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:7c423c40-a955-4828-9c16-f440b649a573">
                          <SHORT-NAME>McuMaster7AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:aaf4583f-a2f1-4379-9e58-4d9cb7e679e6">
                          <SHORT-NAME>McuMaster8AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:777636b4-8008-450a-a89e-31f31b655ac0">
                          <SHORT-NAME>McuMaster9AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:e7563954-8137-490d-a305-a403d7418a40">
                          <SHORT-NAME>McuMaster10AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:e4b95844-f374-450d-ba2a-2017ea07cf30">
                          <SHORT-NAME>McuMaster11AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:9a5df3d2-c00d-4fe8-89af-627b6ec8fdb7">
                          <SHORT-NAME>McuMaster12AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:9545c6bd-27e3-4136-84d1-5dca91a5917b">
                          <SHORT-NAME>McuMaster13AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:8913c124-5605-4197-9e67-bedfe3e2a8a5">
                          <SHORT-NAME>McuMaster14AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                        <ECUC-INTEGER-PARAM-DEF UUID="ECUC:94ff245e-9fb9-4682-ab6b-c5e812da81b0">
                          <SHORT-NAME>McuMaster15AccessProt</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PFAPR[MxAP] field register configuration.
                                                        Master x Access Protection.
                                                        This field controls whether read and write accesses to the flash are allowed based on the master number of the initiating module.
                                                        00 - No accesses may be performed by this master.
                                                        01 - Only read accesses may be performed by this master.
                                                        10 - Only write accesses may be performed by this master.
                                                        11 - Both read and write accesses may be performed by this master.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>3</DEFAULT-VALUE>
                          <MAX>3</MAX>
                          <MIN>0</MIN>
                        </ECUC-INTEGER-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                  </SUB-CONTAINERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:28115898-f56e-45f7-98d8-02bb15ee7e03">
                  <SHORT-NAME>McuResetConfig</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">
                                                The reset generation module (MC_RGM) centralizes the different reset sources and manages the reset sequence of the device.
                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <PARAMETERS>
                    <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:890c833d-0461-4542-ac9b-4303c6fcbe6b">
                      <SHORT-NAME>McuResetSource</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Writes the SIU_SRCR register. Select reset soure.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>SoftwareSystemReset</DEFAULT-VALUE>
                      <LITERALS>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>SoftwareSystemReset</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                        <ECUC-ENUMERATION-LITERAL-DEF>
                          <SHORT-NAME>SoftwareExternalReset</SHORT-NAME>
                          <ORIGIN>NXP</ORIGIN>
                        </ECUC-ENUMERATION-LITERAL-DEF>
                      </LITERALS>
                    </ECUC-ENUMERATION-PARAM-DEF>
                    <ECUC-INTEGER-PARAM-DEF UUID="ECUC:f01d119c-47e5-4db5-9236-0e4fa3c7f01c">
                      <SHORT-NAME>McuResetEscalationThreshold</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    SIU_RCR[RET] field register configuration.
                                                    Reset Escalation Threshold. Specifies the number of reset cycles (not caused by POR) that the device
                                                    can execute before being held permanently in reset state waiting for a POR. A value of zero in this field
                                                    disables the reset escalation feature. Any CPU write to the RET field re-initiates the escalation counting
                                                    process.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <SCOPE>LOCAL</SCOPE>
                      <ORIGIN>NXP</ORIGIN>
                      <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                      <VALUE-CONFIG-CLASSES>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                        <ECUC-VALUE-CONFIGURATION-CLASS>
                          <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                          <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                        </ECUC-VALUE-CONFIGURATION-CLASS>
                      </VALUE-CONFIG-CLASSES>
                      <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                      <DEFAULT-VALUE>8</DEFAULT-VALUE>
                      <MAX>15</MAX>
                      <MIN>0</MIN>
                    </ECUC-INTEGER-PARAM-DEF>
                  </PARAMETERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
                <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:96aa5819-ac80-4bbe-b43b-7d3ebe2807ef">
                  <SHORT-NAME>McuPowerControl</SHORT-NAME>
                  <DESC>
                    <L-2 L="EN">

                                                Note: Implementation Specific Parameter.
                                            </L-2>
                  </DESC>
                  <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                  <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                  <SUB-CONTAINERS>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:9911bbb7-4307-45cf-a956-258a9986b98f">
                      <SHORT-NAME>McuPMC_TempDetectorConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_CTL_TD register. 
                                                    Temperature detector configuration register controls the enable/disable control of Temperature sensor 
                                                    Analog / Digital output enables and configuration of Trims.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:79e0cb22-edfd-47b3-80e0-5110a625c884">
                          <SHORT-NAME>McuTS1_EN</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_CTL_TD[TS1_EN] field register value.
                                                        Temperature Sensor 1 Enable.
                                                        0 - Disable Temperature Sensor 1 module.
                                                        1 - Enable Temperature Sensor 1 module.
                                                        NOTE: If this bit is 0, all reset and interrupt events from Temperature Sensor 1 are disabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:95e7923c-f1df-42fb-8d46-3b4d3656c071">
                          <SHORT-NAME>McuTS0_EN</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_CTL_TD[TS0_EN] field register value.
                                                        Temperature Sensor 0 Enable.
                                                        0 - Disable Temperature Sensor 0 module.
                                                        1 - Enable Temperature Sensor 0 module.
                                                        NOTE: If this bit is 0, all reset and interrupt events from Temperature Sensor 0 are disabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:7b7c8574-1a8c-4d0f-854d-a8efcce54393">
                      <SHORT-NAME>McuPMC_IntConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_TS_IER register. 
                                                    This configuration register contains a set of Interrupt Enable bits that correspond to each
                                                    of the Event Status Registers (ESR_TD).
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a22a2917-02d2-48da-a3d5-fac0a79db92f">
                          <SHORT-NAME>McuTS1_2IE</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_IER[TS1_2IE] field register value.
                                                        Temperature Sensor 1 input 2 Interrupt Enable.
                                                        This bit determines whether an interrupt is seen by the system when the temperature rises above its corresponding threshold (flag 2).
                                                        u - No interrupt occurs.
                                                        1 - An interrupt occurs.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:fa478279-3669-4c9c-8b08-54f7b7660789">
                          <SHORT-NAME>McuTS1_0IE</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_IER[TS1_0IE] field register value.
                                                        Temperature Sensor 1 input 0 Interrupt Enable.
                                                        This bit determines whether an interrupt is seen by the system when the temperature falls below its corresponding threshold.
                                                        0 - No interrupt occurs.
                                                        1 - An interrupt occurs.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:f1a74da7-373f-430e-a936-0381d3a9d642">
                          <SHORT-NAME>McuTS0_2IE</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_IER[TS0_2IE] field register value.
                                                        Temperature Sensor 0 input 2 Interrupt Enable.
                                                        This bit determines whether an interrupt is seen by the system when the temperature rises above its corresponding threshold (flag 2). 
                                                        0 - No interrupt occurs.
                                                        1 - An interrupt occurs.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:bf22b0a6-d9a5-4130-aa3d-d1b822bad924">
                          <SHORT-NAME>McuTS0_0IE</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_IER[TS0_0IE] field register value.
                                                        Temperature Sensor 0 input 0 Interrupt Enable.
                                                        This bit determines whether an interrupt is seen by the system when the temperature falls below its corresponding threshold. 
                                                        0 - No interrupt occurs.
                                                        1 - An interrupt occurs.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:a3e06256-5b34-49b6-a587-65c821db0603">
                      <SHORT-NAME>McuPMC_TempResetEventEnConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_REE_TD register. 
                                                    This Reset Event Enable Register controls whether the temperature detect signal event causes a reset.
                                                    These bits can be loaded from a DCF record in the UTEST portion of the flash memory. 
                                                    When they are loaded from a DCF record, they cannot be changed by a register write.
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:cec73d3d-0598-41b9-90cb-8bad583be17b">
                          <SHORT-NAME>McuTEMP1_2E</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE_TD[TEMP1_2] field register value.
                                                        This bit defines whether a temperature detect assertion can generate a system reset. 
                                                        When this bit is 1, the RES_TD[TEMP1_2] bit determines whether the assertion causes a POR. 
                                                        Temperature sensor 1 detect assertion reset enable 2.
                                                        0 - Disabled. Temperature Sensor detect does not cause system reset.
                                                        1 - Enabled. Temperature Sensor detect causes system reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:637cf7c5-efeb-476e-9a3a-976170538b74">
                          <SHORT-NAME>McuTEMP1_0E</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE_TD[TEMP1_0] field register value.
                                                        This bit defines whether a temperature detect assertion can generate a system reset. 
                                                        When this bit is 1, the RES_TD[TEMP1_0] bit determines whether the assertion causes a POR. 
                                                        Temperature sensor 1 detect assertion reset enable 0.
                                                        0 - Disabled. Temperature Sensor detect does not cause system reset.
                                                        1 - Enabled. Temperature Sensor detect causes system reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:0328221a-7ecb-412d-ae59-e97cf2a2ddfe">
                          <SHORT-NAME>McuTEMP0_2E</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE_TD[TEMP0_2] field register value.
                                                        This bit defines whether a temperature detect assertion can generate a system reset. 
                                                        When this bit is 1, the RES_TD[TEMP0_2] bit determines whether the assertion causes a POR. 
                                                        Temperature sensor 0 detect assertion reset enable 2.
                                                        0 - Disabled. Temperature Sensor detect does not cause system reset.
                                                        1 - Enabled. Temperature Sensor detect causes system reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:06aa68f8-b3ac-4022-b0de-4cbf22a08e7f">
                          <SHORT-NAME>McuTEMP0_0E</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE_TD[TEMP0_0] field register value.
                                                        This bit defines whether a temperature detect assertion can generate a system reset. 
                                                        When this bit is 1, the RES_TD[TEMP0_0] bit determines whether the assertion causes a POR. 
                                                        Temperature sensor 0 detect assertion reset enable 0.
                                                        0 - Disabled. Temperature Sensor detect does not cause system reset.
                                                        1 - Enabled. Temperature Sensor detect causes system reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>true</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c140832d-4eec-41fb-a5b6-bfbbbe536f14">
                      <SHORT-NAME>McuPMC_TempResetEventSelConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_RES_TD register. 
                                                    This register controls whether the temperature sensor detect signal event causes a POR or no reset. 
                                                    If the desired flag bit is enabled, the temperature sensor event causes either a POR or no reset 
                                                    to be generated when the selected temperature passes the trigger event. 
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:965aa074-ea18-413a-b8ad-a7e17655d948">
                          <SHORT-NAME>McuTEMP1_2S</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_RES_TD[TEMP1_2] field register value.
                                                        TEMP1_2 Reset Event Select.
                                                        0  - POR generated. Temperature Sensor assertion causes a POR.
                                                        1  - No reset generated. Temperature Sensor assertion does not cause a reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>POR_GENERATED</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NO_RESET_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:c796c02b-4cbe-495b-8f29-3da4ddca77ab">
                          <SHORT-NAME>McuTEMP1_0S</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_RES_TD[TEMP1_0] field register value.
                                                        TEMP1_0 Reset Event Select.
                                                        0 - POR generated. Temperature Sensor assertion causes a POR.
                                                        1 - No reset generated. Temperature Sensor assertion does not cause a reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>POR_GENERATED</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NO_RESET_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:a6ecd1b8-e17a-4357-89d5-3e0af8c4ec48">
                          <SHORT-NAME>McuTEMP0_2S</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_RES_TD[TEMP0_2] field register value.
                                                        TEMP0_2 Reset Event Select.
                                                        0 - POR generated. Temperature Sensor assertion causes a POR.
                                                        1 - No reset generated. Temperature Sensor assertion does not cause a reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>POR_GENERATED</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NO_RESET_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:2618247f-2e97-42c9-9aa3-1eb8fa58fc67">
                          <SHORT-NAME>McuTEMP0_0S</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_RES_TD[TEMP0_0] field register value.
                                                        TEMP0_0 Reset Event Select.
                                                        0 - POR generated. Temperature Sensor assertion causes a POR.
                                                        1 - No reset generated. Temperature Sensor assertion does not cause a reset.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>POR_GENERATED</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>NO_RESET_GENERATED</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c140832d-4eec-41fb-a5b2-bfbbbe536f12">
                      <SHORT-NAME>McuPMC_ADCChannelSelectConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_ADC_CS register. 
                                                    The only field configured is ADC_CS. 
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-ENUMERATION-PARAM-DEF UUID="ECUC:890c833d-0461-4242-ac1b-4303c6fcbe6b">
                          <SHORT-NAME>McuPMC_ADCChannelSelect</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        Writes the PMC_ADC_CS[AD_CS] field. 
                                                        Analog-to-Digital Converter Channel Select 
                                                        These bits are used to control the analog PMC's test mux going to the ADC. 
                                                        This is to probe the internal node voltages of the PMC for testing, calibration 
                                                        and characterization purposes by one of the ADCs of the SoC. 
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <SYMBOLIC-NAME-VALUE>false</SYMBOLIC-NAME-VALUE>
                          <DEFAULT-VALUE>ADC_CHANNEL_OFF</DEFAULT-VALUE>
                          <LITERALS>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>ADC_CHANNEL_OFF</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR098_SENSE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR098_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_CORE_COLD_SENSE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_CORE_COLD_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_CORE_HOT_SENSE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_CORE_HOT_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_CORE_SENSE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_CORE_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_HV_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>POR_HV_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_HV_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_HV_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_HV_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_HV_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_FLASH_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_FLASH_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_FLASH_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>HVD_FLASH_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_IO_DIVIDER_TAP</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                            <ECUC-ENUMERATION-LITERAL-DEF>
                              <SHORT-NAME>LVD_IO_REFERENCE</SHORT-NAME>
                              <ORIGIN>NXP</ORIGIN>
                            </ECUC-ENUMERATION-LITERAL-DEF>
                          </LITERALS>
                        </ECUC-ENUMERATION-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c140832d-4eec-41fb-a5b6-bfbbbe536f15">
                      <SHORT-NAME>McuPMC_LVD_HVD_InterruptEnableConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_LVD_HVD_INTR_ENB register. 
                                                    This register enables/disables interrupts of PMC VD events. 
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:925aa022-ea18-413a-b8ad-a7e17655d948">
                          <SHORT-NAME>McuPMC_HVD_FLASH_InterruptEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_LVD_HVD_INTR_ENB[HVD_FLASH] field register value.
                                                        This bit enable/disable the generation of Interrupt due to an event on this supply.
                                                        0 - Interrupt is disabled.
                                                        1 - Interrupt is Enabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c796c02b-1cbe-295b-8f22-3da4ddca77ab">
                          <SHORT-NAME>McuPMC_HVD_HV_InterruptEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_LVD_HVD_INTR_ENB[HVD_HV] field register value.
                                                        This bit enable/disable the generation of Interrupt due to an event on this supply.
                                                        0 - Interrupt is disabled.
                                                        1 - Interrupt is Enabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a6ecd1a8-e17a-4557-89d5-3e0af8c4ec48">
                          <SHORT-NAME>McuPMC_HVD_CORE_InterruptEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_LVD_HVD_INTR_ENB[HVD_CORE] field register value.
                                                        This bit enable/disable the generation of Interrupt due to an event on this supply.
                                                        0 - Interrupt is disabled.
                                                        1 - Interrupt is Enabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2618247f-2e97-42c5-9aa3-1eb8fa58fc67">
                          <SHORT-NAME>McuPMC_LVD_CORE_COLD_InterruptEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_LVD_HVD_INTR_ENB[LVD_CORE_COLD] field register value.
                                                        This bit enable/disable the generation of Interrupt due to an event on this supply.
                                                        0 - Interrupt is disabled.
                                                        1 - Interrupt is Enabled.
                                                        Note: Implementation Specific Parameter.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                    <ECUC-PARAM-CONF-CONTAINER-DEF UUID="ECUC:c140832d-4eec-41fb-a5b6-bfbbbe536f16">
                      <SHORT-NAME>McuPMC_ResetEventEnableConfig</SHORT-NAME>
                      <DESC>
                        <L-2 L="EN">
                                                    Configures PMC_REE register. 
                                                    This Reset Event Enable Register controls whether or not the voltage detect signal event causes a reset. 
                                                    If the desired flag bit is enabled, the voltage detect event causes a POR to be generated when the 
                                                    selected voltage passes the trigger event. These bits are loaded from the flash memory during the boot sequence. 
                                                    If the bits loaded from flash memory are programmed to be enabled (set), these bits cannot be disabled (cleared). 
                                                    Note: Implementation Specific Parameter.
                                                </L-2>
                      </DESC>
                      <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                      <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                      <PARAMETERS>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:925aa024-ea18-413a-b8ad-a7e17655d948">
                          <SHORT-NAME>McuPMC_HVD_FLASH_ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE[HVD_FLASH] field register value.
                                                        Reset Enable/Disable Control. This particular bit enable or disable the generation of reset due to an event on this supply.
                                                        0 - Reset is disabled, no reset will be generated even if this event occured.
                                                        1 - Reset is enabled. A reset will be generated if an event is detected on this supply.
                                                        Note: Implementation Specific Parameter. It is forced to false as an errata e9804.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:c796c02b-1cbe-295b-8f29-3da4ddca77ab">
                          <SHORT-NAME>McuPMC_HVD_HV_ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE[HVD_HV] field register value.
                                                        Reset Enable/Disable Control. This particular bit enable or disable the generation of reset due to an event on this supply.
                                                        0 - Reset is disabled, no reset will be generated even if this event occured.
                                                        1 - Reset is enabled. A reset will be generated if an event is detected on this supply.
                                                        Note: Implementation Specific Parameter. It is forced to false as an errata e9804.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:a6ecd1a8-e17a-4357-89d5-3e0af8c4ec48">
                          <SHORT-NAME>McuPMC_HVD_CORE_ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE[HVD_CORE] field register value.
                                                        Reset Enable/Disable Control. This particular bit enable or disable the generation of reset due to an event on this supply.
                                                        0 - Reset is disabled, no reset will be generated even if this event occured.
                                                        1 - Reset is enabled. A reset will be generated if an event is detected on this supply.
                                                        Note: Implementation Specific Parameter. It is forced to false as an errata e9804.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                        <ECUC-BOOLEAN-PARAM-DEF UUID="ECUC:2618247f-2e97-42c9-9aa3-1eb8fa58fc68">
                          <SHORT-NAME>McuPMC_LVD_CORE_COLD_ResetEnable</SHORT-NAME>
                          <DESC>
                            <L-2 L="EN">
                                                        PMC_REE[LVD_CORE_COLD] field register value.
                                                        Reset Enable/Disable Control. This particular bit enable or disable the generation of reset due to an event on this supply.
                                                        0 - Reset is disabled, no reset will be generated even if this event occured.
                                                        1 - Reset is enabled. A reset will be generated if an event is detected on this supply.
                                                        Note: Implementation Specific Parameter. It is forced to false as an errata e9804.
                                                    </L-2>
                          </DESC>
                          <LOWER-MULTIPLICITY>1</LOWER-MULTIPLICITY>
                          <UPPER-MULTIPLICITY>1</UPPER-MULTIPLICITY>
                          <SCOPE>LOCAL</SCOPE>
                          <ORIGIN>NXP</ORIGIN>
                          <POST-BUILD-VARIANT-VALUE>true</POST-BUILD-VARIANT-VALUE>
                          <VALUE-CONFIG-CLASSES>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>PRE-COMPILE</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-PRE-COMPILE</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                            <ECUC-VALUE-CONFIGURATION-CLASS>
                              <CONFIG-CLASS>POST-BUILD</CONFIG-CLASS>
                              <CONFIG-VARIANT>VARIANT-POST-BUILD</CONFIG-VARIANT>
                            </ECUC-VALUE-CONFIGURATION-CLASS>
                          </VALUE-CONFIG-CLASSES>
                          <DEFAULT-VALUE>false</DEFAULT-VALUE>
                        </ECUC-BOOLEAN-PARAM-DEF>
                      </PARAMETERS>
                    </ECUC-PARAM-CONF-CONTAINER-DEF>
                  </SUB-CONTAINERS>
                </ECUC-PARAM-CONF-CONTAINER-DEF>
              </SUB-CONTAINERS>
            </ECUC-PARAM-CONF-CONTAINER-DEF>
          </CONTAINERS>
        </ECUC-MODULE-DEF>
      </ELEMENTS>
    </AR-PACKAGE>
  </AR-PACKAGES>
</AUTOSAR>