/**
*   @file    Mcem_IPW_Types.h
*   @implements     Mcem_IPW_Types.h_Artifact
*
*   @version 1.0.0
*
*   @brief   AUTOSAR Mcem - MCEM IPW Types
*   @details Declarations used in the IP wrapper layer of the MCEM module
*
*   @addtogroup MCEM_MODULE
*   @{
*/
/*==================================================================================================
*   Project              : AUTOSAR 4.3 MCAL
*   Platform             : PA
*   Peripheral           : Fccu
*   Dependencies         : none
*
*   Autosar Version      : 4.3.1
*   Autosar Revision     : ASR_REL_4_3_REV_0001
*   Autosar Conf.Variant :
*   SW Version           : 1.0.0
*   Build Version        : MPC5777C_MCAL_1_0_0_RTM_ASR_REL_4_3_REV_0001_20190315
*
*   (c) Copyright 2006-2016 Freescale Semiconductor, Inc. 
*       Copyright 2017-2019 NXP
*   All Rights Reserved.
==================================================================================================*/
/*==================================================================================================
==================================================================================================*/

#ifndef MCEM_IPW_TYPES_H
#define MCEM_IPW_TYPES_H

#ifdef __cplusplus
extern "C"{
#endif

/**
 * @page misra_violations MISRA-C:2004 violations
 *
 * @section Mcem_IPW_Types_h_REF_1
 * Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.
 * This violation is due to use of range checking macros as functions.
 *
 * @section Mcem_IPW_Types_h_REF_2
 * Violates MISRA 2004 Required Rule 1.4, Allow at least 31 character significance.
 * External identifiers are not distinct in the first 6 characters due to AUTOSAR compatibility
 *
 * @section [global]
 * Violates MISRA 2004 Required Rule 5.1, Exceeds 31 characters due to AUTOSAR compatibility
 */

/*==================================================================================================
*                                        INCLUDE FILES
* 1) system and project includes
* 2) needed interfaces from external units
* 3) internal and external interfaces from this unit
==================================================================================================*/
#include "Mcem_Fccu_Types.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/

#define MCEM_IPW_TYPES_VENDOR_ID                    43
#define MCEM_IPW_TYPES_MODULE_ID                    0
#define MCEM_IPW_TYPES_AR_RELEASE_MAJOR_VERSION     4
#define MCEM_IPW_TYPES_AR_RELEASE_MINOR_VERSION     3
#define MCEM_IPW_TYPES_AR_RELEASE_REVISION_VERSION  1
#define MCEM_IPW_TYPES_SW_MAJOR_VERSION             1
#define MCEM_IPW_TYPES_SW_MINOR_VERSION             0
#define MCEM_IPW_TYPES_SW_PATCH_VERSION             0

/*==================================================================================================
*                                     FILE VERSION CHECKS
==================================================================================================*/
/* Check if current file and Mcem_Fccu_Types.h header file are of the same vendor */
#if (MCEM_IPW_TYPES_VENDOR_ID != FCCU_TYPES_VENDOR_ID)
    #error "Mcem_IPW_Types.h and Mcem_Fccu_Types.h have different Vendor ids"
#endif
/* Check if current file and Mcem_Fccu_Types header file are of the same Autosar version */
#if ((MCEM_IPW_TYPES_AR_RELEASE_MAJOR_VERSION != FCCU_TYPES_AR_RELEASE_MAJOR_VERSION) || \
     (MCEM_IPW_TYPES_AR_RELEASE_MINOR_VERSION != FCCU_TYPES_AR_RELEASE_MINOR_VERSION) || \
     (MCEM_IPW_TYPES_AR_RELEASE_REVISION_VERSION != FCCU_TYPES_AR_RELEASE_REVISION_VERSION))
    #error "AutoSar Version Numbers of Mcem_IPW_Types.h and Mcem_Fccu_Types.h are different"
#endif
/* Check if current file and Mcem_Fccu_Types.h header file are of the same Software version */
#if ((MCEM_IPW_TYPES_SW_MAJOR_VERSION != FCCU_TYPES_SW_MAJOR_VERSION) || \
     (MCEM_IPW_TYPES_SW_MINOR_VERSION != FCCU_TYPES_SW_MINOR_VERSION) || \
     (MCEM_IPW_TYPES_SW_PATCH_VERSION != FCCU_TYPES_SW_PATCH_VERSION))
#error "Software Version Numbers of Mcem_IPW_Types.h and Mcem_Fccu_Types.h are different"
#endif

/*==================================================================================================
*                                          CONSTANTS
==================================================================================================*/


/*==================================================================================================
*                                      DEFINES AND MACROS
==================================================================================================*/
/* FCCU NCF base number (for the list of FCCU faults to be 0-based */
#define FCCU_NCF_BASE                                           0U

/* Total count of FCCU NCFs */
#define FCCU_NCF_TOTAL_NUMBER                                   128U

/* Total count of all errors */
#define MCEM_NCF_TOTAL_NUMBER                                   (FCCU_NCF_TOTAL_NUMBER)



/* FCCU Specific Errors */

/* NCF[0] Event indication from temperature sensor */
#define MCEM_FCCU_TEMP_ERROR                                    0U
/* NCF[1] Voltage out of range indication from LVDs */
#define MCEM_FCCU_LVD_ERROR                                     1U
/* NCF[2] Voltage out of range indication from HVDs */
#define MCEM_FCCU_HVD_ERROR                                     2U
/* NCF[3] Digital PMC initialization error during self test */
#define MCEM_FCCU_DPMC_SELF_TEST                                3U
/* NCF[4] Indication of fault during timing/repair configuration initialization by SSCM of different 
memories. Faults can be caused by parity or triple-redundant errors in loaded configuration data */
#define MCEM_FCCU_MEMORY_DCF_SAFETY_ERR                         4U
/* NCF[5] SSCM transfer or parity error during DCF loading (trimming, STCU, and UTEST Miscellaneous) */
#define MCEM_FCCU_SSCM_XFER_ERR                                 5U
/* NCF[6] STCU unrecoverable error during self-test */
#define MCEM_FCCU_STCU_UF                                       6U
/* NCF[7] STCU recoverable error during self-test */
#define MCEM_FCCU_STCU_RF                                       7U
/* NCF[8] Activation of LBIST or MBIST control during application mode */
#define MCEM_FCCU_STCU_LMBIST_USR_ERR                           8U
/* NCF[9] JTAG, NPC, or Debug functionality moved out of reset or SSCM activation during application mode */
/* @violates @ref Mcem_IPW_Types_h_REF_2 31 character significance */
#define MCEM_FCCU_SPURIOUS_DEBUG_SSCM_ACTIVATION                9U
/* NCF[10] Safety cores out of sync during lockstep */
#define MCEM_FCCU_RCCU_0                                        10U
/* NCF[11] Safety cores out of sync during lockstep */
#define MCEM_FCCU_RCCU_1                                        11U
/* NCF[12] Core 0 Watchdog Timer reset status (TSR[WRS]) and Core 0 Debug Reset Control (DBCR0[RST) */
#define MCEM_FCCU_WDRS_DBRC0                                    12U
/* NCF[13] Core 1 Watchdog Timer reset status (TSR[WRS]) and Core 1 Debug Reset Control (DBCR0[RST]) */
#define MCEM_FCCU_WDRS_DBRC1                                    13U
/* NCF[14] Software Watchdog A reset */
#define MCEM_FCCU_SWTRS0                                        14U
/* NCF[15] Software Watchdog B reset */
#define MCEM_FCCU_SWTRS1                                        15U
/* NCF[16] Software Watchdog A interrupt request*/
#define MCEM_FCCU_SWTINT0                                       16U
/* NCF[17] Flash memory initiation error. This fault is intended for debug purposes only because, 
if such an error occurs, no code will run from flash memory. It is expected that this fault is read 
through development tools */
#define MCEM_FCCU_FLASH_INIT                                    17U
/* NCF[18] SSCM initiation error. DCFs might not have loaded properly */
#define MCEM_FCCU_SSCM_INIT                                     18U
/* NCF[19] Indication of correctable errors in eTPU, M_CAN, and FlexCAN RAM Controllers */
#define MCEM_FCCU_PER_CE                                        19U
/* NCF[20] Indication of uncorrectable errors in eTPU, M_CAN, and FlexCAN RAM Controllers */
#define MCEM_FCCU_PER_UCE                                       20U
/* NCF[21] Indication of correctable errors in flash memory */
#define MCEM_FCCU_FLS_CE                                        21U
/* NCF[22] Indication of uncorrectable errors in flash memory */
#define MCEM_FCCU_FLS_UCE                                       22U
/* NCF[23] PLL0 loss of lock. For this fault source to be asserted, the Loss of Lock Interrupt 
must be enabled by writing 1 to PLLDIG_PLL0CR[LOLIE] */
#define MCEM_FCCU_PLL_0                                         23U
/* NCF[24] PLL1 loss of lock. For this fault source to be asserted, the Loss of Lock Interrupt 
must be enabled by writing 1 to PLLDIG_PLL1CR[LOLIE] */
#define MCEM_FCCU_PLL_1                                         24U
/* NCF[25] Loss of XOSC clock */
#define MCEM_FCCU_CMU_0_OSC                                     25U
/* NCF[26] Exception from monitor CMU_0 (PLL0) */
#define MCEM_FCCU_CMU_0_PLL                                     26U
/* NCF[27] Exception from monitors CMU_1, CMU_2, and CMU_3 */
#define MCEM_FCCU_CMU_COMP                                      27U
/* NCF[28] Exception from monitors CMU_4 to CMU_8 */
#define MCEM_FCCU_CMU_OTHER                                     28U
/* NCF[29] Indication of a hardware fault in the ECC of the flash memory resulting in corrupted 
ECC detection/correction */
#define MCEM_FCCU_EDC_ECC_FLASH                                 29U
/* NCF[30] Indication of hardware fault in the Flash Memory Controller resulting in corrupted 
ECC detection/correction */
#define MCEM_FCCU_EDC_ECC_FLASH_C                               30U
/* NCF[31] Indication of hardware fault resulting in corrupted flash memory access */
#define MCEM_FCCU_ENC_ERR_FLASH                                 31U
/* NCF[32] Indication of an addressing error in the Flash Memory Controller resulting in 
corrupted flash memory access */
#define MCEM_FCCU_ADDR_FDBK_ERR_FLASH_C                         32U
/* NCF[33] Indication by the Crossbar Integrity Checker (XBIC) of a corrupted transaction 
in the crossbar */
/* @violates @ref Mcem_IPW_Types_h_REF_2 31 character significance */
#define MCEM_FCCU_XBAR_TRANSACTION_MONITOR                      33U
/* NCF[34] Indication of an addressing error in system RAM or a write error in the RAM Controller 
resulting in corrupted RAM access */
/* @violates @ref Mcem_IPW_Types_h_REF_2 31 character significance */
#define MCEM_FCCU_ADDR_FDBK_ERR_PRAM_RAM_LWB_ERR                34U
/* NCF[35] An ECC error occurred while SSCM or PASS was fetching data from flash memory */
#define MCEM_FCCU_SSCM_PASS_ECC_ERR                             35U
/* NCF[36] Indication of a fault in the RMW logic of the system RAM resulting in an incorrect RMW 
access and a potentially corrupted RAM word */
#define MCEM_FCCU_EDC_ERR_PRAM                                  36U
/* NCF[37] Test circuitry Group 1 activation */
#define MCEM_FCCU_DFT1                                          37U
/* NCF[38] Test circuitry Group 2 activation */
#define MCEM_FCCU_DFT2                                          38U
/* NCF[39] Test circuitry Group 3 activation */
#define MCEM_FCCU_DFT3                                          39U
/* NCF[40] Test circuitry Group 4 activation */
#define MCEM_FCCU_DFT4                                          40U
/* NCF[41] Safety Core exception indication */
/* @violates @ref Mcem_IPW_Types_h_REF_2 31 character significance */
#define MCEM_FCCU_SAFETY_CORE_MACHINE_CHECK_EXCEPTION           41U
/* NCF[42] Indication of disabled Checker Core or RCCUs */
#define MCEM_FCCU_LOCKSTEP_MODE                                 42U
/* NCF[43] Error input pin (external to the MCU) signaling an error condition */
#define MCEM_FCCU_ERROR_IN_ERR                                  43U
/* NCF[44] - Reserved */
#define MCEM_FCCU_RESERVED_44                                   44U
/* NCF[45] ERM module detected single ECC error */
#define MCEM_FCCU_ERM_CE                                        45U
/* NCF[46] ERM module detected multiple ECC error */
#define MCEM_FCCU_ERM_UCE                                       46U



/* Dedicated value indicating multiple FCCU Errors */
#define MCEM_FCCU_MULTIPLE_FAULTS                            (FCCU_FAULT_MULTIPLE_U8)
/* Compile-time time check */
#if MCEM_NCF_TOTAL_NUMBER >= MCEM_FCCU_MULTIPLE_FAULTS
    #error "Total number of MCEM faults overlaps with MCEM_FCCU_MULTIPLE_FAULTS value from FCCU"
#endif


/* Check whether fault ID is in the proper range */
/* @violates @ref Mcem_IPW_Types_h_REF_1 Function-like macro defined */
#define MCEM_FAULT_IN_FCCU_RANGE(FaultID)   ((FaultID) < (FCCU_NCF_BASE + FCCU_NCF_TOTAL_NUMBER))
/* @violates @ref Mcem_IPW_Types_h_REF_1 Function-like macro defined */
#define MCEM_FAULT_IN_RANGE(FaultID)        (MCEM_FAULT_IN_FCCU_RANGE( (FaultID)))
/* @violates @ref Mcem_IPW_Types_h_REF_1 Function-like macro defined */
#define MCEM_FAULT_IS_VALID(FaultID)        (MCEM_FAULT_IN_RANGE( (FaultID) ) ||                \
                                             (MCEM_FCCU_MULTIPLE_FAULTS == (FaultID))           \
                                            )

/*
* Shift and mask used to access fault container slot 
* 1 word per slot ~ 32bits = 2^5
*/
#define MCEM_FAULT_CONTAINER_SHIFT          5U
#define MCEM_FAULT_CONTAINER_MASK           ((1UL << MCEM_FAULT_CONTAINER_SHIFT)-1UL)

/*==================================================================================================
*                                             ENUMS
==================================================================================================*/


/*==================================================================================================
*                                STRUCTURES AND OTHER TYPEDEFS
==================================================================================================*/
/* An array containing unified faults reported by FCCU */
typedef uint32 Mcem_IPW_FaultContainerType[ FCCU_FAULT_REGISTER_COUNT ];

/*==================================================================================================
*                                GLOBAL VARIABLE DECLARATIONS
==================================================================================================*/


/*==================================================================================================
*                                    FUNCTION PROTOTYPES
==================================================================================================*/


#ifdef __cplusplus
}
#endif

#endif /*MCEM_IPW_TYPES_H*/

/** @} */
