/**
*   @file    Lin_ESCI.c
*   @version 1.0.0
*
*   @brief   AUTOSAR Lin - ESCI.
*   @details File containing the low level driver of the ESCI IP.
*
*   @addtogroup LIN
*   @{
*/
/*==================================================================================================
*   Project              : AUTOSAR 4.3 MCAL
*   Platform             : PA
*   Peripheral           : ESCI
*   Dependencies         : 
*
*   Autosar Version      : 4.3.1
*   Autosar Revision     : ASR_REL_4_3_REV_0001
*   Autosar Conf.Variant :
*   SW Version           : 1.0.0
*   Build Version        : MPC5777C_MCAL_1_0_0_RTM_ASR_REL_4_3_REV_0001_20190315
*
*   (c) Copyright 2006-2016 Freescale Semiconductor, Inc. 
*       Copyright 2017-2019 NXP
*   All Rights Reserved.
==================================================================================================*/
/*=================================================================================================
=================================================================================================*/

#ifdef __cplusplus
extern "C"{
#endif

/**
* @page misra_violations MISRA-C:2012 violations
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.1, External identifiers shall be distinct.
* The used compilers use more than 31 chars for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.2, Identifiers declared in the same scope and name space shall be distinct.
* The used compilers use more than 31 chars for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.4, Macro identifiers shall be distinct.
* The used compilers use more than 31 chars for identifiers.
*
* @section [global]
* Violates MISRA 2012 Required Rule 5.5, Identifiers shall be distinct from macro names.
* The used compilers use more than 31 chars for identifiers.
*
* @section Lin_ESCI_c_REF_1
* Violates MISRA 2012 Advisory Rule 20.1, #include directives should only be preceded by preprocessor directives or comments.
* <MA>_MemMap.h is included after each section define in order to set the current memory section as defined by AUTOSAR.
*
* @section Lin_ESCI_c_REF_2
* Violates MISRA 2012 Required Directive 4.10, Precautions shall be taken in order to prevent the contents of a header
* file being included more than once.
* This violation is not fixed since the inclusion of <MA>_MemMap.h is as per AUTOSAR requirement [SWS_MemMap_00003].
*
* @section Lin_ESCI_c_REF_3
* Violates MISRA 2012 Advisory Rule 11.4, A conversion should not be performed between a pointer to object and an integer type.
* The cast is used to access memory mapped registers.
*
* @section Lin_ESCI_c_REF_4
* Violates MISRA 2012 Required Rule 11.6, A cast shall not be performed between pointer to void and an arithmetic type.
* This macro computes the address of any register by using the hardware offset of the controller.
* The address calculated as an unsigned int is passed to a macro for initializing the pointer with that address.
*
* @section Lin_ESCI_c_REF_5
* Violates MISRA 2012 Required Rule 10.8, The value of a composite expression shall not be cast to a different essential type
* category or a wider essential type Pointer type conversions.
*
* @section Lin_ESCI_c_REF_6
* Violates MISRA 2012 Advisory Rule 8.7, Functions and objects should not be defined with external linkage
* if they are referenced in only one translation unit.
* These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
*
* @section Lin_ESCI_c_REF_7
* Violates MISRA 2012 Required Rule 8.4, A compatible declaration shall be visible when an object or function with 
* external linkages is defined.
*
* @section Lin_ESCI_c_REF_8
* Violates MISRA 2012 Advisory Rule 8.9, An object should be defined at block scope if its identifier only appears in single function.
*/

/*=================================================================================================
                                         INCLUDE FILES
 1) system and project includes
 2) needed interfaces from external units
 3) internal and external interfaces from this unit
=================================================================================================*/
#include "Lin.h"
#include "Lin_ESCI.h"
#include "StdRegMacros.h"
#include "Reg_eSys.h"
#include "Reg_eSys_ESCI.h"
#include "SchM_Lin.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
/**
* @file           Lin_ESCI.c
*/
#define LIN_VENDOR_ID_ESCI_C                    43
#define LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C     4
#define LIN_AR_RELEASE_MINOR_VERSION_ESCI_C     3
#define LIN_AR_RELEASE_REVISION_VERSION_ESCI_C  1
#define LIN_SW_MAJOR_VERSION_ESCI_C             1
#define LIN_SW_MINOR_VERSION_ESCI_C             0
#define LIN_SW_PATCH_VERSION_ESCI_C             0

/*==================================================================================================
*                                      FILE VERSION CHECKS
==================================================================================================*/
/* Check if current file and Lin header file are of the same vendor */
#if (LIN_VENDOR_ID_ESCI_C != LIN_VENDOR_ID)
    #error "Lin_ESCI.c and Lin.h have different vendor ids"
#endif
/* Check if current file and Lin_ESCI header file are of the same vendor */
#if (LIN_VENDOR_ID_ESCI_C != LIN_VENDOR_ID_ESCI)
    #error "Lin_ESCI.c and Lin_ESCI.h have different vendor ids"
#endif
/* Check if current file and Lin_ESCI header file are of the same vendor */
#if (LIN_VENDOR_ID_ESCI_C != LIN_VENDOR_ID_REGESCI)
    #error "Lin_ESCI.c and Reg_eSys_ESCI.h have different vendor ids"
#endif
/* Check if current file and Lin.h header file are of the same Autosar version */
#if ((LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MAJOR_VERSION) || \
     (LIN_AR_RELEASE_MINOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MINOR_VERSION) || \
     (LIN_AR_RELEASE_REVISION_VERSION_ESCI_C != LIN_AR_RELEASE_REVISION_VERSION) \
    )
    #error "AutoSar Version Numbers of Lin_ESCI.c and Lin.h are different"
#endif
/* Check if current file and Lin.h header file are of the same Software version */
#if ((LIN_SW_MAJOR_VERSION_ESCI_C != LIN_SW_MAJOR_VERSION) || \
     (LIN_SW_MINOR_VERSION_ESCI_C != LIN_SW_MINOR_VERSION) || \
     (LIN_SW_PATCH_VERSION_ESCI_C != LIN_SW_PATCH_VERSION) \
    )
    #error "Software Version Numbers of Lin_ESCI.c and Lin.h are different"
#endif

/* Check if current file and Lin_ESCI.h header file are of the same Autosar version */
#if (((LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MAJOR_VERSION_ESCI) || \
      (LIN_AR_RELEASE_MINOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MINOR_VERSION_ESCI)) || \
      (LIN_AR_RELEASE_REVISION_VERSION_ESCI_C != LIN_AR_RELEASE_REVISION_VERSION_ESCI) \
     )
    #error "AutoSar Version Numbers of Lin_ESCI.c and Lin_ESCI.h are different"
#endif
/* Check if current file and Lin_ESCI.h header file are of the same Software version */
#if ((LIN_SW_MAJOR_VERSION_ESCI_C != LIN_SW_MAJOR_VERSION_ESCI) || \
     (LIN_SW_MINOR_VERSION_ESCI_C != LIN_SW_MINOR_VERSION_ESCI) || \
     (LIN_SW_PATCH_VERSION_ESCI_C != LIN_SW_PATCH_VERSION_ESCI) \
    )
    #error "Software Version Numbers of Lin_ESCI.c and Lin_ESCI.h are different"
#endif

/* Check if current file and Reg_eSys_ESCI.h header file are of the same Autosar version */
#if (((LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MAJOR_VERSION_REGESCI) || \
      (LIN_AR_RELEASE_MINOR_VERSION_ESCI_C    != LIN_AR_RELEASE_MINOR_VERSION_REGESCI)) || \
      (LIN_AR_RELEASE_REVISION_VERSION_ESCI_C != LIN_AR_RELEASE_REVISION_VERSION_REGESCI) \
    )
    #error "AutoSar Version Numbers of Lin_ESCI.c and Reg_eSys_ESCI.h are different"
#endif
/* Check if current file and Reg_eSys_ESCI.h header file are of the same Software version */
#if ((LIN_SW_MAJOR_VERSION_ESCI_C != LIN_SW_MAJOR_VERSION_REGESCI) || \
     (LIN_SW_MINOR_VERSION_ESCI_C != LIN_SW_MINOR_VERSION_REGESCI) || \
     (LIN_SW_PATCH_VERSION_ESCI_C != LIN_SW_PATCH_VERSION_REGESCI) \
    )
    #error "Software Version Numbers of Lin_ESCI.c and Reg_eSys_ESCI.h are different"
#endif

#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
  /* Check if the source file and StdRegMacros header file are of the same version */
  #if ((LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C != STDREGMACROS_AR_RELEASE_MAJOR_VERSION) || \
       (LIN_AR_RELEASE_MINOR_VERSION_ESCI_C != STDREGMACROS_AR_RELEASE_MINOR_VERSION) \
      )
      #error "AutoSar Version Numbers of Lin_ESCI.c and StdRegMacros.h are different"
  #endif
  /* Check if the source file and Reg_eSys header file are of the same version */
  #if ((LIN_AR_RELEASE_MAJOR_VERSION_ESCI_C != REG_ESYS_AR_RELEASE_MAJOR_VERSION) || \
       (LIN_AR_RELEASE_MINOR_VERSION_ESCI_C != REG_ESYS_AR_RELEASE_MINOR_VERSION) \
      )
      #error "AutoSar Version Numbers of Lin_ESCI.c and Reg_eSys.h are different"
  #endif
#endif

/*=================================================================================================
                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
=================================================================================================*/


/*=================================================================================================
                                       LOCAL CONSTANTS
=================================================================================================*/


/*=================================================================================================
                                       LOCAL VARIABLES
=================================================================================================*/
#define LIN_START_SEC_VAR_NO_INIT_8
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"
/**
* @brief        LIN channel buffer counter.
*
* @details      Counter indicating how many steps have been done
*               before to send the frame.
*
*/
static VAR(uint8,LIN_VAR)Lin_ESCI_au8BufferCounter[LIN_HW_MAX_AVAILABLE_MODULES];

/**
* @brief        LIN channel buffer counter max.
*
* @details      Counter indicating the maximum number of steps to
*               do before to send the frame.
*
*/
static VAR(uint8,LIN_VAR)Lin_ESCI_au8BufferCounterMax[LIN_HW_MAX_AVAILABLE_MODULES];

#define LIN_STOP_SEC_VAR_NO_INIT_8
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

#define LIN_START_SEC_VAR_NO_INIT_UNSPECIFIED
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

#ifdef  ESCI0_BASEADDR
/**
* @brief        Shadow buffer for eSCI_0 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_0;
#endif /* ESCI0_BASEADDR */

#ifdef  ESCI1_BASEADDR
/**
* @brief        Shadow buffer for eSCI_1 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_1;
#endif /* ESCI1_BASEADDR */

#ifdef  ESCI2_BASEADDR
/**
* @brief        Shadow buffer for eSCI_2 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_2;
#endif /* ESCI2_BASEADDR */

#ifdef  ESCI3_BASEADDR
/**
* @brief        Shadow buffer for eSCI_3 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_3;
#endif /* ESCI3_BASEADDR */

#ifdef  ESCI4_BASEADDR
/**
* @brief        Shadow buffer for eSCI_4 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_4;
#endif  /* ESCI4_BASEADDR */

#ifdef  ESCI5_BASEADDR
/**
* @brief        Shadow buffer for eSCI_5 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_5;
#endif /* ESCI5_BASEADDR */

#ifdef  ESCI6_BASEADDR
/**
* @brief        Shadow buffer for eSCI_6 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_6;
#endif /* ESCI6_BASEADDR */

#ifdef  ESCI7_BASEADDR
/**
* @brief        Shadow buffer for eSCI_7 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_7;
#endif /* ESCI7_BASEADDR */

#ifdef  ESCI8_BASEADDR
/**
* @brief        Shadow buffer for eSCI_8 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_8;
#endif /* ESCI8_BASEADDR */

#ifdef  ESCI9_BASEADDR
/**
* @brief        Shadow buffer for eSCI_9 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_9;
#endif /* ESCI9_BASEADDR */

#ifdef  ESCI10_BASEADDR
/**
* @brief        Shadow buffer for eSCI_10 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_10;
#endif /* ESCI10_BASEADDR */

#ifdef  ESCI11_BASEADDR
/**
* @brief        Shadow buffer for eSCI_11 IP.
*
* @details      Buffer used to prepare and send or receive the frame.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
VAR(Lin_BuffType,LIN_VAR)Lin_ESCI_ChShadowBuff_11;
#endif /* ESCI11_BASEADDR */

#define LIN_STOP_SEC_VAR_NO_INIT_UNSPECIFIED
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

/*=================================================================================================
                                       GLOBAL CONSTANTS
=================================================================================================*/
#define LIN_START_SEC_CONST_32
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

/**
* @brief        eSCI IPs base addresses.
*
* @details      Array containing the base address of all the eSCI IPs.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
CONST(uint32, LIN_CONST) ESCI_au32BaseAddrs[] =
{
    #ifdef  ESCI0_BASEADDR
        ESCI0_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI0_BASEADDR */
    #ifdef  ESCI1_BASEADDR
        ESCI1_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI1_BASEADDR */
    #ifdef  ESCI2_BASEADDR
        ESCI2_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI2_BASEADDR */
    #ifdef  ESCI3_BASEADDR
        ESCI3_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI3_BASEADDR */
    #ifdef  ESCI4_BASEADDR
        ESCI4_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI4_BASEADDR */
    #ifdef  ESCI5_BASEADDR
        ESCI5_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI5_BASEADDR */
    #ifdef  ESCI6_BASEADDR
        ESCI6_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI6_BASEADDR */
    #ifdef  ESCI7_BASEADDR
        ESCI7_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI7_BASEADDR */
    #ifdef  ESCI8_BASEADDR
        ESCI8_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI8_BASEADDR */
    #ifdef  ESCI9_BASEADDR
        ESCI9_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI9_BASEADDR */
    #ifdef  ESCI10_BASEADDR
        ESCI10_BASEADDR,
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI10_BASEADDR */
    #ifdef  ESCI11_BASEADDR
        ESCI11_BASEADDR
    #else
        ((uint32)0x00000000UL),
    #endif /* ESCI11_BASEADDR */
};

#define LIN_STOP_SEC_CONST_32
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

#define LIN_START_SEC_CONST_UNSPECIFIED
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

/**
* @brief        Shadow buffer pointer array.
*
* @details      Array containing the Shadow buffer pointer of all the eSCI IPs.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
*/
CONSTP2VAR(Lin_BuffType, LIN_CONST, LIN_APPL_DATA) Lin_ESCI_pChShadowBuffPtr[]=
{
    #ifdef  ESCI0_BASEADDR
        &Lin_ESCI_ChShadowBuff_0,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI0_BASEADDR */
    #ifdef  ESCI1_BASEADDR
        &Lin_ESCI_ChShadowBuff_1,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI1_BASEADDR */
    #ifdef  ESCI2_BASEADDR
        &Lin_ESCI_ChShadowBuff_2,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI2_BASEADDR */
    #ifdef  ESCI3_BASEADDR
        &Lin_ESCI_ChShadowBuff_3,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI3_BASEADDR */
    #ifdef  ESCI4_BASEADDR
        &Lin_ESCI_ChShadowBuff_4,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI4_BASEADDR */
    #ifdef  ESCI5_BASEADDR
        &Lin_ESCI_ChShadowBuff_5,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI5_BASEADDR */
    #ifdef  ESCI6_BASEADDR
        &Lin_ESCI_ChShadowBuff_6,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI6_BASEADDR */
    #ifdef  ESCI7_BASEADDR
        &Lin_ESCI_ChShadowBuff_7,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI7_BASEADDR */
    #ifdef ESCI8_BASEADDR
        &Lin_ESCI_ChShadowBuff_8,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI8_BASEADDR */
    #ifdef  ESCI9_BASEADDR
        &Lin_ESCI_ChShadowBuff_9,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI9_BASEADDR */
    #ifdef  ESCI10_BASEADDR
        &Lin_ESCI_ChShadowBuff_10,
    #else
        ((Lin_BuffType *)0x00000000UL),
    #endif /* ESCI10_BASEADDR */
    #ifdef ESCI11_BASEADDR
        &Lin_ESCI_ChShadowBuff_11
    #else
        ((Lin_BuffType *)0x00000000UL)
    #endif /* ESCI11_BASEADDR */
};

#define LIN_STOP_SEC_CONST_UNSPECIFIED
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

#define LIN_START_SEC_CONST_8
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

/**
* @brief        Slave timeout values array.
*
* @details      Array containing the timeout values for the slave.
*
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
* @violates @ref Lin_ESCI_c_REF_7 These identifier defined in some function.
* @violates @ref Lin_ESCI_c_REF_8 Defined at block scope
*/
CONST (uint8,LIN_CONST) Lin_ESCI_aTimeoutValue [(LIN_MAX_DATA_LENGTH + 1U)]=
{
    ESCI_TIMEOUT_DATABYTE_ZERO_U8,        /*= (10*0+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_ONE_U8,         /*= (10*1+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_TWO_U8,         /*= (10*2+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_THREE_U8,       /*= (10*3+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_FOUR_U8,        /*= (10*4+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_FIVE_U8,        /*= (10*5+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_SIX_U8,         /*= (10*6+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_SEVEN_U8,       /*= (10*7+45)*1.4 */
    ESCI_TIMEOUT_DATABYTE_EIGHT_U8        /*= (10*8+45)*1.4 */
};

#define LIN_STOP_SEC_CONST_8
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

/*=================================================================================================
                                       GLOBAL VARIABLES
=================================================================================================*/
/*=================================================================================================
                                   LOCAL FUNCTION PROTOTYPES
=================================================================================================*/

/*=================================================================================================
                                       LOCAL FUNCTIONS
=================================================================================================*/

/*=================================================================================================
                                       GLOBAL FUNCTIONS
=================================================================================================*/
#define LIN_START_SEC_CODE
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

static FUNC (void, LIN_CODE) Lin_ESCI_RxInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel);
static FUNC (void, LIN_CODE) Lin_ESCI_TxInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel);
static FUNC (void, LIN_CODE) Lin_ESCI_ErrorInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel);
static FUNC (void, LIN_CODE) Lin_ESCI_WakeupInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel);
/*===============================================================================================*/

/**
* @brief   Check if a LIN channel has been waked-up.
* @details This function identifies if the addressed LIN channel
*          has been woken up by the LIN bus transceiver. This API
*          is used when the LIN channel wake up functionality is
*          disabled (wake up interrupt is disabled). It checks
*          the wake up flag from the addressed LIN channel which
*          must be in sleep mode and have the wake up
*          functionality disabled.
*
* @param[in] Channel LIN channel to be waked-up.
*
* @return            Std_ReturnType.
* @retval E_OK       If the LIN Channel has the wake
*                    up flag set and the wake up ISR disabled
* @retval E_NOT_OK   Otherwise.
*
*/
FUNC(Std_ReturnType, LIN_CODE) Lin_ESCI_CheckWakeup(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(Std_ReturnType, AUTOMATIC) tempReturn = (uint8)FALSE;
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint16, AUTOMATIC) u16Temp;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;
    /* Check whether wake up flag has been set and wake up ISR is disabled */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    u16Temp = REG_READ16(ESCI_IFSR2_ADDR32(u8Lin_ESCI)) & ESCI_IFSR2_LWAKE_MASK_U16;
    if ( ESCI_IFSR2_LWAKE_MASK_U16 == u16Temp)
    {
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        if ( ESCI_LCR1_WUIE_MASK_U16 == ( REG_READ16(ESCI_LCR1_ADDR32(u8Lin_ESCI)) & ESCI_LCR1_WUIE_MASK_U16) )
        {
            /* Set the returned value to FALSE */
            tempReturn = (uint8)FALSE;
        }
        else
        {
            /* LIN channel with wake up support disabled has been woken up
            * Clear Wake-Up flag
            * @Note: all flags have to be cleared by writing a 1 to the flags -> writing 0 has no effect
            */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16( ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_LWAKE_MASK_U16 );
            /* Set the returned value to TRUE */
            tempReturn = (uint8)TRUE;
        }
    }
    else
    {
        tempReturn = (uint8)FALSE;
    }

    return tempReturn;
}

/**
* @brief   Initialize a LIN channel.
* @details This function initializes all hardware registers needed to
*          start the LIN functionality on the selected channel.
*
* @param[in] Channel LIN channel to be initialized.
*
* @return            void.
*
*
*/
FUNC(void, LIN_CODE) Lin_ESCI_InitChannel(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint8, AUTOMATIC) u8BuffLoop;
    VAR(uint8, AUTOMATIC) u8Lin_ChLoopCount;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    /* Check whether wake up detection is enabled */
    if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinChannelWakeupSupport)
    {
        /* Wake up flag set */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        if ( ESCI_IFSR2_LWAKE_MASK_U16 == (REG_READ16(ESCI_IFSR2_ADDR32(u8Lin_ESCI)) & ESCI_IFSR2_LWAKE_MASK_U16) )
        {
            /* The wake-up shall directly be reported to the EcuM */
            /* via EcuM_SetWakeupEvent call-back function. */
            EcuM_SetWakeupEvent(Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->LinChannelEcuMWakeupSource);
        }
    }
    /* Enable eSCI module */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_MDIS_MASK_U16);

    /* Enable LIN mode */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LIN_MASK_U16);

    /* Set LRES bit of LCR1 register to reset the LIN state machine */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);

    /* Set baud rate value for low power mode */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_WRITE16(ESCI_BRR_ADDR32(u8Lin_ESCI), (uint16)((Lin_pChannelConfigPtr[u8Channel]->u32Lin_BaudRate_RegValue) & ESCI_BRR_SBR_MASK_U16));

#if defined (ERR_IPV_ESCI_0001)
    #if (ERR_IPV_ESCI_0001 == STD_ON)
    /* Enable Fast Bit Error Detection */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FBR_MASK_U16);
    #endif
#endif
    /* Enable Bit Error Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_BERRIE_MASK_U16);

    /* Select break character length of 13 bit as required by LIN 2.0 */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_BRCL_MASK_U16);

    /* Enable Fast Bit Error Detection Sample Mode */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_BESM_MASK_U16);

    /* Enable Transmit Stop on Bit Error */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_BESTP_MASK_U16);

    /* Enable Frame Error Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);

    /* Clear LRES bit of LCR1 register to reset the LIN state machine */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);

    /* Enable Parity Flag Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_PRTY_MASK_U16);
#if (LIN_DISABLE_FRAME_TIMEOUT == STD_OFF)
    /* Enable Slave Timeout Flag Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_STIE_MASK_U16);
#else
    /* Disable Slave Timeout Flag Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_STIE_MASK_U16);
#endif

    /* Enable Physical Bus Error Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_PBIE_MASK_U16);

    /* Enable Checksum Error Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_CKIE_MASK_U16);

    /* Disable CRC Error Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_CIE_MASK_U16);

    /* Enable Overflow Flag Interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_SET16(ESCI_LCR2_ADDR32(u8Lin_ESCI), ESCI_LCR2_OFIE_MASK_U16);

    /* Disable wake up interrupt */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_WUIE_MASK_U16);

    /* Clear the contents of shadow buffer */
    for(u8Lin_ChLoopCount=(uint8)ESCI_ZERO_U8;u8Lin_ChLoopCount <LIN_HW_MAX_MODULES;u8Lin_ChLoopCount++)
    {
        for(u8BuffLoop=ESCI_ZERO_U8;u8BuffLoop < LIN_MAX_DATA_LENGTH;u8BuffLoop++)
        {
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ChLoopCount]->au8Lin_DATA[u8BuffLoop] = ESCI_ZERO_U8;
        }
    }
    /* Enter Sleep mode */
    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_30();
    {
        /* Stop any ongoing transmission */
        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);

        /* Enable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);

        /* Disable Receive Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_RXIE_MASK_U16);

        /* Disable Transmit Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        /* Disable Frame Control Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_FCIE_MASK_U16);

        /* Check if Wake up detection is enabled */
        if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinChannelWakeupSupport)
        {
            /* Clear Wake-Up flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_LWAKE_MASK_U16);
            /* Enable wake up interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_WUIE_MASK_U16);
        }
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_30();
}

/**
* @brief   Sends the header part of the LIN frame.
* @details Initiates the transmission of the header
*          part of the LIN frame on Channel using information
*          stored on PduInfoPtr pointer.
*          If response type is MASTER_RESPONSE then nothing is sent over the bus
*          the entire frame (including header) is sent with the ESCI_LLD_SendResponse
*
* @param[in]   Channel LIN channel to be addressed.
* @param[in]   PduInfoPtr pointer to PDU containing the PID, Checksum model,
*              Response type, Dl and SDU data pointer.
*
* @return            Std_ReturnType.
* @retval E_NOT_OK   In case of a timeout situation only.
* @retval E_OK       Otherwise.
*
*
*/
FUNC(Std_ReturnType, LIN_CODE) Lin_ESCI_SendHeader(CONST(uint8, AUTOMATIC) u8Channel, \
                          P2CONST(Lin_PduType, AUTOMATIC, LIN_APPL_CONST) pcPduInfoPtr)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint32, AUTOMATIC) volatile u32counter = ESCI_ZERO_U8;
    VAR(uint8, AUTOMATIC) u8tmpReturn = (uint8)E_NOT_OK;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_00();
    {
        /* Stop any ongoing transmission */
        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);

        /* Disable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);

        /* Disable Receive Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_RXIE_MASK_U16);

        /* Disable Transmit Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        /* Disable Frame Control Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_FCIE_MASK_U16);
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_00();

    MCAL_FAULT_INJECTION_POINT(ESCI_FIP_1_T_TIME_OUT_1);
    /* Wait till cancellation of current frame */
    while(u32counter < (LIN_TIMEOUT_LOOPS+1U))
    {
        /* Is there a a transmit or receive interrupt request pending ? */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        if(ESCI_IFSR1_TACT_MASK_U16 != ( REG_READ16(ESCI_IFSR1_ADDR32(u8Lin_ESCI)) & ESCI_IFSR1_TACT_MASK_U16))
        {
            u8tmpReturn = (uint8)E_OK;
            break;
        }
        u32counter++;
    }

    if((uint8)E_OK == u8tmpReturn)
    {
        /* Reset error status global flag */
        Lin_au8LinChFrameErrorStatus[u8Channel] = LIN_NO_ERROR;

        /* Set header status to TRUE if master wants to send the response frame */
        if (LIN_MASTER_RESPONSE == pcPduInfoPtr->Drc)
        {
            Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_MASTER_RES_COMMAND;
            /* Update LIN channel frame operation status to LIN_CH_READY_STATE */
            Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_READY_STATE;
        }
        else if(LIN_SLAVE_RESPONSE == pcPduInfoPtr->Drc)
        {
            Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_SLAVE_RES_COMMAND;
            Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_RECEIVE_NOTHING_STATE;
        }
        else
        {
            Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_SLAVE_TO_SLAVE_COMMAND;
            Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_RECEIVE_NOTHING_STATE;
        }

        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_01();
        {
            /* Set LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);

            /* These redundant lines are required since LIN state machine gets RESET correctly after
            setting LRES bit three times and then clear it */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_01();

        /* Clear the Noise Flag of Interrupt Flag and Status Register 1 (eSCI_IFSR1) */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);

        /* Prepare header */
        /* First step is to configure ID */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ZERO_U8] = pcPduInfoPtr->Pid;

        /* Second step data length */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8] = pcPduInfoPtr->Dl;

        /* Third step is to configure Checksum, CRC and Transfer direction */
        if(LIN_MASTER_RESPONSE == pcPduInfoPtr->Drc)
        {
            /* Set master response msg type */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE = (uint8)LIN_MASTER_RESPONSE;
            /* Set TX frame */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] = ESCI_LTR_TD_MASK_U8;
        }
        else if(LIN_SLAVE_RESPONSE == pcPduInfoPtr->Drc)
        {
            /* Set slave response msg type */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE = (uint8)LIN_SLAVE_RESPONSE;
            /* Set RX frame */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] = (uint8)0x00U;
            /* Set timeout */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_THREE_U8] =
                                    Lin_ESCI_aTimeoutValue[pcPduInfoPtr->Dl];
        }
        else
        {
            /* Set slave to slave msg type */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE = (uint8)LIN_SLAVE_TO_SLAVE;
            /* Set TX frame */
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] = ESCI_LTR_TD_MASK_U8;
        }
        
        /* Calculate checksum */
        switch(pcPduInfoPtr->Pid)
        {
            case ESCI_SLAVE_RESPONSE_DIAGNOSTIC_ID_U8:
            case ESCI_MASTER_REQUEST_DIAGNOSTIC_ID_U8:
                Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] |= ESCI_LTR_CSE_MASK_U8;
            break;
            default:
                if(LIN_ENHANCED_CS == pcPduInfoPtr->Cs)
                {
                    /* Use enhanced checksum */
                    Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] |= (uint8)( ESCI_LTR_CSM_MASK_U8 | ESCI_LTR_CSE_MASK_U8);
                }
                else
                {
                    /* Use Classic checksum */
                   Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] |= ESCI_LTR_CSE_MASK_U8;
                }
            break;
        }
        /* Prepare for transmission */
        /* Clear Receive Data Register Full Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_RDRF_MASK_U16);

        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_02();
        {
            /* Enable Receiver Full Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RIE_MASK_U16);
            /* Clear LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
            /* Enable Receiver */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
            /* Enable Transmitter */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_02();

        /* ISR driven */
        if(LIN_MASTER_RESPONSE != pcPduInfoPtr->Drc)
        {
            /* Reset buffer counter */
            Lin_ESCI_au8BufferCounter[u8Lin_ESCI] = ESCI_ZERO_U8;

            /* Rx requires 4 steps to initiate the header transmission */
            if(LIN_SLAVE_RESPONSE == pcPduInfoPtr->Drc)
            {
                Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI] = SLAVE_RESPONSE_HEADER_WRITE_COUNT_U8;
            }
            else
            {
                /* Tx requires 3 steps to initiate the header transmission */
                Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI] = MASTER_RESPONSE_HEADER_WRITE_COUNT_U8;
            }
            /* Clear Receive Data Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);

            SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_04();
            {
                /* Enable Receive Data Ready Interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_RXIE_MASK_U16);
                /* Enable Transmit Data Ready Interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            }
            SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_04();
        }

        /* Clear the Noise Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
        /* Framing Error flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* Clear Bit Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_BERR_MASK_U16);
        /* Clear Slave Timeout Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_STO_MASK_U16);
        /* Clear Physical Bus Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_PBERR_MASK_U16);
        /* Clear Checksum Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_CKERR_MASK_U16);
        /* Clear Overflow Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_OVFL_MASK_U16);
        /* Clear Unrequested Data Received Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_UREQ_MASK_U16);
        /* Clear Frame Complete Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_FRC_MASK_U16);

        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_06();
        {
            /* Enable end of frame interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_FCIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_06();
    }
    return u8tmpReturn;
}

/**
* @brief   Sends the response part of the LIN frame.
* @details Initiates the transmission of the data
*          part of the LIN frame on Channel using information
*          stored on PduInfoPtr pointer.
*
* @param[in]   Channel LIN channel to be addressed.
* @param[in]   PduInfoPtr pointer to PDU containing the PID, Checksum model,
*              Response type, Dl and SDU data pointer.
*
* @return            void.
*
*
*/
FUNC(void, LIN_CODE) Lin_ESCI_SendResponse(CONST(uint8, AUTOMATIC) u8Channel, \
                      P2CONST(Lin_PduType, AUTOMATIC, LIN_APPL_CONST) pcPduInfoPtr)
{
    VAR(uint8, AUTOMATIC) u8Lin_Temp;
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    /* Check that no error is occurred during sending the header */
    if (LIN_CH_SEND_HEADER_ERROR == Lin_au8LinChFrameStatus[u8Channel])
    {
        /* There was an error during header transmission */

        /* Update LIN channel frame operation status to LIN_CH_SEND_DATA_ERROR */

        Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_SEND_DATA_ERROR;
    }
    else
    {
        /* Check whether data length is valid or not */
        if(ESCI_ZERO_U8 != pcPduInfoPtr->Dl)
        {
            /* Send data */
            /* Copy 1 to 8 data bytes from Pdu to shadow buffer */
            for(u8Lin_Temp=ESCI_ZERO_U8;
                u8Lin_Temp<Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8];
                u8Lin_Temp++)
            {
                Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[u8Lin_Temp] = pcPduInfoPtr->SduPtr[u8Lin_Temp];
            }
            /* ISR driven */
            /* Reset buffer counter */
            Lin_ESCI_au8BufferCounter[u8Lin_ESCI] = ESCI_ZERO_U8;

            /* Max ISR count */
            Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI] =
                        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8] +
                        MASTER_RESPONSE_HEADER_WRITE_COUNT_U8;

            SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_08();
            {
                /* Enable Transmit Data Ready Interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            }
            SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_08();
        }
    }
}

/**
* @brief   Prepares and send a go-to-sleep-command
*          frame on Channel.
* @details This function stops any ongoing transmission and initiates
*          the transmission of the sleep command (master command frame with
*          ID = 0x3C and data = (0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF).
*
* @param[in] Channel LIN channel to be addressed.
*
* @return            Std_ReturnType.
* @retval E_NOT_OK   In case of a timeout situation only.
* @retval E_OK       Otherwise.
*
*
*/
FUNC(Std_ReturnType, LIN_CODE) Lin_ESCI_GoToSleep(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint8, AUTOMATIC) u8Lin_Temp;
    VAR(uint32, AUTOMATIC) volatile u32counter = ESCI_ZERO_U8;
    VAR(uint8, AUTOMATIC) u8tmpReturn = (uint8)E_NOT_OK;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;
    
    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_09();
    {
        /* Stop any ongoing transmission */
        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Disable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Disable Receive Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_RXIE_MASK_U16);
        /* Disable Transmit Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        /* Disable Frame Control Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_FCIE_MASK_U16);
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_09();

    MCAL_FAULT_INJECTION_POINT(ESCI_FIP_2_T_TIME_OUT_2);
    /* Wait till cancellation of current frame */
    while(u32counter < (LIN_TIMEOUT_LOOPS+1U))
    {
        /* Is there a a transmit or receive interrupt request pending ? */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        if(ESCI_IFSR1_TACT_MASK_U16 != ( REG_READ16(ESCI_IFSR1_ADDR32(u8Lin_ESCI)) & ESCI_IFSR1_TACT_MASK_U16))
        {
            u8tmpReturn = (uint8)E_OK;
            break;
        }
        u32counter++;
    }

    if(u8tmpReturn == (uint8)E_OK)
    {
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_10();
        {
            /* Set LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /* These redundant line are required since LIN state machine gets RESET correctly after
            setting LRES bit three times and then clear it */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /* Clear LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
            /* Enable Transmitter */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
            /* Enable Receiver */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_10();

        /* Prepare buffer for sleep mode command */
        /* Prepare header */
        /* First step ID */
        /* Includes the parity */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ZERO_U8] = SLEEP_IDENTIFIER_VALUE_U8 ;

        /* Second step data length */
        /* Standard length for master request command */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8] = ESCI_MAX_DATA_LENGTH_U8;

        /* Third step use classic checksum */
        /* CSUM|TX */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_TWO_U8] = (ESCI_LTR_CSE_MASK_U8 |
                                    ESCI_LTR_TD_MASK_U8);
        /* Prepare data */
        /* The data of the shadow buffer to 0 -> Byte0=0 is sleep command */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[ESCI_ZERO_U8] = SLEEP_DATABYTE_ONE_VALUE_U8;
        /* Just 1-7 bytes of the DATA will be send since HEADER[3] is the first data byte */
        for(u8Lin_Temp=ESCI_ONE_U8;
            u8Lin_Temp<Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8];
              u8Lin_Temp++)
        {
            Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[u8Lin_Temp] = SLEEP_DATABYTE_TWO_TO_EIGHT_VALUE_U8;
        }
        /* Set sleep cmd msg type */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE = SLEEP_CMD_TYPE_U8;
        /* ISR driven */
        /* Reset buffer counter */
        Lin_ESCI_au8BufferCounter[u8Lin_ESCI] = ESCI_ZERO_U8;
        /* Max ISR count */
        Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI] = LIN_HEADER_DATA_WRITE_COUNT_U8;
        /* Set header status to LIN_TX_SLEEP_COMMAND if master wants to send the sleep-command */
        Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_SLEEP_COMMAND;
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_12();
        {
            /* Enable Transmit Data Ready Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_12();

        /* Clear Frame Complete Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_FRC_MASK_U16);
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_13();
        {
            /* Enable end of frame interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_FCIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_13();
    }

    return u8tmpReturn;
}

/**
* @brief   Same function as Lin_LLD_GoToSleep() but
*          without sending a go-to-sleep-command on the bus.
* @details This function stops any ongoing transmission and put the
*          Channel in sleep mode (then LIN hardware enters a
*          reduced power operation mode).
*
* @param[in] Channel LIN channel to be addressed.
*
* @return            Std_ReturnType.
* @retval E_NOT_OK   In case of a timeout situation only.
* @retval E_OK       Otherwise.
*
*
*/
FUNC(Std_ReturnType, LIN_CODE) Lin_ESCI_GoToSleepInternal(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint32, AUTOMATIC) volatile u32counter = ESCI_ZERO_U8;
    VAR(uint8, AUTOMATIC) u8tmpReturn = (uint8)E_NOT_OK;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_14();
    {
        /* Stop any ongoing transmission */

        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Disable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Disable Receive Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_RXIE_MASK_U16);
        /* Disable Transmit Data Ready Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        /* Disable Frame Control Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_FCIE_MASK_U16);
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_14();

    MCAL_FAULT_INJECTION_POINT(ESCI_FIP_3_T_TIME_OUT_3);
    /* Wait till cancellation of current frame */
    while(u32counter < (LIN_TIMEOUT_LOOPS+1U))
    {
        /* Is there a a transmit or receive interrupt request pending ? */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        if(ESCI_IFSR1_TACT_MASK_U16 != ( REG_READ16(ESCI_IFSR1_ADDR32(u8Lin_ESCI)) & ESCI_IFSR1_TACT_MASK_U16))
        {
            u8tmpReturn = (uint8)E_OK;
            break;
        }
        u32counter++;
    }
    if((uint8)E_OK == u8tmpReturn)
    {
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_15();
        {
            /* Enter Sleep mode */
            /* Set LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);

            /* These redundant line are required since LIN state machine gets RESET correctly after
               setting LRES bit three times and then clear it */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /* Clear LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
            /* Enable Receiver*/
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
            /* Clear TX Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_TXRDY_MASK_U16);
            /* Disable TX interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            /* Clear Framing Error Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
            /* Disable Frame Error Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);
            /* Clear Noise Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
            /* Disable Noise Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_NFIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_15();

        /* Check whether wake up detection is enabled */
        if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinChannelWakeupSupport)
        {
            /* Wake up detection is enabled */
            /* Clear Wake-Up flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_LWAKE_MASK_U16);
            SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_16();
            {
                /* Enable wake up interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_WUIE_MASK_U16);
            }
            SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_16();
        }
    }

    return u8tmpReturn;
}

/**
* @brief   Sends a wake up signal to the LIN bus.
* @details This function shall sent a wake up signal to the LIN bus
*          and put the LIN channel in LIN_CH_OPERATIONAL_STATE state.
*
* @param[in]   Channel LIN channel to be addressed.
*
* @return            void.
*
*
*/
FUNC(void, LIN_CODE) Lin_ESCI_Wakeup(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_17();
    {
        /* Send Wake up request */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_WU_MASK_U16);
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_17();
}

/**
* @brief   Wake up the LIN channel.
* @details This function shall put the LIN channel in LIN_CH_OPERATIONAL_STATE_U8 state without
*          sending a wake up signal to the LIN bus
*
* @param[in]   Channel LIN channel to be addressed.
*
* @return            void.
*
*
*/
FUNC(void, LIN_CODE) Lin_ESCI_WakeupInternal(CONST(uint8, AUTOMATIC) u8Channel)
{
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_18();
    {
        /* Disable wake up interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_WUIE_MASK_U16);
#if (IPV_ESCI >= IPV_ESCI_08_00_00_00)
/* eSCI V.8 specific code*/
        /* Clear Framing Error flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* Set LRES bit of LCR1 register to reset the LIN state machine */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /* These redundant line are required since LIN state machine gets RESET correctly after
            setting LRES bit three times and  then clear it */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Disable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Clear LRES bit of LCR1 register to reset the LIN state machine */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
        /* Enable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Enable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Enable Frame Error Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);
#endif
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_18();
}

/**
 * @brief   Gets the status of the LIN driver when Channel is operating.
 * @details This function returns the state of the current
 *          transmission, reception or operation status.
 *          If the reception of a Slave response was successful then
 *          this service provides a pointer to the buffer where the
 *          data is stored.
 *
 * @param[in]   Channel LIN channel to be addressed
 * @param[out]  LinSduPtr pointer to pointer to a shadow buffer or memory
 *              mapped LIN Hardware receive buffer where the current SDU is
 *              stored
 * @return                  Lin_StatusType.
 * @retval LIN_NOT_OK       Development or production error rised
 *                          none of the below conditions.
 * @retval LIN_TX_OK        Successful transmission.
 * @retval LIN_TX_BUSY      Ongoing transmission of header or response.
 * @retval LIN_TX_HEADER_ERROR Error occurred during header
 *                          transmission.
 * @retval LIN_TX_ERROR     Error occurred during response
 *                          transmission.
 * @retval LIN_RX_OK        Reception of correct response.
 * @retval LIN_RX_BUSY      Ongoing reception where at least one byte
 *                          has been received.
 * @retval LIN_RX_ERROR     Error occurred during reception.
 * @retval LIN_RX_NO_REPONSE No data byte has been received yet.
 * @retval LIN_OPERATIONAL  Channel is ready for next header.
 *                          transmission and no data are available.
 * @retval LIN_CH_SLEEP     Channel is in sleep mode.
 *
 *
 */
FUNC(Lin_StatusType, LIN_CODE) Lin_ESCI_HardwareGetStatus(CONST(uint8, AUTOMATIC) u8Channel,
                             P2VAR(uint8, AUTOMATIC, LIN_APPL_DATA) pLinSduPtr)
{
    VAR(Lin_StatusType,AUTOMATIC) TempReturn = LIN_NOT_OK;
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;
    VAR(uint8, AUTOMATIC) u8Temp1;
    VAR(uint8, AUTOMATIC) u8Temp2;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    /* Check error status */
    switch(Lin_au8LinChFrameErrorStatus[u8Channel])
    {
        /* Tx data error conditions */
        case LIN_BIT_ERROR:
            u8Temp1 = Lin_au8TransmitHeaderCommand[u8Channel];
            u8Temp2 = Lin_au8LinChFrameStatus[u8Channel];
            switch(u8Temp1)
            {
                case LIN_TX_SLEEP_COMMAND:
                    /* Update Lin_au8TransmitHeaderCommand value to LIN_TX_NO_COMMAND */
                    Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_NO_COMMAND;
                    /* Update LIN channel frame operation status to LIN_CH_NOT_READY_STATE */
                    Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_NOT_READY_STATE;
                    break;
                case LIN_TX_MASTER_RES_COMMAND:
                    if(LIN_CH_SEND_HEADER_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_HEADER_ERROR;
                    }
                    else if(LIN_CH_SEND_DATA_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_ERROR;
                    }
                    else
                    {
                        TempReturn = LIN_NOT_OK;
                    }
                    break;
                case LIN_TX_SLAVE_RES_COMMAND:
                case LIN_TX_SLAVE_TO_SLAVE_COMMAND:
                    if(LIN_CH_SEND_HEADER_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_HEADER_ERROR;
                    }
                    else
                    {
                        TempReturn = LIN_NOT_OK;
                    }
                    break;
                default:
                    TempReturn = LIN_NOT_OK;
                    break;
            }
            break;
        /* Rx error conditions */
        case LIN_NOISE_ERROR:
        case LIN_CHECKSUM_ERROR:
        case LIN_FRAMING_ERROR:
        case OVERFLOW_ERROR:
        case SLAVE_TIMEOUT_ERROR:
            /* this check that there's no data to be recived before. */
            if(ESCI_ZERO_U8 == Lin_ESCI_au8BufferCounter[u8Lin_ESCI])
            {
                TempReturn = LIN_RX_NO_RESPONSE;
            }
            else
            {
                TempReturn = LIN_RX_ERROR;
            }
            break;
        case UNREQUESTED_DATA_ERROR:
            TempReturn = LIN_RX_ERROR;
            break;
        case PHYSICAL_BUS_ERROR:
            u8Temp1 = Lin_au8TransmitHeaderCommand[u8Channel];
            u8Temp2 = Lin_au8LinChFrameStatus[u8Channel];
            switch(u8Temp1)
            {
                case LIN_TX_SLEEP_COMMAND:
                    /* Update Lin_au8TransmitHeaderCommand value to LIN_TX_NO_COMMAND */
                    Lin_au8TransmitHeaderCommand[u8Channel] = LIN_TX_NO_COMMAND;
                    /* Update LIN channel frame operation status to LIN_CH_NOT_READY_STATE */
                    Lin_au8LinChFrameStatus[u8Channel] = LIN_CH_NOT_READY_STATE;
                    break;
                case LIN_TX_MASTER_RES_COMMAND:
                    if(LIN_CH_SEND_HEADER_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_HEADER_ERROR;
                    }
                    else if(LIN_CH_SEND_DATA_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_ERROR;
                    }
                    else
                    {
                        TempReturn = LIN_NOT_OK;
                    }
                    break;
                case LIN_TX_SLAVE_RES_COMMAND:
                    if(LIN_CH_SEND_HEADER_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_HEADER_ERROR;
                    }
                    else
                    {
                        TempReturn = LIN_RX_ERROR;
                    }
                    break;
                case LIN_TX_SLAVE_TO_SLAVE_COMMAND:
                    if(LIN_CH_SEND_HEADER_ERROR == u8Temp2)
                    {
                        TempReturn = LIN_TX_HEADER_ERROR;
                    }
                    else
                    {
                        TempReturn = LIN_NOT_OK;
                    }
                    break;
                default:
                    TempReturn = LIN_NOT_OK;
                    break;
            }
            break;
        case LIN_NO_ERROR :
            /* Check Lin frame status variable */
            switch(Lin_au8LinChFrameStatus[u8Channel])
            {
                case LIN_CH_SEND_HEADER:
                case LIN_CH_SEND_DATA:
                    TempReturn =  LIN_TX_BUSY;
                break;
                case LIN_CH_RECEIVE_DATA:
                    TempReturn =  LIN_RX_BUSY;
                break;
                /* Tx completed - Status Updated in ISR */
                case LIN_TX_COMPLETE_STATE:
                    TempReturn = LIN_TX_OK;
                break;
                /* Rx completed - Status Updated in ISR */
                case LIN_RX_COMPLETE_STATE:
                    /* Copy the data from hardware buffer */
                    Lin_ESCI_CopyData(u8Channel, pLinSduPtr);
                    TempReturn =  LIN_RX_OK;
                break;
                /* Tx completed - But master not received any data */
                case LIN_CH_RECEIVE_NOTHING_STATE:
                    TempReturn = LIN_RX_NO_RESPONSE;
                break;
                /* Channel Initialized or wakeup or all activity completed and ready to
                send next header */
                case LIN_CH_READY_STATE:
                    TempReturn = LIN_OPERATIONAL;
                break;
                /* Channel not ready */
                case LIN_CH_NOT_READY_STATE:
                    TempReturn = LIN_NOT_OK;
                break;
                default :
                    TempReturn = LIN_NOT_OK;
                break;
            }
        break;
        default:
            TempReturn = LIN_NOT_OK;
        break;
    }
    return TempReturn;
}

/**
* @brief   Copy the data received from the ESCI data registers to LinSduPtr.
* @details This function shall copy the received data in the provided buffer
*          addressed by the LinSduPtr pointer parameter.
*
* @param[in]   Channel LIN channel to be addressed.
* @param[out]  LinSduPtr pointer to pointer to a shadow buffer or memory
*              mapped LIN Hardware receive buffer where the current SDU is stored
*
* @return       void.
*
*
*
* @note         Internal driver function.
*/
/**
* @violates @ref Lin_ESCI_c_REF_6 These functions represent the IPV of the driver. External linkage is needed to "export" the IPV.
*/
FUNC(void, LIN_CODE) Lin_ESCI_CopyData(CONST(uint8, AUTOMATIC) u8Channel,
                    P2VAR(uint8, AUTOMATIC, LIN_APPL_DATA) pLinSduPtr)
{
    VAR(uint8, AUTOMATIC) u8Loop;
    VAR(uint8, AUTOMATIC) u8Lin_ESCI;

    /* Get the hardware Lin channel from logical channel */
    u8Lin_ESCI = Lin_pChannelConfigPtr[u8Channel]->pChannelConfigPC->u8LinHwChannel;

    for (u8Loop=ESCI_ZERO_U8;u8Loop<LIN_MAX_DATA_LENGTH;u8Loop++)
    {
        /* Copy LSB data received in LinSduPtr[] buffer */
        pLinSduPtr[u8Loop]  = (Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[u8Loop]);
    }
}

/**
* @brief   Interrupt handler for TX and RX on ESCI.
* @details This function shall manage all the RX and TX ISRs on the
*          addressed channel.
*
* @param[in]   Channel LIN channel to be addressed.
*
* @return       void.
*
* @implements   Lin_ESCI_InterruptHandler_Activity
*
* @note         Internal driver function.
*/
FUNC(void, LIN_CODE) Lin_ESCI_InterruptHandler(CONST(uint8, AUTOMATIC) u8Channel)
{
    /* This is declaration */
    VAR(uint16, AUTOMATIC) u16ESCI_status;
    VAR(uint16, AUTOMATIC) u16ESCI_control;
    VAR(uint16, AUTOMATIC) u16Lin_status;
    VAR(uint16, AUTOMATIC) u16Lin_control;
    VAR(uint16, AUTOMATIC) u16Lin_control2;
    VAR(uint8, AUTOMATIC) u8LogicalChannel;
    /* This is define */
    u16ESCI_status = (uint16)0U;
    u16ESCI_control = (uint16)0U;
    u16Lin_status = (uint16)0U;
    u16Lin_control = (uint16)0U;
    u16Lin_control2 = (uint16)0U;
    u8LogicalChannel = (uint8)0U;

    /* Check if driver is initialized */
    if( NULL_PTR != Lin_pcConfigPtr )
    {
        while(LIN_HW_MAX_MODULES > u8LogicalChannel)
        {
            if((sint8)u8Channel == Lin_as8ChannelHardwareMap[Lin_pChannelConfigPtr[u8LogicalChannel]->pChannelConfigPC->u8LinChannelID])
            {
                break;
            }
            else
            {
                u8LogicalChannel++;
            }
        }
        if(LIN_HW_MAX_MODULES > u8LogicalChannel)
        {
            /* Get the status of ESCI_IFSR1 interrupt flags */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            u16ESCI_status = REG_READ16(ESCI_IFSR1_ADDR32(u8Channel));
            /* Get the status of control register ESCI_CR2 */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            u16ESCI_control = REG_READ16(ESCI_CR2_ADDR32(u8Channel));
            /* Get the status of ESCI_IFSR2 interrupt flags */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            u16Lin_status = REG_READ16(ESCI_IFSR2_ADDR32(u8Channel));
            /* Get the status of control register ESCI_LCR1 */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            u16Lin_control = REG_READ16(ESCI_LCR1_ADDR32(u8Channel));
            /* Get the status of control register ESCI_LCR2 */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            u16Lin_control2 = REG_READ16(ESCI_LCR2_ADDR32(u8Channel));
            /* Check if Error Interrupt Flag is set */
            if (((0U != (u16ESCI_status & ESCI_IFSR1_NF_MASK_U16)) && (0U != (u16ESCI_control & ESCI_CR2_NFIE_MASK_U16))) || \
                ((0U != (u16ESCI_status & ESCI_IFSR1_FE_MASK_U16)) && (0U != (u16ESCI_control & ESCI_CR2_FEIE_MASK_U16))) || \
                ((0U != (u16ESCI_status & ESCI_IFSR1_BERR_MASK_U16)) && (0U != (u16ESCI_control & ESCI_CR2_BERRIE_MASK_U16))) || \
                ((0U != (u16Lin_status & ESCI_IFSR2_STO_MASK_U16)) && (0U != (u16Lin_control & ESCI_LCR1_STIE_MASK_U16))) || \
                ((0U != (u16Lin_status & ESCI_IFSR2_PBERR_MASK_U16)) && (0U != (u16Lin_control & ESCI_LCR1_PBIE_MASK_U16))) || \
                ((0U != (u16Lin_status & ESCI_IFSR2_CKERR_MASK_U16)) && (0U != (u16Lin_control & ESCI_LCR1_CKIE_MASK_U16))) || \
                ((0U != (u16Lin_status & ESCI_IFSR2_OVFL_MASK_U16)) && (0U != (u16Lin_control2 & ESCI_LCR2_OFIE_MASK_U16))) || \
                ((0U != (u16Lin_status & ESCI_IFSR2_UREQ_MASK_U16)) && (0U != (u16Lin_control2 & ESCI_LCR2_UQIE_MASK_U16))) \
            )
            {
                /* Call Lin_ESCI_ErrorInterruptHandler function */
                Lin_ESCI_ErrorInterruptHandler(u8Channel, u8LogicalChannel);
            }
            /* Check if Receive Data Ready Interrupt Flag is set */
            else if (((0U != (u16Lin_status & ESCI_IFSR2_RXRDY_MASK_U16)) && (0U != (u16Lin_control & ESCI_LCR1_RXIE_MASK_U16))) || \
                    ((0U != (u16Lin_status & ESCI_IFSR2_FRC_MASK_U16)) && (0U != (u16Lin_control & ESCI_LCR1_FCIE_MASK_U16)))
            )
            {
                /* Call Lin_ESCI_RxInterruptHandler function */
                Lin_ESCI_RxInterruptHandler(u8Channel, u8LogicalChannel);
            }
            /* Check if Transmit Data Ready Interrupt Flag is set */
            else if ((0U != (u16Lin_status & ESCI_IFSR2_TXRDY_MASK_U16)) && \
                    (0U != (u16Lin_control & ESCI_LCR1_TXIE_MASK_U16)))
            {
                /* Call Lin_ESCI_TxInterruptHandler function */
                Lin_ESCI_TxInterruptHandler(u8Channel, u8LogicalChannel);
            }
            /* Wake up interrupt */
            /* Wake up flag set */
            else if ((0U != (u16Lin_status & ESCI_IFSR2_LWAKE_MASK_U16)) && \
                    (0U != (u16Lin_control & ESCI_LCR1_WUIE_MASK_U16)))
            {
                /* Call Lin_ESCI_WakeupInterruptHandler function */
                Lin_ESCI_WakeupInterruptHandler(u8Channel, u8LogicalChannel);
            }
            else
            {
                /* Clear all interrupt flags */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_WRITE16(ESCI_IFSR1_ADDR32(u8Channel),ESCI_IFSR1_RESET_MASK_U16);
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_WRITE16(ESCI_IFSR2_ADDR32(u8Channel),ESCI_IFSR2_RESET_MASK_U16);
            }
        }
        else
        {
            /* Clear all interrupt flags */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR1_ADDR32(u8Channel),ESCI_IFSR1_RESET_MASK_U16);
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Channel),ESCI_IFSR2_RESET_MASK_U16);
        }
    }
    else
    {
        /* Clear all interrupt flags */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Channel),ESCI_IFSR1_RESET_MASK_U16);
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Channel),ESCI_IFSR2_RESET_MASK_U16);
    }
}

/**
* @brief   Interrupt handler for TX Interrupt on ESCI.
* @details This function shall manage all the TX Interrupt ISRs on the
*          addressed channel.
*
* @param[in]    Channel LIN channel to be addressed.
*
* @return       void.
*
* @note         Internal driver function.
*/
static FUNC (void, LIN_CODE) Lin_ESCI_TxInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel)
{
    /* Clear Transmit Data Ready Interrupt Flag */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_TXRDY_MASK_U16);

    if(((Lin_ESCI_au8BufferCounter[u8Lin_ESCI] < MASTER_RESPONSE_HEADER_WRITE_COUNT_U8) &&
    (((uint8)LIN_MASTER_RESPONSE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)||
    (SLEEP_CMD_TYPE_U8 == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)))
        ||  ((Lin_ESCI_au8BufferCounter[u8Lin_ESCI] < SLAVE_RESPONSE_HEADER_WRITE_COUNT_U8)
        && ((uint8)LIN_SLAVE_RESPONSE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE))
        ||  ((Lin_ESCI_au8BufferCounter[u8Lin_ESCI] < MASTER_RESPONSE_HEADER_WRITE_COUNT_U8)
        && ((uint8)LIN_SLAVE_TO_SLAVE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)))
    {
        /* Send header */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE8(ESCI_LTR_ADDR32(u8Lin_ESCI), (Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[Lin_ESCI_au8BufferCounter[u8Lin_ESCI]]));
        /* Update LIN channel frame status to LIN_CH_SEND_HEADER */
        Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_HEADER;
    }
    else
    {
        if(((uint8)LIN_MASTER_RESPONSE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)||
        (SLEEP_CMD_TYPE_U8 == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE))
        {
            /* Send data */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE8(ESCI_LTR_ADDR32(u8Lin_ESCI), (Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[(Lin_ESCI_au8BufferCounter[u8Lin_ESCI]) \
                        - MASTER_RESPONSE_HEADER_WRITE_COUNT_U8]));
            if((uint8)LIN_MASTER_RESPONSE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)
            {
                /* Update LIN channel frame operation status to LIN_CH_SEND_DATA */
                Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_DATA;
            }
        }
    }
    /* Increment counter by 1 */
    Lin_ESCI_au8BufferCounter[u8Lin_ESCI]++;
    /* Is this the last byte ? */
    if(Lin_ESCI_au8BufferCounter[u8Lin_ESCI] >= Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI])
    {
        /* Last byte has been transmitted */
        if((LIN_CH_SEND_HEADER == Lin_au8LinChFrameStatus[u8LogicalChannel]) &&
       ((uint8)LIN_MASTER_RESPONSE != Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE))
        {
            /* Set max count */
            Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI] =
                    Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_HEADER[ESCI_HEADER_ONE_U8];
            /* reset counter */
            Lin_ESCI_au8BufferCounter[u8Lin_ESCI] = ESCI_ZERO_U8;
            /* Slave to slave header */
            if((uint8)LIN_SLAVE_TO_SLAVE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)
            {
                /* Update LIN channel frame operation status to LIN_TX_COMPLETE_STATE */
                    Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_TX_COMPLETE_STATE;
            }
        }
        /* Last write of the header, clear all error flags and RXRDY */
        /* Clear the Noise Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
        /* Framing Error flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* Clear Bit Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_BERR_MASK_U16);
        /* Clear Slave Timeout Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_STO_MASK_U16);
        /* Clear Physical Bus Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_PBERR_MASK_U16);
        /* Clear Checksum Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_CKERR_MASK_U16);
        /* Clear Overflow Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_OVFL_MASK_U16);
        /* Clear Unrequested Data Received Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_UREQ_MASK_U16);

        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_24();
        {
            /* Disable Transmit Data Ready Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            
            if((uint8)LIN_SLAVE_TO_SLAVE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)
            {
                /* Disable Receive Data Ready Interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_RXIE_MASK_U16);
            }
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_24();
    }
}

/**
* @brief   Interrupt handler for RX Interrupt on ESCI.
* @details This function shall manage all the RX Interrupt ISRs on the
*          addressed channel.
*
* @param[in]    Channel LIN channel to be addressed.
*
* @return       void.
*
* @note         Internal driver function.
*/
static FUNC (void, LIN_CODE) Lin_ESCI_RxInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel)
{
    VAR(uint16, AUTOMATIC) u16Lin_status;
    /* Get the status of ESCI_IFSR2 interrupt flags */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    u16Lin_status = REG_READ16(ESCI_IFSR2_ADDR32(u8Lin_ESCI));
    /* Check if Receive Data Ready Interrupt Flag is set */
    if (0U != (u16Lin_status & ESCI_IFSR2_RXRDY_MASK_U16))
    {
        /* First byte received ? */
        if( Lin_ESCI_au8BufferCounter[u8Lin_ESCI] == ESCI_ZERO_U8)
        {
            /* First byte received */
            /* Update LIN channel frame operation status to LIN_CH_RECEIVE_DATA */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_RECEIVE_DATA;
        }
        /* Store data in buffer */
        Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->au8Lin_DATA[Lin_ESCI_au8BufferCounter[u8Lin_ESCI]] =\
                    /**
                    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                    *
                    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                    *
                    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                    *                or a wider essential type Pointer type conversions.
                    */
                    (REG_READ8(ESCI_LRR_ADDR32(u8Lin_ESCI)) & ESCI_LRR_D_MASK_U8);
        /* Increment counter by 1 */
        Lin_ESCI_au8BufferCounter[u8Lin_ESCI]++;
        /* Is this the last byte ? */
        if(Lin_ESCI_au8BufferCounter[u8Lin_ESCI] >= Lin_ESCI_au8BufferCounterMax[u8Lin_ESCI])
        {
            /* Last byte has been received */
            SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_21();
            {
                /* Disable Receive Data Ready Interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_RXIE_MASK_U16);
            }
            SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_21();
            /* Clear Receive Data Ready Interrupt flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);
        }
        else
        {
            /* ISR driven */
            /* Clear Receive Data Ready Interrupt flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);
        }
    }
    /* Check if Frame Complete Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_FRC_MASK_U16))
    {
        /* Clear Frame Complete Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_FRC_MASK_U16);

        if (LIN_TX_SLEEP_COMMAND == Lin_au8TransmitHeaderCommand[u8LogicalChannel])
        {
            /* Clear RX Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);
            /* Disable RX interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_RXIE_MASK_U16);
            /* Disable Receiver*/
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
            /* Clear TX Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_TXRDY_MASK_U16);
            /* Disable TX interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            /* Clear Framing Error Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
            /* Disable Frame Error Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);
            /* Clear Noise Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
            /* Disable Noise Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_NFIE_MASK_U16);
            if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8LogicalChannel]->pChannelConfigPC->u8LinChannelWakeupSupport)
            {
                SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_19();
                {
                    /* Enable Receiver*/
                    /**
                    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                    *
                    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                    *
                    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                    *                or a wider essential type Pointer type conversions.
                    */
                    REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
                    /* Clear Wake-Up flag */
                    /**
                    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                    *
                    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                    *
                    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                    *                or a wider essential type Pointer type conversions.
                    */
                    REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_LWAKE_MASK_U16);
                    /* Enable wake up interrupt */
                    /**
                    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                    *
                    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                    *
                    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                    *                or a wider essential type Pointer type conversions.
                    */
                    REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_WUIE_MASK_U16);
                }
                SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_19();
            }
            /* Set Channel state to LIN_CH_SLEEP_PENDING state */
            Lin_au8LinChStatus[u8LogicalChannel] = LIN_CH_SLEEP_PENDING;
            /* Update Lin_au8TransmitHeaderCommand value to LIN_TX_NO_COMMAND */
            Lin_au8TransmitHeaderCommand[u8LogicalChannel] = LIN_TX_NO_COMMAND;
        }
        else
        {
            /* Check the Type of Response */
            if((uint8)LIN_MASTER_RESPONSE == Lin_ESCI_pChShadowBuffPtr[u8Lin_ESCI]->u8Lin_TYPE)
            {
                /* Master response */
                /* Update LIN channel frame operation status to LIN_TX_COMPLETE_STATE */
                    Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_TX_COMPLETE_STATE;
            }
            else
            {
                /* Slave response */
                /* Update LIN channel frame operation status to LIN_RX_COMPLETE_STATE */
                Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_RX_COMPLETE_STATE;
            }
        }
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_20();
        {
            /* Disable Frame Complete Interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_FCIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_20();
    }
    else
    {
        /* Clear all interrupt flags */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_RESET_MASK_U16);
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI),ESCI_IFSR2_RESET_MASK_U16);
    }
}
/**
* @brief   Interrupt handler for Error Interrupt on ESCI.
* @details This function shall manage all the Error Interrupt ISRs on the
*          addressed channel.
*
* @param[in]    Channel LIN channel to be addressed.
*
* @return       void.
*
* @note         Internal driver function.
*/
static FUNC (void, LIN_CODE) Lin_ESCI_ErrorInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel)
{
    VAR(uint16, AUTOMATIC) u16ESCI_status;
    VAR(uint16, AUTOMATIC) u16Lin_status;
    VAR(boolean, AUTOMATIC) bIsTxErrorOnSleepCmd;
    VAR(boolean, AUTOMATIC) bESCI_reset;

    bIsTxErrorOnSleepCmd = (boolean)FALSE;
    bESCI_reset = (boolean)FALSE;

    /* Get the status of ESCI_IFSR1 interrupt flags */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    u16ESCI_status = REG_READ16(ESCI_IFSR1_ADDR32(u8Lin_ESCI));
    /* Get the status of ESCI_IFSR2 interrupt flags */
    /**
    * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
    *
    * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
    *
    * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
    *                or a wider essential type Pointer type conversions.
    */
    u16Lin_status = REG_READ16(ESCI_IFSR2_ADDR32(u8Lin_ESCI));

    /* Check if Noise Interrupt Flag is set */
    if (0U != (u16ESCI_status & ESCI_IFSR1_NF_MASK_U16))
    {
        /* Clear the Noise Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
        /* Set LIN channel frame error status to LIN_NOISE_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = LIN_NOISE_ERROR;
        if (Lin_au8LinChFrameStatus[u8LogicalChannel] == LIN_CH_SEND_HEADER)
        {
            /* LIN_CH_SEND_HEADER */
            /* Update LIN channel frame operation status to LIN_CH_SEND_HEADER_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_HEADER_ERROR;
        }
        else
        {
            /* LIN_CH_SEND_DATA */
            /* Update LIN channel frame operation status to LIN_CH_SEND_DATA_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_DATA_ERROR;
        }
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Frame error Interrupt Flag is set */
    else if (0U != (u16ESCI_status & ESCI_IFSR1_FE_MASK_U16))
    {
        /* Framing Error flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* Set LIN channel frame error status to LIN_FRAMING_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = LIN_FRAMING_ERROR;
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Bit Error Interrupt Flag is set */
    else if (0U != (u16ESCI_status & ESCI_IFSR1_BERR_MASK_U16))
    {
        /* Clear Bit Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_BERR_MASK_U16);
        /* Set LIN channel frame error status to LIN_BIT_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = LIN_BIT_ERROR;
        /* Check if error was on sleep frame transmitting */
        if (LIN_TX_SLEEP_COMMAND == Lin_au8TransmitHeaderCommand[u8LogicalChannel])
        {
            bIsTxErrorOnSleepCmd = (boolean)TRUE;
        }
        if (LIN_CH_SEND_HEADER == Lin_au8LinChFrameStatus[u8LogicalChannel])
        {
            /* LIN_CH_SEND_HEADER */
            /* Update LIN channel frame operation status to LIN_CH_SEND_HEADER_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_HEADER_ERROR;
        }
        else
        {
            /* LIN_CH_SEND_DATA */
            /* Update LIN channel frame operation status to LIN_CH_SEND_HEADER_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_DATA_ERROR;
        }
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Slave Timeout Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_STO_MASK_U16))
    {
        /* Clear Slave Timeout Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_STO_MASK_U16);
#if (LIN_DISABLE_FRAME_TIMEOUT == STD_OFF)
        /* Set LIN channel frame error status to SLAVE_TIMEOUT_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = SLAVE_TIMEOUT_ERROR;
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
#endif  /* LIN_DISABLE_FRAME_TIMEOUT */
    }
    /* Check if Physical Bus Error Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_PBERR_MASK_U16))
    {
        /* Clear Physical Bus Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_PBERR_MASK_U16);
        /* Set LIN channel frame error status to PHYSICAL_BUS_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = PHYSICAL_BUS_ERROR;
        /* Check if error was on sleep frame transmitting */
        if (LIN_TX_SLEEP_COMMAND == Lin_au8TransmitHeaderCommand[u8LogicalChannel])
        {
            bIsTxErrorOnSleepCmd = (boolean)TRUE;
        }
        if (LIN_CH_SEND_HEADER == Lin_au8LinChFrameStatus[u8LogicalChannel])
        {
            /* LIN_CH_SEND_HEADER */
            /* Update LIN channel frame operation status to LIN_CH_SEND_HEADER_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_HEADER_ERROR;
        }
        else
        {
            /* LIN_CH_SEND_DATA */
            /* Update LIN channel frame operation status to LIN_CH_SEND_DATA_ERROR */
            Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_SEND_DATA_ERROR;
        }
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Checksum Error Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_CKERR_MASK_U16))
    {
        /* Clear Checksum Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_CKERR_MASK_U16);
        /* Set LIN channel frame error status to LIN_CHECKSUM_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = LIN_CHECKSUM_ERROR;
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Overflow Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_OVFL_MASK_U16))
    {
        /* Clear Overflow Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_OVFL_MASK_U16);
        /* Set LIN channel frame error status to OVERFLOW_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = OVERFLOW_ERROR;
        /* The ESCI hardware should be reset */
        bESCI_reset = (boolean)TRUE;
    }
    /* Check if Unrequested Data Received Interrupt Flag is set */
    else if (0U != (u16Lin_status & ESCI_IFSR2_UREQ_MASK_U16))
    {
        /* Clear Unrequested Data Received Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_UREQ_MASK_U16);
        /* Set LIN channel frame error status to UNREQUESTED_DATA_ERROR */
        Lin_au8LinChFrameErrorStatus[u8LogicalChannel] = UNREQUESTED_DATA_ERROR;
    }
    else
    {
        /* Clear all interrupt flags */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_RESET_MASK_U16);
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI),ESCI_IFSR2_RESET_MASK_U16);
    }
    if((boolean)TRUE == bESCI_reset)
    {
        SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_26();
        {
            /* Set LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /* These redundant line are required since LIN state machine gets RESET correctly after
                setting LRES bit three times and  then clear it */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
            /* Disable Transmitter */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
            /* Disable Receiver */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
            /* Clear LRES bit of LCR1 register to reset the LIN state machine */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
            /* Enable Transmitter */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
            /* Enable Receiver */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
            /* Clear TX Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_TXRDY_MASK_U16);
            /* Disable TX interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
            /* Clear RX Ready Interrupt Flag */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);
            /* Disable RX interrupt */
            /**
            * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
            *
            * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
            *
            * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
            *                or a wider essential type Pointer type conversions.
            */
            REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_RXIE_MASK_U16);
        }
        SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_26();
    }
    /* Check if error was on sleep frame transmitting */
    if ((boolean)TRUE == bIsTxErrorOnSleepCmd) /* Error was on sleep frame transmitting */
    {
        /* Clear RX Ready Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_RXRDY_MASK_U16);
        /* Disable RX interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_RXIE_MASK_U16);
        /* Disable Receiver*/
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Clear TX Ready Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_TXRDY_MASK_U16);
        /* Disable TX interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_TXIE_MASK_U16);
        /* Clear Framing Error Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* Disable Frame Error Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);
        /* Clear Noise Interrupt Flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI),ESCI_IFSR1_NF_MASK_U16);
        /* Disable Noise Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_NFIE_MASK_U16);
        /* Check whether wake up detection is enabled */
        if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8LogicalChannel]->pChannelConfigPC->u8LinChannelWakeupSupport)
        {
            SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_27();
            {
                /* Enable Receiver*/
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
                /* Wake up detection enabled */
                /* Clear Wake-Up flag */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_WRITE16(ESCI_IFSR2_ADDR32(u8Lin_ESCI), ESCI_IFSR2_LWAKE_MASK_U16);
                /* Enable wake up interrupt */
                /**
                * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
                *
                * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
                *
                * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
                *                or a wider essential type Pointer type conversions.
                */
                REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_WUIE_MASK_U16);
            }
            SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_27();
        }
        /* Set Channel state LIN_CH_SLEEP_PENDING */
        Lin_au8LinChStatus[u8LogicalChannel] = LIN_CH_SLEEP_PENDING;
        /* Update Lin_au8TransmitHeaderCommand value to LIN_TX_NO_COMMAND */
        Lin_au8TransmitHeaderCommand[u8LogicalChannel] = LIN_TX_NO_COMMAND;
    }
}

/**
* @brief   Interrupt handler for Wakeup Interrupt on ESCI.
* @details This function shall manage all the Wakeup Interrupt ISRs on the
*          addressed channel.
*
* @param[in]    Channel LIN channel to be addressed.
*
* @return       void.
*
* @note         Internal driver function.
*/
static FUNC (void, LIN_CODE) Lin_ESCI_WakeupInterruptHandler(CONST(uint8, AUTOMATIC) u8Lin_ESCI, CONST(uint8, AUTOMATIC) u8LogicalChannel)
{
    SchM_Enter_Lin_LIN_EXCLUSIVE_AREA_25();
    {
        /* Disable wake up interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_WUIE_MASK_U16);
#if (IPV_ESCI >= IPV_ESCI_08_00_00_00)
    /* eSCI V.8 specific code*/
        /* Clear Framing Error flag */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_WRITE16(ESCI_IFSR1_ADDR32(u8Lin_ESCI), ESCI_IFSR1_FE_MASK_U16);
        /* The ESCI hardware should be reset */
        /* Set LRES bit of LCR1 register to reset the LIN state machine */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /* These redundant line are required since LIN state machine gets RESET correctly after
            setting LRES bit three times and  then clear it */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_LCR1_ADDR32(u8Lin_ESCI), ESCI_LCR1_LRES_MASK_U16);
        /* Disable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Disable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_RE_MASK_U16);
        /* Clear LRES bit of LCR1 register to reset the LIN state machine */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_CLEAR16(ESCI_LCR1_ADDR32(u8Lin_ESCI),ESCI_LCR1_LRES_MASK_U16);
        /* Enable Transmitter */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR1_ADDR32(u8Lin_ESCI), ESCI_CR1_TE_MASK_U16);
        /* Enable Receiver */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        /* Enable Frame Error Interrupt */
        /**
        * @violates @ref Lin_ESCI_c_REF_3 The cast is used to access memory mapped registers.
        *
        * @violates @ref Lin_ESCI_c_REF_4 This macro computes the address of any register by using the hardware offset of the controller.
        *
        * @violates @ref Lin_ESCI_c_REF_5 The value of a composite expression shall not be cast to a different essential type category
        *                or a wider essential type Pointer type conversions.
        */
        REG_BIT_SET16(ESCI_CR2_ADDR32(u8Lin_ESCI), ESCI_CR2_FEIE_MASK_U16);
#endif
    }
    SchM_Exit_Lin_LIN_EXCLUSIVE_AREA_25();
    /* Check whether the Lin channel status is in LIN_CH_SLEEP_STATE */
    if (LIN_CH_SLEEP_STATE == Lin_au8LinChStatus[u8LogicalChannel])
    {
        /* Check whether wake up detection is enabled */
        if ((uint8)STD_ON == Lin_pChannelConfigPtr[u8LogicalChannel]->pChannelConfigPC->u8LinChannelWakeupSupport)
        {
            /* Indicates a valid timer wakeup event to ECU State Manager */
            EcuM_CheckWakeup(Lin_pChannelConfigPtr[u8LogicalChannel]->pChannelConfigPC->LinChannelEcuMWakeupSource);
        }
        /* Set Channel state Operational */
        Lin_au8LinChStatus[u8LogicalChannel] = LIN_CH_OPERATIONAL;
        /* Update LIN channel frame operation status to LIN_CH_READY_STATE */
        Lin_au8LinChFrameStatus[u8LogicalChannel] = LIN_CH_READY_STATE;
    }
}
#define LIN_STOP_SEC_CODE
/**
* @violates @ref Lin_ESCI_c_REF_1 <MA>_MemMap.h is included after each section define in order to
                 set the current memory section as defined by AUTOSAR.
* @violates @ref Lin_ESCI_c_REF_2 This violation is not fixed since the inclusion of <MA>_MemMap.h
                 is as per AUTOSAR requirement [SWS_MemMap_00003].
*/
#include "Lin_MemMap.h"

#ifdef __cplusplus
}
#endif

/** @} */
