/*==================================================================================================
*   Project              : RTD AUTOSAR 4.7 
*   Platform             : CORTEXM
*   Peripheral           : SIUL2
*   Dependencies         : none
*
*   Autosar Version      : 4.7.0
*   Autosar Revision     : ASR_REL_4_7_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 3.0.0
*   Build Version        : S32K3_AUTOSAR_4_4_-_R21-11_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331
*
*   Copyright 2020 - 2023 NXP Semiconductors
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

/**
*   @file      Tspc_Port_Ip_Cfg.h
*
*   @addtogroup Port_CFG
*   @{
*/

#ifdef __cplusplus
extern "C"{
#endif


/*==================================================================================================
                                         INCLUDE FILES
 1) system and project includes
 2) needed interfaces from external units
 3) internal and external interfaces from this unit
==================================================================================================*/
#include "Tspc_Port_Ip_Cfg.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define TSPC_PORT_IP_VENDOR_ID_CFG_C                       43
#define TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_C        4
#define TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_C        7
#define TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_C     0
#define TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_C                3
#define TSPC_PORT_IP_SW_MINOR_VERSION_CFG_C                0
#define TSPC_PORT_IP_SW_PATCH_VERSION_CFG_C                0

/*==================================================================================================
*                                     FILE VERSION CHECKS
==================================================================================================*/
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same vendor */
#if (TSPC_PORT_IP_VENDOR_ID_CFG_C != TSPC_PORT_IP_VENDOR_ID_CFG_H)
    #error "Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h have different vendor ids"
#endif
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same Autosar version */
#if ((TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_C    != TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_C    != TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_C != TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_H) \
    )
    #error "AutoSar Version Numbers of Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are different"
#endif
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same Software version */
#if ((TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_C != TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_SW_MINOR_VERSION_CFG_C != TSPC_PORT_IP_SW_MINOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_SW_PATCH_VERSION_CFG_C != TSPC_PORT_IP_SW_PATCH_VERSION_CFG_H)    \
    )
    #error "Software Version Numbers of Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are different"
#endif

/*==================================================================================================
                             LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
==================================================================================================*/

/*==================================================================================================
                                             LOCAL MACROS
==================================================================================================*/

/*==================================================================================================
                                            LOCAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
                                           LOCAL VARIABLES
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL VARIABLES
==================================================================================================*/

/* clang-format off */

/*
 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
MBDT:
- options: {callFromInitBoot: 'true', coreID: M7_0}
- pin_list:
  - {pin_num: '29', peripheral: SIUL2, signal: 'gpio, 140', pin_signal: PTE12, direction: INPUT/OUTPUT, outputInversionSelect: doNotInvert, InitValue: state_1}
  - {pin_num: '26', peripheral: eMIOS_0, signal: emios_0_ch_19_y, pin_signal: PTE14, identifier: '', direction: OUTPUT, outputInversionSelect: invert, outputBufferEnable: enabled,
    InitValue: state_0}
  - {pin_num: '72', peripheral: LPSPI2, signal: lpspi2_pcs0, pin_signal: PTB25, direction: OUTPUT}
  - {pin_num: '80', peripheral: LPSPI2, signal: lpspi2_sck, pin_signal: PTB29, direction: OUTPUT}
  - {pin_num: '79', peripheral: LPSPI2, signal: lpspi2_sin, pin_signal: PTB2, direction: INPUT}
  - {pin_num: '74', peripheral: LPSPI2, signal: lpspi2_sout, pin_signal: PTB3, direction: OUTPUT}
  - {pin_num: '172', peripheral: LPUART2, signal: lpuart2_rx, pin_signal: PTA8}
  - {pin_num: '171', peripheral: LPUART2, signal: lpuart2_tx, pin_signal: PTA9, direction: OUTPUT}
  - {pin_num: '117', peripheral: eMIOS_0, signal: emios_0_ch_0_x, pin_signal: PTB12, direction: OUTPUT}
  - {pin_num: '116', peripheral: eMIOS_0, signal: emios_0_ch_1_g, pin_signal: PTB13, direction: OUTPUT}
  - {pin_num: '114', peripheral: eMIOS_0, signal: emios_0_ch_2_g, pin_signal: PTB14, direction: OUTPUT}
  - {pin_num: '113', peripheral: eMIOS_0, signal: emios_0_ch_3_g, pin_signal: PTB15, direction: OUTPUT}
  - {pin_num: '112', peripheral: eMIOS_0, signal: emios_0_ch_4_g, pin_signal: PTB16, direction: OUTPUT}
  - {pin_num: '110', peripheral: eMIOS_0, signal: emios_0_ch_5_g, pin_signal: PTB17, direction: OUTPUT}
  - {pin_num: '109', peripheral: eMIOS_0, signal: emios_0_ch_6_g, pin_signal: PTA17, direction: OUTPUT}
  - {pin_num: '104', peripheral: eMIOS_0, signal: emios_0_ch_7_g, pin_signal: PTE7, direction: OUTPUT}
  - {pin_num: '35', peripheral: SIUL2, signal: 'gpio, 111', pin_signal: PTD15, direction: INPUT}
  - {pin_num: '15', peripheral: SIUL2, signal: 'gpi, 25', pin_signal: PTA25}
  - {pin_num: '11', peripheral: ADC1, signal: adc1_s19, pin_signal: PTE13, inputBufferEnable: enabled}
  - {pin_num: '82', peripheral: SIUL2, signal: 'gpio, 82', pin_signal: PTC18, direction: OUTPUT, InitValue: state_1}
  - {pin_num: '85', peripheral: SIUL2, signal: 'gpio, 84', pin_signal: PTC20, direction: INPUT}
  - {pin_num: '86', peripheral: SIUL2, signal: 'gpio, 85', pin_signal: PTC21, direction: OUTPUT}
  - {pin_num: '88', peripheral: SIUL2, signal: 'gpio, 88', pin_signal: PTC24, direction: OUTPUT}
  - {pin_num: '102', peripheral: CAN0, signal: can0_rx, pin_signal: PTA6}
  - {pin_num: '100', peripheral: CAN0, signal: can0_tx, pin_signal: PTA7}
  - {pin_num: '12', peripheral: SIUL2, signal: 'gpio, 133', pin_signal: PTE5, direction: OUTPUT, InitValue: state_1}
  - {pin_num: '120', peripheral: SIUL2, signal: 'gpio, 99', pin_signal: PTD3, direction: INPUT}
  - {pin_num: '121', peripheral: SIUL2, signal: 'gpio, 98', pin_signal: PTD2, direction: OUTPUT}
  - {pin_num: '122', peripheral: SIUL2, signal: 'gpio, 119', pin_signal: PTD23, direction: OUTPUT}
  - {pin_num: '97', peripheral: CAN1, signal: can1_rx, pin_signal: PTC9}
  - {pin_num: '98', peripheral: CAN1, signal: can1_tx, pin_signal: PTC8}
  - {pin_num: '28', peripheral: SIUL2, signal: 'gpio, 27', pin_signal: PTA27, direction: INPUT/OUTPUT, InitValue: state_1}
  - {pin_num: '157', peripheral: CAN2, signal: can2_tx, pin_signal: PTE24}
  - {pin_num: '158', peripheral: CAN2, signal: can2_rx, pin_signal: PTE25}
  - {pin_num: '99', peripheral: CAN3, signal: can3_rx, pin_signal: PTC29}
  - {pin_num: '96', peripheral: CAN3, signal: can3_tx, pin_signal: PTC28}
  - {pin_num: '103', peripheral: CAN4, signal: can4_rx, pin_signal: PTC31}
  - {pin_num: '101', peripheral: CAN4, signal: can4_tx, pin_signal: PTC30}
  - {pin_num: '90', peripheral: CAN5, signal: can5_rx, pin_signal: PTC11}
  - {pin_num: '92', peripheral: CAN5, signal: can5_tx, pin_signal: PTC10}
  - {pin_num: '119', peripheral: SIUL2, signal: 'gpio, 100', pin_signal: PTD4, direction: OUTPUT}
  - {pin_num: '118', peripheral: SIUL2, signal: 'gpio, 118', pin_signal: PTD22, direction: OUTPUT}
  - {pin_num: '115', peripheral: SIUL2, signal: 'gpio, 117', pin_signal: PTD21, direction: INPUT}
  - {pin_num: '95', peripheral: SIUL2, signal: 'gpio, 32', pin_signal: PTB0, direction: OUTPUT}
  - {pin_num: '94', peripheral: SIUL2, signal: 'gpio, 33', pin_signal: PTB1, direction: OUTPUT}
  - {pin_num: '93', peripheral: SIUL2, signal: 'gpio, 91', pin_signal: PTC27, direction: INPUT}
  - {pin_num: '91', peripheral: SIUL2, signal: 'gpio, 90', pin_signal: PTC26, direction: OUTPUT}
  - {pin_num: '89', peripheral: SIUL2, signal: 'gpio, 89', pin_signal: PTC25, direction: OUTPUT}
  - {pin_num: '87', peripheral: SIUL2, signal: 'gpio, 87', pin_signal: PTC23, direction: INPUT}
  - {pin_num: '138', peripheral: SIUL2, signal: 'gpio, 126', pin_signal: PTD30, direction: OUTPUT}
  - {pin_num: '142', peripheral: SIUL2, signal: 'gpio, 145', pin_signal: PTE17, direction: OUTPUT}
  - {pin_num: '125', peripheral: SIUL2, signal: 'gpio, 120', pin_signal: PTD24, direction: INPUT}
  - {pin_num: '111', peripheral: SIUL2, signal: 'gpio, 116', pin_signal: PTD20, direction: OUTPUT}
  - {pin_num: '70', peripheral: SIUL2, signal: 'gpio, 56', pin_signal: PTB24, direction: OUTPUT}
 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
 */
/* clang-format on */

/* No registers that support TSPC were configured*/

/*==================================================================================================
                                      LOCAL FUNCTION PROTOTYPES
==================================================================================================*/

/*==================================================================================================
                                           LOCAL FUNCTIONS
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL FUNCTIONS
==================================================================================================*/


#ifdef __cplusplus
}
#endif

/** @} */
