/*==================================================================================================
*   Project              : RTD AUTOSAR 4.7
*   Platform             : CORTEXM
*   Peripheral           : SIUL2
*   Dependencies         : none
*
*   Autosar Version      : 4.7.0
*   Autosar Revision     : ASR_REL_4_7_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 3.0.0
*   Build Version        : S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331
*
*   Copyright 2020 - 2023 NXP Semiconductors
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

#ifndef DIO_CFG_H
#define DIO_CFG_H

#ifdef __cplusplus
extern "C" {
#endif


/*=================================================================================================
*                                        INCLUDE FILES
* 1) system and project includes
* 2) needed interfaces from external units
* 3) internal and external interfaces from this unit
=================================================================================================*/
#include "Std_Types.h"
#include "Siul2_Dio_Ip_Cfg.h"

/*=================================================================================================
*                              SOURCE FILE VERSION INFORMATION
=================================================================================================*/
#define DIO_VENDOR_ID_CFG_H                   43
#define DIO_AR_RELEASE_MAJOR_VERSION_CFG_H    4
#define DIO_AR_RELEASE_MINOR_VERSION_CFG_H    7
#define DIO_AR_RELEASE_REVISION_VERSION_CFG_H 0
#define DIO_SW_MAJOR_VERSION_CFG_H            3
#define DIO_SW_MINOR_VERSION_CFG_H            0
#define DIO_SW_PATCH_VERSION_CFG_H            0

/*=================================================================================================
*                                     FILE VERSION CHECKS
=================================================================================================*/
#ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
    /* Check if Dio_Cfg.h and StandardTypes.h file are of the same Autosar version */
    #if ((DIO_AR_RELEASE_MAJOR_VERSION_CFG_H != STD_AR_RELEASE_MAJOR_VERSION) ||   \
        (DIO_AR_RELEASE_MINOR_VERSION_CFG_H != STD_AR_RELEASE_MINOR_VERSION)       \
        )
        #error "AUTOSAR Version Numbers of Dio_Cfg.h and StandardTypes.h are different"
    #endif

#endif

/* Check if Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h files are of the same vendor.*/
#if (DIO_VENDOR_ID_CFG_H != SIUL2_DIO_IP_VENDOR_ID_CFG_H)
    #error "Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h have different vendor ids"
#endif
/* Check if Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h files are of the same Autosar version.*/
#if ((DIO_AR_RELEASE_MAJOR_VERSION_CFG_H    != SIUL2_DIO_IP_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
     (DIO_AR_RELEASE_MINOR_VERSION_CFG_H    != SIUL2_DIO_IP_AR_RELEASE_MINOR_VERSION_CFG_H) || \
     (DIO_AR_RELEASE_REVISION_VERSION_CFG_H != SIUL2_DIO_IP_AR_RELEASE_REVISION_VERSION_CFG_H) \
    )
    #error "AutoSar Version Numbers of Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h are different"
#endif
/* Check if Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h files are of the same Software version.*/
#if ((DIO_SW_MAJOR_VERSION_CFG_H != SIUL2_DIO_IP_SW_MAJOR_VERSION_CFG_H) || \
     (DIO_SW_MINOR_VERSION_CFG_H != SIUL2_DIO_IP_SW_MINOR_VERSION_CFG_H) || \
     (DIO_SW_PATCH_VERSION_CFG_H != SIUL2_DIO_IP_SW_PATCH_VERSION_CFG_H)    \
    )
    #error "Software Version Numbers of Dio_Cfg.h and Siul2_Dio_Ip_Cfg.h are different"
#endif

/*=================================================================================================
*                                          CONSTANTS
=================================================================================================*/
/**
* @brief      Dio driver Channel Groups configuration switch.
*/
/**
* @brief          Enable or Disable Development Error Detection.
*
* @implements     DIO_DEV_ERROR_DETECT_define
*/
#define DIO_DEV_ERROR_DETECT           (STD_ON)

/**
* @brief          Function @p Dio_GetVersionInfo() enable switch.
*
* @implements     DIO_VERSION_INFO_API_define
*/
#define DIO_VERSION_INFO_API           (STD_ON)

/**
* @brief          Function @p Dio_FlipChannel() enable switch.
*/
#define DIO_FLIP_CHANNEL_API           (STD_ON)

/**
* @brief          Function @p Dio_MaskedWritePort() enable switch.
*/
#define DIO_MASKEDWRITEPORT_API           (STD_ON)
/**
* @brief          Platform specific define stating if mapping of port bits over port pins is reversed.
*/
#define DIO_REVERSED_MAPPING_OF_PORT_BITS_OVER_PORT_PINS    (STD_ON)

/**
* @brief          Reversed port functionality enable switch.
*
* @implements DIO_REVERSEPORTBITS_define
*/
#define DIO_REVERSEPORTBITS           (STD_ON)

/**
* @brief          Undefined pins masking enable switch.
*/
#define DIO_READZERO_UNDEFINEDPORTS           (STD_OFF)
/**
* @brief Enable/Disable multiocre function from the driver
*/
#define DIO_MULTICORE_ENABLED          (STD_OFF)

/**
* @brief          Number of implemented ports.
*
* @note           Used for channel, port and channel group validation.
*/
#define DIO_NUM_PORTS_U16               ((uint16)0xe)

/**
* @brief          The number of partition on the port
*
* @note           Used for port validation.
*/
#define DIO_PORT_PARTITION_U16          ((uint16)14U)

/**
* @brief          Number of channels in a port.
*
* @note           Used for channel, port and channel group validation.
*/
#define DIO_NUM_CHANNELS_PER_PORT_U16   ((uint16)((uint16)sizeof(Dio_PortLevelType) * 0x8U))

/**
* @brief          Number of channels available on the implemented ports.
*
* @note           Used for channel validation.
*/
#if (STD_ON == DIO_DEV_ERROR_DETECT)
    #define DIO_NUM_CHANNELS_U16            ((uint16)219U)
#endif


/**
* @brief The number of partition on the channel.
*
* @note           Used for channel validation.
*/
#define DIO_CHANNEL_PARTITION_U16           ((uint16)224U)

/**
* @brief          Mask representing no available channels on a port.
*
* @note           Used for channel validation.
*/
#if (STD_ON == DIO_DEV_ERROR_DETECT)
    #define DIO_NO_AVAILABLE_CHANNELS_U16   ((Dio_PortLevelType)0x0U)
#endif

/**
* @brief          Mask representing the maximum valid offset for a channel group.
*
* @note           Used for channel group validation.
*/
#if (STD_ON == DIO_DEV_ERROR_DETECT)
    #define DIO_MAX_VALID_OFFSET_U8         ((uint8)0xFU)
#endif

/**
*   @brief   Enables or disables the access to a hardware register from user mode
*            USER_MODE_SOFT_LOCKING:        All reads to hw registers will be done via REG_PROT, user mode access
*            SUPERVISOR_MODE_SOFT_LOCKING:  Locks the access to the registers only for supervisor mode
*
*   @note    Currently, no register protection mechanism is used for Dio driver.
*/
#define DIO_USER_MODE_SOFT_LOCKING      (STD_OFF)

/**
* @brief          Dio driver Pre-Compile configuration switch.
*/
#define DIO_PRECOMPILE_SUPPORT

/**
* @brief Support for User mode.
*        If this parameter has been configured to STD_ON, the Dio driver code can be executed from both supervisor and user mode.
*/

#define DIO_ENABLE_USER_MODE_SUPPORT   (STD_OFF)


#ifndef MCAL_ENABLE_USER_MODE_SUPPORT
 #ifdef DIO_ENABLE_USER_MODE_SUPPORT
  #if (STD_ON == DIO_ENABLE_USER_MODE_SUPPORT)
    #error MCAL_ENABLE_USER_MODE_SUPPORT is not enabled. For running Dio in user mode the MCAL_ENABLE_USER_MODE_SUPPORT needs to be defined
  #endif /* (STD_ON == DIO_ENABLE_USER_MODE_SUPPORT) */
 #endif /* ifdef DIO_ENABLE_USER_MODE_SUPPORT*/
#endif /* ifndef MCAL_ENABLE_USER_MODE_SUPPORT */

/**
* @brief Number of SIUL2 instances on the platform.
*/
#define DIO_NUM_SIUL2_INSTANCES_U8      ((uint8)1)

/**
* @brief List of identifiers for each of the SIUL2 instances on the platform
*/
#define DIO_SIUL2_0_U8        ((uint8)0)

/*=================================================================================================
*                                      DEFINES AND MACROS
=================================================================================================*/

/**
* @brief          Symbolic name for the configuration Dio_ConfigPC.
*/
#define Dio_ConfigPC    (Dio_Config)

/* ========== DioConfig ========== */

/* ---------- PTA_H ---------- */

/**
* @brief          Symbolic name for the port PTA_H.
*/
#define DioConf_DioPort_PTA_H  ((uint8)0x01U)
/**
* @brief          Symbolic name for the channel RGBLED0_GREEN.
*
*/
#define DioConf_DioChannel_RGBLED0_GREEN  ((uint16)0x001bU)
/**
* @brief          Symbolic name for the channel USER_SW2.
*
*/
#define DioConf_DioChannel_USER_SW2  ((uint16)0x0019U)
/* ---------- PTB_H ---------- */

/**
* @brief          Symbolic name for the port PTB_H.
*/
#define DioConf_DioPort_PTB_H  ((uint8)0x03U)
/**
* @brief          Symbolic name for the channel LED_CAN3.
*
*/
#define DioConf_DioChannel_LED_CAN3  ((uint16)0x0038U)
/* ---------- PTC_H ---------- */

/**
* @brief          Symbolic name for the port PTC_H.
*/
#define DioConf_DioPort_PTC_H  ((uint8)0x05U)
/**
* @brief          Symbolic name for the channel CanController_0_EN.
*
*/
#define DioConf_DioChannel_CanController_0_EN  ((uint16)0x0058U)
/**
* @brief          Symbolic name for the channel CanController_0_ERRN.
*
*/
#define DioConf_DioChannel_CanController_0_ERRN  ((uint16)0x0054U)
/**
* @brief          Symbolic name for the channel CanController_0_STB.
*
*/
#define DioConf_DioChannel_CanController_0_STB  ((uint16)0x0055U)
/**
* @brief          Symbolic name for the channel LED_CAN0.
*
*/
#define DioConf_DioChannel_LED_CAN0  ((uint16)0x0052U)
/**
* @brief          Symbolic name for the channel CanController_3_ERRN.
*
*/
#define DioConf_DioChannel_CanController_3_ERRN  ((uint16)0x005bU)
/**
* @brief          Symbolic name for the channel CanController_4_EN.
*
*/
#define DioConf_DioChannel_CanController_4_EN  ((uint16)0x005aU)
/**
* @brief          Symbolic name for the channel CanController_4_STB.
*
*/
#define DioConf_DioChannel_CanController_4_STB  ((uint16)0x0059U)
/**
* @brief          Symbolic name for the channel CanController_4_ERRN.
*
*/
#define DioConf_DioChannel_CanController_4_ERRN  ((uint16)0x0057U)
/* ---------- PTD_L ---------- */

/**
* @brief          Symbolic name for the port PTD_L.
*/
#define DioConf_DioPort_PTD_L  ((uint8)0x06U)
/**
* @brief          Symbolic name for the channel USER_SW1.
*
*/
#define DioConf_DioChannel_USER_SW1  ((uint16)0x006fU)
/**
* @brief          Symbolic name for the channel CanController_1_ERRN.
*
*/
#define DioConf_DioChannel_CanController_1_ERRN  ((uint16)0x0063U)
/**
* @brief          Symbolic name for the channel CanController_1_STB.
*
*/
#define DioConf_DioChannel_CanController_1_STB  ((uint16)0x0062U)
/**
* @brief          Symbolic name for the channel CanController_2_EN.
*
*/
#define DioConf_DioChannel_CanController_2_EN  ((uint16)0x0064U)
/* ---------- PTE_L ---------- */

/**
* @brief          Symbolic name for the port PTE_L.
*/
#define DioConf_DioPort_PTE_L  ((uint8)0x08U)
/**
* @brief          Symbolic name for the channel RGBLED0_BLUE.
*
*/
#define DioConf_DioChannel_RGBLED0_BLUE  ((uint16)0x008cU)
/**
* @brief          Symbolic name for the channel LED_CAN1.
*
*/
#define DioConf_DioChannel_LED_CAN1  ((uint16)0x0085U)
/* ---------- PTD_H ---------- */

/**
* @brief          Symbolic name for the port PTD_H.
*/
#define DioConf_DioPort_PTD_H  ((uint8)0x07U)
/**
* @brief          Symbolic name for the channel CanController_1_EN.
*
*/
#define DioConf_DioChannel_CanController_1_EN  ((uint16)0x0077U)
/**
* @brief          Symbolic name for the channel CanController_2_ERRN.
*
*/
#define DioConf_DioChannel_CanController_2_ERRN  ((uint16)0x0075U)
/**
* @brief          Symbolic name for the channel CanController_2_STB.
*
*/
#define DioConf_DioChannel_CanController_2_STB  ((uint16)0x0076U)
/**
* @brief          Symbolic name for the channel CanController_5_EN.
*
*/
#define DioConf_DioChannel_CanController_5_EN  ((uint16)0x007eU)
/**
* @brief          Symbolic name for the channel CanController_5_ERRN.
*
*/
#define DioConf_DioChannel_CanController_5_ERRN  ((uint16)0x0078U)
/**
* @brief          Symbolic name for the channel LED_CAN2.
*
*/
#define DioConf_DioChannel_LED_CAN2  ((uint16)0x0074U)
/* ---------- PTA_L ---------- */

/**
* @brief          Symbolic name for the port PTA_L.
*/
#define DioConf_DioPort_PTA_L  ((uint8)0x00U)
/* ---------- PTB_L ---------- */

/**
* @brief          Symbolic name for the port PTB_L.
*/
#define DioConf_DioPort_PTB_L  ((uint8)0x02U)
/**
* @brief          Symbolic name for the channel CanController_3_EN.
*
*/
#define DioConf_DioChannel_CanController_3_EN  ((uint16)0x0020U)
/**
* @brief          Symbolic name for the channel CanController_3_STB.
*
*/
#define DioConf_DioChannel_CanController_3_STB  ((uint16)0x0021U)
/* ---------- PTC_L ---------- */

/**
* @brief          Symbolic name for the port PTC_L.
*/
#define DioConf_DioPort_PTC_L  ((uint8)0x04U)
/* ---------- PTE_H ---------- */

/**
* @brief          Symbolic name for the port PTE_H.
*/
#define DioConf_DioPort_PTE_H  ((uint8)0x09U)
/**
* @brief          Symbolic name for the channel CanController_5_STB.
*
*/
#define DioConf_DioChannel_CanController_5_STB  ((uint16)0x0091U)

/*=================================================================================================
*                                             ENUMS
=================================================================================================*/


/*=================================================================================================
*                                STRUCTURES AND OTHER TYPEDEFS
=================================================================================================*/

/**
* @brief          Type of a DIO port representation.
*
* @implements     Dio_PortType_typedef
*/
typedef uint8 Dio_PortType;

/**
* @brief          Type of a DIO channel representation.
*
* @implements     Dio_ChannelType_typedef
*/
typedef uint16 Dio_ChannelType;

/**
* @brief          Type of a DIO port levels representation.
*
* @implements     Dio_PortLevelType_typedef
*/
typedef uint16 Dio_PortLevelType;

/**
* @brief          Type of a DIO channel levels representation.
*
* @implements     Dio_LevelType_typedef
*/
typedef uint8 Dio_LevelType;

/**
* @brief          Type of a DIO channel group representation.
*
* @implements     Dio_ChannelGroupType_struct
*/
typedef struct
{
    Dio_PortType      port;             /**< @brief Port identifier.  */
    uint8             u8offset;         /**< @brief Bit offset within the port. */
    Dio_PortLevelType mask;             /**< @brief Group mask. */
} Dio_ChannelGroupType;

/**
* @brief          Type of a DIO configuration structure.
*
* @note           In this implementation there is no need for a configuration
*                 structure there is only a dummy field, it is recommended
*                 to initialize this field to zero.
*
* @implements     Dio_ConfigType_struct
*/
typedef struct
{
    uint8 u8NumChannelGroups; /**< @brief Number of channel groups in configuration */
    const Dio_ChannelGroupType * pChannelGroupList;     /**< @brief
                                               Pointer to list of channel groups in configuration */
    const uint32 * pau32Dio_ChannelToPartitionMap;      /**< @brief Pointer to channel to partition mapping */
    const uint32 * pau32Dio_PortToPartitionMap;         /**< @brief Pointer to port to partition mapping */
} Dio_ConfigType;

/*=================================================================================================
*                                GLOBAL VARIABLE DECLARATIONS
=================================================================================================*/
#define DIO_START_SEC_CONST_8
#include "Dio_MemMap.h"

/**
* @brief Array of values storing the SIUL2 instance each port on the platform belongs to
*/
extern const uint8 Dio_au8PortSiul2Instance[DIO_NUM_PORTS_U16];

/**
* @brief Array of values storing the offset PORT0 has inside the SIUL2 instance it
*        belongs to
*/
extern const uint8 Dio_au8Port0OffsetInSiul2Instance[DIO_NUM_SIUL2_INSTANCES_U8];

#define DIO_STOP_SEC_CONST_8
#include "Dio_MemMap.h"

#define DIO_START_SEC_CONST_32
#include "Dio_MemMap.h"

/**
* @brief Array containing list of mapping channel for partition
*/
extern const uint32 Dio_au32ChannelToPartitionMap[DIO_CHANNEL_PARTITION_U16];

/**
* @brief Array containing list of mapping port for partition
*/
extern const uint32 Dio_au32PortToPartitionMap[DIO_PORT_PARTITION_U16];

#define DIO_STOP_SEC_CONST_32
#include "Dio_MemMap.h"

#define DIO_START_SEC_CONST_16
#include "Dio_MemMap.h"

/**
* @brief Array of bitmaps of output pins available per port
*/
extern const Dio_PortLevelType Dio_aAvailablePinsForWrite[DIO_NUM_PORTS_U16];

/**
* @brief Array of bitmaps of input pins available per port
*/
extern const Dio_PortLevelType Dio_aAvailablePinsForRead[DIO_NUM_PORTS_U16];

#define DIO_STOP_SEC_CONST_16
#include "Dio_MemMap.h"

/*=================================================================================================
*                                    FUNCTION PROTOTYPES
=================================================================================================*/

#ifdef __cplusplus
}
#endif

#endif  /* DIO_CFG_H */

/** @} */

