#ifndef PORTABLE_WORDSIZES
#ifdef __MW_TARGET_USE_HARDWARE_RESOURCES_H__
#ifndef __MW_TARGET_HARDWARE_RESOURCES_H__
#define __MW_TARGET_HARDWARE_RESOURCES_H__

#define MW_MULTI_TASKING_MODE 0
#include "mbdt_board_init.h"
#include "s32k3_trigger_config.h"

#define MW_USECODERTARGET 1.000000
#define MW_TARGETHARDWARE NXP S32K3xx
#define MW_CONNECTIONINFO_SERIALINTERFACE_BAUDRATE 115200
#define MW_CONNECTIONINFO_SERIALINTERFACE_COMPORT COM1
#define MW_CONNECTIONINFO_SERIALINTERFACE_VERBOSE 0.000000
#define MW_EXTMODE_CONFIGURATION Serial Interface
#define MW_EXTMODE_HARDWAREUART UartChannel_0
#define MW_EXTMODE_INTPRIORITY 7
#define MW_RTOS Baremetal
#define MW_SCHEDULER_INTERRUPT_SOURCE 0
#define MW_CLOCKING_CPUCLOCKRATEMHZ 120
#define MW_HARDWARE_TYPE S32K312-Q172
#define MW_TIMERS_STEPTIMER 1
#define MW_TIMERS_STEPGPTCHANNEL StepTimer
#define MW_TIMERS_STEPTIMERFREQ 40 MHz
#define MW_TIMERS_PROFILERTIMER 1
#define MW_TIMERS_PROFILERGPTCHANNEL ProfilerTimer
#define MW_TIMERS_PROFILERTIMERFREQ 40 MHz
#define MW_OPEN_TIMERS 
#define MW_REFRESH_TIMERS 
#define MW_DOWNLOAD_TYPE 0
#define MW_TARGET_MEMORY -1
#define MW_CONFIGURATION_TOOL S32 Config Tool
#define MW_S32DS_CONFIGTOOLS_LOCATION tools/S32ConfigTools.2024.R1.7
#define MW_BROWSE_S32DSCONFIGTOOL 
#define MW_TRESOS_TOOLS_LOCATION C:/EB/tresos
#define MW_BROWSE_TRESOSTOOL 
#define MW_SDK_LOCATION S32K3_RTD/SW32K3_S32M27x_RTD_R21-11_5.0.0
#define MW_MBD_BROWSESDK 
#define MW_EXPORT_PRJ_LOC C:/Users/NXF71450/Desktop/Projects/mbdt/S32K3/src/S32K3_Examples/uart
#define MW_EXPORT_PRJ 
#define MW_PIL_INTERFACE 0
#define MW_PIL_HARDWAREUART -1
#define MW_PIL_COMPORT -1
#define MW_PIL_BAUDRATE 10
#define MW_PIL_INTPRIORITY 7
#define MW_ADC_INFO /*
AdcConfigSet - AdcConfigSet 
AdcConfigSet/AdcHwTrigger - AdcHwTrigger_0 AdcHwTrigger_1 AdcHwTrigger_2 
AdcConfigSet/AdcHwTrigger_0/AdcHwTrigSrc - BCTU_EMIOS_0_0 
AdcConfigSet/AdcHwTrigger_1/AdcHwTrigSrc - BCTU_EMIOS_0_1 
AdcConfigSet/AdcHwTrigger_2/AdcHwTrigSrc - BCTU_EMIOS_1_0 
AdcConfigSet/AdcHwUnit - AdcHwUnit_0 AdcHwUnit_1 
AdcConfigSet/AdcHwUnit_0//SdadcCalibAverage - 1 
AdcConfigSet/AdcHwUnit_0//SdadcCalibSkipped - 0 
AdcConfigSet/AdcHwUnit_0//SdadcDecimaRate - DECIMATION_RATE_120 
AdcConfigSet/AdcHwUnit_0//SdadcFifoThreshold - 0 
AdcConfigSet/AdcHwUnit_0//SdadcOutputSetDelay - 0 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcChannelHighLimit - 4095 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcChannelId - 34 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcChannelName - S10_ChanNum34 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcEnablePresampling - true 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcEnableThresholds - false 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcLogicalChannelId - 0 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcThresholdRegister - /Adc/Adc/AdcConfigSet/AdcHwUnit_0/AdcThresholdControl_0 
AdcConfigSet/AdcHwUnit_0/ADC_POT_0/AdcWdogNotification - Adc_Adc1WdogNotification 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings - AdcAlternateGroupConvTimings 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcEnableChDisableChGroup - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcEnableHalfInterrupt - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcEnableOptimizeDmaStreamingGroups - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcExtDMAChanEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcExtraNotification - NULL_PTR 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupAccessMode - ADC_ACCESS_MODE_SINGLE 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration - AdcGroupConversionConfiguration 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration/AdcGroupHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration/AdcGroupHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionMode - ADC_CONV_MODE_ONESHOT 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupConversionType - ADC_CONV_TYPE_NORMAL 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupDefinition - /Adc/Adc/AdcConfigSet/AdcHwUnit_0/ADC_POT_0 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupHwTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_0 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupId - 0 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcGroupTriggSrc - ADC_TRIGG_SRC_SW 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcNotification - Adc_Adc0Group0Notification 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcStreamResultGroup - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcStreamingBufferMode - ADC_STREAM_BUFFER_LINEAR 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcStreamingNumSamples - 1 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcWithoutDma - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_0/AdcWithoutInterrupts - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings - AdcAlternateGroupConvTimings 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcEnableChDisableChGroup - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcEnableHalfInterrupt - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcEnableOptimizeDmaStreamingGroups - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcExtDMAChanEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcExtraNotification - NULL_PTR 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupAccessMode - ADC_ACCESS_MODE_STREAMING 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration - AdcGroupConversionConfiguration 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration/AdcGroupHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration/AdcGroupHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionMode - ADC_CONV_MODE_CONTINUOUS 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupConversionType - ADC_CONV_TYPE_NORMAL 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupDefinition - /Adc/Adc/AdcConfigSet/AdcHwUnit_0/ADC_POT_0 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupHwTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_0 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupId - 2 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcGroupTriggSrc - ADC_TRIGG_SRC_SW 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcNotification - Adc_Adc0Group1Notification 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcStreamResultGroup - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcStreamingBufferMode - ADC_STREAM_BUFFER_LINEAR 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcStreamingNumSamples - 1 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcWithoutDma - false 
AdcConfigSet/AdcHwUnit_0/Adc0Group_1/AdcWithoutInterrupts - false 
AdcConfigSet/AdcHwUnit_0/AdcAltHighSpeedEnable - false 
AdcConfigSet/AdcHwUnit_0/AdcAltPowerDownDelay - 15 
AdcConfigSet/AdcHwUnit_0/AdcAltPrescale - 2 
AdcConfigSet/AdcHwUnit_0/AdcAutoClockOff - false 
AdcConfigSet/AdcHwUnit_0/AdcBypassSampling - false 
AdcConfigSet/AdcHwUnit_0/AdcCalibrationPrescale - 1 
AdcConfigSet/AdcHwUnit_0/AdcChannel - ADC_POT_0 
AdcConfigSet/AdcHwUnit_0/AdcGroup - Adc0Group_0 Adc0Group_1 
AdcConfigSet/AdcHwUnit_0/AdcHighSpeedEnable - false 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitBypassResolution - false 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitDmaClearSource - DMA_REQ_CLEAR_ON_ACK 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitId - ADC1 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitOverwriteEn - false 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitResolution - RESOLUTION_14 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitUsrGain - 0 
AdcConfigSet/AdcHwUnit_0/AdcHwUnitUsrOffset - 0 
AdcConfigSet/AdcHwUnit_0/AdcLogicalUnitId - 0 
AdcConfigSet/AdcHwUnit_0/AdcMuxDelay - 15 
AdcConfigSet/AdcHwUnit_0/AdcPowerDownDelay - 15 
AdcConfigSet/AdcHwUnit_0/AdcPresamplingInternalSignal0 - VREFL 
AdcConfigSet/AdcHwUnit_0/AdcPresamplingInternalSignal1 - VREFL 
AdcConfigSet/AdcHwUnit_0/AdcPresamplingInternalSignal2 - VREFL 
AdcConfigSet/AdcHwUnit_0/AdcPrescale - 1 
AdcConfigSet/AdcHwUnit_0/AdcSarHwUnitVref - 53 
AdcConfigSet/AdcHwUnit_0/AdcTransferType - ADC_INTERRUPT 
AdcConfigSet/AdcHwUnit_0/SdAdcHwUnitSpecificConfiguration -  
AdcConfigSet/AdcHwUnit_1//SdadcCalibAverage - 1 
AdcConfigSet/AdcHwUnit_1//SdadcCalibSkipped - 0 
AdcConfigSet/AdcHwUnit_1//SdadcDecimaRate - DECIMATION_RATE_120 
AdcConfigSet/AdcHwUnit_1//SdadcFifoThreshold - 0 
AdcConfigSet/AdcHwUnit_1//SdadcOutputSetDelay - 0 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcChannelHighLimit - 4095 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcChannelId - 43 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcChannelName - S19_ChanNum43 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcEnablePresampling - false 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcEnableThresholds - false 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcLogicalChannelId - 0 
AdcConfigSet/AdcHwUnit_1/ADC_POT_1/AdcWdogNotification - NULL_PTR 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings - AdcAlternateGroupConvTimings 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcEnableChDisableChGroup - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcEnableHalfInterrupt - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcEnableOptimizeDmaStreamingGroups - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcExtDMAChanEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcExtraNotification - NULL_PTR 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupAccessMode - ADC_ACCESS_MODE_SINGLE 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration - AdcGroupConversionConfiguration 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration/AdcGroupHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration/AdcGroupHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionConfiguration/AdcSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionMode - ADC_CONV_MODE_ONESHOT 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupConversionType - ADC_CONV_TYPE_NORMAL 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupDefinition - /Adc/Adc/AdcConfigSet/AdcHwUnit_1/ADC_POT_1 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupHwTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_0 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupId - 1 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcGroupTriggSrc - ADC_TRIGG_SRC_SW 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcNotification - Adc_Adc1Group0Notification 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcStreamResultGroup - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcStreamingBufferMode - ADC_STREAM_BUFFER_LINEAR 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcStreamingNumSamples - 1 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcWithoutDma - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_0/AdcWithoutInterrupts - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings - AdcAlternateGroupConvTimings 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings/AdcAltGroupSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcAlternateGroupConvTimings/AdcGroupAltHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcEnableChDisableChGroup - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcEnableHalfInterrupt - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcEnableOptimizeDmaStreamingGroups - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcExtDMAChanEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcExtraNotification - NULL_PTR 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupAccessMode - ADC_ACCESS_MODE_STREAMING 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration - AdcGroupConversionConfiguration 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration/AdcGroupHardwareAverageEnable - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration/AdcGroupHardwareAverageSelect - SAMPLES_4 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration0 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration1 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionConfiguration/AdcSamplingDuration2 - 22 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionMode - ADC_CONV_MODE_CONTINUOUS 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupConversionType - ADC_CONV_TYPE_NORMAL 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupDefinition - /Adc/Adc/AdcConfigSet/AdcHwUnit_1/ADC_POT_1 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupHwTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_0 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupId - 3 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcGroupTriggSrc - ADC_TRIGG_SRC_SW 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcNotification - Adc_Adc1Group1Notification 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcStreamResultGroup - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcStreamingBufferMode - ADC_STREAM_BUFFER_LINEAR 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcStreamingNumSamples - 3 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcWithoutDma - false 
AdcConfigSet/AdcHwUnit_1/Adc1Group_1/AdcWithoutInterrupts - false 
AdcConfigSet/AdcHwUnit_1/AdcAltHighSpeedEnable - false 
AdcConfigSet/AdcHwUnit_1/AdcAltPowerDownDelay - 15 
AdcConfigSet/AdcHwUnit_1/AdcAltPrescale - 2 
AdcConfigSet/AdcHwUnit_1/AdcAutoClockOff - false 
AdcConfigSet/AdcHwUnit_1/AdcBypassSampling - false 
AdcConfigSet/AdcHwUnit_1/AdcCalibrationPrescale - 1 
AdcConfigSet/AdcHwUnit_1/AdcChannel - ADC_POT_1 
AdcConfigSet/AdcHwUnit_1/AdcGroup - Adc1Group_0 Adc1Group_1 
AdcConfigSet/AdcHwUnit_1/AdcHighSpeedEnable - false 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitBypassResolution - false 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitDmaClearSource - DMA_REQ_CLEAR_ON_ACK 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitId - ADC2 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitOverwriteEn - false 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitResolution - RESOLUTION_14 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitUsrGain - 0 
AdcConfigSet/AdcHwUnit_1/AdcHwUnitUsrOffset - 0 
AdcConfigSet/AdcHwUnit_1/AdcLogicalUnitId - 1 
AdcConfigSet/AdcHwUnit_1/AdcMuxDelay - 15 
AdcConfigSet/AdcHwUnit_1/AdcPowerDownDelay - 15 
AdcConfigSet/AdcHwUnit_1/AdcPresamplingInternalSignal0 - VREFL 
AdcConfigSet/AdcHwUnit_1/AdcPresamplingInternalSignal1 - VREFL 
AdcConfigSet/AdcHwUnit_1/AdcPresamplingInternalSignal2 - VREFL 
AdcConfigSet/AdcHwUnit_1/AdcPrescale - 1 
AdcConfigSet/AdcHwUnit_1/AdcSarHwUnitVref - 53 
AdcConfigSet/AdcHwUnit_1/AdcTransferType - ADC_INTERRUPT 
AdcConfigSet/AdcHwUnit_1/SdAdcHwUnitSpecificConfiguration -  
AdcConfigSet/BctuHwUnit - BctuHwUnit_0 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications - BctuAdcNotifications_0 BctuAdcNotifications_1 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_0/BctuAdcNewDataNotification - Adc0_CtuNewDataNotification 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_0/BctuAdcNotificationsAdcIndex - /Adc/Adc/AdcConfigSet/AdcHwUnit_0 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_0/BctuDataOverrunNotification - Adc0_CtuDataOverrunNotification 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_0/BctuListLastConversionNotification - Adc0_CtuListLastNotification 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_1/BctuAdcNewDataNotification - Adc1_CtuNewDataNotification 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_1/BctuAdcNotificationsAdcIndex - /Adc/Adc/AdcConfigSet/AdcHwUnit_1 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_1/BctuDataOverrunNotification - Adc1_CtuDataOverrunNotification 
AdcConfigSet/BctuHwUnit_0/BctuAdcNotifications_1/BctuListLastConversionNotification - Adc1_ListLastNotification 
AdcConfigSet/BctuHwUnit_0/BctuFifoDmaRawData - false 
AdcConfigSet/BctuHwUnit_0/BctuGlobalHwTriggers - true 
AdcConfigSet/BctuHwUnit_0/BctuHwUnitId - 0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger - BctuInternalTrigger_0 BctuInternalTrigger_1 BctuInternalTrigger_2 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuAdcChannelSingle - /Adc/Adc/AdcConfigSet/AdcHwUnit_0/ADC_POT_0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuAdcTargetMask - 2 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuConversionListStartIndex - 0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuDataDestination - BCTU_ADC_DATA_REG 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuHwTriggerEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuTriggerConversionMode - SINGLE 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuTriggerLoop - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_0/BctuTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuAdcChannelSingle - /Adc/Adc/AdcConfigSet/AdcHwUnit_1/ADC_POT_1 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuAdcTargetMask - 4 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuConversionListStartIndex - 0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuDataDestination - BCTU_ADC_DATA_REG 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuHwTriggerEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuTriggerConversionMode - SINGLE 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuTriggerLoop - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_1/BctuTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_1 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuAdcChannelSingle - /Adc/Adc/AdcConfigSet/AdcHwUnit_1/ADC_POT_1 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuAdcTargetMask - 6 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuConversionListStartIndex - 0 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuDataDestination - BCTU_ADC_DATA_REG 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuHwTriggerEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuTriggerConversionMode - LIST 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuTriggerLoop - false 
AdcConfigSet/BctuHwUnit_0/BctuInternalTrigger_2/BctuTriggerSource - /Adc/Adc/AdcConfigSet/AdcHwTrigger_2 
AdcConfigSet/BctuHwUnit_0/BctuListItems - BctuListItems_0 BctuListItems_1 
AdcConfigSet/BctuHwUnit_0/BctuListItems_0/BctuAdcChannelList - S10_ChanNum34 
AdcConfigSet/BctuHwUnit_0/BctuListItems_0/BctuLastChannel - false 
AdcConfigSet/BctuHwUnit_0/BctuListItems_0/BctuNextChannelWaitOnTrig - false 
AdcConfigSet/BctuHwUnit_0/BctuListItems_1/BctuAdcChannelList - S19_ChanNum43 
AdcConfigSet/BctuHwUnit_0/BctuListItems_1/BctuLastChannel - true 
AdcConfigSet/BctuHwUnit_0/BctuListItems_1/BctuNextChannelWaitOnTrig - false 
AdcConfigSet/BctuHwUnit_0/BctuLogicalUnitId - 0 
AdcConfigSet/BctuHwUnit_0/BctuLowPowerMode - false 
AdcConfigSet/BctuHwUnit_0/BctuNewDataDMAEnableMask - 0 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos - BctuResultFifos_0 BctuResultFifos_1 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuFifoDmaBuffer - BctuDmaFifo1 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuFifoDmaEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuFifoNotificationsEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuOverrunNotification - Adc_Fifo1_OverrunNotification 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuResultFifoIndex - FIFO_1 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuUnderrunNotification - Adc_Fifo1_UnderrunNotification 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuWatermarkNotification - Adc_Fifo1_WaterMarkNotification 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_0/BctuWatermarkValue - 1 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuFifoDmaBuffer - BctuDmaFifo1 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuFifoDmaEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuFifoNotificationsEnable - false 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuOverrunNotification - NULL_PTR 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuResultFifoIndex - FIFO_2 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuUnderrunNotification - NULL_PTR 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuWatermarkNotification - NULL_PTR 
AdcConfigSet/BctuHwUnit_0/BctuResultFifos_1/BctuWatermarkValue - 0 
AdcConfigSet/BctuHwUnit_0/BctuTriggerNotification - NULL_PTR 
AdcGeneral - AdcGeneral 
AdcGeneral/AdcDeInitApi - true 
AdcGeneral/AdcDevErrorDetect - true 
AdcGeneral/AdcEnableLimitCheck - true 
AdcGeneral/AdcEnableQueuing - true 
AdcGeneral/AdcEnableStartStopGroupApi - true 
AdcGeneral/AdcGrpNotifCapability - true 
AdcGeneral/AdcHwTriggerApi - false 
AdcGeneral/AdcLowPowerStatesSupport - false 
AdcGeneral/AdcPriorityImplementation - ADC_PRIORITY_NONE 
AdcGeneral/AdcPriorityQueueMaxDepth - 1 
AdcGeneral/AdcReadGroupApi - true 
AdcGeneral/AdcResultAlignment - ADC_ALIGN_RIGHT 
AdcGeneral/AdcVersionInfoApi - true 
AdcInterrupt - AdcInterrupt_0 AdcInterrupt_1 AdcInterrupt_2 AdcInterrupt_3 AdcInterrupt_4 AdcInterrupt_5 
AdcInterrupt_0/AdcInterruptEnable - false 
AdcInterrupt_0/AdcInterruptSource - ADC0_EOC 
AdcInterrupt_1/AdcInterruptEnable - false 
AdcInterrupt_1/AdcInterruptSource - ADC0_WD 
AdcInterrupt_2/AdcInterruptEnable - true 
AdcInterrupt_2/AdcInterruptSource - ADC1_EOC 
AdcInterrupt_3/AdcInterruptEnable - false 
AdcInterrupt_3/AdcInterruptSource - ADC1_WD 
AdcInterrupt_4/AdcInterruptEnable - true 
AdcInterrupt_4/AdcInterruptSource - ADC2_EOC 
AdcInterrupt_5/AdcInterruptEnable - false 
AdcInterrupt_5/AdcInterruptSource - ADC2_WD 
AdcPublishedInformation - AdcPublishedInformation 
AdcPublishedInformation/AdcChannelValueSigned - false 
AdcPublishedInformation/AdcGroupFirstChannelFixed - false 
AdcPublishedInformation/AdcMaxChannelResolution - 14 
AutosarExt - AutosarExt 
AutosarExt/AdcBypassAbortChainCheck - false 
AutosarExt/AdcConvTimeOnce - false 
AutosarExt/AdcCtuHardwareTriggerOptimization - false 
AutosarExt/AdcEnableApplyCalibration - false 
AutosarExt/AdcEnableCalibration - true 
AutosarExt/AdcEnableChDisableChApi - true 
AutosarExt/AdcEnableCtuControlModeApi - true 
AutosarExt/AdcEnableCtuTrigAutosarExtApi - false 
AutosarExt/AdcEnableDmaTransferMode - false 
AutosarExt/AdcEnableDualClockMode - false 
AutosarExt/AdcEnableGroupDependentChannelNames - false 
AutosarExt/AdcEnableGroupStreamingResultReorder - false 
AutosarExt/AdcEnableInitialNotification - false 
AutosarExt/AdcEnableReadRawDataApi - false 
AutosarExt/AdcEnableSelfTest - false 
AutosarExt/AdcEnableSetChannel - false 
AutosarExt/AdcEnableThresholdConfigurationApi - true 
AutosarExt/AdcEnableUserModeSupport - false 
AutosarExt/AdcEnableWatchdogApi - true 
AutosarExt/AdcGetInjectedConvStatusApi - false 
AutosarExt/AdcMulticoreSupport - false 
AutosarExt/AdcOptimizeDmaStreamingGroups - false 
AutosarExt/AdcOptimizeOneShotHwTriggerConversions - false 
AutosarExt/AdcPreSamplingOnce - true 
AutosarExt/AdcSarEnableTempsenseApi - false 
AutosarExt/AdcSarIpDevErrorDetect - false 
AutosarExt/AdcSarPowerOnTempSense - false 
AutosarExt/AdcSarTempSenseVsupply - 53 
AutosarExt/AdcSetHwUnitPowerModeApi - true 
AutosarExt/AdcTimeoutMethod - OSIF_COUNTER_DUMMY 
AutosarExt/AdcTimeoutVal - 3000 
AutosarExt/AdcUseHardwareNormalGroups - false 
AutosarExt/AdcUseSoftwareInjectedGroups - false 
AutosarExt/BctuIpDevErrorDetect - false 
AutosarExt/CtuEnableDmaTransferMode - false 
AutosarExt/SdadcDspssEnable - false 
AutosarExt/SdadcIpDevErrorDetect - false 
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 123 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorApiInfix -  
CommonPublishedInformation/VendorId - 43 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
POST_BUILD_VARIANT_USED - true 

*/
#define MW_DETAILS_ADC 
#define MW_OPEN_ADC 
#define MW_UPDATE_ADC 
#define MW_CAN_43_FLEXCAN_INFO /*
CanConfigSet - CanConfigSet 
CanConfigSet/CanController - CanController_0 CanController_1 
CanConfigSet/CanController_0/CanAutoBusOffRecovery - false 
CanConfigSet/CanController_0/CanBusoffProcessing - POLLING 
CanConfigSet/CanController_0/CanControllerActivation - true 
CanConfigSet/CanController_0/CanControllerBaseAddress - 0 
CanConfigSet/CanController_0/CanControllerBaudrateConfig - CanControllerBaudrateConfig_0 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanAdvancedSetting - false 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanBaudrateTypeSuport - NORMAL_CBT 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanBusLength - 40 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerBaudRate - 500.0 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerBaudRateConfigID - 0 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerPrescaller - 4 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerPrescallerAlternate - 10 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerPropSeg - 6 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerSeg1 - 8 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerSeg2 - 5 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerSyncJumpWidth - 4 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanControllerSyncSeg - 1 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanPropDelayTranceiver - 150.0 
CanConfigSet/CanController_0/CanControllerBaudrateConfig_0/CanTxArbitrationStartDelay - 12 
CanConfigSet/CanController_0/CanControllerDefaultBaudrate - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0/CanControllerBaudrateConfig_0 
CanConfigSet/CanController_0/CanControllerEdgeFilter - false 
CanConfigSet/CanController_0/CanControllerFdISO - false 
CanConfigSet/CanController_0/CanControllerId - 0 
CanConfigSet/CanController_0/CanControllerPrExcEn - false 
CanConfigSet/CanController_0/CanCpuClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK0_2 
CanConfigSet/CanController_0/CanCpuClockRefAlternate - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK0_2 
CanConfigSet/CanController_0/CanHwChannel - FLEXCAN_0 
CanConfigSet/CanController_0/CanLoopBackMode - false 
CanConfigSet/CanController_0/CanRxFiFo - CanRxFiFo 
CanConfigSet/CanController_0/CanRxFiFo/CanEnhanceFiFo - CanRxFiFo 
CanConfigSet/CanController_0/CanRxFiFo/CanRxFiFo/CanEnhanceFiFoDmaEnable - false 
CanConfigSet/CanController_0/CanRxFiFo/CanRxFiFo/CanEnhancedSchemeType - MASK_FILTER_SCHEME 
CanConfigSet/CanController_0/CanRxFiFo/CanRxFiFo/CanFiFoDmaErrorNotif - NULL_PTR 
CanConfigSet/CanController_0/CanRxFiFo/CanRxFiFo/CanFiFoOverflowNotif - MBDT_FlexCAN0_FifoOverflowNotif 
CanConfigSet/CanController_0/CanRxFiFo/CanRxFiFo/NumberMBTransferDMA - 1 
CanConfigSet/CanController_0/CanRxFiFo/Choice - CanEnhanceFiFo 
CanConfigSet/CanController_0/CanRxProcessing - MIXED 
CanConfigSet/CanController_0/CanTrippleSamplingEnable - false 
CanConfigSet/CanController_0/CanTxProcessing - MIXED 
CanConfigSet/CanController_0/CanWakeupFunctionalityAPI - false 
CanConfigSet/CanController_0/CanWakeupProcessing - POLLING 
CanConfigSet/CanController_0/CanWakeupSupport - false 
CanConfigSet/CanController_1/CanAutoBusOffRecovery - false 
CanConfigSet/CanController_1/CanBusoffProcessing - POLLING 
CanConfigSet/CanController_1/CanControllerActivation - true 
CanConfigSet/CanController_1/CanControllerBaseAddress - 0 
CanConfigSet/CanController_1/CanControllerBaudrateConfig - CanControllerBaudrateConfig_0 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanAdvancedSetting - false 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanBaudrateTypeSuport - NORMAL_CBT 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanBusLength - 40 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerBaudRate - 500.0 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerBaudRateConfigID - 0 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerPrescaller - 4 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerPrescallerAlternate - 10 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerPropSeg - 6 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerSeg1 - 8 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerSeg2 - 5 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerSyncJumpWidth - 4 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanControllerSyncSeg - 1 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanPropDelayTranceiver - 150.0 
CanConfigSet/CanController_1/CanControllerBaudrateConfig_0/CanTxArbitrationStartDelay - 12 
CanConfigSet/CanController_1/CanControllerDefaultBaudrate - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1/CanControllerBaudrateConfig_0 
CanConfigSet/CanController_1/CanControllerEdgeFilter - false 
CanConfigSet/CanController_1/CanControllerFdISO - true 
CanConfigSet/CanController_1/CanControllerId - 1 
CanConfigSet/CanController_1/CanControllerPrExcEn - false 
CanConfigSet/CanController_1/CanCpuClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK3_5 
CanConfigSet/CanController_1/CanCpuClockRefAlternate - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK0_2 
CanConfigSet/CanController_1/CanHwChannel - FLEXCAN_4 
CanConfigSet/CanController_1/CanLoopBackMode - false 
CanConfigSet/CanController_1/CanRxFiFo - CanRxFiFo 
CanConfigSet/CanController_1/CanRxFiFo/CanLegacyFiFo - CanRxFiFo 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanFiFoDmaErrorNotif - NULL_PTR 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanFiFoOverflowNotif - MBDT_FlexCAN4_FifoOverflowNotif 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanFiFoWarnNotif - MBDT_FlexCAN4_FifoWarnNotif 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanIdAcceptanceMode - FORMAT_A 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanLegacyFIFOGlobalMask0 - 0 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanLegacyFIFOGlobalMask1 - 0 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanLegacyFIFOGlobalMask2 - 0 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanLegacyFIFOGlobalMask3 - 0 
CanConfigSet/CanController_1/CanRxFiFo/CanRxFiFo/CanLegacyFiFoDmaEnable - false 
CanConfigSet/CanController_1/CanRxFiFo/Choice - CanLegacyFiFo 
CanConfigSet/CanController_1/CanRxProcessing - MIXED 
CanConfigSet/CanController_1/CanTrippleSamplingEnable - false 
CanConfigSet/CanController_1/CanTxProcessing - MIXED 
CanConfigSet/CanController_1/CanWakeupFunctionalityAPI - false 
CanConfigSet/CanController_1/CanWakeupProcessing - POLLING 
CanConfigSet/CanController_1/CanWakeupSupport - false 
CanConfigSet/CanHardwareObject - CanHardwareObject_Can0_Rx_Ext_Interrupt CanHardwareObject_Can0_Rx_FIFO CanHardwareObject_Can0_Rx_Std_Polling CanHardwareObject_Can0_Tx_Interrupt CanHardwareObject_Can0_Tx_Polling CanHardwareObject_Can4_Rx_Ext_Interrupt CanHardwareObject_Can4_Rx_FIFO CanHardwareObject_Can4_Rx_Std_Polling CanHardwareObject_Can4_Tx_Interrupt CanHardwareObject_Can4_Tx_Polling 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanIdType - EXTENDED 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanObjectId - 2 
CanConfigSet/CanHardwareObject_Can0_Rx_Ext_Interrupt/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter - CanHwFilter_0 CanHwFilter_1 CanHwFilter_2 CanHwFilter_3 CanHwFilter_4 CanHwFilter_5 CanHwFilter_6 CanHwFilter_7 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_0/CanHwFilterCode - 1008 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_0/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_1/CanHwFilterCode - 1009 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_1/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_2/CanHwFilterCode - 1010 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_2/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_3/CanHwFilterCode - 1011 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_3/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_4/CanHwFilterCode - 1012 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_4/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_5/CanHwFilterCode - 1013 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_5/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_6/CanHwFilterCode - 1014 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_6/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_7/CanHwFilterCode - 1015 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwFilter_7/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanHwObjectCount - 6 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanIdType - EXTENDED 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanObjectId - 0 
CanConfigSet/CanHardwareObject_Can0_Rx_FIFO/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHardwareObjectUsesPolling - true 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanIdType - STANDARD 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanMainFunctionRWPeriodRef - /Can_43_FLEXCAN/Can/CanGeneral/CanMainFunctionRWPeriods_0 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanObjectId - 1 
CanConfigSet/CanHardwareObject_Can0_Rx_Std_Polling/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanIdType - MIXED 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanObjectId - 7 
CanConfigSet/CanHardwareObject_Can0_Tx_Interrupt/CanObjectType - TRANSMIT 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHardwareObjectUsesPolling - true 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanIdType - MIXED 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanMainFunctionRWPeriodRef - /Can_43_FLEXCAN/Can/CanGeneral/CanMainFunctionRWPeriods_0 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanObjectId - 6 
CanConfigSet/CanHardwareObject_Can0_Tx_Polling/CanObjectType - TRANSMIT 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanIdType - EXTENDED 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanObjectId - 5 
CanConfigSet/CanHardwareObject_Can4_Rx_Ext_Interrupt/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter - CanHwFilter_0 CanHwFilter_1 CanHwFilter_2 CanHwFilter_3 CanHwFilter_4 CanHwFilter_5 CanHwFilter_6 CanHwFilter_7 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_0/CanHwFilterCode - 1008 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_0/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_1/CanHwFilterCode - 1009 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_1/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_2/CanHwFilterCode - 1010 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_2/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_3/CanHwFilterCode - 1011 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_3/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_4/CanHwFilterCode - 1012 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_4/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_5/CanHwFilterCode - 1013 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_5/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_6/CanHwFilterCode - 1014 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_6/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_7/CanHwFilterCode - 1015 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwFilter_7/CanHwFilterMask - 536870911 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanHwObjectCount - 6 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanIdType - EXTENDED 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanObjectId - 3 
CanConfigSet/CanHardwareObject_Can4_Rx_FIFO/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHardwareObjectUsesPolling - true 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanIdType - STANDARD 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanMainFunctionRWPeriodRef - /Can_43_FLEXCAN/Can/CanGeneral/CanMainFunctionRWPeriods_0 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanObjectId - 4 
CanConfigSet/CanHardwareObject_Can4_Rx_Std_Polling/CanObjectType - RECEIVE 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHardwareObjectUsesPolling - false 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanIdType - MIXED 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanObjectId - 9 
CanConfigSet/CanHardwareObject_Can4_Tx_Interrupt/CanObjectType - TRANSMIT 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanControllerRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHandleType - BASIC 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHardwareObjectUsesPolling - true 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHwFilter - CanHwFilter_0 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHwFilter_0/CanHwFilterCode - 0 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHwFilter_0/CanHwFilterMask - 0 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanHwObjectCount - 1 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanIdType - MIXED 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanMainFunctionRWPeriodRef - /Can_43_FLEXCAN/Can/CanGeneral/CanMainFunctionRWPeriods_0 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanObjectId - 8 
CanConfigSet/CanHardwareObject_Can4_Tx_Polling/CanObjectType - TRANSMIT 
CanGeneral - CanGeneral 
CanGeneral/CanApiEnableMbAbort - true 
CanGeneral/CanDevErrorDetect - true 
CanGeneral/CanEnableDualClockMode - false 
CanGeneral/CanEnableSecurityEventReporting - false 
CanGeneral/CanEnableUserModeSupport - false 
CanGeneral/CanGlobalTimeSupport - false 
CanGeneral/CanIndex - 0 
CanGeneral/CanMBCountExtensionSupport - false 
CanGeneral/CanMainFunctionModePeriod - 0.001 
CanGeneral/CanMainFunctionRWPeriods - CanMainFunctionRWPeriods_0 
CanGeneral/CanMainFunctionRWPeriods_0/CanMainFunctionPeriod - 0.001 
CanGeneral/CanMulticoreSupport - false 
CanGeneral/CanMultiplexedTransmission - true 
CanGeneral/CanPublicIcomSupport - false 
CanGeneral/CanSetBaudrateApi - true 
CanGeneral/CanTimeoutDuration - 1.0 
CanGeneral/CanTimeoutMethod - OSIF_COUNTER_DUMMY 
CanGeneral/CanVersionInfoApi - true 
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 7 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 80 
CommonPublishedInformation/SwMajorVersion - 3 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorApiInfix - FLEXCAN 
CommonPublishedInformation/VendorId - 43 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_CAN_43_FLEXCAN 
#define MW_OPEN_CAN_43_FLEXCAN 
#define MW_UPDATE_CAN_43_FLEXCAN 
#define MW_RESTORE_CAN_43_FLEXCAN 
#define MW_PWM_INFO /*
CommonPublishedInformation - CommonPublishedInformation Pwm 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 121 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
FlexPwm - PwmChannelConfigSet 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
POST_BUILD_VARIANT_USED - true 
PwmChannel - PwmChannel_0 PwmChannel_1 PwmChannel_2 PwmChannel_3 PwmChannel_4 PwmChannel_5 PwmChannel_6 PwmChannel_7 
PwmChannel_0/PwmChannelId - 0 
PwmChannel_0/PwmDutycycleDefault - 2048 
PwmChannel_0/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_0/PwmEmiosChannels_9 
PwmChannel_0/PwmIdleState - PWM_LOW 
PwmChannel_0/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_0/PwmNotification - PwmChannel_0_Callback 
PwmChannel_0/PwmPeriodDefault - 16000.0 
PwmChannel_0/PwmPeriodInTicks - true 
PwmChannel_0/PwmPolarity - PWM_HIGH 
PwmChannel_1/PwmChannelId - 1 
PwmChannel_1/PwmDutycycleDefault - 2048 
PwmChannel_1/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_0/PwmEmiosChannels_17 
PwmChannel_1/PwmIdleState - PWM_LOW 
PwmChannel_1/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_1/PwmNotification - PwmChannel_1_Callback 
PwmChannel_1/PwmPeriodDefault - 16000.0 
PwmChannel_1/PwmPeriodInTicks - true 
PwmChannel_1/PwmPolarity - PWM_HIGH 
PwmChannel_2/PwmChannelId - 2 
PwmChannel_2/PwmDutycycleDefault - 0 
PwmChannel_2/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_19 
PwmChannel_2/PwmIdleState - PWM_LOW 
PwmChannel_2/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_2/PwmNotification - PwmChannel_2_Callback 
PwmChannel_2/PwmPeriodDefault - 16000.0 
PwmChannel_2/PwmPeriodInTicks - true 
PwmChannel_2/PwmPolarity - PWM_HIGH 
PwmChannel_3/PwmChannelId - 3 
PwmChannel_3/PwmDutycycleDefault - 0 
PwmChannel_3/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_20 
PwmChannel_3/PwmIdleState - PWM_LOW 
PwmChannel_3/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_3/PwmNotification - PwmChannel_3_Callback 
PwmChannel_3/PwmPeriodDefault - 16000.0 
PwmChannel_3/PwmPeriodInTicks - true 
PwmChannel_3/PwmPolarity - PWM_HIGH 
PwmChannel_4/PwmChannelId - 4 
PwmChannel_4/PwmDutycycleDefault - 0 
PwmChannel_4/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_0 
PwmChannel_4/PwmIdleState - PWM_LOW 
PwmChannel_4/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_4/PwmNotification - PwmChannel_4_Callback 
PwmChannel_4/PwmPeriodDefault - 16000.0 
PwmChannel_4/PwmPeriodInTicks - true 
PwmChannel_4/PwmPolarity - PWM_HIGH 
PwmChannel_5/PwmChannelId - 5 
PwmChannel_5/PwmDutycycleDefault - 0 
PwmChannel_5/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_1 
PwmChannel_5/PwmIdleState - PWM_LOW 
PwmChannel_5/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_5/PwmNotification - PwmChannel_5_Callback 
PwmChannel_5/PwmPeriodDefault - 16000.0 
PwmChannel_5/PwmPeriodInTicks - true 
PwmChannel_5/PwmPolarity - PWM_HIGH 
PwmChannel_6/PwmChannelId - 6 
PwmChannel_6/PwmDutycycleDefault - 0 
PwmChannel_6/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_21 
PwmChannel_6/PwmIdleState - PWM_LOW 
PwmChannel_6/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_6/PwmNotification - PwmChannel_6_Callback 
PwmChannel_6/PwmPeriodDefault - 16000.0 
PwmChannel_6/PwmPeriodInTicks - true 
PwmChannel_6/PwmPolarity - PWM_HIGH 
PwmChannel_7/PwmChannelId - 7 
PwmChannel_7/PwmDutycycleDefault - 0 
PwmChannel_7/PwmHwChannel - /Pwm/Pwm/PwmChannelConfigSet/PwmEmios_1/PwmEmiosChannels_22 
PwmChannel_7/PwmIdleState - PWM_LOW 
PwmChannel_7/PwmMcuClockReferencePoint - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK 
PwmChannel_7/PwmNotification - PwmChannel_7_Callback 
PwmChannel_7/PwmPeriodDefault - 16000.0 
PwmChannel_7/PwmPeriodInTicks - true 
PwmChannel_7/PwmPolarity - PWM_HIGH 
PwmConfigurationOfOptApiServices - PwmConfigurationOfOptApiServices 
PwmConfigurationOfOptApiServices/PwmDeInitApi - true 
PwmConfigurationOfOptApiServices/PwmEmiosFastUpdateApi - false 
PwmConfigurationOfOptApiServices/PwmGetChannelStateApi - true 
PwmConfigurationOfOptApiServices/PwmGetOutputState - true 
PwmConfigurationOfOptApiServices/PwmSetChannelDeadTime - true 
PwmConfigurationOfOptApiServices/PwmSetChannelOutputApi - true 
PwmConfigurationOfOptApiServices/PwmSetCounterBusApi - true 
PwmConfigurationOfOptApiServices/PwmSetDutyCycle - true 
PwmConfigurationOfOptApiServices/PwmSetDutyCycle_NoUpdate - false 
PwmConfigurationOfOptApiServices/PwmSetDutyPhaseShift - false 
PwmConfigurationOfOptApiServices/PwmSetOutputToIdle - true 
PwmConfigurationOfOptApiServices/PwmSetPeriodAndDuty - true 
PwmConfigurationOfOptApiServices/PwmSetPeriodAndDuty_NoUpdate - false 
PwmConfigurationOfOptApiServices/PwmSetPhaseShift - true 
PwmConfigurationOfOptApiServices/PwmSetPhaseShift_NoUpdate - false 
PwmConfigurationOfOptApiServices/PwmSetTriggerDelayApi - true 
PwmConfigurationOfOptApiServices/PwmVersionInfoApi - true 
PwmEmios - PwmEmios_0 PwmEmios_1 
PwmEmios_0/PwmEmiosChannels - PwmEmiosChannels_17 PwmEmiosChannels_9 
PwmEmios_0/PwmEmiosChannels_17/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_0/PwmEmiosChannels_17/EmiosChDeadtime - 0 
PwmEmios_0/PwmEmiosChannels_17/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_0/PwmEmiosChannels_17/EmiosChFreeze - false 
PwmEmios_0/PwmEmiosChannels_17/EmiosChId - CH_17 
PwmEmios_0/PwmEmiosChannels_17/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_0/PwmEmiosChannels_17/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_0/PwmEmiosChannels_17/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_0/PwmEmiosChannels_17/EmiosChPhaseShift - 0 
PwmEmios_0/PwmEmiosChannels_17/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_2 
PwmEmios_0/PwmEmiosChannels_17/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_0/PwmEmiosChannels_17/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_0/PwmEmiosChannels_17/EmiosChTrigger - 0 
PwmEmios_0/PwmEmiosChannels_17/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_0/EmiosMclMasterBus_0 
PwmEmios_0/PwmEmiosChannels_9/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_0/PwmEmiosChannels_9/EmiosChDeadtime - 0 
PwmEmios_0/PwmEmiosChannels_9/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_0/PwmEmiosChannels_9/EmiosChFreeze - false 
PwmEmios_0/PwmEmiosChannels_9/EmiosChId - CH_9 
PwmEmios_0/PwmEmiosChannels_9/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_0/PwmEmiosChannels_9/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_0/PwmEmiosChannels_9/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_0/PwmEmiosChannels_9/EmiosChPhaseShift - 0 
PwmEmios_0/PwmEmiosChannels_9/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_0/PwmEmiosChannels_9/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_0/PwmEmiosChannels_9/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_0/PwmEmiosChannels_9/EmiosChTrigger - 0 
PwmEmios_0/PwmEmiosChannels_9/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_0/EmiosMclMasterBus_0 
PwmEmios_0/PwmHwInstance - Emios_0 
PwmEmios_1/PwmEmiosChannels - PwmEmiosChannels_0 PwmEmiosChannels_1 PwmEmiosChannels_19 PwmEmiosChannels_20 PwmEmiosChannels_21 PwmEmiosChannels_22 
PwmEmios_1/PwmEmiosChannels_0/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_0/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_0/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_0/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_0/EmiosChId - CH_0 
PwmEmios_1/PwmEmiosChannels_0/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_0/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_0/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_0/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_0/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_0/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_0/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_0/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_0/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmEmiosChannels_1/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_1/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_1/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_1/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_1/EmiosChId - CH_1 
PwmEmios_1/PwmEmiosChannels_1/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_1/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_1/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_1/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_1/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_1/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_1/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_1/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_1/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmEmiosChannels_19/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_19/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_19/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_19/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_19/EmiosChId - CH_19 
PwmEmios_1/PwmEmiosChannels_19/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_19/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_19/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_19/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_19/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_19/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_19/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_19/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_19/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmEmiosChannels_20/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_20/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_20/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_20/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_20/EmiosChId - CH_20 
PwmEmios_1/PwmEmiosChannels_20/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_20/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_20/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_20/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_20/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_20/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_20/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_20/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_20/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmEmiosChannels_21/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_21/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_21/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_21/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_21/EmiosChId - CH_21 
PwmEmios_1/PwmEmiosChannels_21/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_21/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_21/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_21/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_21/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_21/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_21/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_21/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_21/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmEmiosChannels_22/EmiosChCounterBus - EMIOS_PWM_IP_BUS_A 
PwmEmios_1/PwmEmiosChannels_22/EmiosChDeadtime - 0 
PwmEmios_1/PwmEmiosChannels_22/EmiosChFlagGeneration - Trailing_Edge 
PwmEmios_1/PwmEmiosChannels_22/EmiosChFreeze - false 
PwmEmios_1/PwmEmiosChannels_22/EmiosChId - CH_22 
PwmEmios_1/PwmEmiosChannels_22/EmiosChInterrupt - EMIOS_PWM_IP_INTERRUPT_REQUEST 
PwmEmios_1/PwmEmiosChannels_22/EmiosChMode - EMIOS_PWM_IP_MODE_OPWMB 
PwmEmios_1/PwmEmiosChannels_22/EmiosChOutputDisable - EMIOS_PWM_IP_OUTPUT_DISABLE_NONE 
PwmEmios_1/PwmEmiosChannels_22/EmiosChPhaseShift - 0 
PwmEmios_1/PwmEmiosChannels_22/EmiosChPrescaler - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_22/EmiosChPrescalerAlternate - EMIOS_PWM_IP_CLOCK_DIV_1 
PwmEmios_1/PwmEmiosChannels_22/EmiosChPrescalerSource - EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK 
PwmEmios_1/PwmEmiosChannels_22/EmiosChTrigger - 0 
PwmEmios_1/PwmEmiosChannels_22/PwmEmiosBusRef - /Mcl/Mcl/MclConfig/EmiosCommon_1/EmiosMclMasterBus_0 
PwmEmios_1/PwmHwInstance - Emios_1 
PwmGeneral - PwmGeneral 
PwmGeneral/PwmDevErrorDetect - true 
PwmGeneral/PwmDutycycleUpdatedEndperiod - false 
PwmGeneral/PwmEnableDualClockMode - false 
PwmGeneral/PwmEnableUserModeSupport - false 
PwmGeneral/PwmIndex - 0 
PwmGeneral/PwmMultiChannelSync - false 
PwmGeneral/PwmMulticoreEnabled - false 
PwmGeneral/PwmNotificationSupported - true 
PwmGeneral/PwmPeriodUpdatedEndperiod - true 

*/
#define MW_DETAILS_PWM 
#define MW_OPEN_PWM 
#define MW_UPDATE_PWM 
#define MW_DIO_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 120 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
DioConfig - DioConfig 
DioConfig/DioPort - PTA_H PTB_H PTC_H PTD_L PTE_L 
DioConfig/PTA_H/DioChannel - RGBLED0_BLUE RGBLED0_GREEN RGBLED0_RED 
DioConfig/PTA_H/DioPortId - 1 
DioConfig/PTA_H/RGBLED0_BLUE/DioChannelId - 15 
DioConfig/PTA_H/RGBLED0_BLUE/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTA_H/RGBLED0_GREEN/DioChannelId - 14 
DioConfig/PTA_H/RGBLED0_GREEN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTA_H/RGBLED0_RED/DioChannelId - 13 
DioConfig/PTA_H/RGBLED0_RED/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTB_H/DioChannel - RGBLED1_GREEN RGBLED1_RED USER_SW0 USER_SW1 
DioConfig/PTB_H/DioPortId - 3 
DioConfig/PTB_H/RGBLED1_GREEN/DioChannelId - 9 
DioConfig/PTB_H/RGBLED1_GREEN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTB_H/RGBLED1_RED/DioChannelId - 2 
DioConfig/PTB_H/RGBLED1_RED/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTB_H/USER_SW0/DioChannelId - 10 
DioConfig/PTB_H/USER_SW0/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTB_H/USER_SW1/DioChannelId - 3 
DioConfig/PTB_H/USER_SW1/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTC_H/CanController_0_EN/DioChannelId - 5 
DioConfig/PTC_H/CanController_0_EN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTC_H/CanController_0_ERRN/DioChannelId - 7 
DioConfig/PTC_H/CanController_0_ERRN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTC_H/CanController_0_STB/DioChannelId - 4 
DioConfig/PTC_H/CanController_0_STB/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTC_H/DioChannel - CanController_0_EN CanController_0_ERRN CanController_0_STB 
DioConfig/PTC_H/DioPortId - 5 
DioConfig/PTD_L/CanController_1_EN/DioChannelId - 15 
DioConfig/PTD_L/CanController_1_EN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTD_L/CanController_1_STB/DioChannelId - 13 
DioConfig/PTD_L/CanController_1_STB/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTD_L/DioChannel - CanController_1_EN CanController_1_STB 
DioConfig/PTD_L/DioPortId - 6 
DioConfig/PTE_L/CanController_1_ERRN/DioChannelId - 8 
DioConfig/PTE_L/CanController_1_ERRN/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioConfig/PTE_L/DioChannel - CanController_1_ERRN RGBLED1_BLUE 
DioConfig/PTE_L/DioPortId - 8 
DioConfig/PTE_L/RGBLED1_BLUE/DioChannelId - 12 
DioConfig/PTE_L/RGBLED1_BLUE/PDACSlot - VIRTUAL_WRAPPER_PDAC0 
DioGeneral - DioGeneral 
DioGeneral/DioDevErrorDetect - true 
DioGeneral/DioEnableUserModeSupport - false 
DioGeneral/DioFlipChannelApi - true 
DioGeneral/DioMaskedWritePortApi - true 
DioGeneral/DioMulticoreSupport - false 
DioGeneral/DioReadZeroForUndefinedPortPins - false 
DioGeneral/DioReversePortBits - false 
DioGeneral/DioVersionInfoApi - true 
DioGeneral/SIUL2DioIPDevErrorDetect - true 
DioGeneral/VirtWrapperSupport - false 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_DIO 
#define MW_OPEN_DIO 
#define MW_UPDATE_DIO 
#define MW_GPT_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 100 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
GptAutosarExt - GptAutosarExt 
GptAutosarExt/ChainModeApi - false 
GptAutosarExt/GptChangeNextTimeoutValueApi - false 
GptAutosarExt/GptEnableDualClockMode - false 
GptAutosarExt/GptEnableTriggers - false 
GptAutosarExt/GptEnableUserModeSupport - false 
GptAutosarExt/GptStandbyWakeupSupport - false 
GptChannelConfigSet - GptChannelConfigSet 
GptChannelConfigSet/GptChannelConfiguration - GptChannelConfiguration_0 GptChannelConfiguration_1 ProfilerTimer StepTimer 
GptChannelConfigSet/GptChannelConfiguration_0/GptChannelClkSrcRef - /Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint_0 
GptChannelConfigSet/GptChannelConfiguration_0/GptChannelId - 0 
GptChannelConfigSet/GptChannelConfiguration_0/GptChannelMode - GPT_CH_MODE_CONTINUOUS 
GptChannelConfigSet/GptChannelConfiguration_0/GptChannelTickFrequency - 40000000 
GptChannelConfigSet/GptChannelConfiguration_0/GptChannelTickValueMax - 4294967295 
GptChannelConfigSet/GptChannelConfiguration_0/GptEnableWakeup - false 
GptChannelConfigSet/GptChannelConfiguration_0/GptHwIp - PIT 
GptChannelConfigSet/GptChannelConfiguration_0/GptModuleRef - /Gpt/Gpt/GptChannelConfigSet/GptPit_0/GptPitChannels_0 
GptChannelConfigSet/GptChannelConfiguration_0/GptNotification - Gpt_PitNotification 
GptChannelConfigSet/GptChannelConfiguration_1/GptChannelClkSrcRef - /Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint_0 
GptChannelConfigSet/GptChannelConfiguration_1/GptChannelId - 1 
GptChannelConfigSet/GptChannelConfiguration_1/GptChannelMode - GPT_CH_MODE_ONESHOT 
GptChannelConfigSet/GptChannelConfiguration_1/GptChannelTickFrequency - 40000000 
GptChannelConfigSet/GptChannelConfiguration_1/GptChannelTickValueMax - 4294967295 
GptChannelConfigSet/GptChannelConfiguration_1/GptEnableWakeup - true 
GptChannelConfigSet/GptChannelConfiguration_1/GptHwIp - PIT 
GptChannelConfigSet/GptChannelConfiguration_1/GptModuleRef - /Gpt/Gpt/GptChannelConfigSet/GptPit_0/GptPitChannels_1 
GptChannelConfigSet/GptChannelConfiguration_1/GptWakeupConfiguration - GptWakeupConfiguration 
GptChannelConfigSet/GptChannelConfiguration_1/GptWakeupConfiguration/GptWakeupSourceRef - /EcuM/EcuM/EcuMConfiguration_0/EcuMCommonConfiguration/EcuMWakeupSource_0 
GptChannelConfigSet/GptPit - GptPit_0 
GptChannelConfigSet/GptPit_0/GptPitChannels - GptPitChannels_0 GptPitChannels_1 GptPitChannels_2 GptPitChannels_3 
GptChannelConfigSet/GptPit_0/GptPitChannels_0/ChainMode - false 
GptChannelConfigSet/GptPit_0/GptPitChannels_0/GptPitChannel - CH_0 
GptChannelConfigSet/GptPit_0/GptPitChannels_1/ChainMode - false 
GptChannelConfigSet/GptPit_0/GptPitChannels_1/GptPitChannel - CH_RTI 
GptChannelConfigSet/GptPit_0/GptPitChannels_2/ChainMode - false 
GptChannelConfigSet/GptPit_0/GptPitChannels_2/GptPitChannel - CH_2 
GptChannelConfigSet/GptPit_0/GptPitChannels_3/ChainMode - false 
GptChannelConfigSet/GptPit_0/GptPitChannels_3/GptPitChannel - CH_3 
GptChannelConfigSet/GptPit_0/GptPitModule - PIT_0 
GptChannelConfigSet/GptPit_0/PitFreezeEnable - false 
GptChannelConfigSet/ProfilerTimer/GptChannelClkSrcRef - /Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint_0 
GptChannelConfigSet/ProfilerTimer/GptChannelId - 3 
GptChannelConfigSet/ProfilerTimer/GptChannelMode - GPT_CH_MODE_CONTINUOUS 
GptChannelConfigSet/ProfilerTimer/GptChannelTickFrequency - 40000000 
GptChannelConfigSet/ProfilerTimer/GptChannelTickValueMax - 4294967295 
GptChannelConfigSet/ProfilerTimer/GptEnableWakeup - false 
GptChannelConfigSet/ProfilerTimer/GptHwIp - PIT 
GptChannelConfigSet/ProfilerTimer/GptModuleRef - /Gpt/Gpt/GptChannelConfigSet/GptPit_0/GptPitChannels_3 
GptChannelConfigSet/StepTimer/GptChannelClkSrcRef - /Gpt/Gpt/GptDriverConfiguration/GptClockReferencePoint_0 
GptChannelConfigSet/StepTimer/GptChannelId - 2 
GptChannelConfigSet/StepTimer/GptChannelMode - GPT_CH_MODE_CONTINUOUS 
GptChannelConfigSet/StepTimer/GptChannelTickFrequency - 40000000 
GptChannelConfigSet/StepTimer/GptChannelTickValueMax - 4294967295 
GptChannelConfigSet/StepTimer/GptEnableWakeup - false 
GptChannelConfigSet/StepTimer/GptHwIp - PIT 
GptChannelConfigSet/StepTimer/GptModuleRef - /Gpt/Gpt/GptChannelConfigSet/GptPit_0/GptPitChannels_2 
GptChannelConfigSet/StepTimer/GptNotification - MBDT_Step_Handler 
GptConfigurationOfOptApiServices - GptConfigurationOfOptApiServices 
GptConfigurationOfOptApiServices/GptDeinitApi - true 
GptConfigurationOfOptApiServices/GptEnableDisableNotificationApi - true 
GptConfigurationOfOptApiServices/GptPredefTimerFunctionalityApi - true 
GptConfigurationOfOptApiServices/GptTimeElapsedApi - true 
GptConfigurationOfOptApiServices/GptTimeRemainingApi - true 
GptConfigurationOfOptApiServices/GptVersionInfoApi - true 
GptConfigurationOfOptApiServices/GptWakeupFunctionalityApi - true 
GptDriverConfiguration - GptDriverConfiguration 
GptDriverConfiguration/GptClockReferencePoint - GptClockReferencePoint_0 
GptDriverConfiguration/GptClockReferencePoint_0/GptClockReference - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/GPT_CLK 
GptDriverConfiguration/GptDevErrorDetect - true 
GptDriverConfiguration/GptMulticoreSupport - false 
GptDriverConfiguration/GptPredefTimer100us32bitEnable - false 
GptDriverConfiguration/GptPredefTimer1usEnablingGrade - GPT_PREDEF_TIMER_1US_DISABLED 
GptDriverConfiguration/GptReportWakeupSource - true 
GptDriverConfiguration/GptTimeoutDuration - 65535 
GptDriverConfiguration/GptTimeoutMethod - OSIF_COUNTER_SYSTEM 
GptHwConfiguration - GptHwConfiguration_0 GptHwConfiguration_1 GptHwConfiguration_10 GptHwConfiguration_11 GptHwConfiguration_12 GptHwConfiguration_13 GptHwConfiguration_14 GptHwConfiguration_15 GptHwConfiguration_16 GptHwConfiguration_17 GptHwConfiguration_18 GptHwConfiguration_19 GptHwConfiguration_2 GptHwConfiguration_20 GptHwConfiguration_21 GptHwConfiguration_22 GptHwConfiguration_23 GptHwConfiguration_24 GptHwConfiguration_25 GptHwConfiguration_26 GptHwConfiguration_27 GptHwConfiguration_28 GptHwConfiguration_29 GptHwConfiguration_3 GptHwConfiguration_30 GptHwConfiguration_31 GptHwConfiguration_32 GptHwConfiguration_33 GptHwConfiguration_34 GptHwConfiguration_35 GptHwConfiguration_36 GptHwConfiguration_37 GptHwConfiguration_38 GptHwConfiguration_39 GptHwConfiguration_4 GptHwConfiguration_40 GptHwConfiguration_41 GptHwConfiguration_42 GptHwConfiguration_43 GptHwConfiguration_44 GptHwConfiguration_45 GptHwConfiguration_5 GptHwConfiguration_6 GptHwConfiguration_7 GptHwConfiguration_8 GptHwConfiguration_9 
GptHwConfiguration_0/GptChannelIsUsed - false 
GptHwConfiguration_0/GptIsrEnable - false 
GptHwConfiguration_0/GptIsrHwId - STM_0_CH_0 
GptHwConfiguration_1/GptChannelIsUsed - false 
GptHwConfiguration_1/GptIsrEnable - false 
GptHwConfiguration_1/GptIsrHwId - STM_0_CH_1 
GptHwConfiguration_10/GptChannelIsUsed - false 
GptHwConfiguration_10/GptIsrEnable - false 
GptHwConfiguration_10/GptIsrHwId - PIT_0_CH_1 
GptHwConfiguration_11/GptChannelIsUsed - true 
GptHwConfiguration_11/GptIsrEnable - true 
GptHwConfiguration_11/GptIsrHwId - PIT_0_CH_2 
GptHwConfiguration_12/GptChannelIsUsed - true 
GptHwConfiguration_12/GptIsrEnable - true 
GptHwConfiguration_12/GptIsrHwId - PIT_0_CH_3 
GptHwConfiguration_13/GptChannelIsUsed - false 
GptHwConfiguration_13/GptIsrEnable - false 
GptHwConfiguration_13/GptIsrHwId - PIT_1_CH_0 
GptHwConfiguration_14/GptChannelIsUsed - false 
GptHwConfiguration_14/GptIsrEnable - false 
GptHwConfiguration_14/GptIsrHwId - PIT_1_CH_1 
GptHwConfiguration_15/GptChannelIsUsed - false 
GptHwConfiguration_15/GptIsrEnable - false 
GptHwConfiguration_15/GptIsrHwId - PIT_1_CH_2 
GptHwConfiguration_16/GptChannelIsUsed - false 
GptHwConfiguration_16/GptIsrEnable - false 
GptHwConfiguration_16/GptIsrHwId - PIT_1_CH_3 
GptHwConfiguration_17/GptChannelIsUsed - false 
GptHwConfiguration_17/GptIsrEnable - false 
GptHwConfiguration_17/GptIsrHwId - PIT_2_CH_0 
GptHwConfiguration_18/GptChannelIsUsed - false 
GptHwConfiguration_18/GptIsrEnable - false 
GptHwConfiguration_18/GptIsrHwId - PIT_2_CH_1 
GptHwConfiguration_19/GptChannelIsUsed - false 
GptHwConfiguration_19/GptIsrEnable - false 
GptHwConfiguration_19/GptIsrHwId - PIT_2_CH_2 
GptHwConfiguration_2/GptChannelIsUsed - false 
GptHwConfiguration_2/GptIsrEnable - false 
GptHwConfiguration_2/GptIsrHwId - STM_0_CH_2 
GptHwConfiguration_20/GptChannelIsUsed - false 
GptHwConfiguration_20/GptIsrEnable - false 
GptHwConfiguration_20/GptIsrHwId - PIT_2_CH_3 
GptHwConfiguration_21/GptChannelIsUsed - false 
GptHwConfiguration_21/GptIsrEnable - false 
GptHwConfiguration_21/GptIsrHwId - EMIOS_0_CH_0 
GptHwConfiguration_22/GptChannelIsUsed - false 
GptHwConfiguration_22/GptIsrEnable - false 
GptHwConfiguration_22/GptIsrHwId - EMIOS_0_CH_1 
GptHwConfiguration_23/GptChannelIsUsed - false 
GptHwConfiguration_23/GptIsrEnable - false 
GptHwConfiguration_23/GptIsrHwId - EMIOS_0_CH_2 
GptHwConfiguration_24/GptChannelIsUsed - false 
GptHwConfiguration_24/GptIsrEnable - false 
GptHwConfiguration_24/GptIsrHwId - EMIOS_0_CH_3 
GptHwConfiguration_25/GptChannelIsUsed - false 
GptHwConfiguration_25/GptIsrEnable - false 
GptHwConfiguration_25/GptIsrHwId - EMIOS_0_CH_4 
GptHwConfiguration_26/GptChannelIsUsed - false 
GptHwConfiguration_26/GptIsrEnable - false 
GptHwConfiguration_26/GptIsrHwId - EMIOS_0_CH_5 
GptHwConfiguration_27/GptChannelIsUsed - false 
GptHwConfiguration_27/GptIsrEnable - false 
GptHwConfiguration_27/GptIsrHwId - EMIOS_0_CH_6 
GptHwConfiguration_28/GptChannelIsUsed - false 
GptHwConfiguration_28/GptIsrEnable - false 
GptHwConfiguration_28/GptIsrHwId - EMIOS_0_CH_7 
GptHwConfiguration_29/GptChannelIsUsed - false 
GptHwConfiguration_29/GptIsrEnable - false 
GptHwConfiguration_29/GptIsrHwId - EMIOS_0_CH_8 
GptHwConfiguration_3/GptChannelIsUsed - false 
GptHwConfiguration_3/GptIsrEnable - false 
GptHwConfiguration_3/GptIsrHwId - STM_0_CH_3 
GptHwConfiguration_30/GptChannelIsUsed - false 
GptHwConfiguration_30/GptIsrEnable - false 
GptHwConfiguration_30/GptIsrHwId - EMIOS_0_CH_16 
GptHwConfiguration_31/GptChannelIsUsed - false 
GptHwConfiguration_31/GptIsrEnable - false 
GptHwConfiguration_31/GptIsrHwId - EMIOS_0_CH_22 
GptHwConfiguration_32/GptChannelIsUsed - false 
GptHwConfiguration_32/GptIsrEnable - false 
GptHwConfiguration_32/GptIsrHwId - EMIOS_0_CH_23 
GptHwConfiguration_33/GptChannelIsUsed - false 
GptHwConfiguration_33/GptIsrEnable - false 
GptHwConfiguration_33/GptIsrHwId - EMIOS_1_CH_0 
GptHwConfiguration_34/GptChannelIsUsed - false 
GptHwConfiguration_34/GptIsrEnable - false 
GptHwConfiguration_34/GptIsrHwId - EMIOS_1_CH_8 
GptHwConfiguration_35/GptChannelIsUsed - false 
GptHwConfiguration_35/GptIsrEnable - false 
GptHwConfiguration_35/GptIsrHwId - EMIOS_1_CH_16 
GptHwConfiguration_36/GptChannelIsUsed - false 
GptHwConfiguration_36/GptIsrEnable - false 
GptHwConfiguration_36/GptIsrHwId - EMIOS_1_CH_22 
GptHwConfiguration_37/GptChannelIsUsed - false 
GptHwConfiguration_37/GptIsrEnable - false 
GptHwConfiguration_37/GptIsrHwId - EMIOS_1_CH_23 
GptHwConfiguration_38/GptChannelIsUsed - false 
GptHwConfiguration_38/GptIsrEnable - false 
GptHwConfiguration_38/GptIsrHwId - EMIOS_2_CH_0 
GptHwConfiguration_39/GptChannelIsUsed - false 
GptHwConfiguration_39/GptIsrEnable - false 
GptHwConfiguration_39/GptIsrHwId - EMIOS_2_CH_8 
GptHwConfiguration_4/GptChannelIsUsed - false 
GptHwConfiguration_4/GptIsrEnable - false 
GptHwConfiguration_4/GptIsrHwId - STM_1_CH_0 
GptHwConfiguration_40/GptChannelIsUsed - false 
GptHwConfiguration_40/GptIsrEnable - false 
GptHwConfiguration_40/GptIsrHwId - EMIOS_2_CH_16 
GptHwConfiguration_41/GptChannelIsUsed - false 
GptHwConfiguration_41/GptIsrEnable - false 
GptHwConfiguration_41/GptIsrHwId - EMIOS_2_CH_22 
GptHwConfiguration_42/GptChannelIsUsed - false 
GptHwConfiguration_42/GptIsrEnable - false 
GptHwConfiguration_42/GptIsrHwId - EMIOS_2_CH_23 
GptHwConfiguration_43/GptChannelIsUsed - false 
GptHwConfiguration_43/GptIsrEnable - false 
GptHwConfiguration_43/GptIsrHwId - RTC_0_CH_0 
GptHwConfiguration_44/GptChannelIsUsed - false 
GptHwConfiguration_44/GptIsrEnable - false 
GptHwConfiguration_44/GptIsrHwId - STM_0_PREDEF 
GptHwConfiguration_45/GptChannelIsUsed - false 
GptHwConfiguration_45/GptIsrEnable - false 
GptHwConfiguration_45/GptIsrHwId - STM_1_PREDEF 
GptHwConfiguration_5/GptChannelIsUsed - false 
GptHwConfiguration_5/GptIsrEnable - false 
GptHwConfiguration_5/GptIsrHwId - STM_1_CH_1 
GptHwConfiguration_6/GptChannelIsUsed - false 
GptHwConfiguration_6/GptIsrEnable - false 
GptHwConfiguration_6/GptIsrHwId - STM_1_CH_2 
GptHwConfiguration_7/GptChannelIsUsed - false 
GptHwConfiguration_7/GptIsrEnable - false 
GptHwConfiguration_7/GptIsrHwId - STM_1_CH_3 
GptHwConfiguration_8/GptChannelIsUsed - true 
GptHwConfiguration_8/GptIsrEnable - true 
GptHwConfiguration_8/GptIsrHwId - PIT_0_CH_RTI 
GptHwConfiguration_9/GptChannelIsUsed - true 
GptHwConfiguration_9/GptIsrEnable - true 
GptHwConfiguration_9/GptIsrHwId - PIT_0_CH_0 
GptPredefTimerConfiguration - GptPredefTimerConfiguration 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
POST_BUILD_VARIANT_USED - true 

*/
#define MW_DETAILS_GPT 
#define MW_OPEN_GPT 
#define MW_UPDATE_GPT 
#define MW_SPI_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 83 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
POST_BUILD_VARIANT_USED - true 
SpiAutosarExt - SpiAutosarExt 
SpiAutosarExt/SpiAllowBigSizeCollections - false 
SpiAutosarExt/SpiDisableDemReportErrorStatus - false 
SpiAutosarExt/SpiEnableDmaContMemTransferSupport - false 
SpiAutosarExt/SpiEnableDmaFastTransferSupport - false 
SpiAutosarExt/SpiEnableHWUnitAsyncMode - false 
SpiAutosarExt/SpiEnableUserModeSupport - false 
SpiAutosarExt/SpiFlexioEnable - false 
SpiAutosarExt/SpiHalfDuplexModeSupport - false 
SpiAutosarExt/SpiJobStartNotificationEnable - false 
SpiDriver - SpiDriver 
SpiDriver/SpiChannel - SpiChannel_0 SpiChannel_1 
SpiDriver/SpiChannel_0/SpiChannelId - 0 
SpiDriver/SpiChannel_0/SpiChannelType - EB 
SpiDriver/SpiChannel_0/SpiDataWidth - 8 
SpiDriver/SpiChannel_0/SpiEbMaxLength - 1000 
SpiDriver/SpiChannel_0/SpiIbNBuffers - 1 
SpiDriver/SpiChannel_0/SpiTransferStart - MSB 
SpiDriver/SpiChannel_1/SpiChannelId - 1 
SpiDriver/SpiChannel_1/SpiChannelType - IB 
SpiDriver/SpiChannel_1/SpiDataWidth - 8 
SpiDriver/SpiChannel_1/SpiEbMaxLength - 1000 
SpiDriver/SpiChannel_1/SpiIbNBuffers - 1 
SpiDriver/SpiChannel_1/SpiTransferStart - MSB 
SpiDriver/SpiExternalDevice - SpiExternalDevice_0 SpiExternalDevice_1 
SpiDriver/SpiExternalDevice_0/SpiBaudrate - 500000.0 
SpiDriver/SpiExternalDevice_0/SpiCsBehavior - CS_KEEP_ASSERTED 
SpiDriver/SpiExternalDevice_0/SpiCsIdentifier - PCS0 
SpiDriver/SpiExternalDevice_0/SpiCsPolarity - LOW 
SpiDriver/SpiExternalDevice_0/SpiCsSelection - CS_VIA_PERIPHERAL_ENGINE 
SpiDriver/SpiExternalDevice_0/SpiDataShiftEdge - LEADING 
SpiDriver/SpiExternalDevice_0/SpiDeviceHalfDuplexSupport - false 
SpiDriver/SpiExternalDevice_0/SpiEnableCs - true 
SpiDriver/SpiExternalDevice_0/SpiHalfDuplexPinSelect - HALF_DUPLEX_SIN 
SpiDriver/SpiExternalDevice_0/SpiHwUnit - CSIB0 
SpiDriver/SpiExternalDevice_0/SpiShiftClockIdleLevel - LOW 
SpiDriver/SpiExternalDevice_0/SpiTimeClk2Cs - 2.0E-7 
SpiDriver/SpiExternalDevice_0/SpiTimeCs2Clk - 2.0E-7 
SpiDriver/SpiExternalDevice_0/SpiTimeCs2Cs - 4.0E-7 
SpiDriver/SpiExternalDevice_0/SpiTransferWidth - TRANSFER_1_BIT 
SpiDriver/SpiExternalDevice_1/SpiBaudrate - 500000.0 
SpiDriver/SpiExternalDevice_1/SpiCsBehavior - CS_KEEP_ASSERTED 
SpiDriver/SpiExternalDevice_1/SpiCsIdentifier - PCS3 
SpiDriver/SpiExternalDevice_1/SpiCsPolarity - LOW 
SpiDriver/SpiExternalDevice_1/SpiCsSelection - CS_VIA_PERIPHERAL_ENGINE 
SpiDriver/SpiExternalDevice_1/SpiDataShiftEdge - LEADING 
SpiDriver/SpiExternalDevice_1/SpiDeviceHalfDuplexSupport - false 
SpiDriver/SpiExternalDevice_1/SpiEnableCs - true 
SpiDriver/SpiExternalDevice_1/SpiHalfDuplexPinSelect - HALF_DUPLEX_SIN 
SpiDriver/SpiExternalDevice_1/SpiHwUnit - CSIB1 
SpiDriver/SpiExternalDevice_1/SpiShiftClockIdleLevel - LOW 
SpiDriver/SpiExternalDevice_1/SpiTimeClk2Cs - 2.0E-7 
SpiDriver/SpiExternalDevice_1/SpiTimeCs2Clk - 2.0E-7 
SpiDriver/SpiExternalDevice_1/SpiTimeCs2Cs - 4.0E-7 
SpiDriver/SpiExternalDevice_1/SpiTransferWidth - TRANSFER_1_BIT 
SpiDriver/SpiJob - SpiJob_0 SpiJob_1 
SpiDriver/SpiJob_0/SpiChannelList - SpiChannelList_0 
SpiDriver/SpiJob_0/SpiChannelList_0/SpiChannelAssignment - /Spi/Spi/SpiDriver/SpiChannel_0 
SpiDriver/SpiJob_0/SpiChannelList_0/SpiChannelIndex - 0 
SpiDriver/SpiJob_0/SpiDeviceAssignment - /Spi/Spi/SpiDriver/SpiExternalDevice_0 
SpiDriver/SpiJob_0/SpiJobEndNotification - MBDT_SPI_end_job0_callback 
SpiDriver/SpiJob_0/SpiJobId - 0 
SpiDriver/SpiJob_0/SpiJobPriority - 0 
SpiDriver/SpiJob_1/SpiChannelList - SpiChannelList_0 
SpiDriver/SpiJob_1/SpiChannelList_0/SpiChannelAssignment - /Spi/Spi/SpiDriver/SpiChannel_1 
SpiDriver/SpiJob_1/SpiChannelList_0/SpiChannelIndex - 0 
SpiDriver/SpiJob_1/SpiDeviceAssignment - /Spi/Spi/SpiDriver/SpiExternalDevice_1 
SpiDriver/SpiJob_1/SpiJobId - 1 
SpiDriver/SpiJob_1/SpiJobPriority - 0 
SpiDriver/SpiSequence - SpiSequence_0 SpiSequence_1 
SpiDriver/SpiSequence_0/SpiDmaContMemTransferSequenceEnable - false 
SpiDriver/SpiSequence_0/SpiEnableDmaFastTransfer - false 
SpiDriver/SpiSequence_0/SpiInterruptibleSequence - false 
SpiDriver/SpiSequence_0/SpiJobAssignment - /Spi/Spi/SpiDriver/SpiJob_0 
SpiDriver/SpiSequence_0/SpiSequenceId - 0 
SpiDriver/SpiSequence_1/SpiDmaContMemTransferSequenceEnable - false 
SpiDriver/SpiSequence_1/SpiEnableDmaFastTransfer - false 
SpiDriver/SpiSequence_1/SpiInterruptibleSequence - false 
SpiDriver/SpiSequence_1/SpiJobAssignment - /Spi/Spi/SpiDriver/SpiJob_1 
SpiDriver/SpiSequence_1/SpiSeqEndNotification - MBDT_SPI_end_sequence1_callback 
SpiDriver/SpiSequence_1/SpiSequenceId - 1 
SpiGeneral - SpiGeneral 
SpiGeneral/SpiCancelApi - true 
SpiGeneral/SpiChannelBuffersAllowed - 2 
SpiGeneral/SpiDevErrorDetect - true 
SpiGeneral/SpiGlobalDmaEnable - false 
SpiGeneral/SpiHwStatusApi - true 
SpiGeneral/SpiInterruptibleSeqAllowed - true 
SpiGeneral/SpiLevelDelivered - 2 
SpiGeneral/SpiMulticoreSupport - false 
SpiGeneral/SpiPhyUnit - SpiPhyUnit_0 SpiPhyUnit_1 
SpiGeneral/SpiPhyUnit_0/SpiPhyUnitAsyncUseDma - false 
SpiGeneral/SpiPhyUnit_0/SpiPhyUnitClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/SPI_CLK 
SpiGeneral/SpiPhyUnit_0/SpiPhyUnitMapping - LPSPI_2 
SpiGeneral/SpiPhyUnit_0/SpiPhyUnitMode - SPI_MASTER 
SpiGeneral/SpiPhyUnit_0/SpiPhyUnitSync - false 
SpiGeneral/SpiPhyUnit_0/SpiPinConfiguration - 0 
SpiGeneral/SpiPhyUnit_0/SpiSamplePoint - 0 
SpiGeneral/SpiPhyUnit_1/SpiPhyUnitAsyncUseDma - false 
SpiGeneral/SpiPhyUnit_1/SpiPhyUnitClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/SPI_CLK 
SpiGeneral/SpiPhyUnit_1/SpiPhyUnitMapping - LPSPI_1 
SpiGeneral/SpiPhyUnit_1/SpiPhyUnitMode - SPI_SLAVE 
SpiGeneral/SpiPhyUnit_1/SpiPhyUnitSync - false 
SpiGeneral/SpiPhyUnit_1/SpiPinConfiguration - 0 
SpiGeneral/SpiPhyUnit_1/SpiSamplePoint - 0 
SpiGeneral/SpiSupportConcurrentSyncTransmit - false 
SpiGeneral/SpiTimeoutMethod - OSIF_COUNTER_DUMMY 
SpiGeneral/SpiTransmitTimeout - 50000 
SpiGeneral/SpiVersionInfoApi - true 
SpiPublishedInformation - SpiPublishedInformation 
SpiPublishedInformation/SpiMaxHwUnit - 0 

*/
#define MW_DETAILS_SPI 
#define MW_OPEN_SPI 
#define MW_UPDATE_SPI 
#define MW_DIAGNOSTICS_ENABLEMODELCHECKS 49
#define MW_DIAGNOSTICS_ENABLEPROFILERCHECKS 49
#define MW_DATAVERSION 2016.02
#define MW_DEFAULT_LOC mbdtbx_s32k3/devices/S32K312-Q172/s32ds_default_project_config/S32K312-Q172.mex
#define MW_BROWSE_CONFIG 
#define MW_SAVE_CONFIG 
#define MW_OPEN_CONFIG 
#define MW_UART_INFO /*
Uart - Uart 
Uart/CommonPublishedInformation - CommonPublishedInformation 
Uart/CommonPublishedInformation/ArReleaseMajorVersion - 4 
Uart/CommonPublishedInformation/ArReleaseMinorVersion - 4 
Uart/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
Uart/CommonPublishedInformation/ModuleId - 255 
Uart/CommonPublishedInformation/SwMajorVersion - 2 
Uart/CommonPublishedInformation/SwMinorVersion - 0 
Uart/CommonPublishedInformation/SwPatchVersion - 0 
Uart/CommonPublishedInformation/VendorApiInfix -  
Uart/CommonPublishedInformation/VendorId - 43 
Uart/GeneralConfiguration - GeneralConfiguration 
Uart/GeneralConfiguration/DisableUartRuntimeErrorDetect - false 
Uart/GeneralConfiguration/UartCallback - MBDT_Uart_Callback 
Uart/GeneralConfiguration/UartCallbackCapability - true 
Uart/GeneralConfiguration/UartDevErrorDetect - true 
Uart/GeneralConfiguration/UartDmaEnable - false 
Uart/GeneralConfiguration/UartEnableUserModeSupport - false 
Uart/GeneralConfiguration/UartMulticoreSupport - false 
Uart/GeneralConfiguration/UartTimeoutDuration - 1000 
Uart/GeneralConfiguration/UartTimeoutMethod - OSIF_COUNTER_SYSTEM 
Uart/GeneralConfiguration/UartVersionInfoApi - true 
Uart/IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
Uart/POST_BUILD_VARIANT_USED - true 
Uart/UartGlobalConfig - UartGlobalConfig 
Uart/UartGlobalConfig/UartChannel - UartChannel_0 UartChannel_1 
Uart/UartGlobalConfig/UartChannel_0//CustomBaudrateDivider - 0 
Uart/UartGlobalConfig/UartChannel_0//CustomTimerDecrement - FLEXIO_TIMER_DECREMENT_FXIO_CLK_SHIFT_TMR 
Uart/UartGlobalConfig/UartChannel_0//DesireBaudrate - FLEXIO_UART_BAUDRATE_1200 
Uart/UartGlobalConfig/UartChannel_0//FlexioUartInteruptDmaMethod - FLEXIO_UART_IP_DRIVER_TYPE_INTERRUPTS 
Uart/UartGlobalConfig/UartChannel_0//UartHwChannelRef -  
Uart/UartGlobalConfig/UartChannel_0//bitCount - FLEXIO_UART_IP_8_BITS_PER_CHAR 
Uart/UartGlobalConfig/UartChannel_0//driverDirection - FLEXIO_UART_IP_DIRECTION_TX 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration - DetailModuleConfiguration 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/CustomBaudrateDivisor - 4 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/CustomBaudrateMantissa - 1 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/DesireBaudrate - LPUART_UART_BAUDRATE_115200 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartHwChannel - LPUART_6 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartInternalLoopbackEnable - false 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartInteruptDmaMethod - LPUART_UART_IP_USING_INTERRUPTS 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartParityType - LPUART_UART_IP_PARITY_DISABLED 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartStopBitNumber - LPUART_UART_IP_ONE_STOP_BIT 
Uart/UartGlobalConfig/UartChannel_0/DetailModuleConfiguration/UartWordLength - LPUART_UART_IP_8_BITS_PER_CHAR 
Uart/UartGlobalConfig/UartChannel_0/FlexioModuleConfiguration -  
Uart/UartGlobalConfig/UartChannel_0/UartChannelId - 0 
Uart/UartGlobalConfig/UartChannel_0/UartClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/UART_CLK 
Uart/UartGlobalConfig/UartChannel_0/UartHwUsing - LPUART_IP 
Uart/UartGlobalConfig/UartChannel_1//CustomBaudrateDivider - 0 
Uart/UartGlobalConfig/UartChannel_1//CustomTimerDecrement - FLEXIO_TIMER_DECREMENT_FXIO_CLK_SHIFT_TMR 
Uart/UartGlobalConfig/UartChannel_1//DesireBaudrate - FLEXIO_UART_BAUDRATE_1200 
Uart/UartGlobalConfig/UartChannel_1//FlexioUartInteruptDmaMethod - FLEXIO_UART_IP_DRIVER_TYPE_INTERRUPTS 
Uart/UartGlobalConfig/UartChannel_1//UartHwChannelRef -  
Uart/UartGlobalConfig/UartChannel_1//bitCount - FLEXIO_UART_IP_8_BITS_PER_CHAR 
Uart/UartGlobalConfig/UartChannel_1//driverDirection - FLEXIO_UART_IP_DIRECTION_TX 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration - DetailModuleConfiguration 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/CustomBaudrateDivisor - 4 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/CustomBaudrateMantissa - 1 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/DesireBaudrate - LPUART_UART_BAUDRATE_115200 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartHwChannel - LPUART_13 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartInternalLoopbackEnable - false 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartInteruptDmaMethod - LPUART_UART_IP_USING_INTERRUPTS 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartParityType - LPUART_UART_IP_PARITY_DISABLED 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartStopBitNumber - LPUART_UART_IP_ONE_STOP_BIT 
Uart/UartGlobalConfig/UartChannel_1/DetailModuleConfiguration/UartWordLength - LPUART_UART_IP_8_BITS_PER_CHAR 
Uart/UartGlobalConfig/UartChannel_1/FlexioModuleConfiguration -  
Uart/UartGlobalConfig/UartChannel_1/UartChannelId - 1 
Uart/UartGlobalConfig/UartChannel_1/UartClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/UART_CLK 
Uart/UartGlobalConfig/UartChannel_1/UartHwUsing - LPUART_IP 

*/
#define MW_DETAILS_UART 
#define MW_OPEN_UART 
#define MW_UPDATE_UART 
#define MW_RESTORE_ADC 
#define MW_MSG3 /* This peripheral is not supported in this toolbox version:
 Version 1.1.0 (R2020a-R2021b) 20-Dec-2021*/
#define MW_RESTORE_DIO 
#define MW_RESTORE_GPT 
#define MW_ICU_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 4 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 122 
CommonPublishedInformation/SwMajorVersion - 2 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
IcuAutosarExt - IcuAutosarExt 
IcuAutosarExt/IcuEnableDualClockMode - false 
IcuAutosarExt/IcuGetCaptureRegisterValueApi - false 
IcuAutosarExt/IcuGetInputLevelApi - false 
IcuAutosarExt/IcuLptmrStandbyWakeupSupport - false 
IcuAutosarExt/IcuOverflowNotificationApi - false 
IcuAutosarExt/IcuSetInitialCounterValue - false 
IcuAutosarExt/IcuSetMaxCounterValue - false 
IcuAutosarExt/IcuSupportSAICModeApi - false 
IcuAutosarExt/IcuWkpuStandbyWakeupSupport - false 
IcuConfigSet - IcuConfigSet 
IcuConfigSet/IcuChannel - IcuChannel_0 
IcuConfigSet/IcuChannel_0/IcuChannelId - 0 
IcuConfigSet/IcuChannel_0/IcuChannelRef - /Icu/Icu/IcuConfigSet/IcuSiul2_0/IcuSiul2Channels_0 
IcuConfigSet/IcuChannel_0/IcuDMAChannelEnable - false 
IcuConfigSet/IcuChannel_0/IcuDefaultStartEdge - ICU_RISING_EDGE 
IcuConfigSet/IcuChannel_0/IcuMeasurementMode - ICU_MODE_SIGNAL_EDGE_DETECT 
IcuConfigSet/IcuChannel_0/IcuOverflowNotification - NULL_PTR 
IcuConfigSet/IcuChannel_0/IcuSignalEdgeDetection - IcuSignalEdgeDetection 
IcuConfigSet/IcuChannel_0/IcuSignalEdgeDetection/IcuSignalNotification - MBDT_USER_SW0_callback 
IcuConfigSet/IcuChannel_0/IcuWakeupCapability - false 
IcuConfigSet/IcuHwInterruptConfigList - IcuHwInterruptConfigList_0 
IcuConfigSet/IcuHwInterruptConfigList_0/IcuIsrEnable - true 
IcuConfigSet/IcuHwInterruptConfigList_0/IcuIsrHwId - SIUL2_0_IRQ_CH_13 
IcuConfigSet/IcuMaxChannel - 1 
IcuConfigSet/IcuSiul2 - IcuSiul2_0 
IcuConfigSet/IcuSiul2_0/IcuEXT_ISR_AlternateInterruptFilterClockPrescaler - 0 
IcuConfigSet/IcuSiul2_0/IcuEXT_ISR_InterruptFilterClockPrescaler - 0 
IcuConfigSet/IcuSiul2_0/IcuSiul2Channels - IcuSiul2Channels_0 
IcuConfigSet/IcuSiul2_0/IcuSiul2Channels_0/IcuSiul2Channel - 13 
IcuConfigSet/IcuSiul2_0/IcuSiul2Channels_0/Icu_EXT_ISR_IFERDigitalFilter - false 
IcuConfigSet/IcuSiul2_0/IcuSiul2Channels_0/Icu_EXT_ISR_IFMCDigitalFilter - 0 
IcuConfigSet/IcuSiul2_0/IcuSiul2Instance - 0 
IcuGeneral - IcuGeneral 
IcuGeneral/IcuDevErrorDetect - true 
IcuGeneral/IcuEnableUserModeSupport - false 
IcuGeneral/IcuMulticoreSupport - false 
IcuGeneral/IcuReportWakeupSource - true 
IcuOptionalApis - IcuOptionalApis 
IcuOptionalApis/IcuDeInitApi - true 
IcuOptionalApis/IcuDisableWakeupApi - true 
IcuOptionalApis/IcuEdgeCountApi - true 
IcuOptionalApis/IcuEdgeDetectApi - true 
IcuOptionalApis/IcuEnableWakeupApi - true 
IcuOptionalApis/IcuGetDutyCycleValuesApi - true 
IcuOptionalApis/IcuGetInputStateApi - true 
IcuOptionalApis/IcuGetTimeElapsedApi - true 
IcuOptionalApis/IcuGetVersionInfoApi - true 
IcuOptionalApis/IcuSetModeApi - true 
IcuOptionalApis/IcuSignalMeasurementApi - true 
IcuOptionalApis/IcuTimestampApi - true 
IcuOptionalApis/IcuWakeupFunctionalityApi - true 
POST_BUILD_VARIANT_USED - true 

*/
#define MW_DETAILS_ICU 
#define MW_OPEN_ICU 
#define MW_UPDATE_ICU 
#define MW_RESTORE_ICU 
#define MW_MCL_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
MclConfig - MclConfig 
MclConfig/EmiosCommon - EmiosCommon_0 EmiosCommon_1 
MclConfig/EmiosCommon_0/EmiosMclClkDivVal - 1 
MclConfig/EmiosCommon_0/EmiosMclEnableFreezState - true 
MclConfig/EmiosCommon_0/EmiosMclEnableGlobalTimeBase - true 
MclConfig/EmiosCommon_0/EmiosMclInstances - EMIOS_0 
MclConfig/EmiosCommon_0/EmiosMclMasterBus - EmiosMclMasterBus_0 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclChannelAllowDebugMode - true 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclDefaultPeriod - 16000 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclFirstOffsetValue - 0 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclMasterBusAltPrescaler - DIV_1 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclMasterBusModeType - MCB_UP_COUNTER 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclMasterBusNumber - EMIOS_CH_23 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclMasterBusPrescaler - DIV_1 
MclConfig/EmiosCommon_0/EmiosMclMasterBus_0/EmiosMclPwmExclusiveAccess - true 
MclConfig/EmiosCommon_1/EmiosMclClkDivVal - 1 
MclConfig/EmiosCommon_1/EmiosMclEnableFreezState - true 
MclConfig/EmiosCommon_1/EmiosMclEnableGlobalTimeBase - true 
MclConfig/EmiosCommon_1/EmiosMclInstances - EMIOS_1 
MclConfig/EmiosCommon_1/EmiosMclMasterBus - EmiosMclMasterBus_0 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclChannelAllowDebugMode - true 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclDefaultPeriod - 16000 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclFirstOffsetValue - 0 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclMasterBusAltPrescaler - DIV_1 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclMasterBusModeType - MCB_UP_COUNTER 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclMasterBusNumber - EMIOS_CH_23 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclMasterBusPrescaler - DIV_1 
MclConfig/EmiosCommon_1/EmiosMclMasterBus_0/EmiosMclPwmExclusiveAccess - true 
MclConfig/dmaLogicChannel_Type - dmaLogicChannel_Type_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType - dmaLogicChannel_ConfigType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType - dmaLogicChannel_GlobalConfigType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalControlType - dmaLogicChannelConfig_GlobalControlType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalControlType/dmaGlobalControl_enBufferedWrites - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalControlType/dmaGlobalControl_enMasterIdReplication - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalInterruptType - dmaLogicChannelConfig_GlobalInterruptType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalInterruptType/dmaGlobalInterrupt_enDmaErrorInterrupt - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalPriorityType - dmaLogicChannelConfig_GlobalPriorityType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalPriorityType/dmaGlobalPriority_GroupPriority - DMA_IP_GROUP_PRIO0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalPriorityType/dmaGlobalPriority_LevelPriority - DMA_IP_LEVEL_PRIO0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalPriorityType/dmaGlobalPriority_disPreempt - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalPriorityType/dmaGlobalPriority_enPreemption - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalRequestType - dmaLogicChannelConfig_GlobalRequestType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_GlobalConfigType/dmaLogicChannelConfig_GlobalRequestType/dmaGlobalRequest_enDmaRequest - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_ScatterGatherConfigType - dmaLogicChannel_ScatterGatherConfigType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType - dmaLogicChannel_TransferConfigType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType - dmaLogicChannelConfig_TransferControlType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_DestinationStoreAddressType -  
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_bandwidthControl - DMA_IP_BWC_ENGINE_NO_STALL 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_disDmaAutoHwReq - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_enDmaHalfMajorInterrupt - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_enDmaMajorInterrupt - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferControlType/dmaLogicChannelConfig_enEndOfPacketSignal - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferDestinationType - dmaLogicChannelConfig_TransferDestinationType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferDestinationType/dmaLogicChannelConfig_DestinationLastAddressAdjustmentType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferDestinationType/dmaLogicChannelConfig_DestinationModuloType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferDestinationType/dmaLogicChannelConfig_DestinationSignedOffsetType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferDestinationType/dmaTransferConfig_TransferSizeType - DMA_IP_TRANSFER_SIZE_1_BYTE 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMajorLoopType - dmaLogicChannelConfig_TransferMajorLoopType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMajorLoopType/dmaLogicChannelConfig_MajorLoopCountType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMajorLoopType/dmaLogicChannelConfig_enMajorLoopLinkCh - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMajorLoopType/dynamic_dmaLogicChannelConfig_MajorLoopLinkChValueType - /Mcl/Mcl/MclConfig/dmaLogicChannel_Type_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType - dmaLogicChannelConfig_TransferMinorLoopType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dmaLogicChannelConfig_MinorLoopSizeType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dmaLogicChannelConfig_OffsetValueType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dmaLogicChannelConfig_enDestinationOffset - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dmaLogicChannelConfig_enMinorLoopLinkCh - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dmaLogicChannelConfig_enSourceOffset - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferMinorLoopType/dynamic_dmaLogicChannelConfig_MinorLoopLinkChValueType - /Mcl/Mcl/MclConfig/dmaLogicChannel_Type_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferSourceType - dmaLogicChannelConfig_TransferSourceType 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferSourceType/dmaLogicChannelConfig_SourceLastAddressAdjustmentType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferSourceType/dmaLogicChannelConfig_SourceModuloType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferSourceType/dmaLogicChannelConfig_SourceSignedOffsetType - 0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ConfigType/dmaLogicChannel_TransferConfigType/dmaLogicChannelConfig_TransferSourceType/dmaTransferConfig_TransferSizeType - DMA_IP_TRANSFER_SIZE_1_BYTE 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_EcucPartitionRef - /EcuC/EcuC/EcucPartitionCollection_0/EcucPartition_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_EnableGlobalConfig - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_EnableScatterGather - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_EnableTransferConfig - false 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_ErrorInterruptCallback - NULL_PTR 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_HwChId - DMA_IP_HW_CH_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_HwInstId - DMA_IP_HW_INST_0 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_InterruptCallback - NULL_PTR 
MclConfig/dmaLogicChannel_Type_0/dmaLogicChannel_LogicName - DMA_LOGIC_CH_0 
MclConfig/lcuConfiguration - lcuConfiguration_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg - lcuInstanceCfg_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst - lcuLogicCellCfg_lst_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_EcucPartitionRef - /EcuC/EcuC/EcucPartitionCollection_0/EcucPartition_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_ForceSignalCfg - lcuLogicCell_ForceSignalCfg_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_ForceSignalCfg_0/lcuLogicCell_ForceSignalSelect - LCU_IP_FORCE_SEL_INPUT0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_ForceSignalCfg_0/lcuLogicCell_combEnable - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_ForceSignalCfg_0/lcuLogicCell_forcePol - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_HwLcID - LCU_IP_HW_LC_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_SwSyncSel - LCU_IP_SYNC_SEL_INPUT0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_forceFilter - 0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_usingCombinationalForcePath - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCellCfg_lst_0/lcuLogicCell_usingForcePolarity - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCell_UsingForceSignal - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicCell_UsingSyncSignal - false 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicInstance_HwInstID - LCU_IP_HW_INST_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicInstance_LogicName - LCU_LOGIC_INSTANCE_0 
MclConfig/lcuConfiguration_0/lcuInstanceCfg_0/lcuLogicInstance_OperationMode - INTERRUPT 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration - mclLcuInputConfiguration_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_HwInputID - LCU_IP_HW_INPUT_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_HwInstID - LCU_IP_HW_INST_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_HwLcID - LCU_IP_HW_LC_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_LogicName - LCU_LOGIC_INPUT_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_MuxSelect - LCU_IP_MUX_SEL_LOGIC_0 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_SwOverrideMode - LCU_IP_SW_SYNC_IMMEDIATE 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_SwOverrideValue - LCU_IP_SW_OVERRIDE_LOGIC_LOW 
MclConfig/lcuConfiguration_0/mclLcuInputConfiguration_0/lcuLogicInput_UsingSwOverride - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration - mclLcuOutputConfiguration_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_DebugMode - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration - lcuLogicOutput_ForceSignalConfiguration 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceClearMode - LCU_IP_CLEAR_FORCE_SIGNAL_IMMEDIATE 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceDmaEnable - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceIntEnable - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceSignalSelect - lcuLogicOutput_ForceSignalSelect_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceSignalSelect_0/lcuLogicOutput_ForceSignal - LCU_IP_FORCE_SEL_INPUT0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceSignalSelect_0/lcuLogicOutput_ForceSignalAffect - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_ForceSignalConfiguration/lcuLogicOutput_ForceSyncSelect - LCU_IP_SYNC_SEL_INPUT0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_HwInstID - LCU_IP_HW_INST_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_HwLcID - LCU_IP_HW_LC_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_HwOutputID - LCU_IP_HW_OUTPUT_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_InterruptCallback - NULL_PTR 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_InvertOutput - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LogicName - LCU_LOGIC_OUTPUT_0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LutControl - 0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LutDmaEnable - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LutFallFilter - 0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LutIntEnable - false 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_LutRiseFilter - 0 
MclConfig/lcuConfiguration_0/mclLcuOutputConfiguration_0/lcuLogicOutput_UsingForceSignal - false 
MclConfig/trgmuxInstaceList - trgmuxInstaceList_0 
MclConfig/trgmuxInstaceList_0/trgmuxHardwareInstance - TRGMUX_IP_HW_INST_0 
MclConfig/trgmuxLogicGroup - trgmuxLogicGroup_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicGroupHardwareInstance - TRGMUX_IP_HW_INST_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicGroup_Lock - false 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicGroup_Name - TRGMUX_IP_ADC12_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicTrigger - trgmuxLogicTrigger_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicTrigger_0/trgmuxLogicTrigger_EcucPartitionRef - /EcuC/EcuC/EcucPartitionCollection_0/EcucPartition_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicTrigger_0/trgmuxLogicTrigger_Input - TRGMUX_IP_INPUT_LOGIC0_VSS 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicTrigger_0/trgmuxLogicTrigger_Name - TRGMUX_LOGIC_GROUP_0_TRIGGER_0 
MclConfig/trgmuxLogicGroup_0/trgmuxLogicTrigger_0/trgmuxLogicTrigger_Output - TRGMUX_IP_OUTPUT_ADC12_0_EXTRG_NORMAL_CONV 
MclGeneral - MclGeneral 
MclGeneral/MclCache - MclCache 
MclGeneral/MclCache/MclEnableCache - false 
MclGeneral/MclDma - MclDma 
MclGeneral/MclDma/MclEnableDma - false 
MclGeneral/MclEcucPartitionRef - /EcuC/EcuC/EcucPartitionCollection_0/EcucPartition_0 
MclGeneral/MclEmiosCommon - MclEmiosCommon 
MclGeneral/MclEmiosCommon/MclEnableEmiosCommon - true 
MclGeneral/MclEnableDevErrorDetect - true 
MclGeneral/MclEnableMulticoreSupport - false 
MclGeneral/MclEnableUserModeSupport - false 
MclGeneral/MclEnableVirtualAddressMappingSupport - false 
MclGeneral/MclFlexioCommon - MclFlexioCommon 
MclGeneral/MclFlexioCommon/MclEnableFlexioCommon - false 
MclGeneral/MclLcuConfig - MclLcuConfig 
MclGeneral/MclLcuConfig/MclEnableLcu - true 
MclGeneral/MclLcuConfig/MclEnableLcuAsyncFunc - false 
MclGeneral/MclLcuConfig/MclEnableLcuSyncFunc - false 
MclGeneral/MclTrgMux - MclTrgMux 
MclGeneral/MclTrgMux/MclEnableTrgMux - true 
MclGeneral/Mcl_VersionInfoApi - true 
POST_BUILD_VARIANT_USED - true 

*/
#define MW_DETAILS_MCL 
#define MW_OPEN_MCL 
#define MW_UPDATE_MCL 
#define MW_RESTORE_MCL 
#define MW_MCU_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
McuCoreControlConfiguration - McuCoreControlConfiguration 
McuCoreControlConfiguration/McuCoreBootAddressControl - false 
McuDebugConfiguration - McuDebugConfiguration 
McuDebugConfiguration/McuDisableCmuApi - true 
McuDebugConfiguration/McuDisableDemReportErrorStatus - true 
McuDebugConfiguration/McuEmiosConfigureGprenApi - false 
McuDebugConfiguration/McuGetClockFrequencyApi - true 
McuDebugConfiguration/McuGetMidrStructureApi - false 
McuDebugConfiguration/McuGetPowerDomainApi - false 
McuDebugConfiguration/McuGetPowerModeStateApi - false 
McuDebugConfiguration/McuGetSystemStateApi - false 
McuDebugConfiguration/McuSscmGetMemConfigApi - false 
McuDebugConfiguration/McuSscmGetStatusApi - false 
McuDebugConfiguration/McuSscmGetUoptApi - false 
McuGeneralConfiguration - McuGeneralConfiguration 
McuGeneralConfiguration/McuAlternateResetIsrUsed - false 
McuGeneralConfiguration/McuCalloutBeforePerformReset - false 
McuGeneralConfiguration/McuCmuErrorIsrUsed - false 
McuGeneralConfiguration/McuControlledClocksConfiguration - McuControlledClocksConfiguration 
McuGeneralConfiguration/McuControlledClocksConfiguration/McuFircUnderMcuControl - true 
McuGeneralConfiguration/McuControlledClocksConfiguration/McuFxoscUnderMcuControl - true 
McuGeneralConfiguration/McuControlledClocksConfiguration/McuPll0UnderMcuControl - true 
McuGeneralConfiguration/McuControlledClocksConfiguration/McuSircUnderMcuControl - true 
McuGeneralConfiguration/McuControlledClocksConfiguration/McuSxoscUnderMcuControl - true 
McuGeneralConfiguration/McuDevErrorDetect - false 
McuGeneralConfiguration/McuDisableFlashWaitStatesConfig - true 
McuGeneralConfiguration/McuDisablePmcInit - false 
McuGeneralConfiguration/McuDisableRamWaitStatesConfig - true 
McuGeneralConfiguration/McuDisableRgmInit - false 
McuGeneralConfiguration/McuEnableUserModeSupport - false 
McuGeneralConfiguration/McuEnterLowPowerMode - true 
McuGeneralConfiguration/McuGetRamStateApi - false 
McuGeneralConfiguration/McuInitClock - true 
McuGeneralConfiguration/McuNoPll - false 
McuGeneralConfiguration/McuPerformResetApi - false 
McuGeneralConfiguration/McuPerformResetCallout - NULL_PTR 
McuGeneralConfiguration/McuRegisterValuesOptimization - DISABLED 
McuGeneralConfiguration/McuTimeout - 50000 
McuGeneralConfiguration/McuTimeoutMethod - OSIF_COUNTER_DUMMY 
McuGeneralConfiguration/McuVersionInfoApi - false 
McuGeneralConfiguration/McuVoltageErrorIsrUsed - false 
McuModuleConfiguration - McuModuleConfiguration 
McuModuleConfiguration/McuClockSettingConfig - McuClockSettingConfig_0 
McuModuleConfiguration/McuClockSettingConfig_0/CORE_CLK/McuClockFrequencySelect - CORE_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/Configuration - McuClockSettingConfig_0 
McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK0_2/McuClockFrequencySelect - FLEXCAN_PE_CLK0_2 
McuModuleConfiguration/McuClockSettingConfig_0/FLEXCAN_PE_CLK3_5/McuClockFrequencySelect - FLEXCAN_PE_CLK3_5 
McuModuleConfiguration/McuClockSettingConfig_0/GPT_CLK/McuClockFrequencySelect - AIPS_SLOW_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig - McuCgm0SettingConfig 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0 - McuCgm0ClockMux0 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div0Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div1Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div1_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div2Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div2_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div3Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div3_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div4Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div4_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div5Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div5_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div6Trigger - COMMON_TRIGGER_DIVIDER_UPDATE 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0Div6_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClkMux0_Source - PLL_PHI0_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux0/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux1 - McuCgm0ClockMux1 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux1/McuClkMux1Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux1/McuClkMux1_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux1/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux10 - McuCgm0ClockMux10 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux10/McuClkMux10Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux10/McuClkMux10_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux10/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux11 - McuCgm0ClockMux11 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux11/McuClkMux11Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux11/McuClkMux11_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux11/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux2 - McuCgm0ClockMux2 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux2/McuClkMux2Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux2/McuClkMux2_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux2/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux3 - McuCgm0ClockMux3 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux3/McuClkMux3Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux3/McuClkMux3_Source - AIPS_PLAT_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux3/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux4 - McuCgm0ClockMux4 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux4/McuClkMux4Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux4/McuClkMux4_Source - AIPS_PLAT_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux4/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux5 - McuCgm0ClockMux5 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux5/McuClkMux5Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux5/McuClkMux5_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux5/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux6 - McuCgm0ClockMux6 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux6/McuClkMux6Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux6/McuClkMux6_Source - FXOSC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux6/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux7 - McuCgm0ClockMux7 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux7/McuClkMux7Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux7/McuClkMux7_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux7/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux8 - McuCgm0ClockMux8 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux8/McuClkMux8Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux8/McuClkMux8_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux8/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux9 - McuCgm0ClockMux9 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux9/McuClkMux9Div0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux9/McuClkMux9_Source - FIRC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0ClockMux9/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0PcsConfig - McuCgm0PcsConfig_0 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0PcsConfig_0/McuClockPcfsUnderMcuControl - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuCgm0SettingConfig/McuCgm0PcsConfig_0/McuPCS_Name - PCFS_8 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor - McuClkMonitor_0 McuClkMonitor_1 McuClkMonitor_2 McuClkMonitor_3 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuClkMonitorEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuClockMonitorUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuCmuName - CMU_FC_0_FXOSC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuFHHAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuFHHInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuFLLAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_0/McuFLLInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuClkMonitorEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuClockMonitorUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuCmuName - CMU_FC_3_CORE_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuFHHAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuFHHInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuFLLAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_1/McuFLLInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuClkMonitorEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuClockMonitorUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuCmuName - CMU_FC_4_AIPS_PLAT_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuFHHAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuFHHInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuFLLAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_2/McuFLLInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuClkMonitorEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuClockMonitorUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuCmuName - CMU_FC_5_HSE_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuFHHAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuFHHInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuFLLAsyncEventEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClkMonitor_3/McuFLLInterruptEn - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuClockReferencePoint - CORE_CLK FLEXCAN_PE_CLK0_2 FLEXCAN_PE_CLK3_5 GPT_CLK SPI_CLK UART_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuFIRC - McuFIRC 
McuModuleConfiguration/McuClockSettingConfig_0/McuFIRC/McuFircDivSel - Div_by_1 
McuModuleConfiguration/McuClockSettingConfig_0/McuFIRC/McuFircStandbyEnable - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuFIRC/McuFircUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuFXOSC - McuFXOSC 
McuModuleConfiguration/McuClockSettingConfig_0/McuFXOSC/McuFxoscBypass - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuFXOSC/McuFxoscMainComparator - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuFXOSC/McuFxoscPowerDownCtr - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuFXOSC/McuFxoscUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0 - McuPll_0 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPLLEnabled - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPLLUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration - McuPll_Configuration 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllFdSdm2 - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllFdSdm3 - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllFdSdmen - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllFmSpreadctl - Center_Spread 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllFmSscgbyp - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllOdiv0_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Configuration/McuPllOdiv1_En - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuPll_0/McuPll_Parameter - McuPll_Parameter 
McuModuleConfiguration/McuClockSettingConfig_0/McuRtcClockSelect - McuRtcClockSelect 
McuModuleConfiguration/McuClockSettingConfig_0/McuRtcClockSelect/McuClockMuxUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuRtcClockSelect/McuRtc_Source - SXOSC_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/McuSIRC - McuSIRC 
McuModuleConfiguration/McuClockSettingConfig_0/McuSIRC/McuSircStandbyEnable - false 
McuModuleConfiguration/McuClockSettingConfig_0/McuSIRC/McuSircUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuSXOSC - McuSXOSC 
McuModuleConfiguration/McuClockSettingConfig_0/McuSXOSC/McuSxoscPowerDownCtr - true 
McuModuleConfiguration/McuClockSettingConfig_0/McuSXOSC/McuSxoscUnderMcuControl - true 
McuModuleConfiguration/McuClockSettingConfig_0/SPI_CLK/McuClockFrequencySelect - AIPS_SLOW_CLK 
McuModuleConfiguration/McuClockSettingConfig_0/UART_CLK/McuClockFrequencySelect - AIPS_SLOW_CLK 
McuModuleConfiguration/McuClockSrcFailureNotification - DISABLED 
McuModuleConfiguration/McuModeSettingConf - McuModeSettingConf_0 
McuModuleConfiguration/McuModeSettingConf_0/McuCoreLockStepEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration - McuDcmGprConfiguration 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuBootBaseAddress - 0 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuDCM_SCAN_BYP_STDBY_EXTControl - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuDcmGprUnderMcuControl - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuFIRC_TRIM_BYP_STDBY_EXTControl - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuGlobalPadkeepingEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuPMC_TRIM_RGM_DCF_BYP_STDBY_EXTControl - false 
McuModuleConfiguration/McuModeSettingConf_0/McuDcmGprConfiguration/McuSIRC_TRIM_BYP_STDBY_EXTControl - false 
McuModuleConfiguration/McuModeSettingConf_0/McuEnableSleepOnExit - false 
McuModuleConfiguration/McuModeSettingConf_0/McuMainCoreSelect - CM7_0 
McuModuleConfiguration/McuModeSettingConf_0/McuMode - 0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration - McuPartitionConfiguration 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config - McuPartition0Config 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuCore0Configuration - McuCore0Configuration 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuCore0Configuration/McuCoreBootAddress - 0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuCore0Configuration/McuCoreBootAddressLinkerSym -  
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuCore0Configuration/McuCoreClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuCore0Configuration/McuCoreUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuPartitionClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuPartitionPowerUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuPartitionUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition0Config/McuPrtnCofb1UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config - McuPartition1Config 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPartitionClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPartitionPowerUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPartitionUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPrtnCofb0UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPrtnCofb1UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPrtnCofb2UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition1Config/McuPrtnCofb3UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config - McuPartition2Config 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config/McuPartitionClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config/McuPartitionPowerUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config/McuPartitionUnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config/McuPrtnCofb0UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPartition2Config/McuPrtnCofb1UnderMcuControl - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral - McuPeripheral_0 McuPeripheral_1 McuPeripheral_10 McuPeripheral_100 McuPeripheral_101 McuPeripheral_102 McuPeripheral_103 McuPeripheral_104 McuPeripheral_105 McuPeripheral_106 McuPeripheral_11 McuPeripheral_12 McuPeripheral_13 McuPeripheral_14 McuPeripheral_15 McuPeripheral_16 McuPeripheral_17 McuPeripheral_18 McuPeripheral_19 McuPeripheral_2 McuPeripheral_20 McuPeripheral_21 McuPeripheral_22 McuPeripheral_23 McuPeripheral_24 McuPeripheral_25 McuPeripheral_26 McuPeripheral_27 McuPeripheral_28 McuPeripheral_29 McuPeripheral_3 McuPeripheral_30 McuPeripheral_31 McuPeripheral_32 McuPeripheral_33 McuPeripheral_34 McuPeripheral_35 McuPeripheral_36 McuPeripheral_37 McuPeripheral_38 McuPeripheral_39 McuPeripheral_4 McuPeripheral_40 McuPeripheral_41 McuPeripheral_42 McuPeripheral_43 McuPeripheral_44 McuPeripheral_45 McuPeripheral_46 McuPeripheral_47 McuPeripheral_48 McuPeripheral_49 McuPeripheral_5 McuPeripheral_50 McuPeripheral_51 McuPeripheral_52 McuPeripheral_53 McuPeripheral_54 McuPeripheral_55 McuPeripheral_56 McuPeripheral_57 McuPeripheral_58 McuPeripheral_59 McuPeripheral_6 McuPeripheral_60 McuPeripheral_61 McuPeripheral_62 McuPeripheral_63 McuPeripheral_64 McuPeripheral_65 McuPeripheral_66 McuPeripheral_67 McuPeripheral_68 McuPeripheral_69 McuPeripheral_7 McuPeripheral_70 McuPeripheral_71 McuPeripheral_72 McuPeripheral_73 McuPeripheral_74 McuPeripheral_75 McuPeripheral_76 McuPeripheral_77 McuPeripheral_78 McuPeripheral_79 McuPeripheral_8 McuPeripheral_80 McuPeripheral_81 McuPeripheral_82 McuPeripheral_83 McuPeripheral_84 McuPeripheral_85 McuPeripheral_86 McuPeripheral_87 McuPeripheral_88 McuPeripheral_89 McuPeripheral_9 McuPeripheral_90 McuPeripheral_91 McuPeripheral_92 McuPeripheral_93 McuPeripheral_94 McuPeripheral_95 McuPeripheral_96 McuPeripheral_97 McuPeripheral_98 McuPeripheral_99 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_0/McuModeEntrySlot - PRTN0_COFB1_REQ32 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_0/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_0/McuPeripheralName - TRGMUX 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_1/McuModeEntrySlot - PRTN0_COFB1_REQ33 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_1/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_1/McuPeripheralName - BCTU 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_10/McuModeEntrySlot - PRTN0_COFB1_REQ44 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_10/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_10/McuPeripheralName - PIT_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_100/McuModeEntrySlot - PRTN2_COFB1_REQ42 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_100/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_100/McuPeripheralName - LPUART_15 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_101/McuModeEntrySlot - PRTN2_COFB1_REQ47 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_101/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_101/McuPeripheralName - LPSPI_4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_102/McuModeEntrySlot - PRTN2_COFB1_REQ48 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_102/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_102/McuPeripheralName - LPSPI_5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_103/McuModeEntrySlot - PRTN2_COFB1_REQ51 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_103/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_103/McuPeripheralName - QuadSPI 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_104/McuModeEntrySlot - PRTN2_COFB1_REQ55 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_104/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_104/McuPeripheralName - SAI_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_105/McuModeEntrySlot - PRTN2_COFB1_REQ58 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_105/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_105/McuPeripheralName - LPCMP_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_106/McuModeEntrySlot - PRTN2_COFB1_REQ62 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_106/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_106/McuPeripheralName - CM7_0_TCM 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_11/McuModeEntrySlot - PRTN0_COFB1_REQ45 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_11/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_11/McuPeripheralName - PIT_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_12/McuModeEntrySlot - PRTN1_COFB0_REQ3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_12/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_12/McuPeripheralName - EDMA 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_13/McuModeEntrySlot - PRTN1_COFB0_REQ4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_13/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_13/McuPeripheralName - EDMA_TCD_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_14/McuModeEntrySlot - PRTN1_COFB0_REQ5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_14/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_14/McuPeripheralName - EDMA_TCD_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_15/McuModeEntrySlot - PRTN1_COFB0_REQ6 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_15/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_15/McuPeripheralName - EDMA_TCD_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_16/McuModeEntrySlot - PRTN1_COFB0_REQ7 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_16/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_16/McuPeripheralName - EDMA_TCD_3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_17/McuModeEntrySlot - PRTN1_COFB0_REQ8 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_17/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_17/McuPeripheralName - EDMA_TCD_4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_18/McuModeEntrySlot - PRTN1_COFB0_REQ9 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_18/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_18/McuPeripheralName - EDMA_TCD_5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_19/McuModeEntrySlot - PRTN1_COFB0_REQ10 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_19/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_19/McuPeripheralName - EDMA_TCD_6 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_2/McuModeEntrySlot - PRTN0_COFB1_REQ34 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_2/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_2/McuPeripheralName - EMIOS_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_20/McuModeEntrySlot - PRTN1_COFB0_REQ11 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_20/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_20/McuPeripheralName - EDMA_TCD_7 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_21/McuModeEntrySlot - PRTN1_COFB0_REQ12 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_21/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_21/McuPeripheralName - EDMA_TCD_8 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_22/McuModeEntrySlot - PRTN1_COFB0_REQ13 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_22/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_22/McuPeripheralName - EDMA_TCD_9 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_23/McuModeEntrySlot - PRTN1_COFB0_REQ14 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_23/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_23/McuPeripheralName - EDMA_TCD_10 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_24/McuModeEntrySlot - PRTN1_COFB0_REQ15 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_24/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_24/McuPeripheralName - EDMA_TCD_11 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_25/McuModeEntrySlot - PRTN1_COFB0_REQ21 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_25/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_25/McuPeripheralName - SDA_AP 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_26/McuModeEntrySlot - PRTN1_COFB0_REQ22 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_26/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_26/McuPeripheralName - EIM_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_27/McuModeEntrySlot - PRTN1_COFB0_REQ23 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_27/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_27/McuPeripheralName - ERM_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_28/McuModeEntrySlot - PRTN1_COFB0_REQ24 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_28/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_28/McuPeripheralName - MSCM 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_29/McuModeEntrySlot - PRTN1_COFB0_REQ28 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_29/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_29/McuPeripheralName - SWT_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_3/McuModeEntrySlot - PRTN0_COFB1_REQ35 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_3/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_3/McuPeripheralName - EMIOS_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_30/McuModeEntrySlot - PRTN1_COFB0_REQ29 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_30/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_30/McuPeripheralName - STM_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_31/McuModeEntrySlot - PRTN1_COFB0_REQ31 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_31/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_31/McuPeripheralName - INTM 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_32/McuModeEntrySlot - PRTN1_COFB1_REQ32 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_32/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_32/McuPeripheralName - DMAMUX_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_33/McuModeEntrySlot - PRTN1_COFB1_REQ33 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_33/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_33/McuPeripheralName - DMAMUX_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_34/McuModeEntrySlot - PRTN1_COFB1_REQ34 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_34/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_34/McuPeripheralName - RTC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_35/McuModeEntrySlot - PRTN1_COFB1_REQ42 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_35/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_35/McuPeripheralName - SIUL2_VIRTWRAPPER_PDAC3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_36/McuModeEntrySlot - PRTN1_COFB1_REQ45 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_36/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_36/McuPeripheralName - WKPU 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_37/McuModeEntrySlot - PRTN1_COFB1_REQ47 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_37/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_37/McuPeripheralName - CMUs 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_38/McuModeEntrySlot - PRTN1_COFB1_REQ49 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_38/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_38/McuPeripheralName - TSPC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_39/McuModeEntrySlot - PRTN1_COFB1_REQ51 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_39/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_39/McuPeripheralName - SXOSC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_4/McuModeEntrySlot - PRTN0_COFB1_REQ36 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_4/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_4/McuPeripheralName - EMIOS_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_40/McuModeEntrySlot - PRTN1_COFB1_REQ53 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_40/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_40/McuPeripheralName - FXOSC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_41/McuModeEntrySlot - PRTN1_COFB1_REQ56 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_41/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_41/McuPeripheralName - PLL 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_42/McuModeEntrySlot - PRTN1_COFB1_REQ63 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_42/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_42/McuPeripheralName - PIT_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_43/McuModeEntrySlot - PRTN1_COFB2_REQ65 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_43/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_43/McuPeripheralName - FlexCAN_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_44/McuModeEntrySlot - PRTN1_COFB2_REQ66 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_44/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_44/McuPeripheralName - FlexCAN_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_45/McuModeEntrySlot - PRTN1_COFB2_REQ67 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_45/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_45/McuPeripheralName - FlexCAN_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_46/McuModeEntrySlot - PRTN1_COFB2_REQ68 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_46/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_46/McuPeripheralName - FlexCAN_3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_47/McuModeEntrySlot - PRTN1_COFB2_REQ69 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_47/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_47/McuPeripheralName - FlexCAN_4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_48/McuModeEntrySlot - PRTN1_COFB2_REQ70 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_48/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_48/McuPeripheralName - FlexCAN_5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_49/McuModeEntrySlot - PRTN1_COFB2_REQ73 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_49/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_49/McuPeripheralName - FlexIO 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_5/McuModeEntrySlot - PRTN0_COFB1_REQ38 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_5/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_5/McuPeripheralName - LCU_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_50/McuModeEntrySlot - PRTN1_COFB2_REQ74 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_50/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_50/McuPeripheralName - LPUART_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_51/McuModeEntrySlot - PRTN1_COFB2_REQ75 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_51/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_51/McuPeripheralName - LPUART_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_52/McuModeEntrySlot - PRTN1_COFB2_REQ76 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_52/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_52/McuPeripheralName - LPUART_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_53/McuModeEntrySlot - PRTN1_COFB2_REQ77 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_53/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_53/McuPeripheralName - LPUART_3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_54/McuModeEntrySlot - PRTN1_COFB2_REQ78 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_54/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_54/McuPeripheralName - LPUART_4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_55/McuModeEntrySlot - PRTN1_COFB2_REQ79 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_55/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_55/McuPeripheralName - LPUART_5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_56/McuModeEntrySlot - PRTN1_COFB2_REQ80 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_56/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_56/McuPeripheralName - LPUART_6 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_57/McuModeEntrySlot - PRTN1_COFB2_REQ81 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_57/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_57/McuPeripheralName - LPUART_7 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_58/McuModeEntrySlot - PRTN1_COFB2_REQ84 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_58/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_58/McuPeripheralName - LPI2C_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_59/McuModeEntrySlot - PRTN1_COFB2_REQ85 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_59/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_59/McuPeripheralName - LPI2C_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_6/McuModeEntrySlot - PRTN0_COFB1_REQ39 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_6/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_6/McuPeripheralName - LCU_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_60/McuModeEntrySlot - PRTN1_COFB2_REQ86 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_60/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_60/McuPeripheralName - LPSPI_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_61/McuModeEntrySlot - PRTN1_COFB2_REQ87 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_61/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_61/McuPeripheralName - LPSPI_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_62/McuModeEntrySlot - PRTN1_COFB2_REQ88 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_62/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_62/McuPeripheralName - LPSPI_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_63/McuModeEntrySlot - PRTN1_COFB2_REQ89 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_63/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_63/McuPeripheralName - LPSPI_3 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_64/McuModeEntrySlot - PRTN1_COFB2_REQ91 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_64/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_64/McuPeripheralName - SAI_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_65/McuModeEntrySlot - PRTN1_COFB2_REQ92 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_65/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_65/McuPeripheralName - LPCMP_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_66/McuModeEntrySlot - PRTN1_COFB2_REQ93 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_66/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_66/McuPeripheralName - LPCMP_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_67/McuModeEntrySlot - PRTN1_COFB2_REQ95 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_67/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_67/McuPeripheralName - TEMPSENSE 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_68/McuModeEntrySlot - PRTN1_COFB3_REQ96 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_68/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_68/McuPeripheralName - CRC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_69/McuModeEntrySlot - PRTN1_COFB3_REQ104 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_69/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_69/McuPeripheralName - STCU_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_7/McuModeEntrySlot - PRTN0_COFB1_REQ40 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_7/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_7/McuPeripheralName - ADC_0 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_70/McuModeEntrySlot - PRTN2_COFB0_REQ4 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_70/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_70/McuPeripheralName - EDMA_TCD_12 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_71/McuModeEntrySlot - PRTN2_COFB0_REQ5 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_71/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_71/McuPeripheralName - EDMA_TCD_13 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_72/McuModeEntrySlot - PRTN2_COFB0_REQ6 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_72/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_72/McuPeripheralName - EDMA_TCD_14 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_73/McuModeEntrySlot - PRTN2_COFB0_REQ7 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_73/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_73/McuPeripheralName - EDMA_TCD_15 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_74/McuModeEntrySlot - PRTN2_COFB0_REQ8 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_74/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_74/McuPeripheralName - EDMA_TCD_16 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_75/McuModeEntrySlot - PRTN2_COFB0_REQ9 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_75/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_75/McuPeripheralName - EDMA_TCD_17 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_76/McuModeEntrySlot - PRTN2_COFB0_REQ10 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_76/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_76/McuPeripheralName - EDMA_TCD_18 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_77/McuModeEntrySlot - PRTN2_COFB0_REQ11 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_77/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_77/McuPeripheralName - EDMA_TCD_19 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_78/McuModeEntrySlot - PRTN2_COFB0_REQ12 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_78/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_78/McuPeripheralName - EDMA_TCD_20 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_79/McuModeEntrySlot - PRTN2_COFB0_REQ13 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_79/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_79/McuPeripheralName - EDMA_TCD_21 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_8/McuModeEntrySlot - PRTN0_COFB1_REQ41 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_8/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_8/McuPeripheralName - ADC_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_80/McuModeEntrySlot - PRTN2_COFB0_REQ14 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_80/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_80/McuPeripheralName - EDMA_TCD_22 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_81/McuModeEntrySlot - PRTN2_COFB0_REQ15 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_81/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_81/McuPeripheralName - EDMA_TCD_23 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_82/McuModeEntrySlot - PRTN2_COFB0_REQ16 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_82/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_82/McuPeripheralName - EDMA_TCD_24 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_83/McuModeEntrySlot - PRTN2_COFB0_REQ17 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_83/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_83/McuPeripheralName - EDMA_TCD_25 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_84/McuModeEntrySlot - PRTN2_COFB0_REQ18 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_84/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_84/McuPeripheralName - EDMA_TCD_26 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_85/McuModeEntrySlot - PRTN2_COFB0_REQ19 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_85/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_85/McuPeripheralName - EDMA_TCD_27 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_86/McuModeEntrySlot - PRTN2_COFB0_REQ20 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_86/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_86/McuPeripheralName - EDMA_TCD_28 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_87/McuModeEntrySlot - PRTN2_COFB0_REQ21 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_87/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_87/McuPeripheralName - EDMA_TCD_29 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_88/McuModeEntrySlot - PRTN2_COFB0_REQ22 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_88/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_88/McuPeripheralName - EDMA_TCD_30 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_89/McuModeEntrySlot - PRTN2_COFB0_REQ23 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_89/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_89/McuPeripheralName - EDMA_TCD_31 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_9/McuModeEntrySlot - PRTN0_COFB1_REQ42 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_9/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_9/McuPeripheralName - ADC_2 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_90/McuModeEntrySlot - PRTN2_COFB0_REQ24 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_90/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_90/McuPeripheralName - SEMA_42 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_91/McuModeEntrySlot - PRTN2_COFB0_REQ29 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_91/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_91/McuPeripheralName - STM_1 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_92/McuModeEntrySlot - PRTN2_COFB1_REQ32 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_92/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_92/McuPeripheralName - EMAC 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_93/McuModeEntrySlot - PRTN2_COFB1_REQ35 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_93/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_93/McuPeripheralName - LPUART_8 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_94/McuModeEntrySlot - PRTN2_COFB1_REQ36 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_94/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_94/McuPeripheralName - LPUART_9 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_95/McuModeEntrySlot - PRTN2_COFB1_REQ37 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_95/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_95/McuPeripheralName - LPUART_10 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_96/McuModeEntrySlot - PRTN2_COFB1_REQ38 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_96/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_96/McuPeripheralName - LPUART_11 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_97/McuModeEntrySlot - PRTN2_COFB1_REQ39 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_97/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_97/McuPeripheralName - LPUART_12 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_98/McuModeEntrySlot - PRTN2_COFB1_REQ40 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_98/McuPeripheralClockEnable - true 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_98/McuPeripheralName - LPUART_13 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_99/McuModeEntrySlot - PRTN2_COFB1_REQ41 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_99/McuPeripheralClockEnable - false 
McuModuleConfiguration/McuModeSettingConf_0/McuPartitionConfiguration/McuPeripheral_99/McuPeripheralName - LPUART_14 
McuModuleConfiguration/McuModeSettingConf_0/McuPowerMode - RUN 
McuModuleConfiguration/McuPowerControl - McuPowerControl 
McuModuleConfiguration/McuPowerControl/McuPMC_Config - McuPMC_Config 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuFASTRECEnable - false 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuHVDIEEnable - false 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLMAUTOENEnable - false 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLMBCTLENEnable - true 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLMENEnable - true 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLPM25ENEnable - false 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLVDIEEnable - false 
McuModuleConfiguration/McuPowerControl/McuPMC_Config/McuLVRBLPENEnable - false 
McuModuleConfiguration/McuRamSectorSettingConf - McuRamSectorSettingConf_0 
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamDefaultValue - 0 
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectionBaseAddrLinkerSym -  
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectionBaseAddress - 541065216 
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectionSize - 327680 
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectionSizeLinkerSym -  
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectionWriteSize - 8 
McuModuleConfiguration/McuRamSectorSettingConf_0/McuRamSectorId - 0 
McuModuleConfiguration/McuResetConfig - McuResetConfig 
McuModuleConfiguration/McuResetConfig/McuDestResetEscThreshold - 0 
McuModuleConfiguration/McuResetConfig/McuFuncResetEscThreshold - 15 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig - McuResetSourcesConfig 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuDEBUG_FUNC_ResetSource - McuDEBUG_FUNC_ResetSource 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuDEBUG_FUNC_ResetSource/McuDisableReset - false 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuFCCU_RST_ResetSource - McuFCCU_RST_ResetSource 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuFCCU_RST_ResetSource/McuDisableReset - false 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuJTAG_RST_ResetSource - McuJTAG_RST_ResetSource 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuJTAG_RST_ResetSource/McuDisableReset - false 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuSWT0_RST_ResetSource - McuSWT0_RST_ResetSource 
McuModuleConfiguration/McuResetConfig/McuResetSourcesConfig/McuSWT0_RST_ResetSource/McuDisableReset - false 
McuModuleConfiguration/McuResetConfig/McuResetType - FunctionalReset 
McuPublishedInformation - McuPublishedInformation 
McuPublishedInformation/MCU_AIPS_PLAT_CLK_FAIL_RESET/McuResetReason - 7 
McuPublishedInformation/MCU_CM7_CORE_CLK_FAIL_RESET/McuResetReason - 10 
McuPublishedInformation/MCU_CORE_CLK_FAIL_RESET/McuResetReason - 6 
McuPublishedInformation/MCU_DEBUG_DEST_RESET/McuResetReason - 14 
McuPublishedInformation/MCU_DEBUG_FUNC_RESET/McuResetReason - 27 
McuPublishedInformation/MCU_FCCU_FTR_RESET/McuResetReason - 1 
McuPublishedInformation/MCU_FCCU_RST_RESET/McuResetReason - 16 
McuPublishedInformation/MCU_FXOSC_FAIL_RESET/McuResetReason - 4 
McuPublishedInformation/MCU_F_EXR_RESET/McuResetReason - 15 
McuPublishedInformation/MCU_HSE_BOOT_RST_RESET/McuResetReason - 25 
McuPublishedInformation/MCU_HSE_CLK_FAIL_RESET/McuResetReason - 8 
McuPublishedInformation/MCU_HSE_SNVS_RST_RESET/McuResetReason - 12 
McuPublishedInformation/MCU_HSE_SWT_RST_RESET/McuResetReason - 24 
McuPublishedInformation/MCU_HSE_TMPR_RST_RESET/McuResetReason - 11 
McuPublishedInformation/MCU_JTAG_RST_RESET/McuResetReason - 21 
McuPublishedInformation/MCU_MC_RGM_FRE_RESET/McuResetReason - 3 
McuPublishedInformation/MCU_MULTIPLE_RESET_REASON/McuResetReason - 30 
McuPublishedInformation/MCU_NO_RESET_REASON/McuResetReason - 29 
McuPublishedInformation/MCU_PLL_AUX_RESET/McuResetReason - 23 
McuPublishedInformation/MCU_PLL_LOL_RESET/McuResetReason - 5 
McuPublishedInformation/MCU_POWER_ON_RESET/McuResetReason - 0 
McuPublishedInformation/MCU_RESET_UNDEFINED/McuResetReason - 31 
McuPublishedInformation/MCU_STCU_URF_RESET/McuResetReason - 2 
McuPublishedInformation/MCU_ST_DONE_RESET/McuResetReason - 17 
McuPublishedInformation/MCU_SWT0_RST_RESET/McuResetReason - 18 
McuPublishedInformation/MCU_SWT1_RST_RESET/McuResetReason - 19 
McuPublishedInformation/MCU_SWT2_RST_RESET/McuResetReason - 20 
McuPublishedInformation/MCU_SWT3_RST_RESET/McuResetReason - 22 
McuPublishedInformation/MCU_SW_DEST_RESET/McuResetReason - 13 
McuPublishedInformation/MCU_SW_FUNC_RESET/McuResetReason - 26 
McuPublishedInformation/MCU_SYS_DIV_FAIL_RESET/McuResetReason - 9 
McuPublishedInformation/MCU_WAKEUP_REASON/McuResetReason - 28 
McuPublishedInformation/McuResetReasonConf - MCU_AIPS_PLAT_CLK_FAIL_RESET MCU_CM7_CORE_CLK_FAIL_RESET MCU_CORE_CLK_FAIL_RESET MCU_DEBUG_DEST_RESET MCU_DEBUG_FUNC_RESET MCU_FCCU_FTR_RESET MCU_FCCU_RST_RESET MCU_FXOSC_FAIL_RESET MCU_F_EXR_RESET MCU_HSE_BOOT_RST_RESET MCU_HSE_CLK_FAIL_RESET MCU_HSE_SNVS_RST_RESET MCU_HSE_SWT_RST_RESET MCU_HSE_TMPR_RST_RESET MCU_JTAG_RST_RESET MCU_MC_RGM_FRE_RESET MCU_MULTIPLE_RESET_REASON MCU_NO_RESET_REASON MCU_PLL_AUX_RESET MCU_PLL_LOL_RESET MCU_POWER_ON_RESET MCU_RESET_UNDEFINED MCU_STCU_URF_RESET MCU_ST_DONE_RESET MCU_SWT0_RST_RESET MCU_SWT1_RST_RESET MCU_SWT2_RST_RESET MCU_SWT3_RST_RESET MCU_SW_DEST_RESET MCU_SW_FUNC_RESET MCU_SYS_DIV_FAIL_RESET MCU_WAKEUP_REASON 
POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_MCU 
#define MW_OPEN_MCU 
#define MW_UPDATE_MCU 
#define MW_RESTORE_MCU 
#define MW_PLATFORM_INFO /*
CommonPublishedInformation - CommonPublishedInformation 
CommonPublishedInformation/ArReleaseMajorVersion - 4 
CommonPublishedInformation/ArReleaseMinorVersion - 7 
CommonPublishedInformation/ArReleaseRevisionVersion - 0 
CommonPublishedInformation/ModuleId - 255 
CommonPublishedInformation/SwMajorVersion - 3 
CommonPublishedInformation/SwMinorVersion - 0 
CommonPublishedInformation/SwPatchVersion - 0 
CommonPublishedInformation/VendorId - 43 
GeneralConfiguration - GeneralConfiguration 
GeneralConfiguration/PlatformDevErrorDetect - false 
GeneralConfiguration/PlatformEnableUserModeSupport - false 
GeneralConfiguration/PlatformIntmConfigurable - false 
GeneralConfiguration/PlatformIpAPIsAvailable - false 
GeneralConfiguration/PlatformMcmConfigurable - false 
GeneralConfiguration/PlatformMpuM7Configurable - false 
GeneralConfiguration/PlatformMulticoreSupport - false 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
IntCtrlConfig - IntCtrlConfig 
IntCtrlConfig/PlatformIsrConfig - PlatformIsrConfig_0 PlatformIsrConfig_1 PlatformIsrConfig_10 PlatformIsrConfig_100 PlatformIsrConfig_101 PlatformIsrConfig_102 PlatformIsrConfig_103 PlatformIsrConfig_104 PlatformIsrConfig_105 PlatformIsrConfig_106 PlatformIsrConfig_107 PlatformIsrConfig_108 PlatformIsrConfig_109 PlatformIsrConfig_11 PlatformIsrConfig_110 PlatformIsrConfig_111 PlatformIsrConfig_112 PlatformIsrConfig_113 PlatformIsrConfig_114 PlatformIsrConfig_115 PlatformIsrConfig_116 PlatformIsrConfig_117 PlatformIsrConfig_118 PlatformIsrConfig_119 PlatformIsrConfig_12 PlatformIsrConfig_120 PlatformIsrConfig_121 PlatformIsrConfig_122 PlatformIsrConfig_123 PlatformIsrConfig_124 PlatformIsrConfig_125 PlatformIsrConfig_126 PlatformIsrConfig_127 PlatformIsrConfig_128 PlatformIsrConfig_129 PlatformIsrConfig_13 PlatformIsrConfig_130 PlatformIsrConfig_131 PlatformIsrConfig_132 PlatformIsrConfig_133 PlatformIsrConfig_134 PlatformIsrConfig_135 PlatformIsrConfig_136 PlatformIsrConfig_137 PlatformIsrConfig_138 PlatformIsrConfig_139 PlatformIsrConfig_14 PlatformIsrConfig_140 PlatformIsrConfig_141 PlatformIsrConfig_142 PlatformIsrConfig_143 PlatformIsrConfig_144 PlatformIsrConfig_145 PlatformIsrConfig_146 PlatformIsrConfig_147 PlatformIsrConfig_15 PlatformIsrConfig_16 PlatformIsrConfig_17 PlatformIsrConfig_18 PlatformIsrConfig_19 PlatformIsrConfig_2 PlatformIsrConfig_20 PlatformIsrConfig_21 PlatformIsrConfig_22 PlatformIsrConfig_23 PlatformIsrConfig_24 PlatformIsrConfig_25 PlatformIsrConfig_26 PlatformIsrConfig_27 PlatformIsrConfig_28 PlatformIsrConfig_29 PlatformIsrConfig_3 PlatformIsrConfig_30 PlatformIsrConfig_31 PlatformIsrConfig_32 PlatformIsrConfig_33 PlatformIsrConfig_34 PlatformIsrConfig_35 PlatformIsrConfig_36 PlatformIsrConfig_37 PlatformIsrConfig_38 PlatformIsrConfig_39 PlatformIsrConfig_4 PlatformIsrConfig_40 PlatformIsrConfig_41 PlatformIsrConfig_43 PlatformIsrConfig_45 PlatformIsrConfig_46 PlatformIsrConfig_47 PlatformIsrConfig_48 PlatformIsrConfig_49 PlatformIsrConfig_5 PlatformIsrConfig_50 PlatformIsrConfig_51 PlatformIsrConfig_52 PlatformIsrConfig_53 PlatformIsrConfig_54 PlatformIsrConfig_55 PlatformIsrConfig_56 PlatformIsrConfig_57 PlatformIsrConfig_58 PlatformIsrConfig_59 PlatformIsrConfig_6 PlatformIsrConfig_60 PlatformIsrConfig_61 PlatformIsrConfig_62 PlatformIsrConfig_63 PlatformIsrConfig_64 PlatformIsrConfig_65 PlatformIsrConfig_66 PlatformIsrConfig_67 PlatformIsrConfig_68 PlatformIsrConfig_69 PlatformIsrConfig_7 PlatformIsrConfig_70 PlatformIsrConfig_71 PlatformIsrConfig_72 PlatformIsrConfig_73 PlatformIsrConfig_74 PlatformIsrConfig_75 PlatformIsrConfig_76 PlatformIsrConfig_77 PlatformIsrConfig_78 PlatformIsrConfig_79 PlatformIsrConfig_8 PlatformIsrConfig_80 PlatformIsrConfig_81 PlatformIsrConfig_82 PlatformIsrConfig_83 PlatformIsrConfig_84 PlatformIsrConfig_85 PlatformIsrConfig_86 PlatformIsrConfig_87 PlatformIsrConfig_88 PlatformIsrConfig_89 PlatformIsrConfig_9 PlatformIsrConfig_90 PlatformIsrConfig_91 PlatformIsrConfig_92 PlatformIsrConfig_93 PlatformIsrConfig_94 PlatformIsrConfig_95 PlatformIsrConfig_96 PlatformIsrConfig_97 PlatformIsrConfig_98 PlatformIsrConfig_99 
IntCtrlConfig/PlatformIsrConfig_0/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_0/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_0/IsrName - INT0_IRQn 
IntCtrlConfig/PlatformIsrConfig_0/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_1/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_1/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_1/IsrName - INT1_IRQn 
IntCtrlConfig/PlatformIsrConfig_1/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_10/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_10/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_10/IsrName - DMATCD6_IRQn 
IntCtrlConfig/PlatformIsrConfig_10/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_100/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_100/IsrHandler - CAN4_ORED_0_31_MB_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_100/IsrName - FlexCAN4_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_100/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_101/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_101/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_101/IsrName - FlexCAN5_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_101/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_102/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_102/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_102/IsrName - FlexCAN5_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_102/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_103/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_103/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_103/IsrName - FLEXIO_IRQn 
IntCtrlConfig/PlatformIsrConfig_103/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_104/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_104/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_104/IsrName - LPUART0_IRQn 
IntCtrlConfig/PlatformIsrConfig_104/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_105/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_105/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_105/IsrName - LPUART1_IRQn 
IntCtrlConfig/PlatformIsrConfig_105/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_106/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_106/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_106/IsrName - LPUART2_IRQn 
IntCtrlConfig/PlatformIsrConfig_106/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_107/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_107/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_107/IsrName - LPUART3_IRQn 
IntCtrlConfig/PlatformIsrConfig_107/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_108/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_108/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_108/IsrName - LPUART4_IRQn 
IntCtrlConfig/PlatformIsrConfig_108/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_109/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_109/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_109/IsrName - LPUART5_IRQn 
IntCtrlConfig/PlatformIsrConfig_109/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_11/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_11/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_11/IsrName - DMATCD7_IRQn 
IntCtrlConfig/PlatformIsrConfig_11/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_110/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_110/IsrHandler - LPUART_UART_IP_6_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_110/IsrName - LPUART6_IRQn 
IntCtrlConfig/PlatformIsrConfig_110/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_111/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_111/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_111/IsrName - LPUART7_IRQn 
IntCtrlConfig/PlatformIsrConfig_111/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_112/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_112/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_112/IsrName - LPUART8_IRQn 
IntCtrlConfig/PlatformIsrConfig_112/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_113/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_113/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_113/IsrName - LPUART9_IRQn 
IntCtrlConfig/PlatformIsrConfig_113/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_114/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_114/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_114/IsrName - LPUART10_IRQn 
IntCtrlConfig/PlatformIsrConfig_114/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_115/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_115/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_115/IsrName - LPUART11_IRQn 
IntCtrlConfig/PlatformIsrConfig_115/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_116/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_116/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_116/IsrName - LPUART12_IRQn 
IntCtrlConfig/PlatformIsrConfig_116/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_117/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_117/IsrHandler - LPUART_UART_IP_13_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_117/IsrName - LPUART13_IRQn 
IntCtrlConfig/PlatformIsrConfig_117/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_118/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_118/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_118/IsrName - LPUART14_IRQn 
IntCtrlConfig/PlatformIsrConfig_118/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_119/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_119/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_119/IsrName - LPUART15_IRQn 
IntCtrlConfig/PlatformIsrConfig_119/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_12/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_12/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_12/IsrName - DMATCD8_IRQn 
IntCtrlConfig/PlatformIsrConfig_12/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_120/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_120/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_120/IsrName - LPI2C0_IRQn 
IntCtrlConfig/PlatformIsrConfig_120/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_121/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_121/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_121/IsrName - LPI2C1_IRQn 
IntCtrlConfig/PlatformIsrConfig_121/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_122/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_122/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_122/IsrName - LPSPI0_IRQn 
IntCtrlConfig/PlatformIsrConfig_122/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_123/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_123/IsrHandler - Lpspi_Ip_LPSPI_1_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_123/IsrName - LPSPI1_IRQn 
IntCtrlConfig/PlatformIsrConfig_123/IsrPriority - 4 
IntCtrlConfig/PlatformIsrConfig_124/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_124/IsrHandler - Lpspi_Ip_LPSPI_2_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_124/IsrName - LPSPI2_IRQn 
IntCtrlConfig/PlatformIsrConfig_124/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_125/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_125/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_125/IsrName - LPSPI3_IRQn 
IntCtrlConfig/PlatformIsrConfig_125/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_126/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_126/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_126/IsrName - LPSPI4_IRQn 
IntCtrlConfig/PlatformIsrConfig_126/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_127/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_127/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_127/IsrName - LPSPI5_IRQn 
IntCtrlConfig/PlatformIsrConfig_127/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_128/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_128/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_128/IsrName - QSPI_IRQn 
IntCtrlConfig/PlatformIsrConfig_128/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_129/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_129/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_129/IsrName - SAI0_IRQn 
IntCtrlConfig/PlatformIsrConfig_129/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_13/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_13/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_13/IsrName - DMATCD9_IRQn 
IntCtrlConfig/PlatformIsrConfig_13/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_130/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_130/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_130/IsrName - SAI1_IRQn 
IntCtrlConfig/PlatformIsrConfig_130/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_131/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_131/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_131/IsrName - JDC_IRQn 
IntCtrlConfig/PlatformIsrConfig_131/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_132/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_132/IsrHandler - Adc_Sar_0_Isr 
IntCtrlConfig/PlatformIsrConfig_132/IsrName - ADC0_IRQn 
IntCtrlConfig/PlatformIsrConfig_132/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_133/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_133/IsrHandler - Adc_Sar_1_Isr 
IntCtrlConfig/PlatformIsrConfig_133/IsrName - ADC1_IRQn 
IntCtrlConfig/PlatformIsrConfig_133/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_134/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_134/IsrHandler - Adc_Sar_2_Isr 
IntCtrlConfig/PlatformIsrConfig_134/IsrName - ADC2_IRQn 
IntCtrlConfig/PlatformIsrConfig_134/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_135/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_135/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_135/IsrName - LPCMP0_IRQn 
IntCtrlConfig/PlatformIsrConfig_135/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_136/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_136/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_136/IsrName - LPCMP1_IRQn 
IntCtrlConfig/PlatformIsrConfig_136/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_137/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_137/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_137/IsrName - LPCMP2_IRQn 
IntCtrlConfig/PlatformIsrConfig_137/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_138/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_138/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_138/IsrName - FCCU_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_138/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_139/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_139/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_139/IsrName - FCCU_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_139/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_14/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_14/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_14/IsrName - DMATCD10_IRQn 
IntCtrlConfig/PlatformIsrConfig_14/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_140/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_140/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_140/IsrName - STCU_LBIST_MBIST_IRQn 
IntCtrlConfig/PlatformIsrConfig_140/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_141/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_141/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_141/IsrName - HSE_MU0_TX_IRQn 
IntCtrlConfig/PlatformIsrConfig_141/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_142/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_142/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_142/IsrName - HSE_MU0_RX_IRQn 
IntCtrlConfig/PlatformIsrConfig_142/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_143/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_143/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_143/IsrName - HSE_MU0_ORED_IRQn 
IntCtrlConfig/PlatformIsrConfig_143/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_144/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_144/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_144/IsrName - HSE_MU1_TX_IRQn 
IntCtrlConfig/PlatformIsrConfig_144/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_145/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_145/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_145/IsrName - HSE_MU1_RX_IRQn 
IntCtrlConfig/PlatformIsrConfig_145/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_146/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_146/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_146/IsrName - HSE_MU1_ORED_IRQn 
IntCtrlConfig/PlatformIsrConfig_146/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_147/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_147/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_147/IsrName - SoC_PLL_IRQn 
IntCtrlConfig/PlatformIsrConfig_147/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_15/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_15/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_15/IsrName - DMATCD11_IRQn 
IntCtrlConfig/PlatformIsrConfig_15/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_16/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_16/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_16/IsrName - DMATCD12_IRQn 
IntCtrlConfig/PlatformIsrConfig_16/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_17/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_17/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_17/IsrName - DMATCD13_IRQn 
IntCtrlConfig/PlatformIsrConfig_17/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_18/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_18/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_18/IsrName - DMATCD14_IRQn 
IntCtrlConfig/PlatformIsrConfig_18/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_19/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_19/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_19/IsrName - DMATCD15_IRQn 
IntCtrlConfig/PlatformIsrConfig_19/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_2/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_2/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_2/IsrName - INT2_IRQn 
IntCtrlConfig/PlatformIsrConfig_2/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_20/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_20/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_20/IsrName - DMATCD16_IRQn 
IntCtrlConfig/PlatformIsrConfig_20/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_21/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_21/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_21/IsrName - DMATCD17_IRQn 
IntCtrlConfig/PlatformIsrConfig_21/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_22/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_22/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_22/IsrName - DMATCD18_IRQn 
IntCtrlConfig/PlatformIsrConfig_22/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_23/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_23/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_23/IsrName - DMATCD19_IRQn 
IntCtrlConfig/PlatformIsrConfig_23/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_24/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_24/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_24/IsrName - DMATCD20_IRQn 
IntCtrlConfig/PlatformIsrConfig_24/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_25/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_25/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_25/IsrName - DMATCD21_IRQn 
IntCtrlConfig/PlatformIsrConfig_25/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_26/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_26/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_26/IsrName - DMATCD22_IRQn 
IntCtrlConfig/PlatformIsrConfig_26/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_27/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_27/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_27/IsrName - DMATCD23_IRQn 
IntCtrlConfig/PlatformIsrConfig_27/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_28/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_28/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_28/IsrName - DMATCD24_IRQn 
IntCtrlConfig/PlatformIsrConfig_28/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_29/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_29/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_29/IsrName - DMATCD25_IRQn 
IntCtrlConfig/PlatformIsrConfig_29/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_3/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_3/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_3/IsrName - INT3_IRQn 
IntCtrlConfig/PlatformIsrConfig_3/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_30/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_30/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_30/IsrName - DMATCD26_IRQn 
IntCtrlConfig/PlatformIsrConfig_30/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_31/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_31/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_31/IsrName - DMATCD27_IRQn 
IntCtrlConfig/PlatformIsrConfig_31/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_32/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_32/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_32/IsrName - DMATCD28_IRQn 
IntCtrlConfig/PlatformIsrConfig_32/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_33/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_33/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_33/IsrName - DMATCD29_IRQn 
IntCtrlConfig/PlatformIsrConfig_33/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_34/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_34/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_34/IsrName - DMATCD30_IRQn 
IntCtrlConfig/PlatformIsrConfig_34/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_35/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_35/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_35/IsrName - DMATCD31_IRQn 
IntCtrlConfig/PlatformIsrConfig_35/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_36/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_36/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_36/IsrName - ERM_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_36/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_37/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_37/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_37/IsrName - ERM_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_37/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_38/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_38/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_38/IsrName - MCM_IRQn 
IntCtrlConfig/PlatformIsrConfig_38/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_39/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_39/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_39/IsrName - STM0_IRQn 
IntCtrlConfig/PlatformIsrConfig_39/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_4/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_4/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_4/IsrName - DMATCD0_IRQn 
IntCtrlConfig/PlatformIsrConfig_4/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_40/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_40/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_40/IsrName - STM1_IRQn 
IntCtrlConfig/PlatformIsrConfig_40/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_41/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_41/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_41/IsrName - SWT0_IRQn 
IntCtrlConfig/PlatformIsrConfig_41/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_43/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_43/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_43/IsrName - CTI0_IRQn 
IntCtrlConfig/PlatformIsrConfig_43/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_45/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_45/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_45/IsrName - FLASH_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_45/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_46/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_46/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_46/IsrName - FLASH_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_46/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_47/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_47/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_47/IsrName - FLASH_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_47/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_48/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_48/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_48/IsrName - RGM_IRQn 
IntCtrlConfig/PlatformIsrConfig_48/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_49/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_49/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_49/IsrName - PMC_IRQn 
IntCtrlConfig/PlatformIsrConfig_49/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_5/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_5/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_5/IsrName - DMATCD1_IRQn 
IntCtrlConfig/PlatformIsrConfig_5/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_50/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_50/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_50/IsrName - SIUL_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_50/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_51/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_51/IsrHandler - SIUL2_EXT_IRQ_8_15_ISR 
IntCtrlConfig/PlatformIsrConfig_51/IsrName - SIUL_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_51/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_52/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_52/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_52/IsrName - SIUL_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_52/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_53/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_53/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_53/IsrName - SIUL_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_53/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_54/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_54/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_54/IsrName - EMIOS0_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_54/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_55/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_55/IsrHandler - EMIOS0_1_IRQ 
IntCtrlConfig/PlatformIsrConfig_55/IsrName - EMIOS0_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_55/IsrPriority - 10 
IntCtrlConfig/PlatformIsrConfig_56/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_56/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_56/IsrName - EMIOS0_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_56/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_57/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_57/IsrHandler - EMIOS0_3_IRQ 
IntCtrlConfig/PlatformIsrConfig_57/IsrName - EMIOS0_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_57/IsrPriority - 10 
IntCtrlConfig/PlatformIsrConfig_58/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_58/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_58/IsrName - EMIOS0_4_IRQn 
IntCtrlConfig/PlatformIsrConfig_58/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_59/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_59/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_59/IsrName - EMIOS0_5_IRQn 
IntCtrlConfig/PlatformIsrConfig_59/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_6/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_6/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_6/IsrName - DMATCD2_IRQn 
IntCtrlConfig/PlatformIsrConfig_6/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_60/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_60/IsrHandler - EMIOS1_0_IRQ 
IntCtrlConfig/PlatformIsrConfig_60/IsrName - EMIOS1_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_60/IsrPriority - 10 
IntCtrlConfig/PlatformIsrConfig_61/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_61/IsrHandler - EMIOS1_1_IRQ 
IntCtrlConfig/PlatformIsrConfig_61/IsrName - EMIOS1_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_61/IsrPriority - 10 
IntCtrlConfig/PlatformIsrConfig_62/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_62/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_62/IsrName - EMIOS1_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_62/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_63/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_63/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_63/IsrName - EMIOS1_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_63/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_64/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_64/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_64/IsrName - EMIOS1_4_IRQn 
IntCtrlConfig/PlatformIsrConfig_64/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_65/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_65/IsrHandler - EMIOS1_5_IRQ 
IntCtrlConfig/PlatformIsrConfig_65/IsrName - EMIOS1_5_IRQn 
IntCtrlConfig/PlatformIsrConfig_65/IsrPriority - 10 
IntCtrlConfig/PlatformIsrConfig_66/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_66/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_66/IsrName - EMIOS2_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_66/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_67/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_67/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_67/IsrName - EMIOS2_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_67/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_68/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_68/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_68/IsrName - EMIOS2_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_68/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_69/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_69/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_69/IsrName - EMIOS2_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_69/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_7/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_7/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_7/IsrName - DMATCD3_IRQn 
IntCtrlConfig/PlatformIsrConfig_7/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_70/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_70/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_70/IsrName - EMIOS2_4_IRQn 
IntCtrlConfig/PlatformIsrConfig_70/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_71/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_71/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_71/IsrName - EMIOS2_5_IRQn 
IntCtrlConfig/PlatformIsrConfig_71/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_72/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_72/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_72/IsrName - WKPU_IRQn 
IntCtrlConfig/PlatformIsrConfig_72/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_73/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_73/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_73/IsrName - CMU0_IRQn 
IntCtrlConfig/PlatformIsrConfig_73/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_74/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_74/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_74/IsrName - CMU1_IRQn 
IntCtrlConfig/PlatformIsrConfig_74/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_75/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_75/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_75/IsrName - CMU2_IRQn 
IntCtrlConfig/PlatformIsrConfig_75/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_76/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_76/IsrHandler - Bctu_0_Isr 
IntCtrlConfig/PlatformIsrConfig_76/IsrName - BCTU_IRQn 
IntCtrlConfig/PlatformIsrConfig_76/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_77/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_77/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_77/IsrName - LCU0_IRQn 
IntCtrlConfig/PlatformIsrConfig_77/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_78/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_78/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_78/IsrName - LCU1_IRQn 
IntCtrlConfig/PlatformIsrConfig_78/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_79/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_79/IsrHandler - PIT_0_ISR 
IntCtrlConfig/PlatformIsrConfig_79/IsrName - PIT0_IRQn 
IntCtrlConfig/PlatformIsrConfig_79/IsrPriority - 7 
IntCtrlConfig/PlatformIsrConfig_8/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_8/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_8/IsrName - DMATCD4_IRQn 
IntCtrlConfig/PlatformIsrConfig_8/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_80/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_80/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_80/IsrName - PIT1_IRQn 
IntCtrlConfig/PlatformIsrConfig_80/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_81/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_81/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_81/IsrName - PIT2_IRQn 
IntCtrlConfig/PlatformIsrConfig_81/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_82/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_82/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_82/IsrName - RTC_IRQn 
IntCtrlConfig/PlatformIsrConfig_82/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_83/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_83/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_83/IsrName - EMAC_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_83/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_84/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_84/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_84/IsrName - EMAC_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_84/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_85/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_85/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_85/IsrName - EMAC_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_85/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_86/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_86/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_86/IsrName - EMAC_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_86/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_87/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_87/IsrHandler - CAN0_ORED_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_87/IsrName - FlexCAN0_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_87/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_88/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_88/IsrHandler - CAN0_ORED_0_31_MB_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_88/IsrName - FlexCAN0_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_88/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_89/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_89/IsrHandler - CAN0_ORED_32_63_MB_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_89/IsrName - FlexCAN0_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_89/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_9/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_9/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_9/IsrName - DMATCD5_IRQn 
IntCtrlConfig/PlatformIsrConfig_9/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_90/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_90/IsrHandler - CAN0_ORED_64_95_MB_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_90/IsrName - FlexCAN0_3_IRQn 
IntCtrlConfig/PlatformIsrConfig_90/IsrPriority - 5 
IntCtrlConfig/PlatformIsrConfig_91/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_91/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_91/IsrName - FlexCAN1_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_91/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_92/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_92/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_92/IsrName - FlexCAN1_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_92/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_93/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_93/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_93/IsrName - FlexCAN1_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_93/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_94/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_94/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_94/IsrName - FlexCAN2_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_94/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_95/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_95/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_95/IsrName - FlexCAN2_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_95/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_96/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_96/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_96/IsrName - FlexCAN2_2_IRQn 
IntCtrlConfig/PlatformIsrConfig_96/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_97/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_97/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_97/IsrName - FlexCAN3_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_97/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_98/IsrEnabled - false 
IntCtrlConfig/PlatformIsrConfig_98/IsrHandler - undefined_handler 
IntCtrlConfig/PlatformIsrConfig_98/IsrName - FlexCAN3_1_IRQn 
IntCtrlConfig/PlatformIsrConfig_98/IsrPriority - 0 
IntCtrlConfig/PlatformIsrConfig_99/IsrEnabled - true 
IntCtrlConfig/PlatformIsrConfig_99/IsrHandler - CAN4_ORED_IRQHandler 
IntCtrlConfig/PlatformIsrConfig_99/IsrName - FlexCAN4_0_IRQn 
IntCtrlConfig/PlatformIsrConfig_99/IsrPriority - 5 
IntmConfig - IntmConfig 
MPU_M7_Configuration - MPU_M7_Configuration 
POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_PLATFORM 
#define MW_OPEN_PLATFORM 
#define MW_UPDATE_PLATFORM 
#define MW_RESTORE_PLATFORM 
#define MW_PORT_INFO /*
This peripheral is not configured for the selected Hardware Part
*/
#define MW_DETAILS_PORT 
#define MW_OPEN_PORT 
#define MW_UPDATE_PORT 
#define MW_RESTORE_PORT 
#define MW_RESTORE_PWM 
#define MW_RESTORE_SPI 
#define MW_RESTORE_UART 
#define MW_OPEN_BOARD_INIT 
#define MW_CANIF_INFO /*
CanIfCtrlDrvCfg - CanIfCtrlDrvCfg_0 
CanIfCtrlDrvCfg_0/CanIfCtrlCfg - CanIfCtrlCfg_0 CanIfCtrlCfg_1 
CanIfCtrlDrvCfg_0/CanIfCtrlCfg_0/CanIfCtrlCanCtrlRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_0 
CanIfCtrlDrvCfg_0/CanIfCtrlCfg_0/CanIfCtrlId - 0 
CanIfCtrlDrvCfg_0/CanIfCtrlCfg_1/CanIfCtrlCanCtrlRef - /Can_43_FLEXCAN/Can/CanConfigSet/CanController_1 
CanIfCtrlDrvCfg_0/CanIfCtrlCfg_1/CanIfCtrlId - 1 
CanIfCtrlDrvCfg_0/CanIfCtrlDrvNameRef - /Can_43_FLEXCAN/Can/CanGeneral 
CanIfInitCfg - CanIfInitCfg 
CanIfPublicCfg - CanIfPublicCfg 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_CANIF 
#define MW_OPEN_CANIF 
#define MW_UPDATE_CANIF 
#define MW_RESTORE_CANIF 
#define MW_INITIALIZATION_SEQUENCE 
#define MW_INITIALIZATION_ENABLE 0
#define MW_INITIALIZATION_LOCATION Initialization stored in model
#define MW_INITIALIZATION_BROWSE 
#define MW_INITIALIZATION_CONFIGURE 
#define MW_JLINK_LOCATION Browse J-Link location...
#define MW_JLINK_BROWSE 
#define MW_OPEN_PIL 
#define MW_UPDATE_PIL 
#define MW_EXT_HARDWAREUART -1
#define MW_EXT_COMPORT -1
#define MW_EXT_BAUDRATE 10
#define MW_EXT_INTPRIORITY 7
#define MW_OPEN_EXT 
#define MW_UPDATE_EXT 
#define MW_LINKER_ENABLE 0
#define MW_LINKER_LOCATION Browse for the linker location...
#define MW_LINKER_BROWSE 
#define MW_LINKER_OPEN 
#define MW_STARTUP_ENABLE 0
#define MW_STARTUP_LOCATION Browse for the startup code folder location...
#define MW_STARTUP_BROWSE 
#define MW_STARTUP_OPEN 
#define MW_REFCONFIG_LOCATION Browse for Referenced Configuration location
#define MW_REFCONFIG_BROWSE 
#define MW_LIN_43_LPUART_FLEXIO_INFO /*
/Lin/AutosarExt - AutosarExt 
/Lin/AutosarExt/LinDisableDemReportErrorStatus - 0 
/Lin/AutosarExt/LinEnableUserModeSupport - 0 
/Lin/AutosarExt/LinFrameTimeoutDisable - 1 
/Lin/CommonPublishedInformation - CommonPublishedInformation 
/Lin/CommonPublishedInformation/ArReleaseMajorVersion - 4 
/Lin/CommonPublishedInformation/ArReleaseMinorVersion - 7 
/Lin/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
/Lin/CommonPublishedInformation/ModuleId - 82 
/Lin/CommonPublishedInformation/SwMajorVersion - 3 
/Lin/CommonPublishedInformation/SwMinorVersion - 0 
/Lin/CommonPublishedInformation/SwPatchVersion - 0 
/Lin/CommonPublishedInformation/VendorId - 43 
/Lin/LinGeneral - LinGeneral 
/Lin/LinGeneral/LinDevErrorDetect - 0 
/Lin/LinGeneral/LinIndex - 0 
/Lin/LinGeneral/LinMulticoreSupport - 0 
/Lin/LinGeneral/LinTimeoutDuration - 65535 
/Lin/LinGeneral/LinTimeoutMethod - OSIF_COUNTER_DUMMY 
/Lin/LinGeneral/LinVersionInfoApi - 1 
/Lin/LinGlobalConfig - LinGlobalConfig 
/Lin/LinGlobalConfig/LinChannel - LinChannel_0 LinChannel_Flexio 
/Lin/LinGlobalConfig/LinChannel_0/BreakLength - BL_13 
/Lin/LinGlobalConfig/LinChannel_0/DetectedBreakLength - BL_11 
/Lin/LinGlobalConfig/LinChannel_0/LinChannelBaudRate - 9600 
/Lin/LinGlobalConfig/LinChannel_0/LinChannelId - 1 
/Lin/LinGlobalConfig/LinChannel_0/LinChannelWakeupSupport - 0 
/Lin/LinGlobalConfig/LinChannel_0/LinClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/UART_CLK 
/Lin/LinGlobalConfig/LinChannel_0/LinHeaderTimeout - 44 
/Lin/LinGlobalConfig/LinChannel_0/LinHwChannel - LPUART_IP_5 
/Lin/LinGlobalConfig/LinChannel_0/LinNodeType - MASTER 
/Lin/LinGlobalConfig/LinChannel_0/LinResponseTimeout - 14 
/Lin/LinGlobalConfig/LinChannel_Flexio/BreakLength - BL_13 
/Lin/LinGlobalConfig/LinChannel_Flexio/DetectedBreakLength - BL_11 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinChannelBaudRate - 9600 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinChannelId - 0 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinChannelWakeupSupport - 0 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXIO_CLK 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinFlexioRxControllerRef - /Mcl/Mcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_Rx 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinFlexioTxControllerRef - /Mcl/Mcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_Tx 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinHeaderTimeout - 44 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinHwChannel - FLEXIO_IP_0 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinNodeType - MASTER 
/Lin/LinGlobalConfig/LinChannel_Flexio/LinResponseTimeout - 14 
/Lin_43_LPUART_FLEXIO_TS_T40D34M30I0R0/Lin - Lin 
AR-PACKAGE - Lin_43_LPUART_FLEXIO 
ECUC-MODULE-CONFIGURATION-VALUES - Lin 
ECUC-MODULE-DEF - /Lin_43_LPUART_FLEXIO_TS_T40D34M30I0R0/Lin 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
xmlns - http://autosar.org/schema/r4.0 
xmlns_xsi - http://www.w3.org/2001/XMLSchema-instance 
xsi_schemaLocation - http://autosar.org/schema/r4.0 AUTOSAR_00050.xsd 

*/
#define MW_DETAILS_LIN_43_LPUART_FLEXIO 
#define MW_OPEN_LIN_43_LPUART_FLEXIO 
#define MW_UPDATE_LIN_43_LPUART_FLEXIO 
#define MW_RESTORE_LIN_43_LPUART_FLEXIO 
#define MW_TOOLS_S32DSLOCATION Browse for S32 Design Studio location
#define MW_TOOLS_BROWSES32DS 
#define MW_S32DSPROJECT_OPEN 
#define MW_S32DSPROJECT_EXPORT 
#define MW_I2C_INFO /*
/I2c/CommonPublishedInformation - CommonPublishedInformation 
/I2c/CommonPublishedInformation/ArReleaseMajorVersion - 4 
/I2c/CommonPublishedInformation/ArReleaseMinorVersion - 7 
/I2c/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
/I2c/CommonPublishedInformation/ModuleId - 255 
/I2c/CommonPublishedInformation/SwMajorVersion - 3 
/I2c/CommonPublishedInformation/SwMinorVersion - 0 
/I2c/CommonPublishedInformation/SwPatchVersion - 0 
/I2c/CommonPublishedInformation/VendorApiInfix -  
/I2c/CommonPublishedInformation/VendorId - 43 
/I2c/GeneralConfiguration - GeneralConfiguration 
/I2c/GeneralConfiguration/I2cCallback - MBDT_I2c_Callback 
/I2c/GeneralConfiguration/I2cDevErrorDetect - 1 
/I2c/GeneralConfiguration/I2cDisableDemReportErrorStatus - 1 
/I2c/GeneralConfiguration/I2cDmaOptimize - 0 
/I2c/GeneralConfiguration/I2cDmaTransferErrorDetect - 0 
/I2c/GeneralConfiguration/I2cDmaUsed - 0 
/I2c/GeneralConfiguration/I2cEnableUserModeSupport - 0 
/I2c/GeneralConfiguration/I2cFlexIOUsed - 1 
/I2c/GeneralConfiguration/I2cMulticoreSupport - 0 
/I2c/GeneralConfiguration/I2cTimeoutDuration - 65535 
/I2c/GeneralConfiguration/I2cTimeoutMethod - OSIF_COUNTER_DUMMY 
/I2c/GeneralConfiguration/I2cVersionInfoApi - 1 
/I2c/I2cGlobalConfig - I2cGlobalConfig 
/I2c/I2cGlobalConfig/I2cChannel - I2cChannel_0 I2cChannel_1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cChannelId - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cFlexIOConfiguration - I2c_FlexIOChannel0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cHwChannel - FLEXIO_0_CH_2_3 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration - I2cMasterConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cAsyncMethod - LPI2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cBaudRate - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cBusIdleTimeout - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cClockHighPeriod - 1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cClockLowPeriod - 3 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cDataValidDelay - 1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cGlitchFilterSCL - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cGlitchFilterSDA - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration - I2cHighSpeedModeConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cClockHighPeriod - 1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cClockLowPeriod - 3 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cDataValidDelay - 1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cHighSpeedBaudRate - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cMasterCode - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cSetupHoldDelay - 2 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cPinLowTimeout - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cPrescaler - LPI2C_MASTER_PRESC_DIV_1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterConfiguration/I2cSetupHoldDelay - 2 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cMasterSlaveConfiguration - MASTER_MODE 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cOperatingMode - LPI2C_STANDARD_MODE 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration - I2cSlaveConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cAsyncMethod - LPI2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cGlitchFilterSCL - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cGlitchFilterSDA - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cSlaveAddress - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cSlaveFilterEnable - 1 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/I2cSlaveIs10BitAddress - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2cSlaveConfiguration/Lpi2cSlaveListening - 0 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/I2cAsyncMethod - FLEXIO_I2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/I2cBaudRate - 89285.7143 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/I2cFlexIOChannelPrescaler - DIV_16 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/I2cFlexIOCompareValue - 55 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/SclFlexioRef - /Mcl/Mcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_Scl 
/I2c/I2cGlobalConfig/I2cChannel_0/I2c_FlexIOChannel0/SdaFlexioRef - /Mcl/Mcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_Sda 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cChannelId - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cFlexIOConfiguration - I2cFlexIOConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cFlexIOConfiguration/I2cAsyncMethod - FLEXIO_I2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cFlexIOConfiguration/I2cBaudRate - 4705882.3529 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cFlexIOConfiguration/I2cFlexIOChannelPrescaler - DIV_1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cFlexIOConfiguration/I2cFlexIOCompareValue - 8 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cHwChannel - LPI2C_1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration - I2cMasterConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cAsyncMethod - LPI2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cBaudRate - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cBusIdleTimeout - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cClockHighPeriod - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cClockLowPeriod - 3 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cDataValidDelay - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cGlitchFilterSCL - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cGlitchFilterSDA - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration - I2cHighSpeedModeConfiguration 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cClockHighPeriod - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cClockLowPeriod - 3 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cDataValidDelay - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cHighSpeedBaudRate - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cMasterCode - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cHighSpeedModeConfiguration/I2cSetupHoldDelay - 2 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cPinLowTimeout - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cPrescaler - LPI2C_MASTER_PRESC_DIV_1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterConfiguration/I2cSetupHoldDelay - 2 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cMasterSlaveConfiguration - SLAVE_MODE 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cOperatingMode - LPI2C_STANDARD_MODE 
/I2c/I2cGlobalConfig/I2cChannel_1/I2cSlaveConfiguration - I2c_Lpi2cSlaveChannel1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cAsyncMethod - LPI2C_USING_INTERRUPTS 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cGlitchFilterSCL - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cGlitchFilterSDA - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cSlaveAddress - 50 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cSlaveFilterEnable - 1 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/I2cSlaveIs10BitAddress - 0 
/I2c/I2cGlobalConfig/I2cChannel_1/I2c_Lpi2cSlaveChannel1/Lpi2cSlaveListening - 0 
/I2c/I2cGlobalConfig/I2cFlexIOModuleConfiguration - I2cFlexIOModuleConfiguration 
/I2c/I2cGlobalConfig/I2cFlexIOModuleConfiguration/I2cClockRef - /Mcu/Mcu/McuModuleConfiguration/McuClockSettingConfig_0/FLEXIO_CLK 
/TS_T40D34M30I0R0/I2c - I2c 
AR-PACKAGE - I2c 
ECUC-MODULE-CONFIGURATION-VALUES - I2c 
ECUC-MODULE-DEF - /TS_T40D34M30I0R0/I2c 
IMPLEMENTATION-CONFIG-VARIANT - VARIANT-POST-BUILD 
xmlns - http://autosar.org/schema/r4.0 
xmlns_xsi - http://www.w3.org/2001/XMLSchema-instance 
xsi_schemaLocation - http://autosar.org/schema/r4.0 AUTOSAR_00050.xsd 

*/
#define MW_DETAILS_I2C 
#define MW_OPEN_I2C 
#define MW_UPDATE_I2C 
#define MW_RESTORE_I2C 
#define MW_MEM_43_INFLS_INFO /*
/Mem - Mem 
/Mem/CommonPublishedInformation - CommonPublishedInformation 
/Mem/CommonPublishedInformation/ArReleaseMajorVersion - 4 
/Mem/CommonPublishedInformation/ArReleaseMinorVersion - 7 
/Mem/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
/Mem/CommonPublishedInformation/ModuleId - 91 
/Mem/CommonPublishedInformation/SwMajorVersion - 4 
/Mem/CommonPublishedInformation/SwMinorVersion - 0 
/Mem/CommonPublishedInformation/SwPatchVersion - 0 
/Mem/CommonPublishedInformation/VendorApiInfix - INFLS 
/Mem/CommonPublishedInformation/VendorId - 43 
/Mem/IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
/Mem/MemAutosarExt - MemAutosarExt 
/Mem/MemAutosarExt/MemBlock4PipeSelect - MEM_COMMAND_PIPE_0 
/Mem/MemAutosarExt/MemEccDataErrorSuppression - true 
/Mem/MemAutosarExt/MemEnableUserModeSupport - false 
/Mem/MemAutosarExt/MemSynchronizeCache - true 
/Mem/MemAutosarExt/MemUsesAlterInterface - false 
/Mem/MemGeneral - MemGeneral 
/Mem/MemGeneral/MemAbortTimeout - 0 
/Mem/MemGeneral/MemAcErase - 0 
/Mem/MemGeneral/MemAcErasePointer - NULL_PTR 
/Mem/MemGeneral/MemAcLoadOnJobStart - false 
/Mem/MemGeneral/MemAcWrite - 0 
/Mem/MemGeneral/MemAcWritePointer - NULL_PTR 
/Mem/MemGeneral/MemCleanCacheAfterLoadAc - false 
/Mem/MemGeneral/MemDevErrorDetect - true 
/Mem/MemGeneral/MemEnableCheckCfgCrc - true 
/Mem/MemGeneral/MemEraseResumeTimeout - 0 
/Mem/MemGeneral/MemEraseSuspendTimeout - 0 
/Mem/MemGeneral/MemEraseTimeout - 0 
/Mem/MemGeneral/MemEraseVerificationEnabled - true 
/Mem/MemGeneral/MemHwCompareService - true 
/Mem/MemGeneral/MemHwUtestModeService - true 
/Mem/MemGeneral/MemSectorSetLockApi - true 
/Mem/MemGeneral/MemTimeoutMethod - OSIF_COUNTER_DUMMY 
/Mem/MemGeneral/MemTimeoutSupervisionEnabled - false 
/Mem/MemGeneral/MemUtestResumeTimeout - 0 
/Mem/MemGeneral/MemUtestSuspendTimeout - 0 
/Mem/MemGeneral/MemWriteTimeout - 0 
/Mem/MemGeneral/MemWriteVerificationEnabled - true 
/Mem/MemInstance - MemInstance_0 
/Mem/MemInstance_0/MemInstanceId - 0 
/Mem/MemInstance_0/MemSectorBatch - MemSectorBatch 
/Mem/MemInstance_0/MemSectorBatch/MemEraseSectorSize - 8192 
/Mem/MemInstance_0/MemSectorBatch/MemNumberOfSectors - 1 
/Mem/MemInstance_0/MemSectorBatch/MemPhysicalSector - FLS_DATA_ARRAY_0_BLOCK_4_S000 
/Mem/MemInstance_0/MemSectorBatch/MemReadPageSize - 1 
/Mem/MemInstance_0/MemSectorBatch/MemSpecifiedEraseCycles - 0 
/Mem/MemInstance_0/MemSectorBatch/MemStartAddress - 268435456 
/Mem/MemInstance_0/MemSectorBatch/MemWritePageSize - 8 
/Mem/MemPublishedInformation - MemPublishedInformation 
/Mem/MemPublishedInformation/MemECCValue - 1427461397 
/Mem/MemPublishedInformation/MemErasedValue - 4294967295 
/Mem/MemUtestConfig - MemUtestConfig_0 
/Mem/MemUtestConfig_0/MemUtestArrayIntegritySequence - C40_IP_PROPRIETARY_SEQUENCE 
/Mem/MemUtestConfig_0/MemUtestBlockToCheckIntegrity - C40_IP_CODE_BLOCK_0 
/Mem/MemUtestConfig_0/MemUtestBreakpoints - C40_IP_BREAKPOINTS_ON_DBD 
/Mem/MemUtestConfig_0/MemUtestInstanceIdRef - /Mem_43_INFLS/Mem/MemInstance_0 
/Mem/MemUtestConfig_0/MemUtestMarginLevels - C40_IP_MARGIN_LEVEL_PROGRAM 
/Mem/POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_MEM_43_INFLS 
#define MW_OPEN_MEM_43_INFLS 
#define MW_UPDATE_MEM_43_INFLS 
#define MW_RESTORE_MEM_43_INFLS 
#define MW_HARDWARE_SELECTDEFAULTLOC -1
#define MW_HARDWARE_ENABLECUSTOMTEMPLATE 0
#define MW_HARDWARE_SAVETEMPLATE 
#define MW_HARDWARE_OPENTEMPLATE 
#define MW_FEE_INFO /*
/Fee - Fee 
/Fee/CommonPublishedInformation - CommonPublishedInformation 
/Fee/CommonPublishedInformation/ArReleaseMajorVersion - 4 
/Fee/CommonPublishedInformation/ArReleaseMinorVersion - 7 
/Fee/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
/Fee/CommonPublishedInformation/ModuleId - 21 
/Fee/CommonPublishedInformation/SwMajorVersion - 4 
/Fee/CommonPublishedInformation/SwMinorVersion - 0 
/Fee/CommonPublishedInformation/SwPatchVersion - 0 
/Fee/CommonPublishedInformation/VendorApiInfix -  
/Fee/CommonPublishedInformation/VendorId - 43 
/Fee/FeeBlockConfiguration - FeeBlockConfiguration_0 FeeBlockConfiguration_1 
/Fee/FeeBlockConfiguration_0/FeeBlockAssignment - APPLICATION 
/Fee/FeeBlockConfiguration_0/FeeBlockNumber - 1 
/Fee/FeeBlockConfiguration_0/FeeBlockSize - 32 
/Fee/FeeBlockConfiguration_0/FeeClusterGroupRef - /Fee/Fee/FeeClusterGroup_0 
/Fee/FeeBlockConfiguration_0/FeeImmediateData - false 
/Fee/FeeBlockConfiguration_0/FeeMemAccAddressArea - /MemAcc/MemAcc/MemAccAddressAreaConfiguration_0 
/Fee/FeeBlockConfiguration_0/FeeNumberOfWriteCycles - 0 
/Fee/FeeBlockConfiguration_0/Index - 0 
/Fee/FeeBlockConfiguration_1/FeeBlockAssignment - APPLICATION 
/Fee/FeeBlockConfiguration_1/FeeBlockNumber - 2 
/Fee/FeeBlockConfiguration_1/FeeBlockSize - 32 
/Fee/FeeBlockConfiguration_1/FeeClusterGroupRef - /Fee/Fee/FeeClusterGroup_0 
/Fee/FeeBlockConfiguration_1/FeeImmediateData - false 
/Fee/FeeBlockConfiguration_1/FeeMemAccAddressArea - /MemAcc/MemAcc/MemAccAddressAreaConfiguration_0 
/Fee/FeeBlockConfiguration_1/FeeNumberOfWriteCycles - 0 
/Fee/FeeBlockConfiguration_1/Index - 1 
/Fee/FeeClusterGroup - FeeClusterGroup_0 
/Fee/FeeClusterGroup_0/FeeCluster - FeeCluster_0 FeeCluster_1 
/Fee/FeeClusterGroup_0/FeeCluster_0/FeeSubAddressArea - FeeSubAddressArea_0 
/Fee/FeeClusterGroup_0/FeeCluster_0/FeeSubAddressArea_0/FeeSubAddressAreaIndex - 0 
/Fee/FeeClusterGroup_0/FeeCluster_0/FeeSubAddressArea_0/FeeSubAddressAreaRef - /MemAcc/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0 
/Fee/FeeClusterGroup_0/FeeCluster_0/FeeSubAddressArea_0/Index - 0 
/Fee/FeeClusterGroup_0/FeeCluster_0/Index - 0 
/Fee/FeeClusterGroup_0/FeeCluster_1/FeeSubAddressArea - FeeSubAddressArea_0 
/Fee/FeeClusterGroup_0/FeeCluster_1/FeeSubAddressArea_0/FeeSubAddressAreaIndex - 0 
/Fee/FeeClusterGroup_0/FeeCluster_1/FeeSubAddressArea_0/FeeSubAddressAreaRef - /MemAcc/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1 
/Fee/FeeClusterGroup_0/FeeCluster_1/FeeSubAddressArea_0/Index - 0 
/Fee/FeeClusterGroup_0/FeeCluster_1/Index - 1 
/Fee/FeeClusterGroup_0/Index - 0 
/Fee/FeeGeneral - FeeGeneral 
/Fee/FeeGeneral/FeeBlockAlwaysAvailable - false 
/Fee/FeeGeneral/FeeBufferAlignmentValue - /MemAcc/MemAcc/MemAccAddressAreaConfiguration_0 
/Fee/FeeGeneral/FeeClusterFormatNotification - MBDT_Fee_ClusterFormatDuringInit_Notification 
/Fee/FeeGeneral/FeeConfigAssignment - APPLICATION 
/Fee/FeeGeneral/FeeDataBufferSize - 96 
/Fee/FeeGeneral/FeeDevErrorDetect - false 
/Fee/FeeGeneral/FeeEnableUserModeSupport - false 
/Fee/FeeGeneral/FeeLegacyEraseMode - false 
/Fee/FeeGeneral/FeeMainFunctionPeriod - 0.1 
/Fee/FeeGeneral/FeeMarkEmptyBlocksInvalid - false 
/Fee/FeeGeneral/FeeMaximumNumberBlocks - 1 
/Fee/FeeGeneral/FeeMinimumReadPageSize - 1 
/Fee/FeeGeneral/FeeNvmJobEndNotification - MBDT_Fee_NvmJobEnd_Notification 
/Fee/FeeGeneral/FeeNvmJobErrorNotification - MBDT_Fee_NvmJobError_Notification 
/Fee/FeeGeneral/FeePollingMode - false 
/Fee/FeeGeneral/FeeSubAddressAreaEraseRetries - 3 
/Fee/FeeGeneral/FeeSubAddressAreaRetirement - false 
/Fee/FeeGeneral/FeeSwapForeignBlocksEnabled - false 
/Fee/FeeGeneral/FeeVersionInfoApi - true 
/Fee/FeeGeneral/FeeVirtualPageSize - 32 
/Fee/FeePublishedInformation - FeePublishedInformation 
/Fee/FeePublishedInformation/FeeBlockOverhead - 0 
/Fee/FeePublishedInformation/FeePageOverhead - 0 
/Fee/IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
/Fee/POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_FEE 
#define MW_OPEN_FEE 
#define MW_UPDATE_FEE 
#define MW_RESTORE_FEE 
#define MW_MEMACC_INFO /*
/MemAcc - MemAcc 
/MemAcc/AutosarExt - AutosarExt 
/MemAcc/AutosarExt/MemAccDomainID - 0 
/MemAcc/AutosarExt/MemAccEnableUserModeSupport - false 
/MemAcc/AutosarExt/MemAccMCoreArbitrationTimeout - 0 
/MemAcc/AutosarExt/MemAccMCoreInitTimeout - 0 
/MemAcc/AutosarExt/MemAccMulticoreType1Support - false 
/MemAcc/AutosarExt/MemAccMulticoreType3Support - false 
/MemAcc/AutosarExt/MemAccTimeoutSupervisionEnabled - false 
/MemAcc/CommonPublishedInformation - CommonPublishedInformation 
/MemAcc/CommonPublishedInformation/ArReleaseMajorVersion - 4 
/MemAcc/CommonPublishedInformation/ArReleaseMinorVersion - 7 
/MemAcc/CommonPublishedInformation/ArReleaseRevisionVersion - 0 
/MemAcc/CommonPublishedInformation/ModuleId - 41 
/MemAcc/CommonPublishedInformation/SwMajorVersion - 4 
/MemAcc/CommonPublishedInformation/SwMinorVersion - 0 
/MemAcc/CommonPublishedInformation/SwPatchVersion - 0 
/MemAcc/CommonPublishedInformation/VendorApiInfix -  
/MemAcc/CommonPublishedInformation/VendorId - 43 
/MemAcc/IMPLEMENTATION-CONFIG-VARIANT - VARIANT-PRE-COMPILE 
/MemAcc/MemAccAddressAreaConfiguration - MemAccAddressAreaConfiguration_0 
/MemAcc/MemAccAddressAreaConfiguration_0/Index - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccAddressAreaId - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccAddressAreaPriority - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccBufferAlignmentValue - 1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccJobEndNotificationName - Fee_JobEndNotification 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration - MemAccSubAddressAreaConfiguration_0 MemAccSubAddressAreaConfiguration_1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/Index - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccLogicalStartAddress - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccMemInvocation - INDIRECT_STATIC 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccMemNamePrefix - Mem_43_INFLS 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccNumberOfSectors - 1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccSectorBatchRef - /Mem_43_INFLS/Mem/MemInstance_1/MemSectorBatch_0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccSectorOffset - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccUseEraseBurst - false 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccUseReadBurst - false 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_0/MemAccUseWriteBurst - false 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/Index - 1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccLogicalStartAddress - 8192 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccMemInvocation - INDIRECT_STATIC 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccMemNamePrefix - Mem_43_INFLS 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccNumberOfSectors - 1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccSectorBatchRef - /Mem_43_INFLS/Mem/MemInstance_1/MemSectorBatch_1 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccSectorOffset - 0 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccUseEraseBurst - false 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccUseReadBurst - false 
/MemAcc/MemAccAddressAreaConfiguration_0/MemAccSubAddressAreaConfiguration_1/MemAccUseWriteBurst - false 
/MemAcc/MemAccGeneral - MemAccGeneral 
/MemAcc/MemAccGeneral/MemAcc64BitSupport - false 
/MemAcc/MemAccGeneral/MemAccCompareApi - false 
/MemAcc/MemAccGeneral/MemAccCompareBufferSize - 128 
/MemAcc/MemAccGeneral/MemAccDevErrorDetect - false 
/MemAcc/MemAccGeneral/MemAccMainFunctionPeriod - 0.0001 
/MemAcc/MemAccGeneral/MemAccTimeoutMethod - OSIF_COUNTER_DUMMY 
/MemAcc/MemAccGeneral/MemAccUseMemFuncPtrTable - false 
/MemAcc/POST_BUILD_VARIANT_USED - false 

*/
#define MW_DETAILS_MEMACC 
#define MW_OPEN_MEMACC 
#define MW_UPDATE_MEMACC 
#define MW_RESTORE_MEMACC 
#define MW_RESTORE_CONFIG 
#define MW_OPEN_HW 
#define MW_UPDATE_HW 
#define MW_TOOLSPATHS_BROWSES32CT 
#define MW_TOOLSPATHS_BROWSEEBT 
#define MW_TOOLSPATHS_BROWSERTD 
#define MW_TOOLSPATHS_BROWSES32DS 

#endif /* __MW_TARGET_HARDWARE_RESOURCES_H__ */

#endif

#endif
