/* * Copyright 2017-2019 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Pins v6.0 processor: LPC55S69 package_id: LPC55S69JBD100 mcu_data: ksdk2_0 processor_version: 0.0.0 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ #include "fsl_common.h" #include "fsl_iocon.h" #include "pin_mux.h" /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitBootPins * Description : Calls initialization functions. * * END ****************************************************************************************************************/ void BOARD_InitBootPins(void) { BOARD_InitPins(); SPI7_InitPins(); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPins: - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} - pin_list: - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29, mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ /* Function assigned for the Cortex-M33 (Core #0) */ void BOARD_InitPins(void) { /* Enables the clock for the I/O controller.: Enable Clock. */ CLOCK_EnableClock(kCLOCK_Iocon); const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */ IOCON_PIO_FUNC1 | /* No addition pin function */ IOCON_PIO_MODE_INACT | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */ IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config); const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */ IOCON_PIO_FUNC1 | /* No addition pin function */ IOCON_PIO_MODE_INACT | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */ IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config); #if 1 const uint32_t port1_pin5_config = (/* Pin is configured as PIO015 */ IOCON_PIO_FUNC1 | /* Selects pull-up function */ //IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT1 PIN5 (coords: 88) is configured as PIO0_5 */ IOCON_PinMuxSet(IOCON, 1U, 5U, port1_pin5_config); #endif } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* SPI7_InitPins: - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'} - pin_list: - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '4', peripheral: FLEXCOMM7, signal: RTS_SCL_SSEL1, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : SPI7_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ /* Function assigned for the Cortex-M33 (Core #0) */ void SPI7_InitPins(void) { /* Enables the clock for the I/O controller.: Enable Clock. */ CLOCK_EnableClock(kCLOCK_Iocon); const uint32_t port0_pin19_config = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */ IOCON_PIO_FUNC7 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */ IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config); const uint32_t port0_pin20_config = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */ IOCON_PIO_FUNC7 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */ IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config); const uint32_t port0_pin21_config = (/* Pin is configured as FC7_SCK */ IOCON_PIO_FUNC7 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */ IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config); const uint32_t port1_pin20_config = (/* Pin is configured as FC7_RTS_SCL_SSEL1 */ IOCON_PIO_FUNC1 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT1 PIN20 (coords: 4) is configured as FC7_RTS_SCL_SSEL1 */ IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* SPI7_DeinitPins: - options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'} - pin_list: - {pin_num: '90', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '74', peripheral: GPIO, signal: 'PIO0, 20', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '76', peripheral: GPIO, signal: 'PIO0, 21', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} - {pin_num: '4', peripheral: GPIO, signal: 'PIO1, 20', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : SPI7_DeinitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ /* Function assigned for the Cortex-M33 (Core #0) */ void SPI7_DeinitPins(void) { /* Enables the clock for the I/O controller.: Enable Clock. */ CLOCK_EnableClock(kCLOCK_Iocon); const uint32_t port0_pin19_config = (/* Pin is configured as PIO0_19 */ IOCON_PIO_FUNC0 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN19 (coords: 90) is configured as PIO0_19 */ IOCON_PinMuxSet(IOCON, 0U, 19U, port0_pin19_config); const uint32_t port0_pin20_config = (/* Pin is configured as PIO0_20 */ IOCON_PIO_FUNC0 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN20 (coords: 74) is configured as PIO0_20 */ IOCON_PinMuxSet(IOCON, 0U, 20U, port0_pin20_config); const uint32_t port0_pin21_config = (/* Pin is configured as PIO0_21 */ IOCON_PIO_FUNC0 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT0 PIN21 (coords: 76) is configured as PIO0_21 */ IOCON_PinMuxSet(IOCON, 0U, 21U, port0_pin21_config); const uint32_t port1_pin20_config = (/* Pin is configured as PIO1_20 */ IOCON_PIO_FUNC0 | /* Selects pull-up function */ IOCON_PIO_MODE_PULLUP | /* Standard mode, output slew rate control is enabled */ IOCON_PIO_SLEW_STANDARD | /* Input function is not inverted */ IOCON_PIO_INV_DI | /* Enables digital function */ IOCON_PIO_DIGITAL_EN | /* Open drain is disabled */ IOCON_PIO_OPENDRAIN_DI); /* PORT1 PIN20 (coords: 4) is configured as PIO1_20 */ IOCON_PinMuxSet(IOCON, 1U, 20U, port1_pin20_config); } /*********************************************************************************************************************** * EOF **********************************************************************************************************************/