/* * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /* FreeRTOS kernel includes. */ #include "FreeRTOS.h" #include "task.h" #include "queue.h" #include "timers.h" /* Freescale includes. */ #include "fsl_device_registers.h" #include "fsl_debug_console.h" #include "fsl_dspi.h" #include "fsl_dspi_freertos.h" #include "pin_mux.h" #include "clock_config.h" #include "board.h" #include "fsl_common.h" /******************************************************************************* * Definitions ******************************************************************************/ #define EXAMPLE_DSPI_MASTER_BASE (SPI1_BASE) #define EXAMPLE_DSPI_MASTER_IRQN (SPI1_IRQn) #define DSPI_MASTER_CLK_SRC (DSPI1_CLK_SRC) #define DSPI_MASTER_CLK_FREQ CLOCK_GetFreq((DSPI1_CLK_SRC)) #define EXAMPLE_DSPI_SLAVE_BASE (SPI0_BASE) #define EXAMPLE_DSPI_SLAVE_IRQN (SPI0_IRQn) #define SINGLE_BOARD 0 #define BOARD_TO_BOARD 1 #define EXAMPLE_CONNECT_DSPI SINGLE_BOARD #if (EXAMPLE_CONNECT_DSPI == BOARD_TO_BOARD) #define isMASTER 0 #define isSLAVE 1 #define SPI_MASTER_SLAVE isMASTER #endif #define EXAMPLE_DSPI_MASTER_BASEADDR ((SPI_Type *)EXAMPLE_DSPI_MASTER_BASE) #define EXAMPLE_DSPI_SLAVE_BASEADDR ((SPI_Type *)EXAMPLE_DSPI_SLAVE_BASE) #define TRANSFER_SIZE (10) /*! Transfer size */ #define TRANSFER_BAUDRATE (500000U) /*! Transfer baudrate - 500k */ /******************************************************************************* * Variables ******************************************************************************/ uint8_t masterReceiveBuffer[TRANSFER_SIZE] = {0}; uint8_t masterSendBuffer[TRANSFER_SIZE] = {0}; uint8_t slaveReceiveBuffer[TRANSFER_SIZE] = {0}; uint8_t slaveSendBuffer[TRANSFER_SIZE] = {0}; dspi_slave_handle_t g_s_handle; SemaphoreHandle_t dspi_sem; /******************************************************************************* * Definitions ******************************************************************************/ /* Task priorities. */ #define slave_task_PRIORITY (configMAX_PRIORITIES - 2) #define master_task_PRIORITY (configMAX_PRIORITIES - 1) /* Interrupt priorities. */ #define DSPI_NVIC_PRIO 2 /******************************************************************************* * Prototypes ******************************************************************************/ static void slave_task(void *pvParameters); #if ((SPI_MASTER_SLAVE == isMaster) || (EXAMPLE_CONNECT_DSPI == SINGLE_BOARD)) static void master_task(void *pvParameters); #endif /******************************************************************************* * Code ******************************************************************************/ /*! * @brief Application entry point. */ int main(void) { /* Init board hardware. */ BOARD_InitBootPins(); BOARD_InitBootClocks(); BOARD_InitDebugConsole(); /* Set interrupt priorities */ NVIC_SetPriority(EXAMPLE_DSPI_SLAVE_IRQN, 2); NVIC_SetPriority(EXAMPLE_DSPI_MASTER_IRQN, 3); PRINTF("FreeRTOS DSPI Write Test Start.\r\n This Code is tested for SPI communication \n able to transfer/receive data \n between AUX_BOARD \r\n"); #if (EXAMPLE_CONNECT_DSPI == SINGLE_BOARD) // PRINTF("This example use one dspi instance as master and another as slave on one board.\r\n"); PRINTF("This example use one dspi instance as master and as slave on one board.\r\n"); #elif (EXAMPLE_CONNECT_DSPI == BOARD_TO_BOARD) PRINTF("This example use two boards to connect with one as master and another as slave.\r\n"); #endif if (xTaskCreate(master_task, "Master_task", configMINIMAL_STACK_SIZE + 100, NULL, master_task_PRIORITY, NULL) != pdPASS) { PRINTF("Failed to create slave task"); while (1) ; vTaskSuspend(NULL); } vTaskStartScheduler(); for (;;) ; } /*! * @brief Task responsible for master SPI communication. */ #if ((SPI_MASTER_SLAVE == isMaster) || (EXAMPLE_CONNECT_DSPI == SINGLE_BOARD)) static void master_task(void *pvParameters) { dspi_transfer_t masterXfer; dspi_16bittransfer_t masterXfer_2; dspi_rtos_handle_t master_rtos_handle; dspi_master_config_t masterConfig; // uint32_t sourceClock; status_t status; uint32_t i, adcData[100] = {0}; /*Master RTOS config*/ masterConfig.whichCtar = kDSPI_Ctar0; masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE; masterConfig.ctarConfig.bitsPerFrame = 8; masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh; masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; masterConfig.ctarConfig.direction = kDSPI_MsbFirst; masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 500; masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 500; masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000; masterConfig.whichPcs = kDSPI_Pcs0; // masterConfig.whichPcs = kDSPI_Pcs1; masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow; masterConfig.enableContinuousSCK = false; masterConfig.enableRxFifoOverWrite = false; masterConfig.enableModifiedTimingFormat = false; masterConfig.samplePoint = kDSPI_SckToSin0Clock; // sourceClock = DSPI_MASTER_CLK_FREQ; status = DSPI_RTOS_Init(&master_rtos_handle, EXAMPLE_DSPI_MASTER_BASEADDR, &masterConfig, DSPI_MASTER_CLK_FREQ); if (status != kStatus_Success) { PRINTF("DSPI master: error during initialization. \r\n"); vTaskSuspend(NULL); } // /*Initialize transfer data*/ masterSendBuffer[0] = 0x40; //Instruction Register 0x40 = 010x xxx0 masterSendBuffer[1] = 0x01; //Gain Register 0x01 = xxxx x001 /**************************************/ /*Start master transfer*/ masterXfer.txData = masterSendBuffer; masterXfer.rxData = NULL; masterXfer.dataSize = 2U; masterXfer.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 | kDSPI_MasterPcsContinuous; status = DSPI_RTOS_Transfer(&master_rtos_handle, &masterXfer); if (status == kStatus_Success) { #if (EXAMPLE_CONNECT_DSPI == BOARD_TO_BOARD) xSemaphoreGive(dspi_sem); #endif PRINTF("DSPI master data successfully transfered to Slave. \r\n\r\n"); } else { PRINTF("DSPI master transfer completed with error. \r\n\r\n"); } /*Set up transfer data*/ for (i = 0; i < TRANSFER_SIZE; i++) { masterSendBuffer[i] = i % 256; masterReceiveBuffer[i] = 0; } // /*Master config*/ masterConfig.whichCtar = kDSPI_Ctar1; masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE; masterConfig.ctarConfig.bitsPerFrame = 16U; masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh; masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge; masterConfig.ctarConfig.direction = kDSPI_MsbFirst; masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 500;//was 2000 masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 500;//was 2000 masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000;//was 1000 // masterConfig.whichPcs = kDSPI_Pcs0; masterConfig.whichPcs = kDSPI_Pcs1; masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow; masterConfig.enableContinuousSCK = false; masterConfig.enableRxFifoOverWrite = false; masterConfig.enableModifiedTimingFormat = false; masterConfig.samplePoint = kDSPI_SckToSin0Clock; // DSPI_MasterInit(EXAMPLE_DSPI_MASTER_BASEADDR, &masterConfig, DSPI_MASTER_CLK_FREQ); status = DSPI_RTOS_Init(&master_rtos_handle, EXAMPLE_DSPI_MASTER_BASEADDR, &masterConfig, DSPI_MASTER_CLK_FREQ); if (status != kStatus_Success) { PRINTF("DSPI master: error during initialization. \r\n"); vTaskSuspend(NULL); } //// /**************************************/ //// /*Start master receive*/ masterXfer.txData = masterSendBuffer; masterXfer.rxData = masterReceiveBuffer; masterXfer.dataSize = TRANSFER_SIZE; masterXfer.configFlags = kDSPI_MasterCtar1/**/ | kDSPI_MasterPcs1 | kDSPI_MasterActiveAfterTransfer; status = DSPI_RTOS_Transfer(&master_rtos_handle, &masterXfer);//This function edited in fsl_dspi.h //dsl_dspi_freertos.h //fsl_dspi_freertos.c if (status == kStatus_Success) { PRINTF("DSPI data successfully transfered. \r\n\r\n"); for (i = 0; i