/* * Copyright (c) 2015, Freescale Semiconductor, Inc. * Copyright 2016-2017 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include "pin_mux.h" #include "clock_config.h" #include "board.h" #include "fsl_lpuart_edma.h" #if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT #include "fsl_dmamux.h" #endif /******************************************************************************* * Definitions ******************************************************************************/ #define DEMO_LPUART LPUART3 #define DEMO_LPUART_CLK_FREQ BOARD_DebugConsoleSrcFreq() #define LPUART_TX_DMA_CHANNEL 0U #define LPUART_RX_DMA_CHANNEL 1U #define LPI2C_TRANSMIT_DMA_CHANNEL 2U #define LPI2C_RECEIVE_DMA_CHANNEL 3U #define LPUART_TX_DMA_REQUEST kDmaRequestMuxLPUART3Tx #define LPUART_RX_DMA_REQUEST kDmaRequestMuxLPUART3Rx #define EXAMPLE_LPUART_DMAMUX_BASEADDR DMAMUX #define EXAMPLE_LPUART_DMA_BASEADDR DMA0 #define ECHO_BUFFER_LENGTH 8 /******************************************************************************* * Prototypes ******************************************************************************/ /* LPUART user callback */ void LPUART_UserCallback(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData); /******************************************************************************* * Variables ******************************************************************************/ lpuart_edma_handle_t g_lpuartEdmaHandle; edma_handle_t g_lpuartTxEdmaHandle; edma_handle_t g_lpuartRxEdmaHandle; AT_NONCACHEABLE_SECTION_INIT(uint8_t g_tipString[]) = "LPUART EDMA example\r\nSend back received data\r\nEcho every 8 characters\r\n"; AT_NONCACHEABLE_SECTION_INIT(uint8_t g_txBuffer[52]) = {0x23,00,00,00,0x28,00,00,00,0x01,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,00,0x3B,0xF7,0x23,0x5D}; AT_NONCACHEABLE_SECTION_INIT(uint8_t g_rxBuffer[32]) = {0}; volatile bool rxBufferEmpty = true; volatile bool txBufferFull = false; volatile bool txOnGoing = false; volatile bool rxOnGoing = false; /******************************************************************************* * Code ******************************************************************************/ /* LPUART user callback */ void LPUART_UserCallback(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData) { userData = userData; if (kStatus_LPUART_TxIdle == status) { txBufferFull = false; txOnGoing = false; } if (kStatus_LPUART_RxIdle == status) { rxBufferEmpty = false; rxOnGoing = false; } } /*! * @brief Main function */ int main(void) { lpuart_config_t lpuartConfig; lpuart_transfer_t xfer; lpuart_transfer_t sendXfer; lpuart_transfer_t receiveXfer; edma_config_t userConfig = {0}; uint32_t uiCnt = 0; BOARD_ConfigMPU(); BOARD_InitBootPins(); BOARD_InitBootClocks(); /* Initialize the LPUART. */ /* * lpuartConfig.baudRate_Bps = 115200U; * lpuartConfig.parityMode = kLPUART_ParityDisabled; * lpuartConfig.stopBitCount = kLPUART_OneStopBit; * lpuartConfig.txFifoWatermark = 0; * lpuartConfig.rxFifoWatermark = 0; * lpuartConfig.enableTx = false; * lpuartConfig.enableRx = false; */ LPUART_GetDefaultConfig(&lpuartConfig); lpuartConfig.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE; lpuartConfig.enableTx = true; lpuartConfig.enableRx = true; LPUART_Init(DEMO_LPUART, &lpuartConfig, DEMO_LPUART_CLK_FREQ); #if defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT /* Init DMAMUX */ DMAMUX_Init(EXAMPLE_LPUART_DMAMUX_BASEADDR); /* Set channel for LPUART */ DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL, LPUART_TX_DMA_REQUEST); DMAMUX_SetSource(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL, LPUART_RX_DMA_REQUEST); DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_TX_DMA_CHANNEL); DMAMUX_EnableChannel(EXAMPLE_LPUART_DMAMUX_BASEADDR, LPUART_RX_DMA_CHANNEL); #endif /* Init the EDMA module */ EDMA_GetDefaultConfig(&userConfig); #if defined(BOARD_GetEDMAConfig) BOARD_GetEDMAConfig(userConfig); #endif EDMA_Init(EXAMPLE_LPUART_DMA_BASEADDR, &userConfig); EDMA_CreateHandle(&g_lpuartTxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_TX_DMA_CHANNEL); EDMA_CreateHandle(&g_lpuartRxEdmaHandle, EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL); #if defined(FSL_FEATURE_EDMA_HAS_CHANNEL_MUX) && FSL_FEATURE_EDMA_HAS_CHANNEL_MUX EDMA_SetChannelMux(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_TX_DMA_CHANNEL, DEMO_LPUART_TX_EDMA_CHANNEL); EDMA_SetChannelMux(EXAMPLE_LPUART_DMA_BASEADDR, LPUART_RX_DMA_CHANNEL, DEMO_LPUART_RX_EDMA_CHANNEL); #endif /* Create LPUART DMA handle. */ LPUART_TransferCreateHandleEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, LPUART_UserCallback, NULL, &g_lpuartTxEdmaHandle, &g_lpuartRxEdmaHandle); /* Start to echo. */ char buff[100]; // LPUART_SendEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &sendXfer); // // /* Wait send finished */ // while (txOnGoing) // { // } /* Start to echo. */ sendXfer.data = g_txBuffer; sendXfer.dataSize = 52; receiveXfer.data = g_rxBuffer; receiveXfer.dataSize = 32; while (1) { // /* If RX is idle and g_rxBuffer is empty, start to read data to g_rxBuffer. */ // if ((!rxOnGoing) && (rxBufferEmpty)) // { // memset(buff,0x00,100); // memset(g_rxBuffer,0x00,32); // rxOnGoing = true; // LPUART_ReceiveEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &receiveXfer); // // } // sendXfer.data[0] = uiCnt++; if ((!txOnGoing) && (!txBufferFull)) { txOnGoing = true; LPUART_SendEDMA(DEMO_LPUART, &g_lpuartEdmaHandle, &sendXfer); /* Wait send finished */ while (txOnGoing) { } } } }