Callisto4Bootloader: CMSIS Core Instruction Interface

Callisto4Bootloader

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CMSIS Core Instruction Interface
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » Floating Point Unit (FPU) » Core Debug Registers (CoreDebug) » Core register bit field macros » Core Definitions » Functions and Instructions Reference » CMSIS Core Register Access Functions

Access to dedicated instructions. More...

## Modules

| CMSIS SIMD Intrinsics
| Access to dedicated SIMD instructions.

## Macros

#define | __NOP __nop
| No Operation. More...
#define | __WFI __wfi
| Wait For Interrupt. More...
#define | __WFE __wfe
| Wait For Event. More...
#define | __SEV __sev
| Send Event. More...
#define | __ISB()
| Instruction Synchronization Barrier. More...
#define | __DSB()
| Data Synchronization Barrier. More...
#define | __DMB()
| Data Memory Barrier. More...
#define | __REV __rev
| Reverse byte order (32 bit) More...
#define | __ROR __ror
| Rotate Right in unsigned value (32 bit) More...
#define | __BKPT(value) __breakpoint(value)
| Breakpoint. More...
#define | __CLZ __clz
| Count leading zeros. More...
#define | __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define | __CMSIS_GCC_RW_REG(r) "+r" (r)
#define | __CMSIS_GCC_USE_REG(r) "r" (r)
#define | __NOP __builtin_arm_nop
| No Operation. More...
#define | __WFI __builtin_arm_wfi
| Wait For Interrupt. More...
#define | __WFE __builtin_arm_wfe
| Wait For Event. More...
#define | __SEV __builtin_arm_sev
| Send Event. More...
#define | __ISB() __builtin_arm_isb(0xF)
| Instruction Synchronization Barrier. More...
#define | __DSB() __builtin_arm_dsb(0xF)
| Data Synchronization Barrier. More...
#define | __DMB() __builtin_arm_dmb(0xF)
| Data Memory Barrier. More...
#define | __REV(value) __builtin_bswap32(value)
| Reverse byte order (32 bit) More...
#define | __REV16(value) __ROR(__REV(value), 16)
| Reverse byte order (16 bit) More...
#define | __REVSH(value) (int16_t)__builtin_bswap16(value)
| Reverse byte order (16 bit) More...
#define | __BKPT(value) __ASM volatile ("bkpt "#value)
| Breakpoint. More...
#define | __RBIT __builtin_arm_rbit
| Reverse bit order of value. More...
#define | __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define | __CMSIS_GCC_USE_REG(r) "r" (r)
#define | __NOP __builtin_arm_nop
| No Operation. More...
#define | __WFI __builtin_arm_wfi
| Wait For Interrupt. More...
#define | __WFE __builtin_arm_wfe
| Wait For Event. More...
#define | __SEV __builtin_arm_sev
| Send Event. More...
#define | __ISB() __builtin_arm_isb(0xF)
| Instruction Synchronization Barrier. More...
#define | __DSB() __builtin_arm_dsb(0xF)
| Data Synchronization Barrier. More...
#define | __DMB() __builtin_arm_dmb(0xF)
| Data Memory Barrier. More...
#define | __REV(value) __builtin_bswap32(value)
| Reverse byte order (32 bit) More...
#define | __REV16(value) __ROR(__REV(value), 16)
| Reverse byte order (16 bit) More...
#define | __REVSH(value) (int16_t)__builtin_bswap16(value)
| Reverse byte order (16 bit) More...
#define | __BKPT(value) __ASM volatile ("bkpt "#value)
| Breakpoint. More...
#define | __RBIT __builtin_arm_rbit
| Reverse bit order of value. More...
#define | __CMSIS_GCC_OUT_REG(r) "=r" (r)
#define | __CMSIS_GCC_RW_REG(r) "+r" (r)
#define | __CMSIS_GCC_USE_REG(r) "r" (r)
#define | __NOP() __ASM volatile ("nop")
| No Operation. More...
#define | __WFI() __ASM volatile ("wfi")
| Wait For Interrupt. More...
#define | __WFE() __ASM volatile ("wfe")
| Wait For Event. More...
#define | __SEV() __ASM volatile ("sev")
| Send Event. More...
#define | __BKPT(value) __ASM volatile ("bkpt "#value)
| Breakpoint. More...

## Functions

| __attribute__ ((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
| Reverse byte order (16 bit) More...
| __attribute__ ((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
| Reverse byte order (16 bit) More...
| __attribute__ ((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
| Reverse bit order of value. More...
__STATIC_FORCEINLINE uint32_t | __ROR (uint32_t op1, uint32_t op2)
| Rotate Right in unsigned value (32 bit) More...
__STATIC_FORCEINLINE uint8_t | __CLZ (uint32_t value)
| Count leading zeros. More...
__STATIC_FORCEINLINE int32_t | __SSAT (int32_t val, uint32_t sat)
| Signed Saturate. More...
__STATIC_FORCEINLINE uint32_t | __USAT (int32_t val, uint32_t sat)
| Unsigned Saturate. More...
__STATIC_FORCEINLINE void | __ISB (void)
| Instruction Synchronization Barrier. More...
__STATIC_FORCEINLINE void | __DSB (void)
| Data Synchronization Barrier. More...
__STATIC_FORCEINLINE void | __DMB (void)
| Data Memory Barrier. More...
__STATIC_FORCEINLINE uint32_t | __REV (uint32_t value)
| Reverse byte order (32 bit) More...
__STATIC_FORCEINLINE uint32_t | __REV16 (uint32_t value)
| Reverse byte order (16 bit) More...
__STATIC_FORCEINLINE int16_t | __REVSH (int16_t value)
| Reverse byte order (16 bit) More...
__STATIC_FORCEINLINE uint32_t | __RBIT (uint32_t value)
| Reverse bit order of value. More...

## Variables

uint32_t | sat

## Detailed Description

Access to dedicated instructions.

## Macro Definition Documentation

## ◆ __BKPT [1/4]

#define __BKPT | ( |  | value | ) | __breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

  [in] | value | is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 507 of file cmsis_armcc.h.

## ◆ __BKPT [2/4]

#define __BKPT | ( |  | value | ) | __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

  [in] | value | is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 894 of file cmsis_armclang_ltm.h.

## ◆ __BKPT [3/4]

#define __BKPT | ( |  | value | ) | __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

  [in] | value | is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 896 of file cmsis_armclang.h.

## ◆ __BKPT [4/4]

#define __BKPT | ( |  | value | ) | __ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

  [in] | value | is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 972 of file cmsis_gcc.h.

## ◆ __CLZ

#define __CLZ __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

  [in] | value | Value to count the leading zeros

Returns
  number of leading zeros in value

Definition at line 544 of file cmsis_armcc.h.

## ◆ __CMSIS_GCC_OUT_REG [1/3]

#define __CMSIS_GCC_OUT_REG | ( |  | r | ) | "=r" (r)

Definition at line 786 of file cmsis_armclang_ltm.h.

## ◆ __CMSIS_GCC_OUT_REG [2/3]

#define __CMSIS_GCC_OUT_REG | ( |  | r | ) | "=r" (r)

Definition at line 787 of file cmsis_armclang.h.

## ◆ __CMSIS_GCC_OUT_REG [3/3]

#define __CMSIS_GCC_OUT_REG | ( |  | r | ) | "=r" (r)

Definition at line 827 of file cmsis_gcc.h.

## ◆ __CMSIS_GCC_RW_REG [1/2]

#define __CMSIS_GCC_RW_REG | ( |  | r | ) | "+r" (r)

Definition at line 788 of file cmsis_armclang.h.

## ◆ __CMSIS_GCC_RW_REG [2/2]

#define __CMSIS_GCC_RW_REG | ( |  | r | ) | "+r" (r)

Definition at line 828 of file cmsis_gcc.h.

## ◆ __CMSIS_GCC_USE_REG [1/3]

#define __CMSIS_GCC_USE_REG | ( |  | r | ) | "r" (r)

Definition at line 787 of file cmsis_armclang_ltm.h.

## ◆ __CMSIS_GCC_USE_REG [2/3]

#define __CMSIS_GCC_USE_REG | ( |  | r | ) | "r" (r)

Definition at line 789 of file cmsis_armclang.h.

## ◆ __CMSIS_GCC_USE_REG [3/3]

#define __CMSIS_GCC_USE_REG | ( |  | r | ) | "r" (r)

Definition at line 829 of file cmsis_gcc.h.

## ◆ __DMB [1/3]

#define __DMB | ( |  | void | ) |

Value:
do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 444 of file cmsis_armcc.h.

## ◆ __DMB [2/3]

#define __DMB | ( |  | void | ) | __builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 839 of file cmsis_armclang_ltm.h.

## ◆ __DMB [3/3]

#define __DMB | ( |  | void | ) | __builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 841 of file cmsis_armclang.h.

## ◆ __DSB [1/3]

#define __DSB | ( |  | void | ) |

Value:
do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 433 of file cmsis_armcc.h.

## ◆ __DSB [2/3]

#define __DSB | ( |  | void | ) | __builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 831 of file cmsis_armclang_ltm.h.

## ◆ __DSB [3/3]

#define __DSB | ( |  | void | ) | __builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 833 of file cmsis_armclang.h.

## ◆ __ISB [1/3]

#define __ISB | ( |  | void | ) |

Value:
do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 422 of file cmsis_armcc.h.

## ◆ __ISB [2/3]

#define __ISB | ( |  | void | ) | __builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 824 of file cmsis_armclang_ltm.h.

## ◆ __ISB [3/3]

#define __ISB | ( |  | void | ) | __builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 826 of file cmsis_armclang.h.

## ◆ __NOP [1/4]

#define __NOP | ( |  | ) | __ASM volatile ("nop")

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 836 of file cmsis_gcc.h.

## ◆ __NOP [2/4]

#define __NOP __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 391 of file cmsis_armcc.h.

## ◆ __NOP [3/4]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 794 of file cmsis_armclang_ltm.h.

## ◆ __NOP [4/4]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 796 of file cmsis_armclang.h.

## ◆ __RBIT [1/2]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 903 of file cmsis_armclang_ltm.h.

## ◆ __RBIT [2/2]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 905 of file cmsis_armclang.h.

## ◆ __REV [1/3]

#define __REV | ( |  | value | ) | __builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 848 of file cmsis_armclang_ltm.h.

## ◆ __REV [2/3]

#define __REV | ( |  | value | ) | __builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 850 of file cmsis_armclang.h.

## ◆ __REV [3/3]

#define __REV __rev

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 457 of file cmsis_armcc.h.

## ◆ __REV16 [1/2]

#define __REV16 | ( |  | value | ) | __ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 857 of file cmsis_armclang_ltm.h.

## ◆ __REV16 [2/2]

#define __REV16 | ( |  | value | ) | __ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 859 of file cmsis_armclang.h.

## ◆ __REVSH [1/2]

#define __REVSH | ( |  | value | ) | (int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 866 of file cmsis_armclang_ltm.h.

## ◆ __REVSH [2/2]

#define __REVSH | ( |  | value | ) | (int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 868 of file cmsis_armclang.h.

## ◆ __ROR

#define __ROR __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

  [in] | op1 | Value to rotate
  [in] | op2 | Number of Bits to rotate

Returns
  Rotated value

Definition at line 497 of file cmsis_armcc.h.

## ◆ __SEV [1/4]

#define __SEV | ( |  | ) | __ASM volatile ("sev")

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 857 of file cmsis_gcc.h.

## ◆ __SEV [2/4]

#define __SEV __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 413 of file cmsis_armcc.h.

## ◆ __SEV [3/4]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 815 of file cmsis_armclang_ltm.h.

## ◆ __SEV [4/4]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 817 of file cmsis_armclang.h.

## ◆ __WFE [1/4]

#define __WFE | ( |  | ) | __ASM volatile ("wfe")

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 850 of file cmsis_gcc.h.

## ◆ __WFE [2/4]

#define __WFE __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 406 of file cmsis_armcc.h.

## ◆ __WFE [3/4]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 808 of file cmsis_armclang_ltm.h.

## ◆ __WFE [4/4]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 810 of file cmsis_armclang.h.

## ◆ __WFI [1/4]

#define __WFI | ( |  | ) | __ASM volatile ("wfi")

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 842 of file cmsis_gcc.h.

## ◆ __WFI [2/4]

#define __WFI __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 398 of file cmsis_armcc.h.

## ◆ __WFI [3/4]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 800 of file cmsis_armclang_ltm.h.

## ◆ __WFI [4/4]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 802 of file cmsis_armclang.h.

## Function Documentation

## ◆ __attribute__() [1/3]

__attribute__ | ( | (always_inline) |  | ) |

Reverse bit order of value.

Unsigned Saturate.

Signed Saturate.

Reverses the bit order of the given value.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Saturates a signed value.

Parameters

  [in] | value | Value to be saturated
  [in] | sat | Bit position to saturate to (1..32)

Returns
  Saturated value

Saturates an unsigned value.

Parameters

  [in] | value | Value to be saturated
  [in] | sat | Bit position to saturate to (0..31)

Returns
  Saturated value

Definition at line 520 of file cmsis_armcc.h.

## ◆ __attribute__() [2/3]

__attribute__ | ( | (section(".rev16_text")) |  | ) |

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 467 of file cmsis_armcc.h.

## ◆ __attribute__() [3/3]

__attribute__ | ( | (section(".revsh_text")) |  | ) |

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 482 of file cmsis_armcc.h.

## ◆ __CLZ()

__STATIC_FORCEINLINE uint8_t __CLZ | ( | uint32_t | value | ) |

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

  [in] | value | Value to count the leading zeros

Returns
  number of leading zeros in value

Definition at line 913 of file cmsis_armclang.h.

## ◆ __DMB()

__STATIC_FORCEINLINE void __DMB | ( | void |  | ) |

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 888 of file cmsis_gcc.h.

References __ASM.

## ◆ __DSB()

__STATIC_FORCEINLINE void __DSB | ( | void |  | ) |

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 877 of file cmsis_gcc.h.

References __ASM.

## ◆ __ISB()

__STATIC_FORCEINLINE void __ISB | ( | void |  | ) |

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 866 of file cmsis_gcc.h.

References __ASM.

## ◆ __RBIT()

__STATIC_FORCEINLINE uint32_t __RBIT | ( | uint32_t | value | ) |

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 981 of file cmsis_gcc.h.

References __ASM.

## ◆ __REV()

__STATIC_FORCEINLINE uint32_t __REV | ( | uint32_t | value | ) |

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 900 of file cmsis_gcc.h.

References __ASM, __CMSIS_GCC_OUT_REG, and __CMSIS_GCC_USE_REG.

## ◆ __REV16()

__STATIC_FORCEINLINE uint32_t __REV16 | ( | uint32_t | value | ) |

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 919 of file cmsis_gcc.h.

References __ASM, __CMSIS_GCC_OUT_REG, and __CMSIS_GCC_USE_REG.

## ◆ __REVSH()

__STATIC_FORCEINLINE int16_t __REVSH | ( | int16_t | value | ) |

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

  [in] | value | Value to reverse

Returns
  Reversed value

Definition at line 934 of file cmsis_gcc.h.

References __ASM, __CMSIS_GCC_OUT_REG, and __CMSIS_GCC_USE_REG.

## ◆ __ROR()

__STATIC_FORCEINLINE uint32_t __ROR | ( | uint32_t | op1,
|  | uint32_t | op2
| ) |  |

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

  [in] | op1 | Value to rotate
  [in] | op2 | Number of Bits to rotate

Returns
  Rotated value

Definition at line 878 of file cmsis_armclang.h.

## ◆ __SSAT()

__STATIC_FORCEINLINE int32_t __SSAT | ( | int32_t | val,
|  | uint32_t | sat
| ) |  |

Signed Saturate.

Saturates a signed value.

Parameters

  [in] | value | Value to be saturated
  [in] | sat | Bit position to saturate to (1..32)

Returns
  Saturated value

Definition at line 1139 of file cmsis_armclang.h.

References max, min, and sat.

Referenced by __QADD16(), __QADD8(), __QASX(), __QSAX(), __QSUB16(), and __QSUB8().

## ◆ __USAT()

__STATIC_FORCEINLINE uint32_t __USAT | ( | int32_t | val,
|  | uint32_t | sat
| ) |  |

Unsigned Saturate.

Saturates an unsigned value.

Parameters

  [in] | value | Value to be saturated
  [in] | sat | Bit position to saturate to (0..31)

Returns
  Saturated value

Definition at line 1164 of file cmsis_armclang.h.

References max, and sat.

## Variable Documentation

## ◆ sat

uint32_t sat

Initial value:
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val

Definition at line 741 of file cmsis_armcc.h.

Referenced by __SSAT(), and __USAT().

sat
uint32_t sat
Definition: cmsis_armcc.h:741
min
#define min(a, b)
Minimum.
Definition: c4_qspi.h:41
max
#define max(a, b)
Maximum.
Definition: c4_qspi.h:26