Callisto4Bootloader: LPSPI Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
LPSPI Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| LPSPI Register Masks

## Data Structures

struct | LPSPI_Type

## Macros

#define | LPSPI1_BASE (0x40394000u)
#define | LPSPI1 ((LPSPI_Type *)LPSPI1_BASE)
#define | LPSPI2_BASE (0x40398000u)
#define | LPSPI2 ((LPSPI_Type *)LPSPI2_BASE)
#define | LPSPI3_BASE (0x4039C000u)
#define | LPSPI3 ((LPSPI_Type *)LPSPI3_BASE)
#define | LPSPI4_BASE (0x403A0000u)
#define | LPSPI4 ((LPSPI_Type *)LPSPI4_BASE)
#define | LPSPI_BASE_ADDRS { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }
#define | LPSPI_BASE_PTRS { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }
#define | LPSPI_IRQS { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }

## Detailed Description

## Macro Definition Documentation

## ◆ LPSPI1

#define LPSPI1 ((LPSPI_Type *)LPSPI1_BASE)

Peripheral LPSPI1 base pointer

Definition at line 28316 of file MIMXRT1062.h.

## ◆ LPSPI1_BASE

#define LPSPI1_BASE (0x40394000u)

Peripheral LPSPI1 base address

Definition at line 28314 of file MIMXRT1062.h.

## ◆ LPSPI2

#define LPSPI2 ((LPSPI_Type *)LPSPI2_BASE)

Peripheral LPSPI2 base pointer

Definition at line 28320 of file MIMXRT1062.h.

## ◆ LPSPI2_BASE

#define LPSPI2_BASE (0x40398000u)

Peripheral LPSPI2 base address

Definition at line 28318 of file MIMXRT1062.h.

## ◆ LPSPI3

#define LPSPI3 ((LPSPI_Type *)LPSPI3_BASE)

Peripheral LPSPI3 base pointer

Definition at line 28324 of file MIMXRT1062.h.

## ◆ LPSPI3_BASE

#define LPSPI3_BASE (0x4039C000u)

Peripheral LPSPI3 base address

Definition at line 28322 of file MIMXRT1062.h.

## ◆ LPSPI4

#define LPSPI4 ((LPSPI_Type *)LPSPI4_BASE)

Peripheral LPSPI4 base pointer

Definition at line 28328 of file MIMXRT1062.h.

## ◆ LPSPI4_BASE

#define LPSPI4_BASE (0x403A0000u)

Peripheral LPSPI4 base address

Definition at line 28326 of file MIMXRT1062.h.

## ◆ LPSPI_BASE_ADDRS

#define LPSPI_BASE_ADDRS { 0u, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BASE, LPSPI4_BASE }

Array initializer of LPSPI peripheral base addresses

Definition at line 28330 of file MIMXRT1062.h.

## ◆ LPSPI_BASE_PTRS

#define LPSPI_BASE_PTRS { (LPSPI_Type *)0u, LPSPI1, LPSPI2, LPSPI3, LPSPI4 }

Array initializer of LPSPI peripheral base pointers

Definition at line 28332 of file MIMXRT1062.h.

## ◆ LPSPI_IRQS

#define LPSPI_IRQS { NotAvail_IRQn, LPSPI1_IRQn, LPSPI2_IRQn, LPSPI3_IRQn, LPSPI4_IRQn }

Interrupt vectors for the LPSPI peripheral type

Definition at line 28334 of file MIMXRT1062.h.