Callisto4Bootloader: LPUART Register Masks

Callisto4Bootloader

LPUART Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » LPUART Peripheral Access Layer

## VERID - Version ID Register

#define | LPUART_VERID_FEATURE_MASK (0xFFFFU)
#define | LPUART_VERID_FEATURE_SHIFT (0U)
#define | LPUART_VERID_FEATURE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)
#define | LPUART_VERID_MINOR_MASK (0xFF0000U)
#define | LPUART_VERID_MINOR_SHIFT (16U)
#define | LPUART_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)
#define | LPUART_VERID_MAJOR_MASK (0xFF000000U)
#define | LPUART_VERID_MAJOR_SHIFT (24U)
#define | LPUART_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)

## PARAM - Parameter Register

#define | LPUART_PARAM_TXFIFO_MASK (0xFFU)
#define | LPUART_PARAM_TXFIFO_SHIFT (0U)
#define | LPUART_PARAM_TXFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)
#define | LPUART_PARAM_RXFIFO_MASK (0xFF00U)
#define | LPUART_PARAM_RXFIFO_SHIFT (8U)
#define | LPUART_PARAM_RXFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)

## GLOBAL - LPUART Global Register

#define | LPUART_GLOBAL_RST_MASK (0x2U)
#define | LPUART_GLOBAL_RST_SHIFT (1U)
#define | LPUART_GLOBAL_RST(x) (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)

## PINCFG - LPUART Pin Configuration Register

#define | LPUART_PINCFG_TRGSEL_MASK (0x3U)
#define | LPUART_PINCFG_TRGSEL_SHIFT (0U)
#define | LPUART_PINCFG_TRGSEL(x) (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)

## BAUD - LPUART Baud Rate Register

#define | LPUART_BAUD_SBR_MASK (0x1FFFU)
#define | LPUART_BAUD_SBR_SHIFT (0U)
#define | LPUART_BAUD_SBR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)
#define | LPUART_BAUD_SBNS_MASK (0x2000U)
#define | LPUART_BAUD_SBNS_SHIFT (13U)
#define | LPUART_BAUD_SBNS(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)
#define | LPUART_BAUD_RXEDGIE_MASK (0x4000U)
#define | LPUART_BAUD_RXEDGIE_SHIFT (14U)
#define | LPUART_BAUD_RXEDGIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)
#define | LPUART_BAUD_LBKDIE_MASK (0x8000U)
#define | LPUART_BAUD_LBKDIE_SHIFT (15U)
#define | LPUART_BAUD_LBKDIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)
#define | LPUART_BAUD_RESYNCDIS_MASK (0x10000U)
#define | LPUART_BAUD_RESYNCDIS_SHIFT (16U)
#define | LPUART_BAUD_RESYNCDIS(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)
#define | LPUART_BAUD_BOTHEDGE_MASK (0x20000U)
#define | LPUART_BAUD_BOTHEDGE_SHIFT (17U)
#define | LPUART_BAUD_BOTHEDGE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)
#define | LPUART_BAUD_MATCFG_MASK (0xC0000U)
#define | LPUART_BAUD_MATCFG_SHIFT (18U)
#define | LPUART_BAUD_MATCFG(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)
#define | LPUART_BAUD_RIDMAE_MASK (0x100000U)
#define | LPUART_BAUD_RIDMAE_SHIFT (20U)
#define | LPUART_BAUD_RIDMAE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)
#define | LPUART_BAUD_RDMAE_MASK (0x200000U)
#define | LPUART_BAUD_RDMAE_SHIFT (21U)
#define | LPUART_BAUD_RDMAE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)
#define | LPUART_BAUD_TDMAE_MASK (0x800000U)
#define | LPUART_BAUD_TDMAE_SHIFT (23U)
#define | LPUART_BAUD_TDMAE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)
#define | LPUART_BAUD_OSR_MASK (0x1F000000U)
#define | LPUART_BAUD_OSR_SHIFT (24U)
#define | LPUART_BAUD_OSR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)
#define | LPUART_BAUD_M10_MASK (0x20000000U)
#define | LPUART_BAUD_M10_SHIFT (29U)
#define | LPUART_BAUD_M10(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)
#define | LPUART_BAUD_MAEN2_MASK (0x40000000U)
#define | LPUART_BAUD_MAEN2_SHIFT (30U)
#define | LPUART_BAUD_MAEN2(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)
#define | LPUART_BAUD_MAEN1_MASK (0x80000000U)
#define | LPUART_BAUD_MAEN1_SHIFT (31U)
#define | LPUART_BAUD_MAEN1(x) (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)

## STAT - LPUART Status Register

#define | LPUART_STAT_MA2F_MASK (0x4000U)
#define | LPUART_STAT_MA2F_SHIFT (14U)
#define | LPUART_STAT_MA2F(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)
#define | LPUART_STAT_MA1F_MASK (0x8000U)
#define | LPUART_STAT_MA1F_SHIFT (15U)
#define | LPUART_STAT_MA1F(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)
#define | LPUART_STAT_PF_MASK (0x10000U)
#define | LPUART_STAT_PF_SHIFT (16U)
#define | LPUART_STAT_PF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)
#define | LPUART_STAT_FE_MASK (0x20000U)
#define | LPUART_STAT_FE_SHIFT (17U)
#define | LPUART_STAT_FE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)
#define | LPUART_STAT_NF_MASK (0x40000U)
#define | LPUART_STAT_NF_SHIFT (18U)
#define | LPUART_STAT_NF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)
#define | LPUART_STAT_OR_MASK (0x80000U)
#define | LPUART_STAT_OR_SHIFT (19U)
#define | LPUART_STAT_OR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)
#define | LPUART_STAT_IDLE_MASK (0x100000U)
#define | LPUART_STAT_IDLE_SHIFT (20U)
#define | LPUART_STAT_IDLE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)
#define | LPUART_STAT_RDRF_MASK (0x200000U)
#define | LPUART_STAT_RDRF_SHIFT (21U)
#define | LPUART_STAT_RDRF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)
#define | LPUART_STAT_TC_MASK (0x400000U)
#define | LPUART_STAT_TC_SHIFT (22U)
#define | LPUART_STAT_TC(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)
#define | LPUART_STAT_TDRE_MASK (0x800000U)
#define | LPUART_STAT_TDRE_SHIFT (23U)
#define | LPUART_STAT_TDRE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)
#define | LPUART_STAT_RAF_MASK (0x1000000U)
#define | LPUART_STAT_RAF_SHIFT (24U)
#define | LPUART_STAT_RAF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)
#define | LPUART_STAT_LBKDE_MASK (0x2000000U)
#define | LPUART_STAT_LBKDE_SHIFT (25U)
#define | LPUART_STAT_LBKDE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)
#define | LPUART_STAT_BRK13_MASK (0x4000000U)
#define | LPUART_STAT_BRK13_SHIFT (26U)
#define | LPUART_STAT_BRK13(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)
#define | LPUART_STAT_RWUID_MASK (0x8000000U)
#define | LPUART_STAT_RWUID_SHIFT (27U)
#define | LPUART_STAT_RWUID(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)
#define | LPUART_STAT_RXINV_MASK (0x10000000U)
#define | LPUART_STAT_RXINV_SHIFT (28U)
#define | LPUART_STAT_RXINV(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)
#define | LPUART_STAT_MSBF_MASK (0x20000000U)
#define | LPUART_STAT_MSBF_SHIFT (29U)
#define | LPUART_STAT_MSBF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)
#define | LPUART_STAT_RXEDGIF_MASK (0x40000000U)
#define | LPUART_STAT_RXEDGIF_SHIFT (30U)
#define | LPUART_STAT_RXEDGIF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)
#define | LPUART_STAT_LBKDIF_MASK (0x80000000U)
#define | LPUART_STAT_LBKDIF_SHIFT (31U)
#define | LPUART_STAT_LBKDIF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)

## CTRL - LPUART Control Register

#define | LPUART_CTRL_PT_MASK (0x1U)
#define | LPUART_CTRL_PT_SHIFT (0U)
#define | LPUART_CTRL_PT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)
#define | LPUART_CTRL_PE_MASK (0x2U)
#define | LPUART_CTRL_PE_SHIFT (1U)
#define | LPUART_CTRL_PE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)
#define | LPUART_CTRL_ILT_MASK (0x4U)
#define | LPUART_CTRL_ILT_SHIFT (2U)
#define | LPUART_CTRL_ILT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)
#define | LPUART_CTRL_WAKE_MASK (0x8U)
#define | LPUART_CTRL_WAKE_SHIFT (3U)
#define | LPUART_CTRL_WAKE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)
#define | LPUART_CTRL_M_MASK (0x10U)
#define | LPUART_CTRL_M_SHIFT (4U)
#define | LPUART_CTRL_M(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)
#define | LPUART_CTRL_RSRC_MASK (0x20U)
#define | LPUART_CTRL_RSRC_SHIFT (5U)
#define | LPUART_CTRL_RSRC(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)
#define | LPUART_CTRL_DOZEEN_MASK (0x40U)
#define | LPUART_CTRL_DOZEEN_SHIFT (6U)
#define | LPUART_CTRL_DOZEEN(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)
#define | LPUART_CTRL_LOOPS_MASK (0x80U)
#define | LPUART_CTRL_LOOPS_SHIFT (7U)
#define | LPUART_CTRL_LOOPS(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)
#define | LPUART_CTRL_IDLECFG_MASK (0x700U)
#define | LPUART_CTRL_IDLECFG_SHIFT (8U)
#define | LPUART_CTRL_IDLECFG(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)
#define | LPUART_CTRL_M7_MASK (0x800U)
#define | LPUART_CTRL_M7_SHIFT (11U)
#define | LPUART_CTRL_M7(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)
#define | LPUART_CTRL_MA2IE_MASK (0x4000U)
#define | LPUART_CTRL_MA2IE_SHIFT (14U)
#define | LPUART_CTRL_MA2IE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)
#define | LPUART_CTRL_MA1IE_MASK (0x8000U)
#define | LPUART_CTRL_MA1IE_SHIFT (15U)
#define | LPUART_CTRL_MA1IE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)
#define | LPUART_CTRL_SBK_MASK (0x10000U)
#define | LPUART_CTRL_SBK_SHIFT (16U)
#define | LPUART_CTRL_SBK(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)
#define | LPUART_CTRL_RWU_MASK (0x20000U)
#define | LPUART_CTRL_RWU_SHIFT (17U)
#define | LPUART_CTRL_RWU(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)
#define | LPUART_CTRL_RE_MASK (0x40000U)
#define | LPUART_CTRL_RE_SHIFT (18U)
#define | LPUART_CTRL_RE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)
#define | LPUART_CTRL_TE_MASK (0x80000U)
#define | LPUART_CTRL_TE_SHIFT (19U)
#define | LPUART_CTRL_TE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)
#define | LPUART_CTRL_ILIE_MASK (0x100000U)
#define | LPUART_CTRL_ILIE_SHIFT (20U)
#define | LPUART_CTRL_ILIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)
#define | LPUART_CTRL_RIE_MASK (0x200000U)
#define | LPUART_CTRL_RIE_SHIFT (21U)
#define | LPUART_CTRL_RIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)
#define | LPUART_CTRL_TCIE_MASK (0x400000U)
#define | LPUART_CTRL_TCIE_SHIFT (22U)
#define | LPUART_CTRL_TCIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)
#define | LPUART_CTRL_TIE_MASK (0x800000U)
#define | LPUART_CTRL_TIE_SHIFT (23U)
#define | LPUART_CTRL_TIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)
#define | LPUART_CTRL_PEIE_MASK (0x1000000U)
#define | LPUART_CTRL_PEIE_SHIFT (24U)
#define | LPUART_CTRL_PEIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)
#define | LPUART_CTRL_FEIE_MASK (0x2000000U)
#define | LPUART_CTRL_FEIE_SHIFT (25U)
#define | LPUART_CTRL_FEIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)
#define | LPUART_CTRL_NEIE_MASK (0x4000000U)
#define | LPUART_CTRL_NEIE_SHIFT (26U)
#define | LPUART_CTRL_NEIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)
#define | LPUART_CTRL_ORIE_MASK (0x8000000U)
#define | LPUART_CTRL_ORIE_SHIFT (27U)
#define | LPUART_CTRL_ORIE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)
#define | LPUART_CTRL_TXINV_MASK (0x10000000U)
#define | LPUART_CTRL_TXINV_SHIFT (28U)
#define | LPUART_CTRL_TXINV(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)
#define | LPUART_CTRL_TXDIR_MASK (0x20000000U)
#define | LPUART_CTRL_TXDIR_SHIFT (29U)
#define | LPUART_CTRL_TXDIR(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)
#define | LPUART_CTRL_R9T8_MASK (0x40000000U)
#define | LPUART_CTRL_R9T8_SHIFT (30U)
#define | LPUART_CTRL_R9T8(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)
#define | LPUART_CTRL_R8T9_MASK (0x80000000U)
#define | LPUART_CTRL_R8T9_SHIFT (31U)
#define | LPUART_CTRL_R8T9(x) (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)

## DATA - LPUART Data Register

#define | LPUART_DATA_R0T0_MASK (0x1U)
#define | LPUART_DATA_R0T0_SHIFT (0U)
#define | LPUART_DATA_R0T0(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)
#define | LPUART_DATA_R1T1_MASK (0x2U)
#define | LPUART_DATA_R1T1_SHIFT (1U)
#define | LPUART_DATA_R1T1(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)
#define | LPUART_DATA_R2T2_MASK (0x4U)
#define | LPUART_DATA_R2T2_SHIFT (2U)
#define | LPUART_DATA_R2T2(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)
#define | LPUART_DATA_R3T3_MASK (0x8U)
#define | LPUART_DATA_R3T3_SHIFT (3U)
#define | LPUART_DATA_R3T3(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)
#define | LPUART_DATA_R4T4_MASK (0x10U)
#define | LPUART_DATA_R4T4_SHIFT (4U)
#define | LPUART_DATA_R4T4(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)
#define | LPUART_DATA_R5T5_MASK (0x20U)
#define | LPUART_DATA_R5T5_SHIFT (5U)
#define | LPUART_DATA_R5T5(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)
#define | LPUART_DATA_R6T6_MASK (0x40U)
#define | LPUART_DATA_R6T6_SHIFT (6U)
#define | LPUART_DATA_R6T6(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)
#define | LPUART_DATA_R7T7_MASK (0x80U)
#define | LPUART_DATA_R7T7_SHIFT (7U)
#define | LPUART_DATA_R7T7(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)
#define | LPUART_DATA_R8T8_MASK (0x100U)
#define | LPUART_DATA_R8T8_SHIFT (8U)
#define | LPUART_DATA_R8T8(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)
#define | LPUART_DATA_R9T9_MASK (0x200U)
#define | LPUART_DATA_R9T9_SHIFT (9U)
#define | LPUART_DATA_R9T9(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)
#define | LPUART_DATA_IDLINE_MASK (0x800U)
#define | LPUART_DATA_IDLINE_SHIFT (11U)
#define | LPUART_DATA_IDLINE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)
#define | LPUART_DATA_RXEMPT_MASK (0x1000U)
#define | LPUART_DATA_RXEMPT_SHIFT (12U)
#define | LPUART_DATA_RXEMPT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)
#define | LPUART_DATA_FRETSC_MASK (0x2000U)
#define | LPUART_DATA_FRETSC_SHIFT (13U)
#define | LPUART_DATA_FRETSC(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)
#define | LPUART_DATA_PARITYE_MASK (0x4000U)
#define | LPUART_DATA_PARITYE_SHIFT (14U)
#define | LPUART_DATA_PARITYE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)
#define | LPUART_DATA_NOISY_MASK (0x8000U)
#define | LPUART_DATA_NOISY_SHIFT (15U)
#define | LPUART_DATA_NOISY(x) (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)

## MATCH - LPUART Match Address Register

#define | LPUART_MATCH_MA1_MASK (0x3FFU)
#define | LPUART_MATCH_MA1_SHIFT (0U)
#define | LPUART_MATCH_MA1(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)
#define | LPUART_MATCH_MA2_MASK (0x3FF0000U)
#define | LPUART_MATCH_MA2_SHIFT (16U)
#define | LPUART_MATCH_MA2(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)

## MODIR - LPUART Modem IrDA Register

#define | LPUART_MODIR_TXCTSE_MASK (0x1U)
#define | LPUART_MODIR_TXCTSE_SHIFT (0U)
#define | LPUART_MODIR_TXCTSE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)
#define | LPUART_MODIR_TXRTSE_MASK (0x2U)
#define | LPUART_MODIR_TXRTSE_SHIFT (1U)
#define | LPUART_MODIR_TXRTSE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)
#define | LPUART_MODIR_TXRTSPOL_MASK (0x4U)
#define | LPUART_MODIR_TXRTSPOL_SHIFT (2U)
#define | LPUART_MODIR_TXRTSPOL(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)
#define | LPUART_MODIR_RXRTSE_MASK (0x8U)
#define | LPUART_MODIR_RXRTSE_SHIFT (3U)
#define | LPUART_MODIR_RXRTSE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)
#define | LPUART_MODIR_TXCTSC_MASK (0x10U)
#define | LPUART_MODIR_TXCTSC_SHIFT (4U)
#define | LPUART_MODIR_TXCTSC(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)
#define | LPUART_MODIR_TXCTSSRC_MASK (0x20U)
#define | LPUART_MODIR_TXCTSSRC_SHIFT (5U)
#define | LPUART_MODIR_TXCTSSRC(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)
#define | LPUART_MODIR_RTSWATER_MASK (0x300U)
#define | LPUART_MODIR_RTSWATER_SHIFT (8U)
#define | LPUART_MODIR_RTSWATER(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)
#define | LPUART_MODIR_TNP_MASK (0x30000U)
#define | LPUART_MODIR_TNP_SHIFT (16U)
#define | LPUART_MODIR_TNP(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)
#define | LPUART_MODIR_IREN_MASK (0x40000U)
#define | LPUART_MODIR_IREN_SHIFT (18U)
#define | LPUART_MODIR_IREN(x) (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)

## FIFO - LPUART FIFO Register

#define | LPUART_FIFO_RXFIFOSIZE_MASK (0x7U)
#define | LPUART_FIFO_RXFIFOSIZE_SHIFT (0U)
#define | LPUART_FIFO_RXFIFOSIZE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)
#define | LPUART_FIFO_RXFE_MASK (0x8U)
#define | LPUART_FIFO_RXFE_SHIFT (3U)
#define | LPUART_FIFO_RXFE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)
#define | LPUART_FIFO_TXFIFOSIZE_MASK (0x70U)
#define | LPUART_FIFO_TXFIFOSIZE_SHIFT (4U)
#define | LPUART_FIFO_TXFIFOSIZE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)
#define | LPUART_FIFO_TXFE_MASK (0x80U)
#define | LPUART_FIFO_TXFE_SHIFT (7U)
#define | LPUART_FIFO_TXFE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)
#define | LPUART_FIFO_RXUFE_MASK (0x100U)
#define | LPUART_FIFO_RXUFE_SHIFT (8U)
#define | LPUART_FIFO_RXUFE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)
#define | LPUART_FIFO_TXOFE_MASK (0x200U)
#define | LPUART_FIFO_TXOFE_SHIFT (9U)
#define | LPUART_FIFO_TXOFE(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)
#define | LPUART_FIFO_RXIDEN_MASK (0x1C00U)
#define | LPUART_FIFO_RXIDEN_SHIFT (10U)
#define | LPUART_FIFO_RXIDEN(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)
#define | LPUART_FIFO_RXFLUSH_MASK (0x4000U)
#define | LPUART_FIFO_RXFLUSH_SHIFT (14U)
#define | LPUART_FIFO_RXFLUSH(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)
#define | LPUART_FIFO_TXFLUSH_MASK (0x8000U)
#define | LPUART_FIFO_TXFLUSH_SHIFT (15U)
#define | LPUART_FIFO_TXFLUSH(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)
#define | LPUART_FIFO_RXUF_MASK (0x10000U)
#define | LPUART_FIFO_RXUF_SHIFT (16U)
#define | LPUART_FIFO_RXUF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)
#define | LPUART_FIFO_TXOF_MASK (0x20000U)
#define | LPUART_FIFO_TXOF_SHIFT (17U)
#define | LPUART_FIFO_TXOF(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)
#define | LPUART_FIFO_RXEMPT_MASK (0x400000U)
#define | LPUART_FIFO_RXEMPT_SHIFT (22U)
#define | LPUART_FIFO_RXEMPT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)
#define | LPUART_FIFO_TXEMPT_MASK (0x800000U)
#define | LPUART_FIFO_TXEMPT_SHIFT (23U)
#define | LPUART_FIFO_TXEMPT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)

## WATER - LPUART Watermark Register

#define | LPUART_WATER_TXWATER_MASK (0x3U)
#define | LPUART_WATER_TXWATER_SHIFT (0U)
#define | LPUART_WATER_TXWATER(x) (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)
#define | LPUART_WATER_TXCOUNT_MASK (0x700U)
#define | LPUART_WATER_TXCOUNT_SHIFT (8U)
#define | LPUART_WATER_TXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)
#define | LPUART_WATER_RXWATER_MASK (0x30000U)
#define | LPUART_WATER_RXWATER_SHIFT (16U)
#define | LPUART_WATER_RXWATER(x) (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)
#define | LPUART_WATER_RXCOUNT_MASK (0x7000000U)
#define | LPUART_WATER_RXCOUNT_SHIFT (24U)
#define | LPUART_WATER_RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ LPUART_BAUD_BOTHEDGE

#define LPUART_BAUD_BOTHEDGE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_BOTHEDGE_SHIFT)) & LPUART_BAUD_BOTHEDGE_MASK)

BOTHEDGE - Both Edge Sampling 0b0..Receiver samples input data using the rising edge of the baud rate clock. 0b1..Receiver samples input data using the rising and falling edge of the baud rate clock.

Definition at line 28475 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_BOTHEDGE_MASK

#define LPUART_BAUD_BOTHEDGE_MASK (0x20000U)

Definition at line 28469 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_BOTHEDGE_SHIFT

#define LPUART_BAUD_BOTHEDGE_SHIFT (17U)

Definition at line 28470 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_LBKDIE

#define LPUART_BAUD_LBKDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_LBKDIE_SHIFT)) & LPUART_BAUD_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt Enable 0b0..Hardware interrupts from STAT[LBKDIF] flag are disabled (use polling). 0b1..Hardware interrupt requested when STAT[LBKDIF] flag is 1.

Definition at line 28461 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_LBKDIE_MASK

#define LPUART_BAUD_LBKDIE_MASK (0x8000U)

Definition at line 28455 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_LBKDIE_SHIFT

#define LPUART_BAUD_LBKDIE_SHIFT (15U)

Definition at line 28456 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_M10

#define LPUART_BAUD_M10 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_M10_SHIFT)) & LPUART_BAUD_M10_MASK)

M10 - 10-bit Mode select 0b0..Receiver and transmitter use 7-bit to 9-bit data characters. 0b1..Receiver and transmitter use 10-bit data characters.

Definition at line 28549 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_M10_MASK

#define LPUART_BAUD_M10_MASK (0x20000000U)

Definition at line 28543 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_M10_SHIFT

#define LPUART_BAUD_M10_SHIFT (29U)

Definition at line 28544 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN1

#define LPUART_BAUD_MAEN1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN1_SHIFT)) & LPUART_BAUD_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..Normal operation. 0b1..Enables automatic address matching or data matching mode for MATCH[MA1].

Definition at line 28563 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN1_MASK

#define LPUART_BAUD_MAEN1_MASK (0x80000000U)

Definition at line 28557 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN1_SHIFT

#define LPUART_BAUD_MAEN1_SHIFT (31U)

Definition at line 28558 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN2

#define LPUART_BAUD_MAEN2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MAEN2_SHIFT)) & LPUART_BAUD_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..Normal operation. 0b1..Enables automatic address matching or data matching mode for MATCH[MA2].

Definition at line 28556 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN2_MASK

#define LPUART_BAUD_MAEN2_MASK (0x40000000U)

Definition at line 28550 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MAEN2_SHIFT

#define LPUART_BAUD_MAEN2_SHIFT (30U)

Definition at line 28551 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MATCFG

#define LPUART_BAUD_MATCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_MATCFG_SHIFT)) & LPUART_BAUD_MATCFG_MASK)

MATCFG - Match Configuration 0b00..Address Match Wakeup 0b01..Idle Match Wakeup 0b10..Match On and Match Off 0b11..Enables RWU on Data Match and Match On/Off for transmitter CTS input

Definition at line 28484 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MATCFG_MASK

#define LPUART_BAUD_MATCFG_MASK (0xC0000U)

Definition at line 28476 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_MATCFG_SHIFT

#define LPUART_BAUD_MATCFG_SHIFT (18U)

Definition at line 28477 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_OSR

#define LPUART_BAUD_OSR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_OSR_SHIFT)) & LPUART_BAUD_OSR_MASK)

OSR - Oversampling Ratio 0b00000..Writing 0 to this field will result in an oversampling ratio of 16 0b00001..Reserved 0b00010..Reserved 0b00011..Oversampling ratio of 4, requires BOTHEDGE to be set. 0b00100..Oversampling ratio of 5, requires BOTHEDGE to be set. 0b00101..Oversampling ratio of 6, requires BOTHEDGE to be set. 0b00110..Oversampling ratio of 7, requires BOTHEDGE to be set. 0b00111..Oversampling ratio of 8. 0b01000..Oversampling ratio of 9. 0b01001..Oversampling ratio of 10. 0b01010..Oversampling ratio of 11. 0b01011..Oversampling ratio of 12. 0b01100..Oversampling ratio of 13. 0b01101..Oversampling ratio of 14. 0b01110..Oversampling ratio of 15. 0b01111..Oversampling ratio of 16. 0b10000..Oversampling ratio of 17. 0b10001..Oversampling ratio of 18. 0b10010..Oversampling ratio of 19. 0b10011..Oversampling ratio of 20. 0b10100..Oversampling ratio of 21. 0b10101..Oversampling ratio of 22. 0b10110..Oversampling ratio of 23. 0b10111..Oversampling ratio of 24. 0b11000..Oversampling ratio of 25. 0b11001..Oversampling ratio of 26. 0b11010..Oversampling ratio of 27. 0b11011..Oversampling ratio of 28. 0b11100..Oversampling ratio of 29. 0b11101..Oversampling ratio of 30. 0b11110..Oversampling ratio of 31. 0b11111..Oversampling ratio of 32.

Definition at line 28542 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_OSR_MASK

#define LPUART_BAUD_OSR_MASK (0x1F000000U)

Definition at line 28506 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_OSR_SHIFT

#define LPUART_BAUD_OSR_SHIFT (24U)

Definition at line 28507 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RDMAE

#define LPUART_BAUD_RDMAE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RDMAE_SHIFT)) & LPUART_BAUD_RDMAE_MASK)

RDMAE - Receiver Full DMA Enable 0b0..DMA request disabled. 0b1..DMA request enabled.

Definition at line 28498 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RDMAE_MASK

#define LPUART_BAUD_RDMAE_MASK (0x200000U)

Definition at line 28492 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RDMAE_SHIFT

#define LPUART_BAUD_RDMAE_SHIFT (21U)

Definition at line 28493 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RESYNCDIS

#define LPUART_BAUD_RESYNCDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RESYNCDIS_SHIFT)) & LPUART_BAUD_RESYNCDIS_MASK)

RESYNCDIS - Resynchronization Disable 0b0..Resynchronization during received data word is supported 0b1..Resynchronization during received data word is disabled

Definition at line 28468 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RESYNCDIS_MASK

#define LPUART_BAUD_RESYNCDIS_MASK (0x10000U)

Definition at line 28462 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RESYNCDIS_SHIFT

#define LPUART_BAUD_RESYNCDIS_SHIFT (16U)

Definition at line 28463 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RIDMAE

#define LPUART_BAUD_RIDMAE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RIDMAE_SHIFT)) & LPUART_BAUD_RIDMAE_MASK)

RIDMAE - Receiver Idle DMA Enable 0b0..DMA request disabled. 0b1..DMA request enabled.

Definition at line 28491 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RIDMAE_MASK

#define LPUART_BAUD_RIDMAE_MASK (0x100000U)

Definition at line 28485 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RIDMAE_SHIFT

#define LPUART_BAUD_RIDMAE_SHIFT (20U)

Definition at line 28486 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RXEDGIE

#define LPUART_BAUD_RXEDGIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_RXEDGIE_SHIFT)) & LPUART_BAUD_RXEDGIE_MASK)

RXEDGIE - RX Input Active Edge Interrupt Enable 0b0..Hardware interrupts from STAT[RXEDGIF] are disabled. 0b1..Hardware interrupt is requested when STAT[RXEDGIF] flag is 1.

Definition at line 28454 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RXEDGIE_MASK

#define LPUART_BAUD_RXEDGIE_MASK (0x4000U)

Definition at line 28448 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_RXEDGIE_SHIFT

#define LPUART_BAUD_RXEDGIE_SHIFT (14U)

Definition at line 28449 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBNS

#define LPUART_BAUD_SBNS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBNS_SHIFT)) & LPUART_BAUD_SBNS_MASK)

SBNS - Stop Bit Number Select 0b0..One stop bit. 0b1..Two stop bits.

Definition at line 28447 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBNS_MASK

#define LPUART_BAUD_SBNS_MASK (0x2000U)

Definition at line 28441 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBNS_SHIFT

#define LPUART_BAUD_SBNS_SHIFT (13U)

Definition at line 28442 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBR

#define LPUART_BAUD_SBR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_SBR_SHIFT)) & LPUART_BAUD_SBR_MASK)

SBR - Baud Rate Modulo Divisor.

Definition at line 28440 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBR_MASK

#define LPUART_BAUD_SBR_MASK (0x1FFFU)

Definition at line 28436 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_SBR_SHIFT

#define LPUART_BAUD_SBR_SHIFT (0U)

Definition at line 28437 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_TDMAE

#define LPUART_BAUD_TDMAE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_BAUD_TDMAE_SHIFT)) & LPUART_BAUD_TDMAE_MASK)

TDMAE - Transmitter DMA Enable 0b0..DMA request disabled. 0b1..DMA request enabled.

Definition at line 28505 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_TDMAE_MASK

#define LPUART_BAUD_TDMAE_MASK (0x800000U)

Definition at line 28499 of file MIMXRT1062.h.

## ◆ LPUART_BAUD_TDMAE_SHIFT

#define LPUART_BAUD_TDMAE_SHIFT (23U)

Definition at line 28500 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_DOZEEN

#define LPUART_CTRL_DOZEEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_DOZEEN_SHIFT)) & LPUART_CTRL_DOZEEN_MASK)

DOZEEN - Doze Enable 0b0..LPUART is enabled in Doze mode. 0b1..LPUART is disabled in Doze mode.

Definition at line 28751 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_DOZEEN_MASK

#define LPUART_CTRL_DOZEEN_MASK (0x40U)

Definition at line 28745 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_DOZEEN_SHIFT

#define LPUART_CTRL_DOZEEN_SHIFT (6U)

Definition at line 28746 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_FEIE

#define LPUART_CTRL_FEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_FEIE_SHIFT)) & LPUART_CTRL_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupts disabled; use polling. 0b1..Hardware interrupt requested when FE is set.

Definition at line 28862 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_FEIE_MASK

#define LPUART_CTRL_FEIE_MASK (0x2000000U)

Definition at line 28856 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_FEIE_SHIFT

#define LPUART_CTRL_FEIE_SHIFT (25U)

Definition at line 28857 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_IDLECFG

#define LPUART_CTRL_IDLECFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_IDLECFG_SHIFT)) & LPUART_CTRL_IDLECFG_MASK)

IDLECFG - Idle Configuration 0b000..1 idle character 0b001..2 idle characters 0b010..4 idle characters 0b011..8 idle characters 0b100..16 idle characters 0b101..32 idle characters 0b110..64 idle characters 0b111..128 idle characters

Definition at line 28771 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_IDLECFG_MASK

#define LPUART_CTRL_IDLECFG_MASK (0x700U)

Definition at line 28759 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_IDLECFG_SHIFT

#define LPUART_CTRL_IDLECFG_SHIFT (8U)

Definition at line 28760 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILIE

#define LPUART_CTRL_ILIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILIE_SHIFT)) & LPUART_CTRL_ILIE_MASK)

ILIE - Idle Line Interrupt Enable 0b0..Hardware interrupts from IDLE disabled; use polling. 0b1..Hardware interrupt requested when IDLE flag is 1.

Definition at line 28827 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILIE_MASK

#define LPUART_CTRL_ILIE_MASK (0x100000U)

Definition at line 28821 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILIE_SHIFT

#define LPUART_CTRL_ILIE_SHIFT (20U)

Definition at line 28822 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILT

#define LPUART_CTRL_ILT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ILT_SHIFT)) & LPUART_CTRL_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

Definition at line 28723 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILT_MASK

#define LPUART_CTRL_ILT_MASK (0x4U)

Definition at line 28717 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ILT_SHIFT

#define LPUART_CTRL_ILT_SHIFT (2U)

Definition at line 28718 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_LOOPS

#define LPUART_CTRL_LOOPS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_LOOPS_SHIFT)) & LPUART_CTRL_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation - RXD and TXD use separate pins. 0b1..Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit).

Definition at line 28758 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_LOOPS_MASK

#define LPUART_CTRL_LOOPS_MASK (0x80U)

Definition at line 28752 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_LOOPS_SHIFT

#define LPUART_CTRL_LOOPS_SHIFT (7U)

Definition at line 28753 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M

#define LPUART_CTRL_M | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M_SHIFT)) & LPUART_CTRL_M_MASK)

M - 9-Bit or 8-Bit Mode Select 0b0..Receiver and transmitter use 8-bit data characters. 0b1..Receiver and transmitter use 9-bit data characters.

Definition at line 28737 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M7

#define LPUART_CTRL_M7 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_M7_SHIFT)) & LPUART_CTRL_M7_MASK)

M7 - 7-Bit Mode Select 0b0..Receiver and transmitter use 8-bit to 10-bit data characters. 0b1..Receiver and transmitter use 7-bit data characters.

Definition at line 28778 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M7_MASK

#define LPUART_CTRL_M7_MASK (0x800U)

Definition at line 28772 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M7_SHIFT

#define LPUART_CTRL_M7_SHIFT (11U)

Definition at line 28773 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M_MASK

#define LPUART_CTRL_M_MASK (0x10U)

Definition at line 28731 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_M_SHIFT

#define LPUART_CTRL_M_SHIFT (4U)

Definition at line 28732 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA1IE

#define LPUART_CTRL_MA1IE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA1IE_SHIFT)) & LPUART_CTRL_MA1IE_MASK)

MA1IE - Match 1 Interrupt Enable 0b0..MA1F interrupt disabled 0b1..MA1F interrupt enabled

Definition at line 28792 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA1IE_MASK

#define LPUART_CTRL_MA1IE_MASK (0x8000U)

Definition at line 28786 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA1IE_SHIFT

#define LPUART_CTRL_MA1IE_SHIFT (15U)

Definition at line 28787 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA2IE

#define LPUART_CTRL_MA2IE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_MA2IE_SHIFT)) & LPUART_CTRL_MA2IE_MASK)

MA2IE - Match 2 Interrupt Enable 0b0..MA2F interrupt disabled 0b1..MA2F interrupt enabled

Definition at line 28785 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA2IE_MASK

#define LPUART_CTRL_MA2IE_MASK (0x4000U)

Definition at line 28779 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_MA2IE_SHIFT

#define LPUART_CTRL_MA2IE_SHIFT (14U)

Definition at line 28780 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_NEIE

#define LPUART_CTRL_NEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_NEIE_SHIFT)) & LPUART_CTRL_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupts disabled; use polling. 0b1..Hardware interrupt requested when NF is set.

Definition at line 28869 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_NEIE_MASK

#define LPUART_CTRL_NEIE_MASK (0x4000000U)

Definition at line 28863 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_NEIE_SHIFT

#define LPUART_CTRL_NEIE_SHIFT (26U)

Definition at line 28864 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ORIE

#define LPUART_CTRL_ORIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_ORIE_SHIFT)) & LPUART_CTRL_ORIE_MASK)

ORIE - Overrun Interrupt Enable 0b0..OR interrupts disabled; use polling. 0b1..Hardware interrupt requested when OR is set.

Definition at line 28876 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ORIE_MASK

#define LPUART_CTRL_ORIE_MASK (0x8000000U)

Definition at line 28870 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_ORIE_SHIFT

#define LPUART_CTRL_ORIE_SHIFT (27U)

Definition at line 28871 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PE

#define LPUART_CTRL_PE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PE_SHIFT)) & LPUART_CTRL_PE_MASK)

PE - Parity Enable 0b0..No hardware parity generation or checking. 0b1..Parity enabled.

Definition at line 28716 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PE_MASK

#define LPUART_CTRL_PE_MASK (0x2U)

Definition at line 28710 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PE_SHIFT

#define LPUART_CTRL_PE_SHIFT (1U)

Definition at line 28711 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PEIE

#define LPUART_CTRL_PEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PEIE_SHIFT)) & LPUART_CTRL_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupts disabled; use polling). 0b1..Hardware interrupt requested when PF is set.

Definition at line 28855 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PEIE_MASK

#define LPUART_CTRL_PEIE_MASK (0x1000000U)

Definition at line 28849 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PEIE_SHIFT

#define LPUART_CTRL_PEIE_SHIFT (24U)

Definition at line 28850 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PT

#define LPUART_CTRL_PT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_PT_SHIFT)) & LPUART_CTRL_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

Definition at line 28709 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PT_MASK

#define LPUART_CTRL_PT_MASK (0x1U)

Definition at line 28703 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_PT_SHIFT

#define LPUART_CTRL_PT_SHIFT (0U)

Definition at line 28704 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R8T9

#define LPUART_CTRL_R8T9 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R8T9_SHIFT)) & LPUART_CTRL_R8T9_MASK)

R8T9 - Receive Bit 8 / Transmit Bit 9

Definition at line 28900 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R8T9_MASK

#define LPUART_CTRL_R8T9_MASK (0x80000000U)

Definition at line 28896 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R8T9_SHIFT

#define LPUART_CTRL_R8T9_SHIFT (31U)

Definition at line 28897 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R9T8

#define LPUART_CTRL_R9T8 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_R9T8_SHIFT)) & LPUART_CTRL_R9T8_MASK)

R9T8 - Receive Bit 9 / Transmit Bit 8

Definition at line 28895 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R9T8_MASK

#define LPUART_CTRL_R9T8_MASK (0x40000000U)

Definition at line 28891 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_R9T8_SHIFT

#define LPUART_CTRL_R9T8_SHIFT (30U)

Definition at line 28892 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RE

#define LPUART_CTRL_RE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RE_SHIFT)) & LPUART_CTRL_RE_MASK)

RE - Receiver Enable 0b0..Receiver disabled. 0b1..Receiver enabled.

Definition at line 28813 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RE_MASK

#define LPUART_CTRL_RE_MASK (0x40000U)

Definition at line 28807 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RE_SHIFT

#define LPUART_CTRL_RE_SHIFT (18U)

Definition at line 28808 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RIE

#define LPUART_CTRL_RIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RIE_SHIFT)) & LPUART_CTRL_RIE_MASK)

RIE - Receiver Interrupt Enable 0b0..Hardware interrupts from RDRF disabled; use polling. 0b1..Hardware interrupt requested when RDRF flag is 1.

Definition at line 28834 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RIE_MASK

#define LPUART_CTRL_RIE_MASK (0x200000U)

Definition at line 28828 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RIE_SHIFT

#define LPUART_CTRL_RIE_SHIFT (21U)

Definition at line 28829 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RSRC

#define LPUART_CTRL_RSRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RSRC_SHIFT)) & LPUART_CTRL_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin. 0b1..Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input.

Definition at line 28744 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RSRC_MASK

#define LPUART_CTRL_RSRC_MASK (0x20U)

Definition at line 28738 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RSRC_SHIFT

#define LPUART_CTRL_RSRC_SHIFT (5U)

Definition at line 28739 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RWU

#define LPUART_CTRL_RWU | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_RWU_SHIFT)) & LPUART_CTRL_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal receiver operation. 0b1..LPUART receiver in standby waiting for wakeup condition.

Definition at line 28806 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RWU_MASK

#define LPUART_CTRL_RWU_MASK (0x20000U)

Definition at line 28800 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_RWU_SHIFT

#define LPUART_CTRL_RWU_SHIFT (17U)

Definition at line 28801 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_SBK

#define LPUART_CTRL_SBK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_SBK_SHIFT)) & LPUART_CTRL_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break character(s) to be sent.

Definition at line 28799 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_SBK_MASK

#define LPUART_CTRL_SBK_MASK (0x10000U)

Definition at line 28793 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_SBK_SHIFT

#define LPUART_CTRL_SBK_SHIFT (16U)

Definition at line 28794 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TCIE

#define LPUART_CTRL_TCIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TCIE_SHIFT)) & LPUART_CTRL_TCIE_MASK)

TCIE - Transmission Complete Interrupt Enable for 0b0..Hardware interrupts from TC disabled; use polling. 0b1..Hardware interrupt requested when TC flag is 1.

Definition at line 28841 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TCIE_MASK

#define LPUART_CTRL_TCIE_MASK (0x400000U)

Definition at line 28835 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TCIE_SHIFT

#define LPUART_CTRL_TCIE_SHIFT (22U)

Definition at line 28836 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TE

#define LPUART_CTRL_TE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TE_SHIFT)) & LPUART_CTRL_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter disabled. 0b1..Transmitter enabled.

Definition at line 28820 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TE_MASK

#define LPUART_CTRL_TE_MASK (0x80000U)

Definition at line 28814 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TE_SHIFT

#define LPUART_CTRL_TE_SHIFT (19U)

Definition at line 28815 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TIE

#define LPUART_CTRL_TIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TIE_SHIFT)) & LPUART_CTRL_TIE_MASK)

TIE - Transmit Interrupt Enable 0b0..Hardware interrupts from TDRE disabled; use polling. 0b1..Hardware interrupt requested when TDRE flag is 1.

Definition at line 28848 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TIE_MASK

#define LPUART_CTRL_TIE_MASK (0x800000U)

Definition at line 28842 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TIE_SHIFT

#define LPUART_CTRL_TIE_SHIFT (23U)

Definition at line 28843 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXDIR

#define LPUART_CTRL_TXDIR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXDIR_SHIFT)) & LPUART_CTRL_TXDIR_MASK)

TXDIR - TXD Pin Direction in Single-Wire Mode 0b0..TXD pin is an input in single-wire mode. 0b1..TXD pin is an output in single-wire mode.

Definition at line 28890 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXDIR_MASK

#define LPUART_CTRL_TXDIR_MASK (0x20000000U)

Definition at line 28884 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXDIR_SHIFT

#define LPUART_CTRL_TXDIR_SHIFT (29U)

Definition at line 28885 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXINV

#define LPUART_CTRL_TXINV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_TXINV_SHIFT)) & LPUART_CTRL_TXINV_MASK)

TXINV - Transmit Data Inversion 0b0..Transmit data not inverted. 0b1..Transmit data inverted.

Definition at line 28883 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXINV_MASK

#define LPUART_CTRL_TXINV_MASK (0x10000000U)

Definition at line 28877 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_TXINV_SHIFT

#define LPUART_CTRL_TXINV_SHIFT (28U)

Definition at line 28878 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_WAKE

#define LPUART_CTRL_WAKE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_CTRL_WAKE_SHIFT)) & LPUART_CTRL_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Configures RWU for idle-line wakeup. 0b1..Configures RWU with address-mark wakeup.

Definition at line 28730 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_WAKE_MASK

#define LPUART_CTRL_WAKE_MASK (0x8U)

Definition at line 28724 of file MIMXRT1062.h.

## ◆ LPUART_CTRL_WAKE_SHIFT

#define LPUART_CTRL_WAKE_SHIFT (3U)

Definition at line 28725 of file MIMXRT1062.h.

## ◆ LPUART_DATA_FRETSC

#define LPUART_DATA_FRETSC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_FRETSC_SHIFT)) & LPUART_DATA_FRETSC_MASK)

FRETSC - Frame Error / Transmit Special Character 0b0..The dataword was received without a frame error on read, or transmit a normal character on write. 0b1..The dataword was received with a frame error, or transmit an idle or break character on transmit.

Definition at line 28975 of file MIMXRT1062.h.

## ◆ LPUART_DATA_FRETSC_MASK

#define LPUART_DATA_FRETSC_MASK (0x2000U)

Definition at line 28969 of file MIMXRT1062.h.

## ◆ LPUART_DATA_FRETSC_SHIFT

#define LPUART_DATA_FRETSC_SHIFT (13U)

Definition at line 28970 of file MIMXRT1062.h.

## ◆ LPUART_DATA_IDLINE

#define LPUART_DATA_IDLINE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_IDLINE_SHIFT)) & LPUART_DATA_IDLINE_MASK)

IDLINE - Idle Line 0b0..Receiver was not idle before receiving this character. 0b1..Receiver was idle before receiving this character.

Definition at line 28961 of file MIMXRT1062.h.

## ◆ LPUART_DATA_IDLINE_MASK

#define LPUART_DATA_IDLINE_MASK (0x800U)

Definition at line 28955 of file MIMXRT1062.h.

## ◆ LPUART_DATA_IDLINE_SHIFT

#define LPUART_DATA_IDLINE_SHIFT (11U)

Definition at line 28956 of file MIMXRT1062.h.

## ◆ LPUART_DATA_NOISY

#define LPUART_DATA_NOISY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_NOISY_SHIFT)) & LPUART_DATA_NOISY_MASK)

NOISY - NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

Definition at line 28989 of file MIMXRT1062.h.

## ◆ LPUART_DATA_NOISY_MASK

#define LPUART_DATA_NOISY_MASK (0x8000U)

Definition at line 28983 of file MIMXRT1062.h.

## ◆ LPUART_DATA_NOISY_SHIFT

#define LPUART_DATA_NOISY_SHIFT (15U)

Definition at line 28984 of file MIMXRT1062.h.

## ◆ LPUART_DATA_PARITYE

#define LPUART_DATA_PARITYE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_PARITYE_SHIFT)) & LPUART_DATA_PARITYE_MASK)

PARITYE - PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

Definition at line 28982 of file MIMXRT1062.h.

## ◆ LPUART_DATA_PARITYE_MASK

#define LPUART_DATA_PARITYE_MASK (0x4000U)

Definition at line 28976 of file MIMXRT1062.h.

## ◆ LPUART_DATA_PARITYE_SHIFT

#define LPUART_DATA_PARITYE_SHIFT (14U)

Definition at line 28977 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R0T0

#define LPUART_DATA_R0T0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R0T0_SHIFT)) & LPUART_DATA_R0T0_MASK)

R0T0 - R0T0

Definition at line 28909 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R0T0_MASK

#define LPUART_DATA_R0T0_MASK (0x1U)

Definition at line 28905 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R0T0_SHIFT

#define LPUART_DATA_R0T0_SHIFT (0U)

Definition at line 28906 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R1T1

#define LPUART_DATA_R1T1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R1T1_SHIFT)) & LPUART_DATA_R1T1_MASK)

R1T1 - R1T1

Definition at line 28914 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R1T1_MASK

#define LPUART_DATA_R1T1_MASK (0x2U)

Definition at line 28910 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R1T1_SHIFT

#define LPUART_DATA_R1T1_SHIFT (1U)

Definition at line 28911 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R2T2

#define LPUART_DATA_R2T2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R2T2_SHIFT)) & LPUART_DATA_R2T2_MASK)

R2T2 - R2T2

Definition at line 28919 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R2T2_MASK

#define LPUART_DATA_R2T2_MASK (0x4U)

Definition at line 28915 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R2T2_SHIFT

#define LPUART_DATA_R2T2_SHIFT (2U)

Definition at line 28916 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R3T3

#define LPUART_DATA_R3T3 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R3T3_SHIFT)) & LPUART_DATA_R3T3_MASK)

R3T3 - R3T3

Definition at line 28924 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R3T3_MASK

#define LPUART_DATA_R3T3_MASK (0x8U)

Definition at line 28920 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R3T3_SHIFT

#define LPUART_DATA_R3T3_SHIFT (3U)

Definition at line 28921 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R4T4

#define LPUART_DATA_R4T4 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R4T4_SHIFT)) & LPUART_DATA_R4T4_MASK)

R4T4 - R4T4

Definition at line 28929 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R4T4_MASK

#define LPUART_DATA_R4T4_MASK (0x10U)

Definition at line 28925 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R4T4_SHIFT

#define LPUART_DATA_R4T4_SHIFT (4U)

Definition at line 28926 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R5T5

#define LPUART_DATA_R5T5 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R5T5_SHIFT)) & LPUART_DATA_R5T5_MASK)

R5T5 - R5T5

Definition at line 28934 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R5T5_MASK

#define LPUART_DATA_R5T5_MASK (0x20U)

Definition at line 28930 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R5T5_SHIFT

#define LPUART_DATA_R5T5_SHIFT (5U)

Definition at line 28931 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R6T6

#define LPUART_DATA_R6T6 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R6T6_SHIFT)) & LPUART_DATA_R6T6_MASK)

R6T6 - R6T6

Definition at line 28939 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R6T6_MASK

#define LPUART_DATA_R6T6_MASK (0x40U)

Definition at line 28935 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R6T6_SHIFT

#define LPUART_DATA_R6T6_SHIFT (6U)

Definition at line 28936 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R7T7

#define LPUART_DATA_R7T7 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R7T7_SHIFT)) & LPUART_DATA_R7T7_MASK)

R7T7 - R7T7

Definition at line 28944 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R7T7_MASK

#define LPUART_DATA_R7T7_MASK (0x80U)

Definition at line 28940 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R7T7_SHIFT

#define LPUART_DATA_R7T7_SHIFT (7U)

Definition at line 28941 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R8T8

#define LPUART_DATA_R8T8 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R8T8_SHIFT)) & LPUART_DATA_R8T8_MASK)

R8T8 - R8T8

Definition at line 28949 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R8T8_MASK

#define LPUART_DATA_R8T8_MASK (0x100U)

Definition at line 28945 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R8T8_SHIFT

#define LPUART_DATA_R8T8_SHIFT (8U)

Definition at line 28946 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R9T9

#define LPUART_DATA_R9T9 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_R9T9_SHIFT)) & LPUART_DATA_R9T9_MASK)

R9T9 - R9T9

Definition at line 28954 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R9T9_MASK

#define LPUART_DATA_R9T9_MASK (0x200U)

Definition at line 28950 of file MIMXRT1062.h.

## ◆ LPUART_DATA_R9T9_SHIFT

#define LPUART_DATA_R9T9_SHIFT (9U)

Definition at line 28951 of file MIMXRT1062.h.

## ◆ LPUART_DATA_RXEMPT

#define LPUART_DATA_RXEMPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_DATA_RXEMPT_SHIFT)) & LPUART_DATA_RXEMPT_MASK)

RXEMPT - Receive Buffer Empty 0b0..Receive buffer contains valid data. 0b1..Receive buffer is empty, data returned on read is not valid.

Definition at line 28968 of file MIMXRT1062.h.

## ◆ LPUART_DATA_RXEMPT_MASK

#define LPUART_DATA_RXEMPT_MASK (0x1000U)

Definition at line 28962 of file MIMXRT1062.h.

## ◆ LPUART_DATA_RXEMPT_SHIFT

#define LPUART_DATA_RXEMPT_SHIFT (12U)

Definition at line 28963 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXEMPT

#define LPUART_FIFO_RXEMPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXEMPT_SHIFT)) & LPUART_FIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

Definition at line 29183 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXEMPT_MASK

#define LPUART_FIFO_RXEMPT_MASK (0x400000U)

Definition at line 29177 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXEMPT_SHIFT

#define LPUART_FIFO_RXEMPT_SHIFT (22U)

Definition at line 29178 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFE

#define LPUART_FIFO_RXFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFE_SHIFT)) & LPUART_FIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

Definition at line 29101 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFE_MASK

#define LPUART_FIFO_RXFE_MASK (0x8U)

Definition at line 29095 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFE_SHIFT

#define LPUART_FIFO_RXFE_SHIFT (3U)

Definition at line 29096 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFIFOSIZE

#define LPUART_FIFO_RXFIFOSIZE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFIFOSIZE_SHIFT)) & LPUART_FIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Receive FIFO/Buffer depth = 256 datawords.

Definition at line 29094 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFIFOSIZE_MASK

#define LPUART_FIFO_RXFIFOSIZE_MASK (0x7U)

Definition at line 29082 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFIFOSIZE_SHIFT

#define LPUART_FIFO_RXFIFOSIZE_SHIFT (0U)

Definition at line 29083 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFLUSH

#define LPUART_FIFO_RXFLUSH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXFLUSH_SHIFT)) & LPUART_FIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

Definition at line 29155 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFLUSH_MASK

#define LPUART_FIFO_RXFLUSH_MASK (0x4000U)

Definition at line 29149 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXFLUSH_SHIFT

#define LPUART_FIFO_RXFLUSH_SHIFT (14U)

Definition at line 29150 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXIDEN

#define LPUART_FIFO_RXIDEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXIDEN_SHIFT)) & LPUART_FIFO_RXIDEN_MASK)

RXIDEN - Receiver Idle Empty Enable 0b000..Disable RDRF assertion due to partially filled FIFO when receiver is idle. 0b001..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character. 0b010..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters. 0b011..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters. 0b100..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters. 0b101..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters. 0b110..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters. 0b111..Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters.

Definition at line 29148 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXIDEN_MASK

#define LPUART_FIFO_RXIDEN_MASK (0x1C00U)

Definition at line 29136 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXIDEN_SHIFT

#define LPUART_FIFO_RXIDEN_SHIFT (10U)

Definition at line 29137 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUF

#define LPUART_FIFO_RXUF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUF_SHIFT)) & LPUART_FIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

Definition at line 29169 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUF_MASK

#define LPUART_FIFO_RXUF_MASK (0x10000U)

Definition at line 29163 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUF_SHIFT

#define LPUART_FIFO_RXUF_SHIFT (16U)

Definition at line 29164 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUFE

#define LPUART_FIFO_RXUFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_RXUFE_SHIFT)) & LPUART_FIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

Definition at line 29128 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUFE_MASK

#define LPUART_FIFO_RXUFE_MASK (0x100U)

Definition at line 29122 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_RXUFE_SHIFT

#define LPUART_FIFO_RXUFE_SHIFT (8U)

Definition at line 29123 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXEMPT

#define LPUART_FIFO_TXEMPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXEMPT_SHIFT)) & LPUART_FIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

Definition at line 29190 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXEMPT_MASK

#define LPUART_FIFO_TXEMPT_MASK (0x800000U)

Definition at line 29184 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXEMPT_SHIFT

#define LPUART_FIFO_TXEMPT_SHIFT (23U)

Definition at line 29185 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFE

#define LPUART_FIFO_TXFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFE_SHIFT)) & LPUART_FIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

Definition at line 29121 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFE_MASK

#define LPUART_FIFO_TXFE_MASK (0x80U)

Definition at line 29115 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFE_SHIFT

#define LPUART_FIFO_TXFE_SHIFT (7U)

Definition at line 29116 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFIFOSIZE

#define LPUART_FIFO_TXFIFOSIZE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFIFOSIZE_SHIFT)) & LPUART_FIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Transmit FIFO/Buffer depth = 256 datawords

Definition at line 29114 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFIFOSIZE_MASK

#define LPUART_FIFO_TXFIFOSIZE_MASK (0x70U)

Definition at line 29102 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFIFOSIZE_SHIFT

#define LPUART_FIFO_TXFIFOSIZE_SHIFT (4U)

Definition at line 29103 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFLUSH

#define LPUART_FIFO_TXFLUSH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXFLUSH_SHIFT)) & LPUART_FIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

Definition at line 29162 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFLUSH_MASK

#define LPUART_FIFO_TXFLUSH_MASK (0x8000U)

Definition at line 29156 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXFLUSH_SHIFT

#define LPUART_FIFO_TXFLUSH_SHIFT (15U)

Definition at line 29157 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOF

#define LPUART_FIFO_TXOF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOF_SHIFT)) & LPUART_FIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.

Definition at line 29176 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOF_MASK

#define LPUART_FIFO_TXOF_MASK (0x20000U)

Definition at line 29170 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOF_SHIFT

#define LPUART_FIFO_TXOF_SHIFT (17U)

Definition at line 29171 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOFE

#define LPUART_FIFO_TXOFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_FIFO_TXOFE_SHIFT)) & LPUART_FIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

Definition at line 29135 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOFE_MASK

#define LPUART_FIFO_TXOFE_MASK (0x200U)

Definition at line 29129 of file MIMXRT1062.h.

## ◆ LPUART_FIFO_TXOFE_SHIFT

#define LPUART_FIFO_TXOFE_SHIFT (9U)

Definition at line 29130 of file MIMXRT1062.h.

## ◆ LPUART_GLOBAL_RST

#define LPUART_GLOBAL_RST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_GLOBAL_RST_SHIFT)) & LPUART_GLOBAL_RST_MASK)

RST - Software Reset 0b0..Module is not reset. 0b1..Module is reset.

Definition at line 28418 of file MIMXRT1062.h.

## ◆ LPUART_GLOBAL_RST_MASK

#define LPUART_GLOBAL_RST_MASK (0x2U)

Definition at line 28412 of file MIMXRT1062.h.

## ◆ LPUART_GLOBAL_RST_SHIFT

#define LPUART_GLOBAL_RST_SHIFT (1U)

Definition at line 28413 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA1

#define LPUART_MATCH_MA1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA1_SHIFT)) & LPUART_MATCH_MA1_MASK)

MA1 - Match Address 1

Definition at line 28998 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA1_MASK

#define LPUART_MATCH_MA1_MASK (0x3FFU)

Definition at line 28994 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA1_SHIFT

#define LPUART_MATCH_MA1_SHIFT (0U)

Definition at line 28995 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA2

#define LPUART_MATCH_MA2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MATCH_MA2_SHIFT)) & LPUART_MATCH_MA2_MASK)

MA2 - Match Address 2

Definition at line 29003 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA2_MASK

#define LPUART_MATCH_MA2_MASK (0x3FF0000U)

Definition at line 28999 of file MIMXRT1062.h.

## ◆ LPUART_MATCH_MA2_SHIFT

#define LPUART_MATCH_MA2_SHIFT (16U)

Definition at line 29000 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_IREN

#define LPUART_MODIR_IREN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_IREN_SHIFT)) & LPUART_MODIR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

Definition at line 29077 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_IREN_MASK

#define LPUART_MODIR_IREN_MASK (0x40000U)

Definition at line 29071 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_IREN_SHIFT

#define LPUART_MODIR_IREN_SHIFT (18U)

Definition at line 29072 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RTSWATER

#define LPUART_MODIR_RTSWATER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RTSWATER_SHIFT)) & LPUART_MODIR_RTSWATER_MASK)

RTSWATER - Receive RTS Configuration

Definition at line 29061 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RTSWATER_MASK

#define LPUART_MODIR_RTSWATER_MASK (0x300U)

Definition at line 29057 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RTSWATER_SHIFT

#define LPUART_MODIR_RTSWATER_SHIFT (8U)

Definition at line 29058 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RXRTSE

#define LPUART_MODIR_RXRTSE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_RXRTSE_SHIFT)) & LPUART_MODIR_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the receiver data register is full or a start bit has been detected that would cause the receiver data register to become full. RTS is asserted if the receiver data register is not full and has not detected a start bit that would cause the receiver data register to become full.

Definition at line 29042 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RXRTSE_MASK

#define LPUART_MODIR_RXRTSE_MASK (0x8U)

Definition at line 29034 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_RXRTSE_SHIFT

#define LPUART_MODIR_RXRTSE_SHIFT (3U)

Definition at line 29035 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TNP

#define LPUART_MODIR_TNP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TNP_SHIFT)) & LPUART_MODIR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..1/OSR. 0b01..2/OSR. 0b10..3/OSR. 0b11..4/OSR.

Definition at line 29070 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TNP_MASK

#define LPUART_MODIR_TNP_MASK (0x30000U)

Definition at line 29062 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TNP_SHIFT

#define LPUART_MODIR_TNP_SHIFT (16U)

Definition at line 29063 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSC

#define LPUART_MODIR_TXCTSC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSC_SHIFT)) & LPUART_MODIR_TXCTSC_MASK)

TXCTSC - Transmit CTS Configuration 0b0..CTS input is sampled at the start of each character. 0b1..CTS input is sampled when the transmitter is idle.

Definition at line 29049 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSC_MASK

#define LPUART_MODIR_TXCTSC_MASK (0x10U)

Definition at line 29043 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSC_SHIFT

#define LPUART_MODIR_TXCTSC_SHIFT (4U)

Definition at line 29044 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSE

#define LPUART_MODIR_TXCTSE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSE_SHIFT)) & LPUART_MODIR_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

Definition at line 29017 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSE_MASK

#define LPUART_MODIR_TXCTSE_MASK (0x1U)

Definition at line 29008 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSE_SHIFT

#define LPUART_MODIR_TXCTSE_SHIFT (0U)

Definition at line 29009 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSSRC

#define LPUART_MODIR_TXCTSSRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXCTSSRC_SHIFT)) & LPUART_MODIR_TXCTSSRC_MASK)

TXCTSSRC - Transmit CTS Source 0b0..CTS input is the CTS_B pin. 0b1..CTS input is the inverted Receiver Match result.

Definition at line 29056 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSSRC_MASK

#define LPUART_MODIR_TXCTSSRC_MASK (0x20U)

Definition at line 29050 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXCTSSRC_SHIFT

#define LPUART_MODIR_TXCTSSRC_SHIFT (5U)

Definition at line 29051 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSE

#define LPUART_MODIR_TXRTSE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSE_SHIFT)) & LPUART_MODIR_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit.

Definition at line 29026 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSE_MASK

#define LPUART_MODIR_TXRTSE_MASK (0x2U)

Definition at line 29018 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSE_SHIFT

#define LPUART_MODIR_TXRTSE_SHIFT (1U)

Definition at line 29019 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSPOL

#define LPUART_MODIR_TXRTSPOL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_MODIR_TXRTSPOL_SHIFT)) & LPUART_MODIR_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

Definition at line 29033 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSPOL_MASK

#define LPUART_MODIR_TXRTSPOL_MASK (0x4U)

Definition at line 29027 of file MIMXRT1062.h.

## ◆ LPUART_MODIR_TXRTSPOL_SHIFT

#define LPUART_MODIR_TXRTSPOL_SHIFT (2U)

Definition at line 29028 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_RXFIFO

#define LPUART_PARAM_RXFIFO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_RXFIFO_SHIFT)) & LPUART_PARAM_RXFIFO_MASK)

RXFIFO - Receive FIFO Size

Definition at line 28407 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_RXFIFO_MASK

#define LPUART_PARAM_RXFIFO_MASK (0xFF00U)

Definition at line 28403 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_RXFIFO_SHIFT

#define LPUART_PARAM_RXFIFO_SHIFT (8U)

Definition at line 28404 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_TXFIFO

#define LPUART_PARAM_TXFIFO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_PARAM_TXFIFO_SHIFT)) & LPUART_PARAM_TXFIFO_MASK)

TXFIFO - Transmit FIFO Size

Definition at line 28402 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_TXFIFO_MASK

#define LPUART_PARAM_TXFIFO_MASK (0xFFU)

Definition at line 28398 of file MIMXRT1062.h.

## ◆ LPUART_PARAM_TXFIFO_SHIFT

#define LPUART_PARAM_TXFIFO_SHIFT (0U)

Definition at line 28399 of file MIMXRT1062.h.

## ◆ LPUART_PINCFG_TRGSEL

#define LPUART_PINCFG_TRGSEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_PINCFG_TRGSEL_SHIFT)) & LPUART_PINCFG_TRGSEL_MASK)

TRGSEL - Trigger Select 0b00..Input trigger is disabled. 0b01..Input trigger is used instead of RXD pin input. 0b10..Input trigger is used instead of CTS_B pin input. 0b11..Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger.

Definition at line 28431 of file MIMXRT1062.h.

## ◆ LPUART_PINCFG_TRGSEL_MASK

#define LPUART_PINCFG_TRGSEL_MASK (0x3U)

Definition at line 28423 of file MIMXRT1062.h.

## ◆ LPUART_PINCFG_TRGSEL_SHIFT

#define LPUART_PINCFG_TRGSEL_SHIFT (0U)

Definition at line 28424 of file MIMXRT1062.h.

## ◆ LPUART_STAT_BRK13

#define LPUART_STAT_BRK13 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_BRK13_SHIFT)) & LPUART_STAT_BRK13_MASK)

BRK13 - Break Character Generation Length 0b0..Break character is transmitted with length of 9 to 13 bit times. 0b1..Break character is transmitted with length of 12 to 15 bit times.

Definition at line 28658 of file MIMXRT1062.h.

## ◆ LPUART_STAT_BRK13_MASK

#define LPUART_STAT_BRK13_MASK (0x4000000U)

Definition at line 28652 of file MIMXRT1062.h.

## ◆ LPUART_STAT_BRK13_SHIFT

#define LPUART_STAT_BRK13_SHIFT (26U)

Definition at line 28653 of file MIMXRT1062.h.

## ◆ LPUART_STAT_FE

#define LPUART_STAT_FE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_FE_SHIFT)) & LPUART_STAT_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. This does not guarantee the framing is correct. 0b1..Framing error.

Definition at line 28595 of file MIMXRT1062.h.

## ◆ LPUART_STAT_FE_MASK

#define LPUART_STAT_FE_MASK (0x20000U)

Definition at line 28589 of file MIMXRT1062.h.

## ◆ LPUART_STAT_FE_SHIFT

#define LPUART_STAT_FE_SHIFT (17U)

Definition at line 28590 of file MIMXRT1062.h.

## ◆ LPUART_STAT_IDLE

#define LPUART_STAT_IDLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_IDLE_SHIFT)) & LPUART_STAT_IDLE_MASK)

IDLE - Idle Line Flag 0b0..No idle line detected. 0b1..Idle line was detected.

Definition at line 28616 of file MIMXRT1062.h.

## ◆ LPUART_STAT_IDLE_MASK

#define LPUART_STAT_IDLE_MASK (0x100000U)

Definition at line 28610 of file MIMXRT1062.h.

## ◆ LPUART_STAT_IDLE_SHIFT

#define LPUART_STAT_IDLE_SHIFT (20U)

Definition at line 28611 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDE

#define LPUART_STAT_LBKDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDE_SHIFT)) & LPUART_STAT_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..LIN break detect is disabled, normal break character can be detected. 0b1..LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1).

Definition at line 28651 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDE_MASK

#define LPUART_STAT_LBKDE_MASK (0x2000000U)

Definition at line 28645 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDE_SHIFT

#define LPUART_STAT_LBKDE_SHIFT (25U)

Definition at line 28646 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDIF

#define LPUART_STAT_LBKDIF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_LBKDIF_SHIFT)) & LPUART_STAT_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character has been detected. 0b1..LIN break character has been detected.

Definition at line 28698 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDIF_MASK

#define LPUART_STAT_LBKDIF_MASK (0x80000000U)

Definition at line 28692 of file MIMXRT1062.h.

## ◆ LPUART_STAT_LBKDIF_SHIFT

#define LPUART_STAT_LBKDIF_SHIFT (31U)

Definition at line 28693 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA1F

#define LPUART_STAT_MA1F | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA1F_SHIFT)) & LPUART_STAT_MA1F_MASK)

MA1F - Match 1 Flag 0b0..Received data is not equal to MA1 0b1..Received data is equal to MA1

Definition at line 28581 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA1F_MASK

#define LPUART_STAT_MA1F_MASK (0x8000U)

Definition at line 28575 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA1F_SHIFT

#define LPUART_STAT_MA1F_SHIFT (15U)

Definition at line 28576 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA2F

#define LPUART_STAT_MA2F | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MA2F_SHIFT)) & LPUART_STAT_MA2F_MASK)

MA2F - Match 2 Flag 0b0..Received data is not equal to MA2 0b1..Received data is equal to MA2

Definition at line 28574 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA2F_MASK

#define LPUART_STAT_MA2F_MASK (0x4000U)

Definition at line 28568 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MA2F_SHIFT

#define LPUART_STAT_MA2F_SHIFT (14U)

Definition at line 28569 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MSBF

#define LPUART_STAT_MSBF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_MSBF_SHIFT)) & LPUART_STAT_MSBF_MASK)

MSBF - MSB First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE].

Definition at line 28684 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MSBF_MASK

#define LPUART_STAT_MSBF_MASK (0x20000000U)

Definition at line 28675 of file MIMXRT1062.h.

## ◆ LPUART_STAT_MSBF_SHIFT

#define LPUART_STAT_MSBF_SHIFT (29U)

Definition at line 28676 of file MIMXRT1062.h.

## ◆ LPUART_STAT_NF

#define LPUART_STAT_NF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_NF_SHIFT)) & LPUART_STAT_NF_MASK)

NF - Noise Flag 0b0..No noise detected. 0b1..Noise detected in the received character in the DATA register.

Definition at line 28602 of file MIMXRT1062.h.

## ◆ LPUART_STAT_NF_MASK

#define LPUART_STAT_NF_MASK (0x40000U)

Definition at line 28596 of file MIMXRT1062.h.

## ◆ LPUART_STAT_NF_SHIFT

#define LPUART_STAT_NF_SHIFT (18U)

Definition at line 28597 of file MIMXRT1062.h.

## ◆ LPUART_STAT_OR

#define LPUART_STAT_OR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_OR_SHIFT)) & LPUART_STAT_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun. 0b1..Receive overrun (new LPUART data lost).

Definition at line 28609 of file MIMXRT1062.h.

## ◆ LPUART_STAT_OR_MASK

#define LPUART_STAT_OR_MASK (0x80000U)

Definition at line 28603 of file MIMXRT1062.h.

## ◆ LPUART_STAT_OR_SHIFT

#define LPUART_STAT_OR_SHIFT (19U)

Definition at line 28604 of file MIMXRT1062.h.

## ◆ LPUART_STAT_PF

#define LPUART_STAT_PF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_PF_SHIFT)) & LPUART_STAT_PF_MASK)

PF - Parity Error Flag 0b0..No parity error. 0b1..Parity error.

Definition at line 28588 of file MIMXRT1062.h.

## ◆ LPUART_STAT_PF_MASK

#define LPUART_STAT_PF_MASK (0x10000U)

Definition at line 28582 of file MIMXRT1062.h.

## ◆ LPUART_STAT_PF_SHIFT

#define LPUART_STAT_PF_SHIFT (16U)

Definition at line 28583 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RAF

#define LPUART_STAT_RAF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RAF_SHIFT)) & LPUART_STAT_RAF_MASK)

RAF - Receiver Active Flag 0b0..LPUART receiver idle waiting for a start bit. 0b1..LPUART receiver active (RXD input not idle).

Definition at line 28644 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RAF_MASK

#define LPUART_STAT_RAF_MASK (0x1000000U)

Definition at line 28638 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RAF_SHIFT

#define LPUART_STAT_RAF_SHIFT (24U)

Definition at line 28639 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RDRF

#define LPUART_STAT_RDRF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RDRF_SHIFT)) & LPUART_STAT_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..Receive data buffer empty. 0b1..Receive data buffer full.

Definition at line 28623 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RDRF_MASK

#define LPUART_STAT_RDRF_MASK (0x200000U)

Definition at line 28617 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RDRF_SHIFT

#define LPUART_STAT_RDRF_SHIFT (21U)

Definition at line 28618 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RWUID

#define LPUART_STAT_RWUID | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RWUID_SHIFT)) & LPUART_STAT_RWUID_MASK)

RWUID - Receive Wake Up Idle Detect 0b0..During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match. 0b1..During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match.

Definition at line 28667 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RWUID_MASK

#define LPUART_STAT_RWUID_MASK (0x8000000U)

Definition at line 28659 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RWUID_SHIFT

#define LPUART_STAT_RWUID_SHIFT (27U)

Definition at line 28660 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXEDGIF

#define LPUART_STAT_RXEDGIF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXEDGIF_SHIFT)) & LPUART_STAT_RXEDGIF_MASK)

RXEDGIF - RXD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

Definition at line 28691 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXEDGIF_MASK

#define LPUART_STAT_RXEDGIF_MASK (0x40000000U)

Definition at line 28685 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXEDGIF_SHIFT

#define LPUART_STAT_RXEDGIF_SHIFT (30U)

Definition at line 28686 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXINV

#define LPUART_STAT_RXINV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_RXINV_SHIFT)) & LPUART_STAT_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data not inverted. 0b1..Receive data inverted.

Definition at line 28674 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXINV_MASK

#define LPUART_STAT_RXINV_MASK (0x10000000U)

Definition at line 28668 of file MIMXRT1062.h.

## ◆ LPUART_STAT_RXINV_SHIFT

#define LPUART_STAT_RXINV_SHIFT (28U)

Definition at line 28669 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TC

#define LPUART_STAT_TC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TC_SHIFT)) & LPUART_STAT_TC_MASK)

TC - Transmission Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

Definition at line 28630 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TC_MASK

#define LPUART_STAT_TC_MASK (0x400000U)

Definition at line 28624 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TC_SHIFT

#define LPUART_STAT_TC_SHIFT (22U)

Definition at line 28625 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TDRE

#define LPUART_STAT_TDRE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_STAT_TDRE_SHIFT)) & LPUART_STAT_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..Transmit data buffer full. 0b1..Transmit data buffer empty.

Definition at line 28637 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TDRE_MASK

#define LPUART_STAT_TDRE_MASK (0x800000U)

Definition at line 28631 of file MIMXRT1062.h.

## ◆ LPUART_STAT_TDRE_SHIFT

#define LPUART_STAT_TDRE_SHIFT (23U)

Definition at line 28632 of file MIMXRT1062.h.

## ◆ LPUART_VERID_FEATURE

#define LPUART_VERID_FEATURE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_FEATURE_SHIFT)) & LPUART_VERID_FEATURE_MASK)

FEATURE - Feature Identification Number 0b0000000000000001..Standard feature set. 0b0000000000000011..Standard feature set with MODEM/IrDA support.

Definition at line 28383 of file MIMXRT1062.h.

## ◆ LPUART_VERID_FEATURE_MASK

#define LPUART_VERID_FEATURE_MASK (0xFFFFU)

Definition at line 28377 of file MIMXRT1062.h.

## ◆ LPUART_VERID_FEATURE_SHIFT

#define LPUART_VERID_FEATURE_SHIFT (0U)

Definition at line 28378 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MAJOR

#define LPUART_VERID_MAJOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MAJOR_SHIFT)) & LPUART_VERID_MAJOR_MASK)

MAJOR - Major Version Number

Definition at line 28393 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MAJOR_MASK

#define LPUART_VERID_MAJOR_MASK (0xFF000000U)

Definition at line 28389 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MAJOR_SHIFT

#define LPUART_VERID_MAJOR_SHIFT (24U)

Definition at line 28390 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MINOR

#define LPUART_VERID_MINOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_VERID_MINOR_SHIFT)) & LPUART_VERID_MINOR_MASK)

MINOR - Minor Version Number

Definition at line 28388 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MINOR_MASK

#define LPUART_VERID_MINOR_MASK (0xFF0000U)

Definition at line 28384 of file MIMXRT1062.h.

## ◆ LPUART_VERID_MINOR_SHIFT

#define LPUART_VERID_MINOR_SHIFT (16U)

Definition at line 28385 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXCOUNT

#define LPUART_WATER_RXCOUNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXCOUNT_SHIFT)) & LPUART_WATER_RXCOUNT_MASK)

RXCOUNT - Receive Counter

Definition at line 29214 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXCOUNT_MASK

#define LPUART_WATER_RXCOUNT_MASK (0x7000000U)

Definition at line 29210 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXCOUNT_SHIFT

#define LPUART_WATER_RXCOUNT_SHIFT (24U)

Definition at line 29211 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXWATER

#define LPUART_WATER_RXWATER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_RXWATER_SHIFT)) & LPUART_WATER_RXWATER_MASK)

RXWATER - Receive Watermark

Definition at line 29209 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXWATER_MASK

#define LPUART_WATER_RXWATER_MASK (0x30000U)

Definition at line 29205 of file MIMXRT1062.h.

## ◆ LPUART_WATER_RXWATER_SHIFT

#define LPUART_WATER_RXWATER_SHIFT (16U)

Definition at line 29206 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXCOUNT

#define LPUART_WATER_TXCOUNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXCOUNT_SHIFT)) & LPUART_WATER_TXCOUNT_MASK)

TXCOUNT - Transmit Counter

Definition at line 29204 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXCOUNT_MASK

#define LPUART_WATER_TXCOUNT_MASK (0x700U)

Definition at line 29200 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXCOUNT_SHIFT

#define LPUART_WATER_TXCOUNT_SHIFT (8U)

Definition at line 29201 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXWATER

#define LPUART_WATER_TXWATER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPUART_WATER_TXWATER_SHIFT)) & LPUART_WATER_TXWATER_MASK)

TXWATER - Transmit Watermark

Definition at line 29199 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXWATER_MASK

#define LPUART_WATER_TXWATER_MASK (0x3U)

Definition at line 29195 of file MIMXRT1062.h.

## ◆ LPUART_WATER_TXWATER_SHIFT

#define LPUART_WATER_TXWATER_SHIFT (0U)

Definition at line 29196 of file MIMXRT1062.h.