Callisto4Bootloader: CAN Register Masks

Callisto4Bootloader

Macros
CAN Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » CAN Peripheral Access Layer

## Macros

#define | CAN_CS_COUNT_MB8B (64U)
#define | CAN_ID_COUNT_MB8B (64U)
#define | CAN_WORD_COUNT_MB8B (64U)
#define | CAN_WORD_COUNT_MB8B2 (2U)
#define | CAN_CS_COUNT_MB16B (42U)
#define | CAN_ID_COUNT_MB16B (42U)
#define | CAN_WORD_COUNT_MB16B (42U)
#define | CAN_WORD_COUNT_MB16B2 (4U)
#define | CAN_CS_COUNT_MB32B (24U)
#define | CAN_ID_COUNT_MB32B (24U)
#define | CAN_WORD_COUNT_MB32B (24U)
#define | CAN_WORD_COUNT_MB32B2 (8U)
#define | CAN_CS_COUNT_MB64B (14U)
#define | CAN_ID_COUNT_MB64B (14U)
#define | CAN_WORD_COUNT_MB64B (14U)
#define | CAN_WORD_COUNT_MB64B2 (16U)
#define | CAN_CS_COUNT (64U)
#define | CAN_ID_COUNT (64U)
#define | CAN_WORD0_COUNT (64U)
#define | CAN_WORD1_COUNT (64U)
#define | CAN_RXIMR_COUNT (64U)
#define | CAN_HR_TIME_STAMP_COUNT (64U)
#define | CAN_ERFFEL_COUNT (128U)

## MCR - Module Configuration Register

#define | CAN_MCR_MAXMB_MASK (0x7FU)
#define | CAN_MCR_MAXMB_SHIFT (0U)
#define | CAN_MCR_MAXMB(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)
#define | CAN_MCR_IDAM_MASK (0x300U)
#define | CAN_MCR_IDAM_SHIFT (8U)
#define | CAN_MCR_IDAM(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)
#define | CAN_MCR_FDEN_MASK (0x800U)
#define | CAN_MCR_FDEN_SHIFT (11U)
#define | CAN_MCR_FDEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FDEN_SHIFT)) & CAN_MCR_FDEN_MASK)
#define | CAN_MCR_AEN_MASK (0x1000U)
#define | CAN_MCR_AEN_SHIFT (12U)
#define | CAN_MCR_AEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)
#define | CAN_MCR_LPRIOEN_MASK (0x2000U)
#define | CAN_MCR_LPRIOEN_SHIFT (13U)
#define | CAN_MCR_LPRIOEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)
#define | CAN_MCR_DMA_MASK (0x8000U)
#define | CAN_MCR_DMA_SHIFT (15U)
#define | CAN_MCR_DMA(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_DMA_SHIFT)) & CAN_MCR_DMA_MASK)
#define | CAN_MCR_IRMQ_MASK (0x10000U)
#define | CAN_MCR_IRMQ_SHIFT (16U)
#define | CAN_MCR_IRMQ(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)
#define | CAN_MCR_SRXDIS_MASK (0x20000U)
#define | CAN_MCR_SRXDIS_SHIFT (17U)
#define | CAN_MCR_SRXDIS(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)
#define | CAN_MCR_DOZE_MASK (0x40000U)
#define | CAN_MCR_DOZE_SHIFT (18U)
#define | CAN_MCR_DOZE(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_DOZE_SHIFT)) & CAN_MCR_DOZE_MASK)
#define | CAN_MCR_WAKSRC_MASK (0x80000U)
#define | CAN_MCR_WAKSRC_SHIFT (19U)
#define | CAN_MCR_WAKSRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)
#define | CAN_MCR_LPMACK_MASK (0x100000U)
#define | CAN_MCR_LPMACK_SHIFT (20U)
#define | CAN_MCR_LPMACK(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)
#define | CAN_MCR_WRNEN_MASK (0x200000U)
#define | CAN_MCR_WRNEN_SHIFT (21U)
#define | CAN_MCR_WRNEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)
#define | CAN_MCR_SLFWAK_MASK (0x400000U)
#define | CAN_MCR_SLFWAK_SHIFT (22U)
#define | CAN_MCR_SLFWAK(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)
#define | CAN_MCR_SUPV_MASK (0x800000U)
#define | CAN_MCR_SUPV_SHIFT (23U)
#define | CAN_MCR_SUPV(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)
#define | CAN_MCR_FRZACK_MASK (0x1000000U)
#define | CAN_MCR_FRZACK_SHIFT (24U)
#define | CAN_MCR_FRZACK(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)
#define | CAN_MCR_SOFTRST_MASK (0x2000000U)
#define | CAN_MCR_SOFTRST_SHIFT (25U)
#define | CAN_MCR_SOFTRST(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)
#define | CAN_MCR_WAKMSK_MASK (0x4000000U)
#define | CAN_MCR_WAKMSK_SHIFT (26U)
#define | CAN_MCR_WAKMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)
#define | CAN_MCR_NOTRDY_MASK (0x8000000U)
#define | CAN_MCR_NOTRDY_SHIFT (27U)
#define | CAN_MCR_NOTRDY(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)
#define | CAN_MCR_HALT_MASK (0x10000000U)
#define | CAN_MCR_HALT_SHIFT (28U)
#define | CAN_MCR_HALT(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)
#define | CAN_MCR_RFEN_MASK (0x20000000U)
#define | CAN_MCR_RFEN_SHIFT (29U)
#define | CAN_MCR_RFEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)
#define | CAN_MCR_FRZ_MASK (0x40000000U)
#define | CAN_MCR_FRZ_SHIFT (30U)
#define | CAN_MCR_FRZ(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)
#define | CAN_MCR_MDIS_MASK (0x80000000U)
#define | CAN_MCR_MDIS_SHIFT (31U)
#define | CAN_MCR_MDIS(x) (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)

## CTRL1 - Control 1 Register..Control 1 register

#define | CAN_CTRL1_PROPSEG_MASK (0x7U)
#define | CAN_CTRL1_PROPSEG_SHIFT (0U)
#define | CAN_CTRL1_PROPSEG(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)
#define | CAN_CTRL1_LOM_MASK (0x8U)
#define | CAN_CTRL1_LOM_SHIFT (3U)
#define | CAN_CTRL1_LOM(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)
#define | CAN_CTRL1_LBUF_MASK (0x10U)
#define | CAN_CTRL1_LBUF_SHIFT (4U)
#define | CAN_CTRL1_LBUF(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)
#define | CAN_CTRL1_TSYN_MASK (0x20U)
#define | CAN_CTRL1_TSYN_SHIFT (5U)
#define | CAN_CTRL1_TSYN(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)
#define | CAN_CTRL1_BOFFREC_MASK (0x40U)
#define | CAN_CTRL1_BOFFREC_SHIFT (6U)
#define | CAN_CTRL1_BOFFREC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)
#define | CAN_CTRL1_SMP_MASK (0x80U)
#define | CAN_CTRL1_SMP_SHIFT (7U)
#define | CAN_CTRL1_SMP(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)
#define | CAN_CTRL1_RWRNMSK_MASK (0x400U)
#define | CAN_CTRL1_RWRNMSK_SHIFT (10U)
#define | CAN_CTRL1_RWRNMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)
#define | CAN_CTRL1_TWRNMSK_MASK (0x800U)
#define | CAN_CTRL1_TWRNMSK_SHIFT (11U)
#define | CAN_CTRL1_TWRNMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)
#define | CAN_CTRL1_LPB_MASK (0x1000U)
#define | CAN_CTRL1_LPB_SHIFT (12U)
#define | CAN_CTRL1_LPB(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)
#define | CAN_CTRL1_CLKSRC_MASK (0x2000U)
#define | CAN_CTRL1_CLKSRC_SHIFT (13U)
#define | CAN_CTRL1_CLKSRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_CLKSRC_SHIFT)) & CAN_CTRL1_CLKSRC_MASK)
#define | CAN_CTRL1_ERRMSK_MASK (0x4000U)
#define | CAN_CTRL1_ERRMSK_SHIFT (14U)
#define | CAN_CTRL1_ERRMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)
#define | CAN_CTRL1_BOFFMSK_MASK (0x8000U)
#define | CAN_CTRL1_BOFFMSK_SHIFT (15U)
#define | CAN_CTRL1_BOFFMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)
#define | CAN_CTRL1_PSEG2_MASK (0x70000U)
#define | CAN_CTRL1_PSEG2_SHIFT (16U)
#define | CAN_CTRL1_PSEG2(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)
#define | CAN_CTRL1_PSEG1_MASK (0x380000U)
#define | CAN_CTRL1_PSEG1_SHIFT (19U)
#define | CAN_CTRL1_PSEG1(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)
#define | CAN_CTRL1_RJW_MASK (0xC00000U)
#define | CAN_CTRL1_RJW_SHIFT (22U)
#define | CAN_CTRL1_RJW(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)
#define | CAN_CTRL1_PRESDIV_MASK (0xFF000000U)
#define | CAN_CTRL1_PRESDIV_SHIFT (24U)
#define | CAN_CTRL1_PRESDIV(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)

## TIMER - Free Running Timer Register..Free Running Timer

#define | CAN_TIMER_TIMER_MASK (0xFFFFU)
#define | CAN_TIMER_TIMER_SHIFT (0U)
#define | CAN_TIMER_TIMER(x) (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)

## RXMGMASK - Rx Mailboxes Global Mask Register

#define | CAN_RXMGMASK_MG_MASK (0xFFFFFFFFU)
#define | CAN_RXMGMASK_MG_SHIFT (0U)
#define | CAN_RXMGMASK_MG(x) (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)

## RX14MASK - Rx Buffer 14 Mask Register..Rx 14 Mask register

#define | CAN_RX14MASK_RX14M_MASK (0xFFFFFFFFU)
#define | CAN_RX14MASK_RX14M_SHIFT (0U)
#define | CAN_RX14MASK_RX14M(x) (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)

## RX15MASK - Rx Buffer 15 Mask Register..Rx 15 Mask register

#define | CAN_RX15MASK_RX15M_MASK (0xFFFFFFFFU)
#define | CAN_RX15MASK_RX15M_SHIFT (0U)
#define | CAN_RX15MASK_RX15M(x) (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)

## ECR - Error Counter Register..Error Counter

#define | CAN_ECR_TXERRCNT_MASK (0xFFU)
#define | CAN_ECR_TXERRCNT_SHIFT (0U)
#define | CAN_ECR_TXERRCNT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TXERRCNT_SHIFT)) & CAN_ECR_TXERRCNT_MASK)
#define | CAN_ECR_TX_ERR_COUNTER_MASK (0xFFU)
#define | CAN_ECR_TX_ERR_COUNTER_SHIFT (0U)
#define | CAN_ECR_TX_ERR_COUNTER(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)
#define | CAN_ECR_RXERRCNT_MASK (0xFF00U)
#define | CAN_ECR_RXERRCNT_SHIFT (8U)
#define | CAN_ECR_RXERRCNT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RXERRCNT_SHIFT)) & CAN_ECR_RXERRCNT_MASK)
#define | CAN_ECR_RX_ERR_COUNTER_MASK (0xFF00U)
#define | CAN_ECR_RX_ERR_COUNTER_SHIFT (8U)
#define | CAN_ECR_RX_ERR_COUNTER(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)
#define | CAN_ECR_TXERRCNT_FAST_MASK (0xFF0000U)
#define | CAN_ECR_TXERRCNT_FAST_SHIFT (16U)
#define | CAN_ECR_TXERRCNT_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TXERRCNT_FAST_SHIFT)) & CAN_ECR_TXERRCNT_FAST_MASK)
#define | CAN_ECR_RXERRCNT_FAST_MASK (0xFF000000U)
#define | CAN_ECR_RXERRCNT_FAST_SHIFT (24U)
#define | CAN_ECR_RXERRCNT_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RXERRCNT_FAST_SHIFT)) & CAN_ECR_RXERRCNT_FAST_MASK)

## ESR1 - Error and Status 1 Register..Error and Status 1 register

#define | CAN_ESR1_WAKINT_MASK (0x1U)
#define | CAN_ESR1_WAKINT_SHIFT (0U)
#define | CAN_ESR1_WAKINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)
#define | CAN_ESR1_ERRINT_MASK (0x2U)
#define | CAN_ESR1_ERRINT_SHIFT (1U)
#define | CAN_ESR1_ERRINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)
#define | CAN_ESR1_BOFFINT_MASK (0x4U)
#define | CAN_ESR1_BOFFINT_SHIFT (2U)
#define | CAN_ESR1_BOFFINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)
#define | CAN_ESR1_RX_MASK (0x8U)
#define | CAN_ESR1_RX_SHIFT (3U)
#define | CAN_ESR1_RX(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)
#define | CAN_ESR1_FLTCONF_MASK (0x30U)
#define | CAN_ESR1_FLTCONF_SHIFT (4U)
#define | CAN_ESR1_FLTCONF(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)
#define | CAN_ESR1_TX_MASK (0x40U)
#define | CAN_ESR1_TX_SHIFT (6U)
#define | CAN_ESR1_TX(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)
#define | CAN_ESR1_IDLE_MASK (0x80U)
#define | CAN_ESR1_IDLE_SHIFT (7U)
#define | CAN_ESR1_IDLE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)
#define | CAN_ESR1_RXWRN_MASK (0x100U)
#define | CAN_ESR1_RXWRN_SHIFT (8U)
#define | CAN_ESR1_RXWRN(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)
#define | CAN_ESR1_TXWRN_MASK (0x200U)
#define | CAN_ESR1_TXWRN_SHIFT (9U)
#define | CAN_ESR1_TXWRN(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)
#define | CAN_ESR1_STFERR_MASK (0x400U)
#define | CAN_ESR1_STFERR_SHIFT (10U)
#define | CAN_ESR1_STFERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)
#define | CAN_ESR1_FRMERR_MASK (0x800U)
#define | CAN_ESR1_FRMERR_SHIFT (11U)
#define | CAN_ESR1_FRMERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
#define | CAN_ESR1_CRCERR_MASK (0x1000U)
#define | CAN_ESR1_CRCERR_SHIFT (12U)
#define | CAN_ESR1_CRCERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)
#define | CAN_ESR1_ACKERR_MASK (0x2000U)
#define | CAN_ESR1_ACKERR_SHIFT (13U)
#define | CAN_ESR1_ACKERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)
#define | CAN_ESR1_BIT0ERR_MASK (0x4000U)
#define | CAN_ESR1_BIT0ERR_SHIFT (14U)
#define | CAN_ESR1_BIT0ERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)
#define | CAN_ESR1_BIT1ERR_MASK (0x8000U)
#define | CAN_ESR1_BIT1ERR_SHIFT (15U)
#define | CAN_ESR1_BIT1ERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)
#define | CAN_ESR1_RWRNINT_MASK (0x10000U)
#define | CAN_ESR1_RWRNINT_SHIFT (16U)
#define | CAN_ESR1_RWRNINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)
#define | CAN_ESR1_TWRNINT_MASK (0x20000U)
#define | CAN_ESR1_TWRNINT_SHIFT (17U)
#define | CAN_ESR1_TWRNINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)
#define | CAN_ESR1_SYNCH_MASK (0x40000U)
#define | CAN_ESR1_SYNCH_SHIFT (18U)
#define | CAN_ESR1_SYNCH(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)
#define | CAN_ESR1_BOFFDONEINT_MASK (0x80000U)
#define | CAN_ESR1_BOFFDONEINT_SHIFT (19U)
#define | CAN_ESR1_BOFFDONEINT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFDONEINT_SHIFT)) & CAN_ESR1_BOFFDONEINT_MASK)
#define | CAN_ESR1_ERRINT_FAST_MASK (0x100000U)
#define | CAN_ESR1_ERRINT_FAST_SHIFT (20U)
#define | CAN_ESR1_ERRINT_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_FAST_SHIFT)) & CAN_ESR1_ERRINT_FAST_MASK)
#define | CAN_ESR1_ERROVR_MASK (0x200000U)
#define | CAN_ESR1_ERROVR_SHIFT (21U)
#define | CAN_ESR1_ERROVR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERROVR_SHIFT)) & CAN_ESR1_ERROVR_MASK)
#define | CAN_ESR1_STFERR_FAST_MASK (0x4000000U)
#define | CAN_ESR1_STFERR_FAST_SHIFT (26U)
#define | CAN_ESR1_STFERR_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_FAST_SHIFT)) & CAN_ESR1_STFERR_FAST_MASK)
#define | CAN_ESR1_FRMERR_FAST_MASK (0x8000000U)
#define | CAN_ESR1_FRMERR_FAST_SHIFT (27U)
#define | CAN_ESR1_FRMERR_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_FAST_SHIFT)) & CAN_ESR1_FRMERR_FAST_MASK)
#define | CAN_ESR1_CRCERR_FAST_MASK (0x10000000U)
#define | CAN_ESR1_CRCERR_FAST_SHIFT (28U)
#define | CAN_ESR1_CRCERR_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_FAST_SHIFT)) & CAN_ESR1_CRCERR_FAST_MASK)
#define | CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U)
#define | CAN_ESR1_BIT0ERR_FAST_SHIFT (30U)
#define | CAN_ESR1_BIT0ERR_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
#define | CAN_ESR1_BIT1ERR_FAST_MASK (0x80000000U)
#define | CAN_ESR1_BIT1ERR_FAST_SHIFT (31U)
#define | CAN_ESR1_BIT1ERR_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_FAST_SHIFT)) & CAN_ESR1_BIT1ERR_FAST_MASK)

## IMASK2 - Interrupt Masks 2 Register..Interrupt Masks 2 register

#define | CAN_IMASK2_BUF63TO32M_MASK (0xFFFFFFFFU)
#define | CAN_IMASK2_BUF63TO32M_SHIFT (0U)
#define | CAN_IMASK2_BUF63TO32M(x) (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUF63TO32M_SHIFT)) & CAN_IMASK2_BUF63TO32M_MASK)
#define | CAN_IMASK2_BUFHM_MASK (0xFFFFFFFFU)
#define | CAN_IMASK2_BUFHM_SHIFT (0U)
#define | CAN_IMASK2_BUFHM(x) (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)

## IMASK1 - Interrupt Masks 1 Register..Interrupt Masks 1 register

#define | CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU)
#define | CAN_IMASK1_BUF31TO0M_SHIFT (0U)
#define | CAN_IMASK1_BUF31TO0M(x) (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
#define | CAN_IMASK1_BUFLM_MASK (0xFFFFFFFFU)
#define | CAN_IMASK1_BUFLM_SHIFT (0U)
#define | CAN_IMASK1_BUFLM(x) (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)

## IFLAG2 - Interrupt Flags 2 Register..Interrupt Flags 2 register

#define | CAN_IFLAG2_BUF63TO32I_MASK (0xFFFFFFFFU)
#define | CAN_IFLAG2_BUF63TO32I_SHIFT (0U)
#define | CAN_IFLAG2_BUF63TO32I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUF63TO32I_SHIFT)) & CAN_IFLAG2_BUF63TO32I_MASK)
#define | CAN_IFLAG2_BUFHI_MASK (0xFFFFFFFFU)
#define | CAN_IFLAG2_BUFHI_SHIFT (0U)
#define | CAN_IFLAG2_BUFHI(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)

## IFLAG1 - Interrupt Flags 1 Register..Interrupt Flags 1 register

#define | CAN_IFLAG1_BUF0I_MASK (0x1U)
#define | CAN_IFLAG1_BUF0I_SHIFT (0U)
#define | CAN_IFLAG1_BUF0I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF0I_SHIFT)) & CAN_IFLAG1_BUF0I_MASK)
#define | CAN_IFLAG1_BUF4TO0I_MASK (0x1FU)
#define | CAN_IFLAG1_BUF4TO0I_SHIFT (0U)
#define | CAN_IFLAG1_BUF4TO0I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)
#define | CAN_IFLAG1_BUF4TO1I_MASK (0x1EU)
#define | CAN_IFLAG1_BUF4TO1I_SHIFT (1U)
#define | CAN_IFLAG1_BUF4TO1I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO1I_SHIFT)) & CAN_IFLAG1_BUF4TO1I_MASK)
#define | CAN_IFLAG1_BUF5I_MASK (0x20U)
#define | CAN_IFLAG1_BUF5I_SHIFT (5U)
#define | CAN_IFLAG1_BUF5I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)
#define | CAN_IFLAG1_BUF6I_MASK (0x40U)
#define | CAN_IFLAG1_BUF6I_SHIFT (6U)
#define | CAN_IFLAG1_BUF6I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)
#define | CAN_IFLAG1_BUF7I_MASK (0x80U)
#define | CAN_IFLAG1_BUF7I_SHIFT (7U)
#define | CAN_IFLAG1_BUF7I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)
#define | CAN_IFLAG1_BUF31TO8I_MASK (0xFFFFFF00U)
#define | CAN_IFLAG1_BUF31TO8I_SHIFT (8U)
#define | CAN_IFLAG1_BUF31TO8I(x) (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)

## CTRL2 - Control 2 Register..Control 2 register

#define | CAN_CTRL2_TSTAMPCAP_MASK (0xC0U)
#define | CAN_CTRL2_TSTAMPCAP_SHIFT (6U)
#define | CAN_CTRL2_TSTAMPCAP(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TSTAMPCAP_SHIFT)) & CAN_CTRL2_TSTAMPCAP_MASK)
#define | CAN_CTRL2_MBTSBASE_MASK (0x300U)
#define | CAN_CTRL2_MBTSBASE_SHIFT (8U)
#define | CAN_CTRL2_MBTSBASE(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MBTSBASE_SHIFT)) & CAN_CTRL2_MBTSBASE_MASK)
#define | CAN_CTRL2_EDFLTDIS_MASK (0x800U)
#define | CAN_CTRL2_EDFLTDIS_SHIFT (11U)
#define | CAN_CTRL2_EDFLTDIS(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EDFLTDIS_SHIFT)) & CAN_CTRL2_EDFLTDIS_MASK)
#define | CAN_CTRL2_ISOCANFDEN_MASK (0x1000U)
#define | CAN_CTRL2_ISOCANFDEN_SHIFT (12U)
#define | CAN_CTRL2_ISOCANFDEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_ISOCANFDEN_SHIFT)) & CAN_CTRL2_ISOCANFDEN_MASK)
#define | CAN_CTRL2_BTE_MASK (0x2000U)
#define | CAN_CTRL2_BTE_SHIFT (13U)
#define | CAN_CTRL2_BTE(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_BTE_SHIFT)) & CAN_CTRL2_BTE_MASK)
#define | CAN_CTRL2_PREXCEN_MASK (0x4000U)
#define | CAN_CTRL2_PREXCEN_SHIFT (14U)
#define | CAN_CTRL2_PREXCEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_PREXCEN_SHIFT)) & CAN_CTRL2_PREXCEN_MASK)
#define | CAN_CTRL2_TIMER_SRC_MASK (0x8000U)
#define | CAN_CTRL2_TIMER_SRC_SHIFT (15U)
#define | CAN_CTRL2_TIMER_SRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TIMER_SRC_SHIFT)) & CAN_CTRL2_TIMER_SRC_MASK)
#define | CAN_CTRL2_EACEN_MASK (0x10000U)
#define | CAN_CTRL2_EACEN_SHIFT (16U)
#define | CAN_CTRL2_EACEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)
#define | CAN_CTRL2_RRS_MASK (0x20000U)
#define | CAN_CTRL2_RRS_SHIFT (17U)
#define | CAN_CTRL2_RRS(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)
#define | CAN_CTRL2_MRP_MASK (0x40000U)
#define | CAN_CTRL2_MRP_SHIFT (18U)
#define | CAN_CTRL2_MRP(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
#define | CAN_CTRL2_TASD_MASK (0xF80000U)
#define | CAN_CTRL2_TASD_SHIFT (19U)
#define | CAN_CTRL2_TASD(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)
#define | CAN_CTRL2_RFFN_MASK (0xF000000U)
#define | CAN_CTRL2_RFFN_SHIFT (24U)
#define | CAN_CTRL2_RFFN(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)
#define | CAN_CTRL2_WRMFRZ_MASK (0x10000000U)
#define | CAN_CTRL2_WRMFRZ_SHIFT (28U)
#define | CAN_CTRL2_WRMFRZ(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)
#define | CAN_CTRL2_BOFFDONEMSK_MASK (0x40000000U)
#define | CAN_CTRL2_BOFFDONEMSK_SHIFT (30U)
#define | CAN_CTRL2_BOFFDONEMSK(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_BOFFDONEMSK_SHIFT)) & CAN_CTRL2_BOFFDONEMSK_MASK)
#define | CAN_CTRL2_ERRMSK_FAST_MASK (0x80000000U)
#define | CAN_CTRL2_ERRMSK_FAST_SHIFT (31U)
#define | CAN_CTRL2_ERRMSK_FAST(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_ERRMSK_FAST_SHIFT)) & CAN_CTRL2_ERRMSK_FAST_MASK)

## ESR2 - Error and Status 2 Register..Error and Status 2 register

#define | CAN_ESR2_IMB_MASK (0x2000U)
#define | CAN_ESR2_IMB_SHIFT (13U)
#define | CAN_ESR2_IMB(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)
#define | CAN_ESR2_VPS_MASK (0x4000U)
#define | CAN_ESR2_VPS_SHIFT (14U)
#define | CAN_ESR2_VPS(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
#define | CAN_ESR2_LPTM_MASK (0x7F0000U)
#define | CAN_ESR2_LPTM_SHIFT (16U)
#define | CAN_ESR2_LPTM(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)

## CRCR - CRC Register

#define | CAN_CRCR_TXCRC_MASK (0x7FFFU)
#define | CAN_CRCR_TXCRC_SHIFT (0U)
#define | CAN_CRCR_TXCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)
#define | CAN_CRCR_MBCRC_MASK (0x7F0000U)
#define | CAN_CRCR_MBCRC_SHIFT (16U)
#define | CAN_CRCR_MBCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)

## RXFGMASK - Rx FIFO Global Mask Register..Legacy Rx FIFO Global Mask register

#define | CAN_RXFGMASK_FGM_MASK (0xFFFFFFFFU)
#define | CAN_RXFGMASK_FGM_SHIFT (0U)
#define | CAN_RXFGMASK_FGM(x) (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)

## RXFIR - Rx FIFO Information Register..Legacy Rx FIFO Information Register

#define | CAN_RXFIR_IDHIT_MASK (0x1FFU)
#define | CAN_RXFIR_IDHIT_SHIFT (0U)
#define | CAN_RXFIR_IDHIT(x) (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)

## CBT - CAN Bit Timing Register

#define | CAN_CBT_EPSEG2_MASK (0x1FU)
#define | CAN_CBT_EPSEG2_SHIFT (0U)
#define | CAN_CBT_EPSEG2(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPSEG2_SHIFT)) & CAN_CBT_EPSEG2_MASK)
#define | CAN_CBT_EPSEG1_MASK (0x3E0U)
#define | CAN_CBT_EPSEG1_SHIFT (5U)
#define | CAN_CBT_EPSEG1(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPSEG1_SHIFT)) & CAN_CBT_EPSEG1_MASK)
#define | CAN_CBT_EPROPSEG_MASK (0xFC00U)
#define | CAN_CBT_EPROPSEG_SHIFT (10U)
#define | CAN_CBT_EPROPSEG(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPROPSEG_SHIFT)) & CAN_CBT_EPROPSEG_MASK)
#define | CAN_CBT_ERJW_MASK (0x1F0000U)
#define | CAN_CBT_ERJW_SHIFT (16U)
#define | CAN_CBT_ERJW(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_ERJW_SHIFT)) & CAN_CBT_ERJW_MASK)
#define | CAN_CBT_EPRESDIV_MASK (0x7FE00000U)
#define | CAN_CBT_EPRESDIV_SHIFT (21U)
#define | CAN_CBT_EPRESDIV(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPRESDIV_SHIFT)) & CAN_CBT_EPRESDIV_MASK)
#define | CAN_CBT_BTF_MASK (0x80000000U)
#define | CAN_CBT_BTF_SHIFT (31U)
#define | CAN_CBT_BTF(x) (((uint32_t)(((uint32_t)(x)) << CAN_CBT_BTF_SHIFT)) & CAN_CBT_BTF_MASK)

## DBG1 - Debug 1 register

#define | CAN_DBG1_CFSM_MASK (0x3FU)
#define | CAN_DBG1_CFSM_SHIFT (0U)
#define | CAN_DBG1_CFSM(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG1_CFSM_SHIFT)) & CAN_DBG1_CFSM_MASK)
#define | CAN_DBG1_CBN_MASK (0x1F000000U)
#define | CAN_DBG1_CBN_SHIFT (24U)
#define | CAN_DBG1_CBN(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG1_CBN_SHIFT)) & CAN_DBG1_CBN_MASK)

## DBG2 - Debug 2 register

#define | CAN_DBG2_RMP_MASK (0x7FU)
#define | CAN_DBG2_RMP_SHIFT (0U)
#define | CAN_DBG2_RMP(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_RMP_SHIFT)) & CAN_DBG2_RMP_MASK)
#define | CAN_DBG2_MPP_MASK (0x80U)
#define | CAN_DBG2_MPP_SHIFT (7U)
#define | CAN_DBG2_MPP(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_MPP_SHIFT)) & CAN_DBG2_MPP_MASK)
#define | CAN_DBG2_TAP_MASK (0x7F00U)
#define | CAN_DBG2_TAP_SHIFT (8U)
#define | CAN_DBG2_TAP(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_TAP_SHIFT)) & CAN_DBG2_TAP_MASK)
#define | CAN_DBG2_APP_MASK (0x8000U)
#define | CAN_DBG2_APP_SHIFT (15U)
#define | CAN_DBG2_APP(x) (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_APP_SHIFT)) & CAN_DBG2_APP_MASK)

## CS - Message Buffer 0 CS Register..Message Buffer 13 CS Register

#define | CAN_CS_TIME_STAMP_MASK (0xFFFFU)
#define | CAN_CS_TIME_STAMP_SHIFT (0U)
#define | CAN_CS_TIME_STAMP(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)
#define | CAN_CS_DLC_MASK (0xF0000U)
#define | CAN_CS_DLC_SHIFT (16U)
#define | CAN_CS_DLC(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)
#define | CAN_CS_RTR_MASK (0x100000U)
#define | CAN_CS_RTR_SHIFT (20U)
#define | CAN_CS_RTR(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)
#define | CAN_CS_IDE_MASK (0x200000U)
#define | CAN_CS_IDE_SHIFT (21U)
#define | CAN_CS_IDE(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)
#define | CAN_CS_SRR_MASK (0x400000U)
#define | CAN_CS_SRR_SHIFT (22U)
#define | CAN_CS_SRR(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)
#define | CAN_CS_CODE_MASK (0xF000000U)
#define | CAN_CS_CODE_SHIFT (24U)
#define | CAN_CS_CODE(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)
#define | CAN_CS_ESI_MASK (0x20000000U)
#define | CAN_CS_ESI_SHIFT (29U)
#define | CAN_CS_ESI(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_ESI_SHIFT)) & CAN_CS_ESI_MASK)
#define | CAN_CS_BRS_MASK (0x40000000U)
#define | CAN_CS_BRS_SHIFT (30U)
#define | CAN_CS_BRS(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_BRS_SHIFT)) & CAN_CS_BRS_MASK)
#define | CAN_CS_EDL_MASK (0x80000000U)
#define | CAN_CS_EDL_SHIFT (31U)
#define | CAN_CS_EDL(x) (((uint32_t)(((uint32_t)(x)) << CAN_CS_EDL_SHIFT)) & CAN_CS_EDL_MASK)

## ID - Message Buffer 0 ID Register..Message Buffer 13 ID Register

#define | CAN_ID_EXT_MASK (0x3FFFFU)
#define | CAN_ID_EXT_SHIFT (0U)
#define | CAN_ID_EXT(x) (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)
#define | CAN_ID_STD_MASK (0x1FFC0000U)
#define | CAN_ID_STD_SHIFT (18U)
#define | CAN_ID_STD(x) (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)
#define | CAN_ID_PRIO_MASK (0xE0000000U)
#define | CAN_ID_PRIO_SHIFT (29U)
#define | CAN_ID_PRIO(x) (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)

## WORD - Message Buffer 0 WORD_64B Register..Message Buffer 13 WORD_64B Register

#define | CAN_WORD_DATA_BYTE_3_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_3_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_3(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_3_SHIFT)) & CAN_WORD_DATA_BYTE_3_MASK)
#define | CAN_WORD_DATA_BYTE_7_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_7_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_7(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_7_SHIFT)) & CAN_WORD_DATA_BYTE_7_MASK)
#define | CAN_WORD_DATA_BYTE_11_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_11_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_11(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_11_SHIFT)) & CAN_WORD_DATA_BYTE_11_MASK)
#define | CAN_WORD_DATA_BYTE_15_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_15_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_15(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_15_SHIFT)) & CAN_WORD_DATA_BYTE_15_MASK)
#define | CAN_WORD_DATA_BYTE_19_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_19_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_19(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_19_SHIFT)) & CAN_WORD_DATA_BYTE_19_MASK)
#define | CAN_WORD_DATA_BYTE_23_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_23_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_23(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_23_SHIFT)) & CAN_WORD_DATA_BYTE_23_MASK)
#define | CAN_WORD_DATA_BYTE_27_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_27_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_27(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_27_SHIFT)) & CAN_WORD_DATA_BYTE_27_MASK)
#define | CAN_WORD_DATA_BYTE_31_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_31_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_31(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_31_SHIFT)) & CAN_WORD_DATA_BYTE_31_MASK)
#define | CAN_WORD_DATA_BYTE_35_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_35_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_35(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_35_SHIFT)) & CAN_WORD_DATA_BYTE_35_MASK)
#define | CAN_WORD_DATA_BYTE_39_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_39_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_39(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_39_SHIFT)) & CAN_WORD_DATA_BYTE_39_MASK)
#define | CAN_WORD_DATA_BYTE_43_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_43_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_43(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_43_SHIFT)) & CAN_WORD_DATA_BYTE_43_MASK)
#define | CAN_WORD_DATA_BYTE_47_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_47_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_47(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_47_SHIFT)) & CAN_WORD_DATA_BYTE_47_MASK)
#define | CAN_WORD_DATA_BYTE_51_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_51_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_51(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_51_SHIFT)) & CAN_WORD_DATA_BYTE_51_MASK)
#define | CAN_WORD_DATA_BYTE_55_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_55_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_55(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_55_SHIFT)) & CAN_WORD_DATA_BYTE_55_MASK)
#define | CAN_WORD_DATA_BYTE_59_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_59_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_59(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_59_SHIFT)) & CAN_WORD_DATA_BYTE_59_MASK)
#define | CAN_WORD_DATA_BYTE_63_MASK (0xFFU)
#define | CAN_WORD_DATA_BYTE_63_SHIFT (0U)
#define | CAN_WORD_DATA_BYTE_63(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_63_SHIFT)) & CAN_WORD_DATA_BYTE_63_MASK)
#define | CAN_WORD_DATA_BYTE_2_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_2_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_2(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_2_SHIFT)) & CAN_WORD_DATA_BYTE_2_MASK)
#define | CAN_WORD_DATA_BYTE_6_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_6_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_6(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_6_SHIFT)) & CAN_WORD_DATA_BYTE_6_MASK)
#define | CAN_WORD_DATA_BYTE_10_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_10_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_10(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_10_SHIFT)) & CAN_WORD_DATA_BYTE_10_MASK)
#define | CAN_WORD_DATA_BYTE_14_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_14_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_14(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_14_SHIFT)) & CAN_WORD_DATA_BYTE_14_MASK)
#define | CAN_WORD_DATA_BYTE_18_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_18_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_18(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_18_SHIFT)) & CAN_WORD_DATA_BYTE_18_MASK)
#define | CAN_WORD_DATA_BYTE_22_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_22_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_22(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_22_SHIFT)) & CAN_WORD_DATA_BYTE_22_MASK)
#define | CAN_WORD_DATA_BYTE_26_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_26_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_26(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_26_SHIFT)) & CAN_WORD_DATA_BYTE_26_MASK)
#define | CAN_WORD_DATA_BYTE_30_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_30_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_30(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_30_SHIFT)) & CAN_WORD_DATA_BYTE_30_MASK)
#define | CAN_WORD_DATA_BYTE_34_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_34_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_34(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_34_SHIFT)) & CAN_WORD_DATA_BYTE_34_MASK)
#define | CAN_WORD_DATA_BYTE_38_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_38_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_38(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_38_SHIFT)) & CAN_WORD_DATA_BYTE_38_MASK)
#define | CAN_WORD_DATA_BYTE_42_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_42_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_42(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_42_SHIFT)) & CAN_WORD_DATA_BYTE_42_MASK)
#define | CAN_WORD_DATA_BYTE_46_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_46_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_46(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_46_SHIFT)) & CAN_WORD_DATA_BYTE_46_MASK)
#define | CAN_WORD_DATA_BYTE_50_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_50_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_50(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_50_SHIFT)) & CAN_WORD_DATA_BYTE_50_MASK)
#define | CAN_WORD_DATA_BYTE_54_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_54_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_54(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_54_SHIFT)) & CAN_WORD_DATA_BYTE_54_MASK)
#define | CAN_WORD_DATA_BYTE_58_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_58_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_58(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_58_SHIFT)) & CAN_WORD_DATA_BYTE_58_MASK)
#define | CAN_WORD_DATA_BYTE_62_MASK (0xFF00U)
#define | CAN_WORD_DATA_BYTE_62_SHIFT (8U)
#define | CAN_WORD_DATA_BYTE_62(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_62_SHIFT)) & CAN_WORD_DATA_BYTE_62_MASK)
#define | CAN_WORD_DATA_BYTE_1_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_1_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_1(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_1_SHIFT)) & CAN_WORD_DATA_BYTE_1_MASK)
#define | CAN_WORD_DATA_BYTE_5_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_5_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_5(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_5_SHIFT)) & CAN_WORD_DATA_BYTE_5_MASK)
#define | CAN_WORD_DATA_BYTE_9_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_9_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_9(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_9_SHIFT)) & CAN_WORD_DATA_BYTE_9_MASK)
#define | CAN_WORD_DATA_BYTE_13_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_13_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_13(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_13_SHIFT)) & CAN_WORD_DATA_BYTE_13_MASK)
#define | CAN_WORD_DATA_BYTE_17_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_17_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_17(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_17_SHIFT)) & CAN_WORD_DATA_BYTE_17_MASK)
#define | CAN_WORD_DATA_BYTE_21_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_21_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_21(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_21_SHIFT)) & CAN_WORD_DATA_BYTE_21_MASK)
#define | CAN_WORD_DATA_BYTE_25_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_25_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_25(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_25_SHIFT)) & CAN_WORD_DATA_BYTE_25_MASK)
#define | CAN_WORD_DATA_BYTE_29_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_29_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_29(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_29_SHIFT)) & CAN_WORD_DATA_BYTE_29_MASK)
#define | CAN_WORD_DATA_BYTE_33_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_33_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_33(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_33_SHIFT)) & CAN_WORD_DATA_BYTE_33_MASK)
#define | CAN_WORD_DATA_BYTE_37_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_37_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_37(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_37_SHIFT)) & CAN_WORD_DATA_BYTE_37_MASK)
#define | CAN_WORD_DATA_BYTE_41_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_41_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_41(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_41_SHIFT)) & CAN_WORD_DATA_BYTE_41_MASK)
#define | CAN_WORD_DATA_BYTE_45_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_45_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_45(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_45_SHIFT)) & CAN_WORD_DATA_BYTE_45_MASK)
#define | CAN_WORD_DATA_BYTE_49_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_49_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_49(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_49_SHIFT)) & CAN_WORD_DATA_BYTE_49_MASK)
#define | CAN_WORD_DATA_BYTE_53_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_53_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_53(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_53_SHIFT)) & CAN_WORD_DATA_BYTE_53_MASK)
#define | CAN_WORD_DATA_BYTE_57_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_57_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_57(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_57_SHIFT)) & CAN_WORD_DATA_BYTE_57_MASK)
#define | CAN_WORD_DATA_BYTE_61_MASK (0xFF0000U)
#define | CAN_WORD_DATA_BYTE_61_SHIFT (16U)
#define | CAN_WORD_DATA_BYTE_61(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_61_SHIFT)) & CAN_WORD_DATA_BYTE_61_MASK)
#define | CAN_WORD_DATA_BYTE_0_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_0_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_0(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_0_SHIFT)) & CAN_WORD_DATA_BYTE_0_MASK)
#define | CAN_WORD_DATA_BYTE_4_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_4_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_4(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_4_SHIFT)) & CAN_WORD_DATA_BYTE_4_MASK)
#define | CAN_WORD_DATA_BYTE_8_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_8_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_8(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_8_SHIFT)) & CAN_WORD_DATA_BYTE_8_MASK)
#define | CAN_WORD_DATA_BYTE_12_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_12_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_12(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_12_SHIFT)) & CAN_WORD_DATA_BYTE_12_MASK)
#define | CAN_WORD_DATA_BYTE_16_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_16_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_16(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_16_SHIFT)) & CAN_WORD_DATA_BYTE_16_MASK)
#define | CAN_WORD_DATA_BYTE_20_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_20_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_20(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_20_SHIFT)) & CAN_WORD_DATA_BYTE_20_MASK)
#define | CAN_WORD_DATA_BYTE_24_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_24_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_24(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_24_SHIFT)) & CAN_WORD_DATA_BYTE_24_MASK)
#define | CAN_WORD_DATA_BYTE_28_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_28_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_28(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_28_SHIFT)) & CAN_WORD_DATA_BYTE_28_MASK)
#define | CAN_WORD_DATA_BYTE_32_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_32_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_32(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_32_SHIFT)) & CAN_WORD_DATA_BYTE_32_MASK)
#define | CAN_WORD_DATA_BYTE_36_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_36_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_36(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_36_SHIFT)) & CAN_WORD_DATA_BYTE_36_MASK)
#define | CAN_WORD_DATA_BYTE_40_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_40_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_40(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_40_SHIFT)) & CAN_WORD_DATA_BYTE_40_MASK)
#define | CAN_WORD_DATA_BYTE_44_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_44_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_44(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_44_SHIFT)) & CAN_WORD_DATA_BYTE_44_MASK)
#define | CAN_WORD_DATA_BYTE_48_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_48_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_48(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_48_SHIFT)) & CAN_WORD_DATA_BYTE_48_MASK)
#define | CAN_WORD_DATA_BYTE_52_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_52_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_52(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_52_SHIFT)) & CAN_WORD_DATA_BYTE_52_MASK)
#define | CAN_WORD_DATA_BYTE_56_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_56_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_56(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_56_SHIFT)) & CAN_WORD_DATA_BYTE_56_MASK)
#define | CAN_WORD_DATA_BYTE_60_MASK (0xFF000000U)
#define | CAN_WORD_DATA_BYTE_60_SHIFT (24U)
#define | CAN_WORD_DATA_BYTE_60(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_60_SHIFT)) & CAN_WORD_DATA_BYTE_60_MASK)

## WORD0 - Message Buffer 0 WORD0 Register..Message Buffer 63 WORD0 Register

#define | CAN_WORD0_DATA_BYTE_3_MASK (0xFFU)
#define | CAN_WORD0_DATA_BYTE_3_SHIFT (0U)
#define | CAN_WORD0_DATA_BYTE_3(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)
#define | CAN_WORD0_DATA_BYTE_2_MASK (0xFF00U)
#define | CAN_WORD0_DATA_BYTE_2_SHIFT (8U)
#define | CAN_WORD0_DATA_BYTE_2(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)
#define | CAN_WORD0_DATA_BYTE_1_MASK (0xFF0000U)
#define | CAN_WORD0_DATA_BYTE_1_SHIFT (16U)
#define | CAN_WORD0_DATA_BYTE_1(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)
#define | CAN_WORD0_DATA_BYTE_0_MASK (0xFF000000U)
#define | CAN_WORD0_DATA_BYTE_0_SHIFT (24U)
#define | CAN_WORD0_DATA_BYTE_0(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)

## WORD1 - Message Buffer 0 WORD1 Register..Message Buffer 63 WORD1 Register

#define | CAN_WORD1_DATA_BYTE_7_MASK (0xFFU)
#define | CAN_WORD1_DATA_BYTE_7_SHIFT (0U)
#define | CAN_WORD1_DATA_BYTE_7(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)
#define | CAN_WORD1_DATA_BYTE_6_MASK (0xFF00U)
#define | CAN_WORD1_DATA_BYTE_6_SHIFT (8U)
#define | CAN_WORD1_DATA_BYTE_6(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)
#define | CAN_WORD1_DATA_BYTE_5_MASK (0xFF0000U)
#define | CAN_WORD1_DATA_BYTE_5_SHIFT (16U)
#define | CAN_WORD1_DATA_BYTE_5(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)
#define | CAN_WORD1_DATA_BYTE_4_MASK (0xFF000000U)
#define | CAN_WORD1_DATA_BYTE_4_SHIFT (24U)
#define | CAN_WORD1_DATA_BYTE_4(x) (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)

## RXIMR - Rx Individual Mask Registers

#define | CAN_RXIMR_MI_MASK (0xFFFFFFFFU)
#define | CAN_RXIMR_MI_SHIFT (0U)
#define | CAN_RXIMR_MI(x) (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)

## GFWR - Glitch Filter Width Registers

#define | CAN_GFWR_GFWR_MASK (0xFFU)
#define | CAN_GFWR_GFWR_SHIFT (0U)
#define | CAN_GFWR_GFWR(x) (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)

## EPRS - Enhanced CAN Bit Timing Prescalers

#define | CAN_EPRS_ENPRESDIV_MASK (0x3FFU)
#define | CAN_EPRS_ENPRESDIV_SHIFT (0U)
#define | CAN_EPRS_ENPRESDIV(x) (((uint32_t)(((uint32_t)(x)) << CAN_EPRS_ENPRESDIV_SHIFT)) & CAN_EPRS_ENPRESDIV_MASK)
#define | CAN_EPRS_EDPRESDIV_MASK (0x3FF0000U)
#define | CAN_EPRS_EDPRESDIV_SHIFT (16U)
#define | CAN_EPRS_EDPRESDIV(x) (((uint32_t)(((uint32_t)(x)) << CAN_EPRS_EDPRESDIV_SHIFT)) & CAN_EPRS_EDPRESDIV_MASK)

## ENCBT - Enhanced Nominal CAN Bit Timing

#define | CAN_ENCBT_NTSEG1_MASK (0xFFU)
#define | CAN_ENCBT_NTSEG1_SHIFT (0U)
#define | CAN_ENCBT_NTSEG1(x) (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NTSEG1_SHIFT)) & CAN_ENCBT_NTSEG1_MASK)
#define | CAN_ENCBT_NTSEG2_MASK (0x7F000U)
#define | CAN_ENCBT_NTSEG2_SHIFT (12U)
#define | CAN_ENCBT_NTSEG2(x) (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NTSEG2_SHIFT)) & CAN_ENCBT_NTSEG2_MASK)
#define | CAN_ENCBT_NRJW_MASK (0x1FC00000U)
#define | CAN_ENCBT_NRJW_SHIFT (22U)
#define | CAN_ENCBT_NRJW(x) (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NRJW_SHIFT)) & CAN_ENCBT_NRJW_MASK)

## EDCBT - Enhanced Data Phase CAN bit Timing

#define | CAN_EDCBT_DTSEG1_MASK (0x1FU)
#define | CAN_EDCBT_DTSEG1_SHIFT (0U)
#define | CAN_EDCBT_DTSEG1(x) (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DTSEG1_SHIFT)) & CAN_EDCBT_DTSEG1_MASK)
#define | CAN_EDCBT_DTSEG2_MASK (0xF000U)
#define | CAN_EDCBT_DTSEG2_SHIFT (12U)
#define | CAN_EDCBT_DTSEG2(x) (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DTSEG2_SHIFT)) & CAN_EDCBT_DTSEG2_MASK)
#define | CAN_EDCBT_DRJW_MASK (0x3C00000U)
#define | CAN_EDCBT_DRJW_SHIFT (22U)
#define | CAN_EDCBT_DRJW(x) (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DRJW_SHIFT)) & CAN_EDCBT_DRJW_MASK)

## ETDC - Enhanced Transceiver Delay Compensation

#define | CAN_ETDC_ETDCVAL_MASK (0xFFU)
#define | CAN_ETDC_ETDCVAL_SHIFT (0U)
#define | CAN_ETDC_ETDCVAL(x) (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_ETDCVAL_SHIFT)) & CAN_ETDC_ETDCVAL_MASK)
#define | CAN_ETDC_ETDCOFF_MASK (0x7F0000U)
#define | CAN_ETDC_ETDCOFF_SHIFT (16U)
#define | CAN_ETDC_ETDCOFF(x) (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_ETDCOFF_SHIFT)) & CAN_ETDC_ETDCOFF_MASK)
#define | CAN_ETDC_TDMDIS_MASK (0x80000000U)
#define | CAN_ETDC_TDMDIS_SHIFT (31U)
#define | CAN_ETDC_TDMDIS(x) (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_TDMDIS_SHIFT)) & CAN_ETDC_TDMDIS_MASK)

## FDCTRL - CAN FD Control Register

#define | CAN_FDCTRL_TDCVAL_MASK (0x3FU)
#define | CAN_FDCTRL_TDCVAL_SHIFT (0U)
#define | CAN_FDCTRL_TDCVAL(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCVAL_SHIFT)) & CAN_FDCTRL_TDCVAL_MASK)
#define | CAN_FDCTRL_TDCOFF_MASK (0x1F00U)
#define | CAN_FDCTRL_TDCOFF_SHIFT (8U)
#define | CAN_FDCTRL_TDCOFF(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCOFF_SHIFT)) & CAN_FDCTRL_TDCOFF_MASK)
#define | CAN_FDCTRL_TDCFAIL_MASK (0x4000U)
#define | CAN_FDCTRL_TDCFAIL_SHIFT (14U)
#define | CAN_FDCTRL_TDCFAIL(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCFAIL_SHIFT)) & CAN_FDCTRL_TDCFAIL_MASK)
#define | CAN_FDCTRL_TDCEN_MASK (0x8000U)
#define | CAN_FDCTRL_TDCEN_SHIFT (15U)
#define | CAN_FDCTRL_TDCEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCEN_SHIFT)) & CAN_FDCTRL_TDCEN_MASK)
#define | CAN_FDCTRL_MBDSR0_MASK (0x30000U)
#define | CAN_FDCTRL_MBDSR0_SHIFT (16U)
#define | CAN_FDCTRL_MBDSR0(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_MBDSR0_SHIFT)) & CAN_FDCTRL_MBDSR0_MASK)
#define | CAN_FDCTRL_MBDSR1_MASK (0x180000U)
#define | CAN_FDCTRL_MBDSR1_SHIFT (19U)
#define | CAN_FDCTRL_MBDSR1(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_MBDSR1_SHIFT)) & CAN_FDCTRL_MBDSR1_MASK)
#define | CAN_FDCTRL_FDRATE_MASK (0x80000000U)
#define | CAN_FDCTRL_FDRATE_SHIFT (31U)
#define | CAN_FDCTRL_FDRATE(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_FDRATE_SHIFT)) & CAN_FDCTRL_FDRATE_MASK)

## FDCBT - CAN FD Bit Timing Register

#define | CAN_FDCBT_FPSEG2_MASK (0x7U)
#define | CAN_FDCBT_FPSEG2_SHIFT (0U)
#define | CAN_FDCBT_FPSEG2(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPSEG2_SHIFT)) & CAN_FDCBT_FPSEG2_MASK)
#define | CAN_FDCBT_FPSEG1_MASK (0xE0U)
#define | CAN_FDCBT_FPSEG1_SHIFT (5U)
#define | CAN_FDCBT_FPSEG1(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPSEG1_SHIFT)) & CAN_FDCBT_FPSEG1_MASK)
#define | CAN_FDCBT_FPROPSEG_MASK (0x7C00U)
#define | CAN_FDCBT_FPROPSEG_SHIFT (10U)
#define | CAN_FDCBT_FPROPSEG(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPROPSEG_SHIFT)) & CAN_FDCBT_FPROPSEG_MASK)
#define | CAN_FDCBT_FRJW_MASK (0x70000U)
#define | CAN_FDCBT_FRJW_SHIFT (16U)
#define | CAN_FDCBT_FRJW(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FRJW_SHIFT)) & CAN_FDCBT_FRJW_MASK)
#define | CAN_FDCBT_FPRESDIV_MASK (0x3FF00000U)
#define | CAN_FDCBT_FPRESDIV_SHIFT (20U)
#define | CAN_FDCBT_FPRESDIV(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPRESDIV_SHIFT)) & CAN_FDCBT_FPRESDIV_MASK)

## FDCRC - CAN FD CRC Register

#define | CAN_FDCRC_FD_TXCRC_MASK (0x1FFFFFU)
#define | CAN_FDCRC_FD_TXCRC_SHIFT (0U)
#define | CAN_FDCRC_FD_TXCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_TXCRC_SHIFT)) & CAN_FDCRC_FD_TXCRC_MASK)
#define | CAN_FDCRC_FD_MBCRC_MASK (0x7F000000U)
#define | CAN_FDCRC_FD_MBCRC_SHIFT (24U)
#define | CAN_FDCRC_FD_MBCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_MBCRC_SHIFT)) & CAN_FDCRC_FD_MBCRC_MASK)

## ERFCR - Enhanced Rx FIFO Control Register

#define | CAN_ERFCR_ERFWM_MASK (0x1FU)
#define | CAN_ERFCR_ERFWM_SHIFT (0U)
#define | CAN_ERFCR_ERFWM(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_ERFWM_SHIFT)) & CAN_ERFCR_ERFWM_MASK)
#define | CAN_ERFCR_NFE_MASK (0x3F00U)
#define | CAN_ERFCR_NFE_SHIFT (8U)
#define | CAN_ERFCR_NFE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_NFE_SHIFT)) & CAN_ERFCR_NFE_MASK)
#define | CAN_ERFCR_NEXIF_MASK (0x7F0000U)
#define | CAN_ERFCR_NEXIF_SHIFT (16U)
#define | CAN_ERFCR_NEXIF(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_NEXIF_SHIFT)) & CAN_ERFCR_NEXIF_MASK)
#define | CAN_ERFCR_DMALW_MASK (0x7C000000U)
#define | CAN_ERFCR_DMALW_SHIFT (26U)
#define | CAN_ERFCR_DMALW(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_DMALW_SHIFT)) & CAN_ERFCR_DMALW_MASK)
#define | CAN_ERFCR_ERFEN_MASK (0x80000000U)
#define | CAN_ERFCR_ERFEN_SHIFT (31U)
#define | CAN_ERFCR_ERFEN(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_ERFEN_SHIFT)) & CAN_ERFCR_ERFEN_MASK)

## ERFIER - Enhanced Rx FIFO Interrupt Enable register

#define | CAN_ERFIER_ERFDAIE_MASK (0x10000000U)
#define | CAN_ERFIER_ERFDAIE_SHIFT (28U)
#define | CAN_ERFIER_ERFDAIE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFDAIE_SHIFT)) & CAN_ERFIER_ERFDAIE_MASK)
#define | CAN_ERFIER_ERFWMIIE_MASK (0x20000000U)
#define | CAN_ERFIER_ERFWMIIE_SHIFT (29U)
#define | CAN_ERFIER_ERFWMIIE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFWMIIE_SHIFT)) & CAN_ERFIER_ERFWMIIE_MASK)
#define | CAN_ERFIER_ERFOVFIE_MASK (0x40000000U)
#define | CAN_ERFIER_ERFOVFIE_SHIFT (30U)
#define | CAN_ERFIER_ERFOVFIE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFOVFIE_SHIFT)) & CAN_ERFIER_ERFOVFIE_MASK)
#define | CAN_ERFIER_ERFUFWIE_MASK (0x80000000U)
#define | CAN_ERFIER_ERFUFWIE_SHIFT (31U)
#define | CAN_ERFIER_ERFUFWIE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFUFWIE_SHIFT)) & CAN_ERFIER_ERFUFWIE_MASK)

## ERFSR - Enhanced Rx FIFO Status Register

#define | CAN_ERFSR_ERFEL_MASK (0x3FU)
#define | CAN_ERFSR_ERFEL_SHIFT (0U)
#define | CAN_ERFSR_ERFEL(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFEL_SHIFT)) & CAN_ERFSR_ERFEL_MASK)
#define | CAN_ERFSR_ERFF_MASK (0x10000U)
#define | CAN_ERFSR_ERFF_SHIFT (16U)
#define | CAN_ERFSR_ERFF(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFF_SHIFT)) & CAN_ERFSR_ERFF_MASK)
#define | CAN_ERFSR_ERFE_MASK (0x20000U)
#define | CAN_ERFSR_ERFE_SHIFT (17U)
#define | CAN_ERFSR_ERFE(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFE_SHIFT)) & CAN_ERFSR_ERFE_MASK)
#define | CAN_ERFSR_ERFCLR_MASK (0x8000000U)
#define | CAN_ERFSR_ERFCLR_SHIFT (27U)
#define | CAN_ERFSR_ERFCLR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFCLR_SHIFT)) & CAN_ERFSR_ERFCLR_MASK)
#define | CAN_ERFSR_ERFDA_MASK (0x10000000U)
#define | CAN_ERFSR_ERFDA_SHIFT (28U)
#define | CAN_ERFSR_ERFDA(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFDA_SHIFT)) & CAN_ERFSR_ERFDA_MASK)
#define | CAN_ERFSR_ERFWMI_MASK (0x20000000U)
#define | CAN_ERFSR_ERFWMI_SHIFT (29U)
#define | CAN_ERFSR_ERFWMI(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFWMI_SHIFT)) & CAN_ERFSR_ERFWMI_MASK)
#define | CAN_ERFSR_ERFOVF_MASK (0x40000000U)
#define | CAN_ERFSR_ERFOVF_SHIFT (30U)
#define | CAN_ERFSR_ERFOVF(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFOVF_SHIFT)) & CAN_ERFSR_ERFOVF_MASK)
#define | CAN_ERFSR_ERFUFW_MASK (0x80000000U)
#define | CAN_ERFSR_ERFUFW_SHIFT (31U)
#define | CAN_ERFSR_ERFUFW(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFUFW_SHIFT)) & CAN_ERFSR_ERFUFW_MASK)

## HR_TIME_STAMP - High Resolution Time Stamp

#define | CAN_HR_TIME_STAMP_TS_MASK (0xFFFFFFFFU)
#define | CAN_HR_TIME_STAMP_TS_SHIFT (0U)
#define | CAN_HR_TIME_STAMP_TS(x) (((uint32_t)(((uint32_t)(x)) << CAN_HR_TIME_STAMP_TS_SHIFT)) & CAN_HR_TIME_STAMP_TS_MASK)

## ERFFEL - Enhanced Rx FIFO Filter Element

#define | CAN_ERFFEL_FEL_MASK (0xFFFFFFFFU)
#define | CAN_ERFFEL_FEL_SHIFT (0U)
#define | CAN_ERFFEL_FEL(x) (((uint32_t)(((uint32_t)(x)) << CAN_ERFFEL_FEL_SHIFT)) & CAN_ERFFEL_FEL_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ CAN_CBT_BTF

#define CAN_CBT_BTF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_BTF_SHIFT)) & CAN_CBT_BTF_MASK)

BTF - Bit Timing Format Enable 0b0..Extended bit time definitions disabled. 0b1..Extended bit time definitions enabled.

Definition at line 4347 of file MIMXRT1062.h.

## ◆ CAN_CBT_BTF_MASK

#define CAN_CBT_BTF_MASK (0x80000000U)

Definition at line 4341 of file MIMXRT1062.h.

## ◆ CAN_CBT_BTF_SHIFT

#define CAN_CBT_BTF_SHIFT (31U)

Definition at line 4342 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPRESDIV

#define CAN_CBT_EPRESDIV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPRESDIV_SHIFT)) & CAN_CBT_EPRESDIV_MASK)

EPRESDIV - Extended Prescaler Division Factor

Definition at line 4340 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPRESDIV_MASK

#define CAN_CBT_EPRESDIV_MASK (0x7FE00000U)

Definition at line 4336 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPRESDIV_SHIFT

#define CAN_CBT_EPRESDIV_SHIFT (21U)

Definition at line 4337 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPROPSEG

#define CAN_CBT_EPROPSEG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPROPSEG_SHIFT)) & CAN_CBT_EPROPSEG_MASK)

EPROPSEG - Extended Propagation Segment

Definition at line 4330 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPROPSEG_MASK

#define CAN_CBT_EPROPSEG_MASK (0xFC00U)

Definition at line 4326 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPROPSEG_SHIFT

#define CAN_CBT_EPROPSEG_SHIFT (10U)

Definition at line 4327 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG1

#define CAN_CBT_EPSEG1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPSEG1_SHIFT)) & CAN_CBT_EPSEG1_MASK)

EPSEG1 - Extended Phase Segment 1

Definition at line 4325 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG1_MASK

#define CAN_CBT_EPSEG1_MASK (0x3E0U)

Definition at line 4321 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG1_SHIFT

#define CAN_CBT_EPSEG1_SHIFT (5U)

Definition at line 4322 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG2

#define CAN_CBT_EPSEG2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_EPSEG2_SHIFT)) & CAN_CBT_EPSEG2_MASK)

EPSEG2 - Extended Phase Segment 2

Definition at line 4320 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG2_MASK

#define CAN_CBT_EPSEG2_MASK (0x1FU)

Definition at line 4316 of file MIMXRT1062.h.

## ◆ CAN_CBT_EPSEG2_SHIFT

#define CAN_CBT_EPSEG2_SHIFT (0U)

Definition at line 4317 of file MIMXRT1062.h.

## ◆ CAN_CBT_ERJW

#define CAN_CBT_ERJW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CBT_ERJW_SHIFT)) & CAN_CBT_ERJW_MASK)

ERJW - Extended Resync Jump Width

Definition at line 4335 of file MIMXRT1062.h.

## ◆ CAN_CBT_ERJW_MASK

#define CAN_CBT_ERJW_MASK (0x1F0000U)

Definition at line 4331 of file MIMXRT1062.h.

## ◆ CAN_CBT_ERJW_SHIFT

#define CAN_CBT_ERJW_SHIFT (16U)

Definition at line 4332 of file MIMXRT1062.h.

## ◆ CAN_CRCR_MBCRC

#define CAN_CRCR_MBCRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_MBCRC_SHIFT)) & CAN_CRCR_MBCRC_MASK)

MBCRC - CRC Mailbox

Definition at line 4291 of file MIMXRT1062.h.

## ◆ CAN_CRCR_MBCRC_MASK

#define CAN_CRCR_MBCRC_MASK (0x7F0000U)

Definition at line 4287 of file MIMXRT1062.h.

## ◆ CAN_CRCR_MBCRC_SHIFT

#define CAN_CRCR_MBCRC_SHIFT (16U)

Definition at line 4288 of file MIMXRT1062.h.

## ◆ CAN_CRCR_TXCRC

#define CAN_CRCR_TXCRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CRCR_TXCRC_SHIFT)) & CAN_CRCR_TXCRC_MASK)

TXCRC - Transmitted CRC value

Definition at line 4286 of file MIMXRT1062.h.

## ◆ CAN_CRCR_TXCRC_MASK

#define CAN_CRCR_TXCRC_MASK (0x7FFFU)

Definition at line 4282 of file MIMXRT1062.h.

## ◆ CAN_CRCR_TXCRC_SHIFT

#define CAN_CRCR_TXCRC_SHIFT (0U)

Definition at line 4283 of file MIMXRT1062.h.

## ◆ CAN_CS_BRS

#define CAN_CS_BRS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_BRS_SHIFT)) & CAN_CS_BRS_MASK)

BRS - Bit Rate Switch. This bit defines whether the bit rate is switched inside a CAN FD format frame.

Definition at line 4472 of file MIMXRT1062.h.

## ◆ CAN_CS_BRS_MASK

#define CAN_CS_BRS_MASK (0x40000000U)

Definition at line 4468 of file MIMXRT1062.h.

## ◆ CAN_CS_BRS_SHIFT

#define CAN_CS_BRS_SHIFT (30U)

Definition at line 4469 of file MIMXRT1062.h.

## ◆ CAN_CS_CODE

#define CAN_CS_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_CODE_SHIFT)) & CAN_CS_CODE_MASK)

CODE - Message Buffer Code. This 4-bit field can be accessed (read or write) by the CPU and by the FlexCAN module itself, as part of the message buffer matching and arbitration process.

Definition at line 4462 of file MIMXRT1062.h.

## ◆ CAN_CS_CODE_MASK

#define CAN_CS_CODE_MASK (0xF000000U)

Definition at line 4457 of file MIMXRT1062.h.

## ◆ CAN_CS_CODE_SHIFT

#define CAN_CS_CODE_SHIFT (24U)

Definition at line 4458 of file MIMXRT1062.h.

## ◆ CAN_CS_COUNT

#define CAN_CS_COUNT (64U)

Definition at line 4839 of file MIMXRT1062.h.

## ◆ CAN_CS_COUNT_MB16B

#define CAN_CS_COUNT_MB16B (42U)

Definition at line 4405 of file MIMXRT1062.h.

## ◆ CAN_CS_COUNT_MB32B

#define CAN_CS_COUNT_MB32B (24U)

Definition at line 4417 of file MIMXRT1062.h.

## ◆ CAN_CS_COUNT_MB64B

#define CAN_CS_COUNT_MB64B (14U)

Definition at line 4482 of file MIMXRT1062.h.

## ◆ CAN_CS_COUNT_MB8B

#define CAN_CS_COUNT_MB8B (64U)

Definition at line 4393 of file MIMXRT1062.h.

## ◆ CAN_CS_DLC

#define CAN_CS_DLC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_DLC_SHIFT)) & CAN_CS_DLC_MASK)

DLC - Length of the data to be stored/transmitted.

Definition at line 4441 of file MIMXRT1062.h.

## ◆ CAN_CS_DLC_MASK

#define CAN_CS_DLC_MASK (0xF0000U)

Definition at line 4437 of file MIMXRT1062.h.

## ◆ CAN_CS_DLC_SHIFT

#define CAN_CS_DLC_SHIFT (16U)

Definition at line 4438 of file MIMXRT1062.h.

## ◆ CAN_CS_EDL

#define CAN_CS_EDL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_EDL_SHIFT)) & CAN_CS_EDL_MASK)

EDL - Extended Data Length. This bit distinguishes between CAN format and CAN FD format frames. The EDL bit must not be set for Message Buffers configured to RANSWER with code field 0b1010.

Definition at line 4478 of file MIMXRT1062.h.

## ◆ CAN_CS_EDL_MASK

#define CAN_CS_EDL_MASK (0x80000000U)

Definition at line 4473 of file MIMXRT1062.h.

## ◆ CAN_CS_EDL_SHIFT

#define CAN_CS_EDL_SHIFT (31U)

Definition at line 4474 of file MIMXRT1062.h.

## ◆ CAN_CS_ESI

#define CAN_CS_ESI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_ESI_SHIFT)) & CAN_CS_ESI_MASK)

ESI - Error State Indicator. This bit indicates if the transmitting node is error active or error passive.

Definition at line 4467 of file MIMXRT1062.h.

## ◆ CAN_CS_ESI_MASK

#define CAN_CS_ESI_MASK (0x20000000U)

Definition at line 4463 of file MIMXRT1062.h.

## ◆ CAN_CS_ESI_SHIFT

#define CAN_CS_ESI_SHIFT (29U)

Definition at line 4464 of file MIMXRT1062.h.

## ◆ CAN_CS_IDE

#define CAN_CS_IDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_IDE_SHIFT)) & CAN_CS_IDE_MASK)

IDE - ID Extended. One/zero for extended/standard format frame.

Definition at line 4451 of file MIMXRT1062.h.

## ◆ CAN_CS_IDE_MASK

#define CAN_CS_IDE_MASK (0x200000U)

Definition at line 4447 of file MIMXRT1062.h.

## ◆ CAN_CS_IDE_SHIFT

#define CAN_CS_IDE_SHIFT (21U)

Definition at line 4448 of file MIMXRT1062.h.

## ◆ CAN_CS_RTR

#define CAN_CS_RTR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_RTR_SHIFT)) & CAN_CS_RTR_MASK)

RTR - Remote Transmission Request. One/zero for remote/data frame.

Definition at line 4446 of file MIMXRT1062.h.

## ◆ CAN_CS_RTR_MASK

#define CAN_CS_RTR_MASK (0x100000U)

Definition at line 4442 of file MIMXRT1062.h.

## ◆ CAN_CS_RTR_SHIFT

#define CAN_CS_RTR_SHIFT (20U)

Definition at line 4443 of file MIMXRT1062.h.

## ◆ CAN_CS_SRR

#define CAN_CS_SRR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_SRR_SHIFT)) & CAN_CS_SRR_MASK)

SRR - Substitute Remote Request. Contains a fixed recessive bit.

Definition at line 4456 of file MIMXRT1062.h.

## ◆ CAN_CS_SRR_MASK

#define CAN_CS_SRR_MASK (0x400000U)

Definition at line 4452 of file MIMXRT1062.h.

## ◆ CAN_CS_SRR_SHIFT

#define CAN_CS_SRR_SHIFT (22U)

Definition at line 4453 of file MIMXRT1062.h.

## ◆ CAN_CS_TIME_STAMP

#define CAN_CS_TIME_STAMP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CS_TIME_STAMP_SHIFT)) & CAN_CS_TIME_STAMP_MASK)

TIME_STAMP - Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.

Definition at line 4436 of file MIMXRT1062.h.

## ◆ CAN_CS_TIME_STAMP_MASK

#define CAN_CS_TIME_STAMP_MASK (0xFFFFU)

Definition at line 4430 of file MIMXRT1062.h.

## ◆ CAN_CS_TIME_STAMP_SHIFT

#define CAN_CS_TIME_STAMP_SHIFT (0U)

Definition at line 4431 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFMSK

#define CAN_CTRL1_BOFFMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFMSK_SHIFT)) & CAN_CTRL1_BOFFMSK_MASK)

BOFFMSK - Bus Off Interrupt Mask 0b1..Bus Off interrupt enabled 0b0..Bus Off interrupt disabled

Definition at line 3764 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFMSK_MASK

#define CAN_CTRL1_BOFFMSK_MASK (0x8000U)

Definition at line 3758 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFMSK_SHIFT

#define CAN_CTRL1_BOFFMSK_SHIFT (15U)

Definition at line 3759 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFREC

#define CAN_CTRL1_BOFFREC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_BOFFREC_SHIFT)) & CAN_CTRL1_BOFFREC_MASK)

BOFFREC - Bus Off Recovery 0b1..Automatic recovering from Bus Off state disabled 0b0..Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B

Definition at line 3714 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFREC_MASK

#define CAN_CTRL1_BOFFREC_MASK (0x40U)

Definition at line 3708 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_BOFFREC_SHIFT

#define CAN_CTRL1_BOFFREC_SHIFT (6U)

Definition at line 3709 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_CLKSRC

#define CAN_CTRL1_CLKSRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_CLKSRC_SHIFT)) & CAN_CTRL1_CLKSRC_MASK)

CLKSRC - CAN Engine Clock Source 0b0..The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock. 0b1..The CAN engine clock source is the peripheral clock.

Definition at line 3750 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_CLKSRC_MASK

#define CAN_CTRL1_CLKSRC_MASK (0x2000U)

Definition at line 3744 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_CLKSRC_SHIFT

#define CAN_CTRL1_CLKSRC_SHIFT (13U)

Definition at line 3745 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_ERRMSK

#define CAN_CTRL1_ERRMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_ERRMSK_SHIFT)) & CAN_CTRL1_ERRMSK_MASK)

ERRMSK - Error Interrupt Mask 0b1..Error interrupt enabled 0b0..Error interrupt disabled

Definition at line 3757 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_ERRMSK_MASK

#define CAN_CTRL1_ERRMSK_MASK (0x4000U)

Definition at line 3751 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_ERRMSK_SHIFT

#define CAN_CTRL1_ERRMSK_SHIFT (14U)

Definition at line 3752 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LBUF

#define CAN_CTRL1_LBUF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LBUF_SHIFT)) & CAN_CTRL1_LBUF_MASK)

LBUF - Lowest Buffer Transmitted First 0b1..Lowest number buffer is transmitted first 0b0..Buffer with highest priority is transmitted first

Definition at line 3700 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LBUF_MASK

#define CAN_CTRL1_LBUF_MASK (0x10U)

Definition at line 3694 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LBUF_SHIFT

#define CAN_CTRL1_LBUF_SHIFT (4U)

Definition at line 3695 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LOM

#define CAN_CTRL1_LOM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LOM_SHIFT)) & CAN_CTRL1_LOM_MASK)

LOM - Listen-Only Mode 0b1..FLEXCAN module operates in Listen Only Mode 0b0..Listen Only Mode is deactivated

Definition at line 3693 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LOM_MASK

#define CAN_CTRL1_LOM_MASK (0x8U)

Definition at line 3687 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LOM_SHIFT

#define CAN_CTRL1_LOM_SHIFT (3U)

Definition at line 3688 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LPB

#define CAN_CTRL1_LPB | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_LPB_SHIFT)) & CAN_CTRL1_LPB_MASK)

LPB - Loop Back Mode 0b1..Loop Back enabled 0b0..Loop Back disabled

Definition at line 3743 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LPB_MASK

#define CAN_CTRL1_LPB_MASK (0x1000U)

Definition at line 3737 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_LPB_SHIFT

#define CAN_CTRL1_LPB_SHIFT (12U)

Definition at line 3738 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PRESDIV

#define CAN_CTRL1_PRESDIV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PRESDIV_SHIFT)) & CAN_CTRL1_PRESDIV_MASK)

PRESDIV - Prescaler Division Factor

Definition at line 3784 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PRESDIV_MASK

#define CAN_CTRL1_PRESDIV_MASK (0xFF000000U)

Definition at line 3780 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PRESDIV_SHIFT

#define CAN_CTRL1_PRESDIV_SHIFT (24U)

Definition at line 3781 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PROPSEG

#define CAN_CTRL1_PROPSEG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PROPSEG_SHIFT)) & CAN_CTRL1_PROPSEG_MASK)

PROPSEG - Propagation Segment

Definition at line 3686 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PROPSEG_MASK

#define CAN_CTRL1_PROPSEG_MASK (0x7U)

Definition at line 3682 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PROPSEG_SHIFT

#define CAN_CTRL1_PROPSEG_SHIFT (0U)

Definition at line 3683 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG1

#define CAN_CTRL1_PSEG1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG1_SHIFT)) & CAN_CTRL1_PSEG1_MASK)

PSEG1 - Phase Segment 1

Definition at line 3774 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG1_MASK

#define CAN_CTRL1_PSEG1_MASK (0x380000U)

Definition at line 3770 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG1_SHIFT

#define CAN_CTRL1_PSEG1_SHIFT (19U)

Definition at line 3771 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG2

#define CAN_CTRL1_PSEG2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PSEG2_SHIFT)) & CAN_CTRL1_PSEG2_MASK)

PSEG2 - Phase Segment 2

Definition at line 3769 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG2_MASK

#define CAN_CTRL1_PSEG2_MASK (0x70000U)

Definition at line 3765 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_PSEG2_SHIFT

#define CAN_CTRL1_PSEG2_SHIFT (16U)

Definition at line 3766 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RJW

#define CAN_CTRL1_RJW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RJW_SHIFT)) & CAN_CTRL1_RJW_MASK)

RJW - Resync Jump Width

Definition at line 3779 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RJW_MASK

#define CAN_CTRL1_RJW_MASK (0xC00000U)

Definition at line 3775 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RJW_SHIFT

#define CAN_CTRL1_RJW_SHIFT (22U)

Definition at line 3776 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RWRNMSK

#define CAN_CTRL1_RWRNMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_RWRNMSK_SHIFT)) & CAN_CTRL1_RWRNMSK_MASK)

RWRNMSK - Rx Warning Interrupt Mask 0b1..Rx Warning Interrupt enabled 0b0..Rx Warning Interrupt disabled

Definition at line 3729 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RWRNMSK_MASK

#define CAN_CTRL1_RWRNMSK_MASK (0x400U)

Definition at line 3723 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_RWRNMSK_SHIFT

#define CAN_CTRL1_RWRNMSK_SHIFT (10U)

Definition at line 3724 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_SMP

#define CAN_CTRL1_SMP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_SMP_SHIFT)) & CAN_CTRL1_SMP_MASK)

SMP - CAN Bit Sampling 0b1..Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples, a majority rule is used 0b0..Just one sample is used to determine the bit value

Definition at line 3722 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_SMP_MASK

#define CAN_CTRL1_SMP_MASK (0x80U)

Definition at line 3715 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_SMP_SHIFT

#define CAN_CTRL1_SMP_SHIFT (7U)

Definition at line 3716 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TSYN

#define CAN_CTRL1_TSYN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TSYN_SHIFT)) & CAN_CTRL1_TSYN_MASK)

TSYN - Timer Sync 0b1..Timer Sync feature enabled 0b0..Timer Sync feature disabled

Definition at line 3707 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TSYN_MASK

#define CAN_CTRL1_TSYN_MASK (0x20U)

Definition at line 3701 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TSYN_SHIFT

#define CAN_CTRL1_TSYN_SHIFT (5U)

Definition at line 3702 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TWRNMSK

#define CAN_CTRL1_TWRNMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_TWRNMSK_SHIFT)) & CAN_CTRL1_TWRNMSK_MASK)

TWRNMSK - Tx Warning Interrupt Mask 0b1..Tx Warning Interrupt enabled 0b0..Tx Warning Interrupt disabled

Definition at line 3736 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TWRNMSK_MASK

#define CAN_CTRL1_TWRNMSK_MASK (0x800U)

Definition at line 3730 of file MIMXRT1062.h.

## ◆ CAN_CTRL1_TWRNMSK_SHIFT

#define CAN_CTRL1_TWRNMSK_SHIFT (11U)

Definition at line 3731 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BOFFDONEMSK

#define CAN_CTRL2_BOFFDONEMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_BOFFDONEMSK_SHIFT)) & CAN_CTRL2_BOFFDONEMSK_MASK)

BOFFDONEMSK - Bus Off Done Interrupt Mask 0b0..Bus Off Done interrupt disabled. 0b1..Bus Off Done interrupt enabled.

Definition at line 4247 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BOFFDONEMSK_MASK

#define CAN_CTRL2_BOFFDONEMSK_MASK (0x40000000U)

Definition at line 4241 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BOFFDONEMSK_SHIFT

#define CAN_CTRL2_BOFFDONEMSK_SHIFT (30U)

Definition at line 4242 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BTE

#define CAN_CTRL2_BTE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_BTE_SHIFT)) & CAN_CTRL2_BTE_MASK)

BTE - Bit Timing Expansion enable 0b0..CAN Bit timing expansion is disabled. 0b1..CAN bit timing expansion is enabled.

Definition at line 4185 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BTE_MASK

#define CAN_CTRL2_BTE_MASK (0x2000U)

Definition at line 4179 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_BTE_SHIFT

#define CAN_CTRL2_BTE_SHIFT (13U)

Definition at line 4180 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EACEN

#define CAN_CTRL2_EACEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EACEN_SHIFT)) & CAN_CTRL2_EACEN_MASK)

EACEN - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes 0b1..Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply. 0b0..Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits.

Definition at line 4209 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EACEN_MASK

#define CAN_CTRL2_EACEN_MASK (0x10000U)

Definition at line 4202 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EACEN_SHIFT

#define CAN_CTRL2_EACEN_SHIFT (16U)

Definition at line 4203 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EDFLTDIS

#define CAN_CTRL2_EDFLTDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_EDFLTDIS_SHIFT)) & CAN_CTRL2_EDFLTDIS_MASK)

EDFLTDIS - Edge Filter Disable 0b0..Edge Filter is enabled 0b1..Edge Filter is disabled

Definition at line 4171 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EDFLTDIS_MASK

#define CAN_CTRL2_EDFLTDIS_MASK (0x800U)

Definition at line 4165 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_EDFLTDIS_SHIFT

#define CAN_CTRL2_EDFLTDIS_SHIFT (11U)

Definition at line 4166 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ERRMSK_FAST

#define CAN_CTRL2_ERRMSK_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_ERRMSK_FAST_SHIFT)) & CAN_CTRL2_ERRMSK_FAST_MASK)

ERRMSK_FAST - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames 0b0..ERRINT_FAST Error interrupt disabled. 0b1..ERRINT_FAST Error interrupt enabled.

Definition at line 4254 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ERRMSK_FAST_MASK

#define CAN_CTRL2_ERRMSK_FAST_MASK (0x80000000U)

Definition at line 4248 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ERRMSK_FAST_SHIFT

#define CAN_CTRL2_ERRMSK_FAST_SHIFT (31U)

Definition at line 4249 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ISOCANFDEN

#define CAN_CTRL2_ISOCANFDEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_ISOCANFDEN_SHIFT)) & CAN_CTRL2_ISOCANFDEN_MASK)

ISOCANFDEN - ISO CAN FD Enable 0b0..FlexCAN operates using the non-ISO CAN FD protocol. 0b1..FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1).

Definition at line 4178 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ISOCANFDEN_MASK

#define CAN_CTRL2_ISOCANFDEN_MASK (0x1000U)

Definition at line 4172 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_ISOCANFDEN_SHIFT

#define CAN_CTRL2_ISOCANFDEN_SHIFT (12U)

Definition at line 4173 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MBTSBASE

#define CAN_CTRL2_MBTSBASE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MBTSBASE_SHIFT)) & CAN_CTRL2_MBTSBASE_MASK)

MBTSBASE - Message Buffer Time Stamp Base 0b00..Message Buffer Time Stamp base is CAN_TIMER 0b01..Message Buffer Time Stamp base is lower 16-bits of high resolution timer 0b10..Message Buffer Time Stamp base is upper 16-bits of high resolution timerT 0b11..Reserved.

Definition at line 4164 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MBTSBASE_MASK

#define CAN_CTRL2_MBTSBASE_MASK (0x300U)

Definition at line 4156 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MBTSBASE_SHIFT

#define CAN_CTRL2_MBTSBASE_SHIFT (8U)

Definition at line 4157 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MRP

#define CAN_CTRL2_MRP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)

MRP - Mailboxes Reception Priority 0b1..Matching starts from Mailboxes and continues on Rx FIFO 0b0..Matching starts from Rx FIFO and continues on Mailboxes

Definition at line 4223 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MRP_MASK

#define CAN_CTRL2_MRP_MASK (0x40000U)

Definition at line 4217 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_MRP_SHIFT

#define CAN_CTRL2_MRP_SHIFT (18U)

Definition at line 4218 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_PREXCEN

#define CAN_CTRL2_PREXCEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_PREXCEN_SHIFT)) & CAN_CTRL2_PREXCEN_MASK)

PREXCEN - Protocol Exception Enable 0b0..Protocol Exception is disabled. 0b1..Protocol Exception is enabled.

Definition at line 4192 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_PREXCEN_MASK

#define CAN_CTRL2_PREXCEN_MASK (0x4000U)

Definition at line 4186 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_PREXCEN_SHIFT

#define CAN_CTRL2_PREXCEN_SHIFT (14U)

Definition at line 4187 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RFFN

#define CAN_CTRL2_RFFN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RFFN_SHIFT)) & CAN_CTRL2_RFFN_MASK)

RFFN - Number Of Legacy Rx FIFO Filters

Definition at line 4233 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RFFN_MASK

#define CAN_CTRL2_RFFN_MASK (0xF000000U)

Definition at line 4229 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RFFN_SHIFT

#define CAN_CTRL2_RFFN_SHIFT (24U)

Definition at line 4230 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RRS

#define CAN_CTRL2_RRS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_RRS_SHIFT)) & CAN_CTRL2_RRS_MASK)

RRS - Remote Request Storing 0b1..Remote Request Frame is stored 0b0..Remote Response Frame is generated

Definition at line 4216 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RRS_MASK

#define CAN_CTRL2_RRS_MASK (0x20000U)

Definition at line 4210 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_RRS_SHIFT

#define CAN_CTRL2_RRS_SHIFT (17U)

Definition at line 4211 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TASD

#define CAN_CTRL2_TASD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TASD_SHIFT)) & CAN_CTRL2_TASD_MASK)

TASD - Tx Arbitration Start Delay

Definition at line 4228 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TASD_MASK

#define CAN_CTRL2_TASD_MASK (0xF80000U)

Definition at line 4224 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TASD_SHIFT

#define CAN_CTRL2_TASD_SHIFT (19U)

Definition at line 4225 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TIMER_SRC

#define CAN_CTRL2_TIMER_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TIMER_SRC_SHIFT)) & CAN_CTRL2_TIMER_SRC_MASK)

TIMER_SRC - Timer Source 0b0..The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus. 0b1..The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick.

Definition at line 4201 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TIMER_SRC_MASK

#define CAN_CTRL2_TIMER_SRC_MASK (0x8000U)

Definition at line 4193 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TIMER_SRC_SHIFT

#define CAN_CTRL2_TIMER_SRC_SHIFT (15U)

Definition at line 4194 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TSTAMPCAP

#define CAN_CTRL2_TSTAMPCAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_TSTAMPCAP_SHIFT)) & CAN_CTRL2_TSTAMPCAP_MASK)

TSTAMPCAP - Time Stamp Capture Point 0b00..The high resolution time stamp capture is disabled 0b01..The high resolution time stamp is captured in the end of the CAN frame 0b10..The high resolution time stamp is captured in the start of the CAN frame 0b11..The high resolution time stamp is captured in the start of frame for classical CAN frames and in res bit for CAN FD frames

Definition at line 4155 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TSTAMPCAP_MASK

#define CAN_CTRL2_TSTAMPCAP_MASK (0xC0U)

Definition at line 4147 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_TSTAMPCAP_SHIFT

#define CAN_CTRL2_TSTAMPCAP_SHIFT (6U)

Definition at line 4148 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_WRMFRZ

#define CAN_CTRL2_WRMFRZ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_WRMFRZ_SHIFT)) & CAN_CTRL2_WRMFRZ_MASK)

WRMFRZ 0b1..Enable unrestricted write access to FlexCAN memory 0b0..Keep the write access restricted in some regions of FlexCAN memory

Definition at line 4240 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_WRMFRZ_MASK

#define CAN_CTRL2_WRMFRZ_MASK (0x10000000U)

Definition at line 4234 of file MIMXRT1062.h.

## ◆ CAN_CTRL2_WRMFRZ_SHIFT

#define CAN_CTRL2_WRMFRZ_SHIFT (28U)

Definition at line 4235 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CBN

#define CAN_DBG1_CBN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG1_CBN_SHIFT)) & CAN_DBG1_CBN_MASK)

CBN - CAN Bit Number

Definition at line 4361 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CBN_MASK

#define CAN_DBG1_CBN_MASK (0x1F000000U)

Definition at line 4357 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CBN_SHIFT

#define CAN_DBG1_CBN_SHIFT (24U)

Definition at line 4358 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CFSM

#define CAN_DBG1_CFSM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG1_CFSM_SHIFT)) & CAN_DBG1_CFSM_MASK)

CFSM - CAN Finite State Machine

Definition at line 4356 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CFSM_MASK

#define CAN_DBG1_CFSM_MASK (0x3FU)

Definition at line 4352 of file MIMXRT1062.h.

## ◆ CAN_DBG1_CFSM_SHIFT

#define CAN_DBG1_CFSM_SHIFT (0U)

Definition at line 4353 of file MIMXRT1062.h.

## ◆ CAN_DBG2_APP

#define CAN_DBG2_APP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_APP_SHIFT)) & CAN_DBG2_APP_MASK)

APP - Arbitration Process in Progress 0b0..No matching process ongoing. 0b1..Matching process is in progress.

Definition at line 4389 of file MIMXRT1062.h.

## ◆ CAN_DBG2_APP_MASK

#define CAN_DBG2_APP_MASK (0x8000U)

Definition at line 4383 of file MIMXRT1062.h.

## ◆ CAN_DBG2_APP_SHIFT

#define CAN_DBG2_APP_SHIFT (15U)

Definition at line 4384 of file MIMXRT1062.h.

## ◆ CAN_DBG2_MPP

#define CAN_DBG2_MPP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_MPP_SHIFT)) & CAN_DBG2_MPP_MASK)

MPP - Matching Process in Progress 0b0..No matching process ongoing. 0b1..Matching process is in progress.

Definition at line 4377 of file MIMXRT1062.h.

## ◆ CAN_DBG2_MPP_MASK

#define CAN_DBG2_MPP_MASK (0x80U)

Definition at line 4371 of file MIMXRT1062.h.

## ◆ CAN_DBG2_MPP_SHIFT

#define CAN_DBG2_MPP_SHIFT (7U)

Definition at line 4372 of file MIMXRT1062.h.

## ◆ CAN_DBG2_RMP

#define CAN_DBG2_RMP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_RMP_SHIFT)) & CAN_DBG2_RMP_MASK)

RMP - Rx Matching Pointer

Definition at line 4370 of file MIMXRT1062.h.

## ◆ CAN_DBG2_RMP_MASK

#define CAN_DBG2_RMP_MASK (0x7FU)

Definition at line 4366 of file MIMXRT1062.h.

## ◆ CAN_DBG2_RMP_SHIFT

#define CAN_DBG2_RMP_SHIFT (0U)

Definition at line 4367 of file MIMXRT1062.h.

## ◆ CAN_DBG2_TAP

#define CAN_DBG2_TAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_DBG2_TAP_SHIFT)) & CAN_DBG2_TAP_MASK)

TAP - Tx Arbitration Pointer

Definition at line 4382 of file MIMXRT1062.h.

## ◆ CAN_DBG2_TAP_MASK

#define CAN_DBG2_TAP_MASK (0x7F00U)

Definition at line 4378 of file MIMXRT1062.h.

## ◆ CAN_DBG2_TAP_SHIFT

#define CAN_DBG2_TAP_SHIFT (8U)

Definition at line 4379 of file MIMXRT1062.h.

## ◆ CAN_ECR_RX_ERR_COUNTER

#define CAN_ECR_RX_ERR_COUNTER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RX_ERR_COUNTER_SHIFT)) & CAN_ECR_RX_ERR_COUNTER_MASK)

Definition at line 3846 of file MIMXRT1062.h.

## ◆ CAN_ECR_RX_ERR_COUNTER_MASK

#define CAN_ECR_RX_ERR_COUNTER_MASK (0xFF00U)

Definition at line 3844 of file MIMXRT1062.h.

## ◆ CAN_ECR_RX_ERR_COUNTER_SHIFT

#define CAN_ECR_RX_ERR_COUNTER_SHIFT (8U)

Definition at line 3845 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT

#define CAN_ECR_RXERRCNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RXERRCNT_SHIFT)) & CAN_ECR_RXERRCNT_MASK)

RXERRCNT - Receive Error Counter

Definition at line 3843 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT_FAST

#define CAN_ECR_RXERRCNT_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_RXERRCNT_FAST_SHIFT)) & CAN_ECR_RXERRCNT_FAST_MASK)

RXERRCNT_FAST - Receive Error Counter for fast bits

Definition at line 3856 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT_FAST_MASK

#define CAN_ECR_RXERRCNT_FAST_MASK (0xFF000000U)

Definition at line 3852 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT_FAST_SHIFT

#define CAN_ECR_RXERRCNT_FAST_SHIFT (24U)

Definition at line 3853 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT_MASK

#define CAN_ECR_RXERRCNT_MASK (0xFF00U)

Definition at line 3839 of file MIMXRT1062.h.

## ◆ CAN_ECR_RXERRCNT_SHIFT

#define CAN_ECR_RXERRCNT_SHIFT (8U)

Definition at line 3840 of file MIMXRT1062.h.

## ◆ CAN_ECR_TX_ERR_COUNTER

#define CAN_ECR_TX_ERR_COUNTER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TX_ERR_COUNTER_SHIFT)) & CAN_ECR_TX_ERR_COUNTER_MASK)

Definition at line 3838 of file MIMXRT1062.h.

## ◆ CAN_ECR_TX_ERR_COUNTER_MASK

#define CAN_ECR_TX_ERR_COUNTER_MASK (0xFFU)

Definition at line 3836 of file MIMXRT1062.h.

## ◆ CAN_ECR_TX_ERR_COUNTER_SHIFT

#define CAN_ECR_TX_ERR_COUNTER_SHIFT (0U)

Definition at line 3837 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT

#define CAN_ECR_TXERRCNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TXERRCNT_SHIFT)) & CAN_ECR_TXERRCNT_MASK)

TXERRCNT - Transmit Error Counter

Definition at line 3835 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT_FAST

#define CAN_ECR_TXERRCNT_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ECR_TXERRCNT_FAST_SHIFT)) & CAN_ECR_TXERRCNT_FAST_MASK)

TXERRCNT_FAST - Transmit Error Counter for fast bits

Definition at line 3851 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT_FAST_MASK

#define CAN_ECR_TXERRCNT_FAST_MASK (0xFF0000U)

Definition at line 3847 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT_FAST_SHIFT

#define CAN_ECR_TXERRCNT_FAST_SHIFT (16U)

Definition at line 3848 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT_MASK

#define CAN_ECR_TXERRCNT_MASK (0xFFU)

Definition at line 3831 of file MIMXRT1062.h.

## ◆ CAN_ECR_TXERRCNT_SHIFT

#define CAN_ECR_TXERRCNT_SHIFT (0U)

Definition at line 3832 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DRJW

#define CAN_EDCBT_DRJW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DRJW_SHIFT)) & CAN_EDCBT_DRJW_MASK)

DRJW - Data Phase Resynchronization Jump Width

Definition at line 4968 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DRJW_MASK

#define CAN_EDCBT_DRJW_MASK (0x3C00000U)

Definition at line 4964 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DRJW_SHIFT

#define CAN_EDCBT_DRJW_SHIFT (22U)

Definition at line 4965 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG1

#define CAN_EDCBT_DTSEG1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DTSEG1_SHIFT)) & CAN_EDCBT_DTSEG1_MASK)

DTSEG1 - Data Phase Segment 1

Definition at line 4958 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG1_MASK

#define CAN_EDCBT_DTSEG1_MASK (0x1FU)

Definition at line 4954 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG1_SHIFT

#define CAN_EDCBT_DTSEG1_SHIFT (0U)

Definition at line 4955 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG2

#define CAN_EDCBT_DTSEG2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_EDCBT_DTSEG2_SHIFT)) & CAN_EDCBT_DTSEG2_MASK)

DTSEG2 - Data Phase Time Segment 2

Definition at line 4963 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG2_MASK

#define CAN_EDCBT_DTSEG2_MASK (0xF000U)

Definition at line 4959 of file MIMXRT1062.h.

## ◆ CAN_EDCBT_DTSEG2_SHIFT

#define CAN_EDCBT_DTSEG2_SHIFT (12U)

Definition at line 4960 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NRJW

#define CAN_ENCBT_NRJW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NRJW_SHIFT)) & CAN_ENCBT_NRJW_MASK)

NRJW - Nominal Resynchronization Jump Width

Definition at line 4949 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NRJW_MASK

#define CAN_ENCBT_NRJW_MASK (0x1FC00000U)

Definition at line 4945 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NRJW_SHIFT

#define CAN_ENCBT_NRJW_SHIFT (22U)

Definition at line 4946 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG1

#define CAN_ENCBT_NTSEG1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NTSEG1_SHIFT)) & CAN_ENCBT_NTSEG1_MASK)

NTSEG1 - Nominal Time Segment 1

Definition at line 4939 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG1_MASK

#define CAN_ENCBT_NTSEG1_MASK (0xFFU)

Definition at line 4935 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG1_SHIFT

#define CAN_ENCBT_NTSEG1_SHIFT (0U)

Definition at line 4936 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG2

#define CAN_ENCBT_NTSEG2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ENCBT_NTSEG2_SHIFT)) & CAN_ENCBT_NTSEG2_MASK)

NTSEG2 - Nominal Time Segment 2

Definition at line 4944 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG2_MASK

#define CAN_ENCBT_NTSEG2_MASK (0x7F000U)

Definition at line 4940 of file MIMXRT1062.h.

## ◆ CAN_ENCBT_NTSEG2_SHIFT

#define CAN_ENCBT_NTSEG2_SHIFT (12U)

Definition at line 4941 of file MIMXRT1062.h.

## ◆ CAN_EPRS_EDPRESDIV

#define CAN_EPRS_EDPRESDIV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_EPRS_EDPRESDIV_SHIFT)) & CAN_EPRS_EDPRESDIV_MASK)

EDPRESDIV - Extended Data Phase Prescaler Division Factor

Definition at line 4930 of file MIMXRT1062.h.

## ◆ CAN_EPRS_EDPRESDIV_MASK

#define CAN_EPRS_EDPRESDIV_MASK (0x3FF0000U)

Definition at line 4926 of file MIMXRT1062.h.

## ◆ CAN_EPRS_EDPRESDIV_SHIFT

#define CAN_EPRS_EDPRESDIV_SHIFT (16U)

Definition at line 4927 of file MIMXRT1062.h.

## ◆ CAN_EPRS_ENPRESDIV

#define CAN_EPRS_ENPRESDIV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_EPRS_ENPRESDIV_SHIFT)) & CAN_EPRS_ENPRESDIV_MASK)

ENPRESDIV - Extended Nominal Prescaler Division Factor

Definition at line 4925 of file MIMXRT1062.h.

## ◆ CAN_EPRS_ENPRESDIV_MASK

#define CAN_EPRS_ENPRESDIV_MASK (0x3FFU)

Definition at line 4921 of file MIMXRT1062.h.

## ◆ CAN_EPRS_ENPRESDIV_SHIFT

#define CAN_EPRS_ENPRESDIV_SHIFT (0U)

Definition at line 4922 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_DMALW

#define CAN_ERFCR_DMALW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_DMALW_SHIFT)) & CAN_ERFCR_DMALW_MASK)

DMALW - DMA Last Word

Definition at line 5109 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_DMALW_MASK

#define CAN_ERFCR_DMALW_MASK (0x7C000000U)

Definition at line 5105 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_DMALW_SHIFT

#define CAN_ERFCR_DMALW_SHIFT (26U)

Definition at line 5106 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFEN

#define CAN_ERFCR_ERFEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_ERFEN_SHIFT)) & CAN_ERFCR_ERFEN_MASK)

ERFEN - Enhanced Rx FIFO enable 0b0..Enhanced Rx FIFO is disabled 0b1..Enhanced Rx FIFO is enabled

Definition at line 5116 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFEN_MASK

#define CAN_ERFCR_ERFEN_MASK (0x80000000U)

Definition at line 5110 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFEN_SHIFT

#define CAN_ERFCR_ERFEN_SHIFT (31U)

Definition at line 5111 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFWM

#define CAN_ERFCR_ERFWM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_ERFWM_SHIFT)) & CAN_ERFCR_ERFWM_MASK)

ERFWM - Enhanced Rx FIFO Watermark

Definition at line 5094 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFWM_MASK

#define CAN_ERFCR_ERFWM_MASK (0x1FU)

Definition at line 5090 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_ERFWM_SHIFT

#define CAN_ERFCR_ERFWM_SHIFT (0U)

Definition at line 5091 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NEXIF

#define CAN_ERFCR_NEXIF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_NEXIF_SHIFT)) & CAN_ERFCR_NEXIF_MASK)

NEXIF - Number of Extended ID Filter Elements

Definition at line 5104 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NEXIF_MASK

#define CAN_ERFCR_NEXIF_MASK (0x7F0000U)

Definition at line 5100 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NEXIF_SHIFT

#define CAN_ERFCR_NEXIF_SHIFT (16U)

Definition at line 5101 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NFE

#define CAN_ERFCR_NFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFCR_NFE_SHIFT)) & CAN_ERFCR_NFE_MASK)

NFE - Number of Enhanced Rx FIFO Filter Elements

Definition at line 5099 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NFE_MASK

#define CAN_ERFCR_NFE_MASK (0x3F00U)

Definition at line 5095 of file MIMXRT1062.h.

## ◆ CAN_ERFCR_NFE_SHIFT

#define CAN_ERFCR_NFE_SHIFT (8U)

Definition at line 5096 of file MIMXRT1062.h.

## ◆ CAN_ERFFEL_COUNT

#define CAN_ERFFEL_COUNT (128U)

Definition at line 5231 of file MIMXRT1062.h.

## ◆ CAN_ERFFEL_FEL

#define CAN_ERFFEL_FEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFFEL_FEL_SHIFT)) & CAN_ERFFEL_FEL_MASK)

FEL - Filter Element Bits

Definition at line 5227 of file MIMXRT1062.h.

## ◆ CAN_ERFFEL_FEL_MASK

#define CAN_ERFFEL_FEL_MASK (0xFFFFFFFFU)

Definition at line 5223 of file MIMXRT1062.h.

## ◆ CAN_ERFFEL_FEL_SHIFT

#define CAN_ERFFEL_FEL_SHIFT (0U)

Definition at line 5224 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFDAIE

#define CAN_ERFIER_ERFDAIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFDAIE_SHIFT)) & CAN_ERFIER_ERFDAIE_MASK)

ERFDAIE - Enhanced Rx FIFO Data Available Interrupt Enable 0b0..Enhanced Rx FIFO Data Available Interrupt is disabled 0b1..Enhanced Rx FIFO Data Available Interrupt is enabled

Definition at line 5127 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFDAIE_MASK

#define CAN_ERFIER_ERFDAIE_MASK (0x10000000U)

Definition at line 5121 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFDAIE_SHIFT

#define CAN_ERFIER_ERFDAIE_SHIFT (28U)

Definition at line 5122 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFOVFIE

#define CAN_ERFIER_ERFOVFIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFOVFIE_SHIFT)) & CAN_ERFIER_ERFOVFIE_MASK)

ERFOVFIE - Enhanced Rx FIFO Overflow Interrupt Enable 0b0..Enhanced Rx FIFO Overflow is disabled 0b1..Enhanced Rx FIFO Overflow is enabled

Definition at line 5141 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFOVFIE_MASK

#define CAN_ERFIER_ERFOVFIE_MASK (0x40000000U)

Definition at line 5135 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFOVFIE_SHIFT

#define CAN_ERFIER_ERFOVFIE_SHIFT (30U)

Definition at line 5136 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFUFWIE

#define CAN_ERFIER_ERFUFWIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFUFWIE_SHIFT)) & CAN_ERFIER_ERFUFWIE_MASK)

ERFUFWIE - Enhanced Rx FIFO Underflow Interrupt Enable 0b0..Enhanced Rx FIFO Underflow interrupt is disabled 0b1..Enhanced Rx FIFO Underflow interrupt is enabled

Definition at line 5148 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFUFWIE_MASK

#define CAN_ERFIER_ERFUFWIE_MASK (0x80000000U)

Definition at line 5142 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFUFWIE_SHIFT

#define CAN_ERFIER_ERFUFWIE_SHIFT (31U)

Definition at line 5143 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFWMIIE

#define CAN_ERFIER_ERFWMIIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFIER_ERFWMIIE_SHIFT)) & CAN_ERFIER_ERFWMIIE_MASK)

ERFWMIIE - Enhanced Rx FIFO Watermark Indication Interrupt Enable 0b0..Enhanced Rx FIFO Watermark Interrupt is disabled 0b1..Enhanced Rx FIFO Watermark Interrupt is enabled

Definition at line 5134 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFWMIIE_MASK

#define CAN_ERFIER_ERFWMIIE_MASK (0x20000000U)

Definition at line 5128 of file MIMXRT1062.h.

## ◆ CAN_ERFIER_ERFWMIIE_SHIFT

#define CAN_ERFIER_ERFWMIIE_SHIFT (29U)

Definition at line 5129 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFCLR

#define CAN_ERFSR_ERFCLR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFCLR_SHIFT)) & CAN_ERFSR_ERFCLR_MASK)

ERFCLR - Enhanced Rx FIFO Clear 0b0..No effect 0b1..Clear Enhanced Rx FIFO content

Definition at line 5178 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFCLR_MASK

#define CAN_ERFSR_ERFCLR_MASK (0x8000000U)

Definition at line 5172 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFCLR_SHIFT

#define CAN_ERFSR_ERFCLR_SHIFT (27U)

Definition at line 5173 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFDA

#define CAN_ERFSR_ERFDA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFDA_SHIFT)) & CAN_ERFSR_ERFDA_MASK)

ERFDA - Enhanced Rx FIFO Data Available 0b0..No such occurrence 0b1..There is at least one message stored in Enhanced Rx FIFO

Definition at line 5185 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFDA_MASK

#define CAN_ERFSR_ERFDA_MASK (0x10000000U)

Definition at line 5179 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFDA_SHIFT

#define CAN_ERFSR_ERFDA_SHIFT (28U)

Definition at line 5180 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFE

#define CAN_ERFSR_ERFE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFE_SHIFT)) & CAN_ERFSR_ERFE_MASK)

ERFE - Enhanced Rx FIFO empty 0b0..Enhanced Rx FIFO is not empty 0b1..Enhanced Rx FIFO is empty

Definition at line 5171 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFE_MASK

#define CAN_ERFSR_ERFE_MASK (0x20000U)

Definition at line 5165 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFE_SHIFT

#define CAN_ERFSR_ERFE_SHIFT (17U)

Definition at line 5166 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFEL

#define CAN_ERFSR_ERFEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFEL_SHIFT)) & CAN_ERFSR_ERFEL_MASK)

ERFEL - Enhanced Rx FIFO Elements

Definition at line 5157 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFEL_MASK

#define CAN_ERFSR_ERFEL_MASK (0x3FU)

Definition at line 5153 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFEL_SHIFT

#define CAN_ERFSR_ERFEL_SHIFT (0U)

Definition at line 5154 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFF

#define CAN_ERFSR_ERFF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFF_SHIFT)) & CAN_ERFSR_ERFF_MASK)

ERFF - Enhanced Rx FIFO full 0b0..Enhanced Rx FIFO is not full 0b1..Enhanced Rx FIFO is full

Definition at line 5164 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFF_MASK

#define CAN_ERFSR_ERFF_MASK (0x10000U)

Definition at line 5158 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFF_SHIFT

#define CAN_ERFSR_ERFF_SHIFT (16U)

Definition at line 5159 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFOVF

#define CAN_ERFSR_ERFOVF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFOVF_SHIFT)) & CAN_ERFSR_ERFOVF_MASK)

ERFOVF - Enhanced Rx FIFO Overflow 0b0..No such occurrence 0b1..Enhanced Rx FIFO overflow

Definition at line 5199 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFOVF_MASK

#define CAN_ERFSR_ERFOVF_MASK (0x40000000U)

Definition at line 5193 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFOVF_SHIFT

#define CAN_ERFSR_ERFOVF_SHIFT (30U)

Definition at line 5194 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFUFW

#define CAN_ERFSR_ERFUFW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFUFW_SHIFT)) & CAN_ERFSR_ERFUFW_MASK)

ERFUFW - Enhanced Rx FIFO Underflow 0b0..No such occurrence 0b1..Enhanced Rx FIFO underflow

Definition at line 5206 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFUFW_MASK

#define CAN_ERFSR_ERFUFW_MASK (0x80000000U)

Definition at line 5200 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFUFW_SHIFT

#define CAN_ERFSR_ERFUFW_SHIFT (31U)

Definition at line 5201 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFWMI

#define CAN_ERFSR_ERFWMI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ERFSR_ERFWMI_SHIFT)) & CAN_ERFSR_ERFWMI_MASK)

ERFWMI - Enhanced Rx FIFO Watermark Indication 0b0..No such occurrence 0b1..The number of messages in FIFO is greater than the watermark

Definition at line 5192 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFWMI_MASK

#define CAN_ERFSR_ERFWMI_MASK (0x20000000U)

Definition at line 5186 of file MIMXRT1062.h.

## ◆ CAN_ERFSR_ERFWMI_SHIFT

#define CAN_ERFSR_ERFWMI_SHIFT (29U)

Definition at line 5187 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ACKERR

#define CAN_ESR1_ACKERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ACKERR_SHIFT)) & CAN_ESR1_ACKERR_MASK)

ACKERR - Acknowledge Error 0b1..An ACK error occurred since last read of this register 0b0..No such occurrence

Definition at line 3952 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ACKERR_MASK

#define CAN_ESR1_ACKERR_MASK (0x2000U)

Definition at line 3946 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ACKERR_SHIFT

#define CAN_ESR1_ACKERR_SHIFT (13U)

Definition at line 3947 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR

#define CAN_ESR1_BIT0ERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_SHIFT)) & CAN_ESR1_BIT0ERR_MASK)

BIT0ERR - Bit0 Error 0b1..At least one bit sent as dominant is received as recessive 0b0..No such occurrence

Definition at line 3959 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR_FAST

#define CAN_ESR1_BIT0ERR_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)

BIT0ERR_FAST - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..At least one bit sent as dominant is received as recessive.

Definition at line 4036 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR_FAST_MASK

#define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U)

Definition at line 4030 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR_FAST_SHIFT

#define CAN_ESR1_BIT0ERR_FAST_SHIFT (30U)

Definition at line 4031 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR_MASK

#define CAN_ESR1_BIT0ERR_MASK (0x4000U)

Definition at line 3953 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT0ERR_SHIFT

#define CAN_ESR1_BIT0ERR_SHIFT (14U)

Definition at line 3954 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR

#define CAN_ESR1_BIT1ERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_SHIFT)) & CAN_ESR1_BIT1ERR_MASK)

BIT1ERR - Bit1 Error 0b1..At least one bit sent as recessive is received as dominant 0b0..No such occurrence

Definition at line 3966 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR_FAST

#define CAN_ESR1_BIT1ERR_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT1ERR_FAST_SHIFT)) & CAN_ESR1_BIT1ERR_FAST_MASK)

BIT1ERR_FAST - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..At least one bit sent as recessive is received as dominant.

Definition at line 4043 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR_FAST_MASK

#define CAN_ESR1_BIT1ERR_FAST_MASK (0x80000000U)

Definition at line 4037 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR_FAST_SHIFT

#define CAN_ESR1_BIT1ERR_FAST_SHIFT (31U)

Definition at line 4038 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR_MASK

#define CAN_ESR1_BIT1ERR_MASK (0x8000U)

Definition at line 3960 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BIT1ERR_SHIFT

#define CAN_ESR1_BIT1ERR_SHIFT (15U)

Definition at line 3961 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFDONEINT

#define CAN_ESR1_BOFFDONEINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFDONEINT_SHIFT)) & CAN_ESR1_BOFFDONEINT_MASK)

BOFFDONEINT - Bus Off Done Interrupt 0b0..No such occurrence. 0b1..FlexCAN module has completed Bus Off process.

Definition at line 3994 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFDONEINT_MASK

#define CAN_ESR1_BOFFDONEINT_MASK (0x80000U)

Definition at line 3988 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFDONEINT_SHIFT

#define CAN_ESR1_BOFFDONEINT_SHIFT (19U)

Definition at line 3989 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFINT

#define CAN_ESR1_BOFFINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BOFFINT_SHIFT)) & CAN_ESR1_BOFFINT_MASK)

BOFFINT - Bus Off Interrupt 0b1..FLEXCAN module entered 'Bus Off' state 0b0..No such occurrence

Definition at line 3881 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFINT_MASK

#define CAN_ESR1_BOFFINT_MASK (0x4U)

Definition at line 3875 of file MIMXRT1062.h.

## ◆ CAN_ESR1_BOFFINT_SHIFT

#define CAN_ESR1_BOFFINT_SHIFT (2U)

Definition at line 3876 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR

#define CAN_ESR1_CRCERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_SHIFT)) & CAN_ESR1_CRCERR_MASK)

CRCERR - Cyclic Redundancy Check Error 0b1..A CRC error occurred since last read of this register. 0b0..No such occurrence

Definition at line 3945 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR_FAST

#define CAN_ESR1_CRCERR_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_CRCERR_FAST_SHIFT)) & CAN_ESR1_CRCERR_FAST_MASK)

CRCERR_FAST - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..A CRC error occurred since last read of this register.

Definition at line 4029 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR_FAST_MASK

#define CAN_ESR1_CRCERR_FAST_MASK (0x10000000U)

Definition at line 4023 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR_FAST_SHIFT

#define CAN_ESR1_CRCERR_FAST_SHIFT (28U)

Definition at line 4024 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR_MASK

#define CAN_ESR1_CRCERR_MASK (0x1000U)

Definition at line 3939 of file MIMXRT1062.h.

## ◆ CAN_ESR1_CRCERR_SHIFT

#define CAN_ESR1_CRCERR_SHIFT (12U)

Definition at line 3940 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT

#define CAN_ESR1_ERRINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_SHIFT)) & CAN_ESR1_ERRINT_MASK)

ERRINT - Error Interrupt 0b1..Indicates setting of any Error Bit in the Error and Status Register 0b0..No such occurrence

Definition at line 3874 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT_FAST

#define CAN_ESR1_ERRINT_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERRINT_FAST_SHIFT)) & CAN_ESR1_ERRINT_FAST_MASK)

ERRINT_FAST - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set.

Definition at line 4001 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT_FAST_MASK

#define CAN_ESR1_ERRINT_FAST_MASK (0x100000U)

Definition at line 3995 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT_FAST_SHIFT

#define CAN_ESR1_ERRINT_FAST_SHIFT (20U)

Definition at line 3996 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT_MASK

#define CAN_ESR1_ERRINT_MASK (0x2U)

Definition at line 3868 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERRINT_SHIFT

#define CAN_ESR1_ERRINT_SHIFT (1U)

Definition at line 3869 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERROVR

#define CAN_ESR1_ERROVR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_ERROVR_SHIFT)) & CAN_ESR1_ERROVR_MASK)

ERROVR - Error Overrun bit 0b0..Overrun has not occurred. 0b1..Overrun has occurred.

Definition at line 4008 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERROVR_MASK

#define CAN_ESR1_ERROVR_MASK (0x200000U)

Definition at line 4002 of file MIMXRT1062.h.

## ◆ CAN_ESR1_ERROVR_SHIFT

#define CAN_ESR1_ERROVR_SHIFT (21U)

Definition at line 4003 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FLTCONF

#define CAN_ESR1_FLTCONF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FLTCONF_SHIFT)) & CAN_ESR1_FLTCONF_MASK)

FLTCONF - Fault Confinement State 0b00..Error Active 0b01..Error Passive 0b1x..Bus off

Definition at line 3896 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FLTCONF_MASK

#define CAN_ESR1_FLTCONF_MASK (0x30U)

Definition at line 3889 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FLTCONF_SHIFT

#define CAN_ESR1_FLTCONF_SHIFT (4U)

Definition at line 3890 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR

#define CAN_ESR1_FRMERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)

FRMERR - Form Error 0b1..A Form Error occurred since last read of this register 0b0..No such occurrence

Definition at line 3938 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR_FAST

#define CAN_ESR1_FRMERR_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_FAST_SHIFT)) & CAN_ESR1_FRMERR_FAST_MASK)

FRMERR_FAST - Form Error in the Data Phase of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..A Form Error occurred since last read of this register.

Definition at line 4022 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR_FAST_MASK

#define CAN_ESR1_FRMERR_FAST_MASK (0x8000000U)

Definition at line 4016 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR_FAST_SHIFT

#define CAN_ESR1_FRMERR_FAST_SHIFT (27U)

Definition at line 4017 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR_MASK

#define CAN_ESR1_FRMERR_MASK (0x800U)

Definition at line 3932 of file MIMXRT1062.h.

## ◆ CAN_ESR1_FRMERR_SHIFT

#define CAN_ESR1_FRMERR_SHIFT (11U)

Definition at line 3933 of file MIMXRT1062.h.

## ◆ CAN_ESR1_IDLE

#define CAN_ESR1_IDLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_IDLE_SHIFT)) & CAN_ESR1_IDLE_MASK)

IDLE - IDLE 0b1..CAN bus is now IDLE 0b0..No such occurrence

Definition at line 3910 of file MIMXRT1062.h.

## ◆ CAN_ESR1_IDLE_MASK

#define CAN_ESR1_IDLE_MASK (0x80U)

Definition at line 3904 of file MIMXRT1062.h.

## ◆ CAN_ESR1_IDLE_SHIFT

#define CAN_ESR1_IDLE_SHIFT (7U)

Definition at line 3905 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RWRNINT

#define CAN_ESR1_RWRNINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RWRNINT_SHIFT)) & CAN_ESR1_RWRNINT_MASK)

RWRNINT - Rx Warning Interrupt Flag 0b1..The Rx error counter transition from < 96 to >= 96 0b0..No such occurrence

Definition at line 3973 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RWRNINT_MASK

#define CAN_ESR1_RWRNINT_MASK (0x10000U)

Definition at line 3967 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RWRNINT_SHIFT

#define CAN_ESR1_RWRNINT_SHIFT (16U)

Definition at line 3968 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RX

#define CAN_ESR1_RX | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RX_SHIFT)) & CAN_ESR1_RX_MASK)

RX - FlexCAN In Reception 0b1..FLEXCAN is transmitting a message 0b0..FLEXCAN is receiving a message

Definition at line 3888 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RX_MASK

#define CAN_ESR1_RX_MASK (0x8U)

Definition at line 3882 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RX_SHIFT

#define CAN_ESR1_RX_SHIFT (3U)

Definition at line 3883 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RXWRN

#define CAN_ESR1_RXWRN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_RXWRN_SHIFT)) & CAN_ESR1_RXWRN_MASK)

RXWRN - Rx Error Warning 0b1..Rx_Err_Counter >= 96 0b0..No such occurrence

Definition at line 3917 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RXWRN_MASK

#define CAN_ESR1_RXWRN_MASK (0x100U)

Definition at line 3911 of file MIMXRT1062.h.

## ◆ CAN_ESR1_RXWRN_SHIFT

#define CAN_ESR1_RXWRN_SHIFT (8U)

Definition at line 3912 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR

#define CAN_ESR1_STFERR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_SHIFT)) & CAN_ESR1_STFERR_MASK)

STFERR - Stuffing Error 0b1..A Stuffing Error occurred since last read of this register. 0b0..No such occurrence.

Definition at line 3931 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR_FAST

#define CAN_ESR1_STFERR_FAST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_STFERR_FAST_SHIFT)) & CAN_ESR1_STFERR_FAST_MASK)

STFERR_FAST - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set 0b0..No such occurrence. 0b1..A Stuffing Error occurred since last read of this register.

Definition at line 4015 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR_FAST_MASK

#define CAN_ESR1_STFERR_FAST_MASK (0x4000000U)

Definition at line 4009 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR_FAST_SHIFT

#define CAN_ESR1_STFERR_FAST_SHIFT (26U)

Definition at line 4010 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR_MASK

#define CAN_ESR1_STFERR_MASK (0x400U)

Definition at line 3925 of file MIMXRT1062.h.

## ◆ CAN_ESR1_STFERR_SHIFT

#define CAN_ESR1_STFERR_SHIFT (10U)

Definition at line 3926 of file MIMXRT1062.h.

## ◆ CAN_ESR1_SYNCH

#define CAN_ESR1_SYNCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_SYNCH_SHIFT)) & CAN_ESR1_SYNCH_MASK)

SYNCH - CAN Synchronization Status 0b1..FlexCAN is synchronized to the CAN bus 0b0..FlexCAN is not synchronized to the CAN bus

Definition at line 3987 of file MIMXRT1062.h.

## ◆ CAN_ESR1_SYNCH_MASK

#define CAN_ESR1_SYNCH_MASK (0x40000U)

Definition at line 3981 of file MIMXRT1062.h.

## ◆ CAN_ESR1_SYNCH_SHIFT

#define CAN_ESR1_SYNCH_SHIFT (18U)

Definition at line 3982 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TWRNINT

#define CAN_ESR1_TWRNINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TWRNINT_SHIFT)) & CAN_ESR1_TWRNINT_MASK)

TWRNINT - Tx Warning Interrupt Flag 0b1..The Tx error counter transition from < 96 to >= 96 0b0..No such occurrence

Definition at line 3980 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TWRNINT_MASK

#define CAN_ESR1_TWRNINT_MASK (0x20000U)

Definition at line 3974 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TWRNINT_SHIFT

#define CAN_ESR1_TWRNINT_SHIFT (17U)

Definition at line 3975 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TX

#define CAN_ESR1_TX | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TX_SHIFT)) & CAN_ESR1_TX_MASK)

TX - FlexCAN In Transmission 0b1..FLEXCAN is transmitting a message 0b0..FLEXCAN is receiving a message

Definition at line 3903 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TX_MASK

#define CAN_ESR1_TX_MASK (0x40U)

Definition at line 3897 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TX_SHIFT

#define CAN_ESR1_TX_SHIFT (6U)

Definition at line 3898 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TXWRN

#define CAN_ESR1_TXWRN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_TXWRN_SHIFT)) & CAN_ESR1_TXWRN_MASK)

TXWRN - TX Error Warning 0b1..TX_Err_Counter >= 96 0b0..No such occurrence

Definition at line 3924 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TXWRN_MASK

#define CAN_ESR1_TXWRN_MASK (0x200U)

Definition at line 3918 of file MIMXRT1062.h.

## ◆ CAN_ESR1_TXWRN_SHIFT

#define CAN_ESR1_TXWRN_SHIFT (9U)

Definition at line 3919 of file MIMXRT1062.h.

## ◆ CAN_ESR1_WAKINT

#define CAN_ESR1_WAKINT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_WAKINT_SHIFT)) & CAN_ESR1_WAKINT_MASK)

WAKINT - Wake-Up Interrupt 0b1..Indicates a recessive to dominant transition received on the CAN bus when the FLEXCAN module is in Stop Mode 0b0..No such occurrence

Definition at line 3867 of file MIMXRT1062.h.

## ◆ CAN_ESR1_WAKINT_MASK

#define CAN_ESR1_WAKINT_MASK (0x1U)

Definition at line 3861 of file MIMXRT1062.h.

## ◆ CAN_ESR1_WAKINT_SHIFT

#define CAN_ESR1_WAKINT_SHIFT (0U)

Definition at line 3862 of file MIMXRT1062.h.

## ◆ CAN_ESR2_IMB

#define CAN_ESR2_IMB | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_IMB_SHIFT)) & CAN_ESR2_IMB_MASK)

IMB - Inactive Mailbox 0b1..If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one. 0b0..If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.

Definition at line 4265 of file MIMXRT1062.h.

## ◆ CAN_ESR2_IMB_MASK

#define CAN_ESR2_IMB_MASK (0x2000U)

Definition at line 4259 of file MIMXRT1062.h.

## ◆ CAN_ESR2_IMB_SHIFT

#define CAN_ESR2_IMB_SHIFT (13U)

Definition at line 4260 of file MIMXRT1062.h.

## ◆ CAN_ESR2_LPTM

#define CAN_ESR2_LPTM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_LPTM_SHIFT)) & CAN_ESR2_LPTM_MASK)

LPTM - Lowest Priority Tx Mailbox

Definition at line 4277 of file MIMXRT1062.h.

## ◆ CAN_ESR2_LPTM_MASK

#define CAN_ESR2_LPTM_MASK (0x7F0000U)

Definition at line 4273 of file MIMXRT1062.h.

## ◆ CAN_ESR2_LPTM_SHIFT

#define CAN_ESR2_LPTM_SHIFT (16U)

Definition at line 4274 of file MIMXRT1062.h.

## ◆ CAN_ESR2_VPS

#define CAN_ESR2_VPS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)

VPS - Valid Priority Status 0b1..Contents of IMB and LPTM are valid 0b0..Contents of IMB and LPTM are invalid

Definition at line 4272 of file MIMXRT1062.h.

## ◆ CAN_ESR2_VPS_MASK

#define CAN_ESR2_VPS_MASK (0x4000U)

Definition at line 4266 of file MIMXRT1062.h.

## ◆ CAN_ESR2_VPS_SHIFT

#define CAN_ESR2_VPS_SHIFT (14U)

Definition at line 4267 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCOFF

#define CAN_ETDC_ETDCOFF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_ETDCOFF_SHIFT)) & CAN_ETDC_ETDCOFF_MASK)

ETDCOFF - Enhanced Transceiver Delay Compensation Offset

Definition at line 4982 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCOFF_MASK

#define CAN_ETDC_ETDCOFF_MASK (0x7F0000U)

Definition at line 4978 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCOFF_SHIFT

#define CAN_ETDC_ETDCOFF_SHIFT (16U)

Definition at line 4979 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCVAL

#define CAN_ETDC_ETDCVAL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_ETDCVAL_SHIFT)) & CAN_ETDC_ETDCVAL_MASK)

ETDCVAL - Enhanced Transceiver Delay Compensation Value

Definition at line 4977 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCVAL_MASK

#define CAN_ETDC_ETDCVAL_MASK (0xFFU)

Definition at line 4973 of file MIMXRT1062.h.

## ◆ CAN_ETDC_ETDCVAL_SHIFT

#define CAN_ETDC_ETDCVAL_SHIFT (0U)

Definition at line 4974 of file MIMXRT1062.h.

## ◆ CAN_ETDC_TDMDIS

#define CAN_ETDC_TDMDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ETDC_TDMDIS_SHIFT)) & CAN_ETDC_TDMDIS_MASK)

TDMDIS - Transceiver Delay Measurement Disable 0b0..TDC measurement is enabled 0b1..TDC measurement is disabled

Definition at line 4989 of file MIMXRT1062.h.

## ◆ CAN_ETDC_TDMDIS_MASK

#define CAN_ETDC_TDMDIS_MASK (0x80000000U)

Definition at line 4983 of file MIMXRT1062.h.

## ◆ CAN_ETDC_TDMDIS_SHIFT

#define CAN_ETDC_TDMDIS_SHIFT (31U)

Definition at line 4984 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPRESDIV

#define CAN_FDCBT_FPRESDIV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPRESDIV_SHIFT)) & CAN_FDCBT_FPRESDIV_MASK)

FPRESDIV - Fast Prescaler Division Factor

Definition at line 5071 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPRESDIV_MASK

#define CAN_FDCBT_FPRESDIV_MASK (0x3FF00000U)

Definition at line 5067 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPRESDIV_SHIFT

#define CAN_FDCBT_FPRESDIV_SHIFT (20U)

Definition at line 5068 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPROPSEG

#define CAN_FDCBT_FPROPSEG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPROPSEG_SHIFT)) & CAN_FDCBT_FPROPSEG_MASK)

FPROPSEG - Fast Propagation Segment

Definition at line 5061 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPROPSEG_MASK

#define CAN_FDCBT_FPROPSEG_MASK (0x7C00U)

Definition at line 5057 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPROPSEG_SHIFT

#define CAN_FDCBT_FPROPSEG_SHIFT (10U)

Definition at line 5058 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG1

#define CAN_FDCBT_FPSEG1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPSEG1_SHIFT)) & CAN_FDCBT_FPSEG1_MASK)

FPSEG1 - Fast Phase Segment 1

Definition at line 5056 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG1_MASK

#define CAN_FDCBT_FPSEG1_MASK (0xE0U)

Definition at line 5052 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG1_SHIFT

#define CAN_FDCBT_FPSEG1_SHIFT (5U)

Definition at line 5053 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG2

#define CAN_FDCBT_FPSEG2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FPSEG2_SHIFT)) & CAN_FDCBT_FPSEG2_MASK)

FPSEG2 - Fast Phase Segment 2

Definition at line 5051 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG2_MASK

#define CAN_FDCBT_FPSEG2_MASK (0x7U)

Definition at line 5047 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FPSEG2_SHIFT

#define CAN_FDCBT_FPSEG2_SHIFT (0U)

Definition at line 5048 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FRJW

#define CAN_FDCBT_FRJW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCBT_FRJW_SHIFT)) & CAN_FDCBT_FRJW_MASK)

FRJW - Fast Resync Jump Width

Definition at line 5066 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FRJW_MASK

#define CAN_FDCBT_FRJW_MASK (0x70000U)

Definition at line 5062 of file MIMXRT1062.h.

## ◆ CAN_FDCBT_FRJW_SHIFT

#define CAN_FDCBT_FRJW_SHIFT (16U)

Definition at line 5063 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_MBCRC

#define CAN_FDCRC_FD_MBCRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_MBCRC_SHIFT)) & CAN_FDCRC_FD_MBCRC_MASK)

FD_MBCRC - CRC Mailbox Number for FD_TXCRC

Definition at line 5085 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_MBCRC_MASK

#define CAN_FDCRC_FD_MBCRC_MASK (0x7F000000U)

Definition at line 5081 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_MBCRC_SHIFT

#define CAN_FDCRC_FD_MBCRC_SHIFT (24U)

Definition at line 5082 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_TXCRC

#define CAN_FDCRC_FD_TXCRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_TXCRC_SHIFT)) & CAN_FDCRC_FD_TXCRC_MASK)

FD_TXCRC - Extended Transmitted CRC value

Definition at line 5080 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_TXCRC_MASK

#define CAN_FDCRC_FD_TXCRC_MASK (0x1FFFFFU)

Definition at line 5076 of file MIMXRT1062.h.

## ◆ CAN_FDCRC_FD_TXCRC_SHIFT

#define CAN_FDCRC_FD_TXCRC_SHIFT (0U)

Definition at line 5077 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_FDRATE

#define CAN_FDCTRL_FDRATE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_FDRATE_SHIFT)) & CAN_FDCTRL_FDRATE_MASK)

FDRATE - Bit Rate Switch Enable 0b0..Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect. 0b1..Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive.

Definition at line 5042 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_FDRATE_MASK

#define CAN_FDCTRL_FDRATE_MASK (0x80000000U)

Definition at line 5036 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_FDRATE_SHIFT

#define CAN_FDCTRL_FDRATE_SHIFT (31U)

Definition at line 5037 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR0

#define CAN_FDCTRL_MBDSR0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_MBDSR0_SHIFT)) & CAN_FDCTRL_MBDSR0_MASK)

MBDSR0 - Message Buffer Data Size for Region 0 0b00..Selects 8 bytes per Message Buffer. 0b01..Selects 16 bytes per Message Buffer. 0b10..Selects 32 bytes per Message Buffer. 0b11..Selects 64 bytes per Message Buffer.

Definition at line 5026 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR0_MASK

#define CAN_FDCTRL_MBDSR0_MASK (0x30000U)

Definition at line 5018 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR0_SHIFT

#define CAN_FDCTRL_MBDSR0_SHIFT (16U)

Definition at line 5019 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR1

#define CAN_FDCTRL_MBDSR1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_MBDSR1_SHIFT)) & CAN_FDCTRL_MBDSR1_MASK)

MBDSR1 - Message Buffer Data Size for Region 1 0b00..Selects 8 bytes per Message Buffer. 0b01..Selects 16 bytes per Message Buffer. 0b10..Selects 32 bytes per Message Buffer. 0b11..Selects 64 bytes per Message Buffer.

Definition at line 5035 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR1_MASK

#define CAN_FDCTRL_MBDSR1_MASK (0x180000U)

Definition at line 5027 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_MBDSR1_SHIFT

#define CAN_FDCTRL_MBDSR1_SHIFT (19U)

Definition at line 5028 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCEN

#define CAN_FDCTRL_TDCEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCEN_SHIFT)) & CAN_FDCTRL_TDCEN_MASK)

TDCEN - Transceiver Delay Compensation Enable 0b0..TDC is disabled 0b1..TDC is enabled

Definition at line 5017 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCEN_MASK

#define CAN_FDCTRL_TDCEN_MASK (0x8000U)

Definition at line 5011 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCEN_SHIFT

#define CAN_FDCTRL_TDCEN_SHIFT (15U)

Definition at line 5012 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCFAIL

#define CAN_FDCTRL_TDCFAIL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCFAIL_SHIFT)) & CAN_FDCTRL_TDCFAIL_MASK)

TDCFAIL - Transceiver Delay Compensation Fail 0b0..Measured loop delay is in range. 0b1..Measured loop delay is out of range.

Definition at line 5010 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCFAIL_MASK

#define CAN_FDCTRL_TDCFAIL_MASK (0x4000U)

Definition at line 5004 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCFAIL_SHIFT

#define CAN_FDCTRL_TDCFAIL_SHIFT (14U)

Definition at line 5005 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCOFF

#define CAN_FDCTRL_TDCOFF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCOFF_SHIFT)) & CAN_FDCTRL_TDCOFF_MASK)

TDCOFF - Transceiver Delay Compensation Offset

Definition at line 5003 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCOFF_MASK

#define CAN_FDCTRL_TDCOFF_MASK (0x1F00U)

Definition at line 4999 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCOFF_SHIFT

#define CAN_FDCTRL_TDCOFF_SHIFT (8U)

Definition at line 5000 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCVAL

#define CAN_FDCTRL_TDCVAL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_FDCTRL_TDCVAL_SHIFT)) & CAN_FDCTRL_TDCVAL_MASK)

TDCVAL - Transceiver Delay Compensation Value

Definition at line 4998 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCVAL_MASK

#define CAN_FDCTRL_TDCVAL_MASK (0x3FU)

Definition at line 4994 of file MIMXRT1062.h.

## ◆ CAN_FDCTRL_TDCVAL_SHIFT

#define CAN_FDCTRL_TDCVAL_SHIFT (0U)

Definition at line 4995 of file MIMXRT1062.h.

## ◆ CAN_GFWR_GFWR

#define CAN_GFWR_GFWR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_GFWR_GFWR_SHIFT)) & CAN_GFWR_GFWR_MASK)

Definition at line 4916 of file MIMXRT1062.h.

## ◆ CAN_GFWR_GFWR_MASK

#define CAN_GFWR_GFWR_MASK (0xFFU)

Definition at line 4914 of file MIMXRT1062.h.

## ◆ CAN_GFWR_GFWR_SHIFT

#define CAN_GFWR_GFWR_SHIFT (0U)

Definition at line 4915 of file MIMXRT1062.h.

## ◆ CAN_HR_TIME_STAMP_COUNT

#define CAN_HR_TIME_STAMP_COUNT (64U)

Definition at line 5219 of file MIMXRT1062.h.

## ◆ CAN_HR_TIME_STAMP_TS

#define CAN_HR_TIME_STAMP_TS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_HR_TIME_STAMP_TS_SHIFT)) & CAN_HR_TIME_STAMP_TS_MASK)

TS - High Resolution Time Stamp

Definition at line 5215 of file MIMXRT1062.h.

## ◆ CAN_HR_TIME_STAMP_TS_MASK

#define CAN_HR_TIME_STAMP_TS_MASK (0xFFFFFFFFU)

Definition at line 5211 of file MIMXRT1062.h.

## ◆ CAN_HR_TIME_STAMP_TS_SHIFT

#define CAN_HR_TIME_STAMP_TS_SHIFT (0U)

Definition at line 5212 of file MIMXRT1062.h.

## ◆ CAN_ID_COUNT

#define CAN_ID_COUNT (64U)

Definition at line 4842 of file MIMXRT1062.h.

## ◆ CAN_ID_COUNT_MB16B

#define CAN_ID_COUNT_MB16B (42U)

Definition at line 4408 of file MIMXRT1062.h.

## ◆ CAN_ID_COUNT_MB32B

#define CAN_ID_COUNT_MB32B (24U)

Definition at line 4420 of file MIMXRT1062.h.

## ◆ CAN_ID_COUNT_MB64B

#define CAN_ID_COUNT_MB64B (14U)

Definition at line 4506 of file MIMXRT1062.h.

## ◆ CAN_ID_COUNT_MB8B

#define CAN_ID_COUNT_MB8B (64U)

Definition at line 4396 of file MIMXRT1062.h.

## ◆ CAN_ID_EXT

#define CAN_ID_EXT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ID_EXT_SHIFT)) & CAN_ID_EXT_MASK)

EXT - Contains extended (LOW word) identifier of message buffer.

Definition at line 4490 of file MIMXRT1062.h.

## ◆ CAN_ID_EXT_MASK

#define CAN_ID_EXT_MASK (0x3FFFFU)

Definition at line 4486 of file MIMXRT1062.h.

## ◆ CAN_ID_EXT_SHIFT

#define CAN_ID_EXT_SHIFT (0U)

Definition at line 4487 of file MIMXRT1062.h.

## ◆ CAN_ID_PRIO

#define CAN_ID_PRIO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ID_PRIO_SHIFT)) & CAN_ID_PRIO_MASK)

PRIO - Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.

Definition at line 4502 of file MIMXRT1062.h.

## ◆ CAN_ID_PRIO_MASK

#define CAN_ID_PRIO_MASK (0xE0000000U)

Definition at line 4496 of file MIMXRT1062.h.

## ◆ CAN_ID_PRIO_SHIFT

#define CAN_ID_PRIO_SHIFT (29U)

Definition at line 4497 of file MIMXRT1062.h.

## ◆ CAN_ID_STD

#define CAN_ID_STD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK)

STD - Contains standard/extended (HIGH word) identifier of message buffer.

Definition at line 4495 of file MIMXRT1062.h.

## ◆ CAN_ID_STD_MASK

#define CAN_ID_STD_MASK (0x1FFC0000U)

Definition at line 4491 of file MIMXRT1062.h.

## ◆ CAN_ID_STD_SHIFT

#define CAN_ID_STD_SHIFT (18U)

Definition at line 4492 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF0I

#define CAN_IFLAG1_BUF0I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF0I_SHIFT)) & CAN_IFLAG1_BUF0I_MASK)

BUF0I - Buffer MB0 Interrupt Or Clear Legacy FIFO bit 0b0..The corresponding buffer has no occurrence of successfully completed transmission or reception when CAN_MCR[RFEN]=0. 0b1..The corresponding buffer has successfully completed transmission or reception when CAN_MCR[RFEN]=0.

Definition at line 4102 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF0I_MASK

#define CAN_IFLAG1_BUF0I_MASK (0x1U)

Definition at line 4096 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF0I_SHIFT

#define CAN_IFLAG1_BUF0I_SHIFT (0U)

Definition at line 4097 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF31TO8I

#define CAN_IFLAG1_BUF31TO8I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF31TO8I_SHIFT)) & CAN_IFLAG1_BUF31TO8I_MASK)

BUF31TO8I - Buffer MBi Interrupt 0b000000000000000000000001..The corresponding MB has successfully completed transmission or reception 0b000000000000000000000000..No such occurrence

Definition at line 4142 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF31TO8I_MASK

#define CAN_IFLAG1_BUF31TO8I_MASK (0xFFFFFF00U)

Definition at line 4136 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF31TO8I_SHIFT

#define CAN_IFLAG1_BUF31TO8I_SHIFT (8U)

Definition at line 4137 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO0I

#define CAN_IFLAG1_BUF4TO0I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO0I_SHIFT)) & CAN_IFLAG1_BUF4TO0I_MASK)

BUF4TO0I 0b00001..Corresponding MB completed transmission/reception 0b00000..No such occurrence

Definition at line 4109 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO0I_MASK

#define CAN_IFLAG1_BUF4TO0I_MASK (0x1FU)

Definition at line 4103 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO0I_SHIFT

#define CAN_IFLAG1_BUF4TO0I_SHIFT (0U)

Definition at line 4104 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO1I

#define CAN_IFLAG1_BUF4TO1I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF4TO1I_SHIFT)) & CAN_IFLAG1_BUF4TO1I_MASK)

BUF4TO1I - Buffer MB i Interrupt Or "reserved"

Definition at line 4114 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO1I_MASK

#define CAN_IFLAG1_BUF4TO1I_MASK (0x1EU)

Definition at line 4110 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF4TO1I_SHIFT

#define CAN_IFLAG1_BUF4TO1I_SHIFT (1U)

Definition at line 4111 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF5I

#define CAN_IFLAG1_BUF5I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF5I_SHIFT)) & CAN_IFLAG1_BUF5I_MASK)

BUF5I - Buffer MB5 Interrupt Or "Frames available in Legacy Rx FIFO" 0b1..MB5 completed transmission/reception or frames available in the FIFO 0b0..No such occurrence

Definition at line 4121 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF5I_MASK

#define CAN_IFLAG1_BUF5I_MASK (0x20U)

Definition at line 4115 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF5I_SHIFT

#define CAN_IFLAG1_BUF5I_SHIFT (5U)

Definition at line 4116 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF6I

#define CAN_IFLAG1_BUF6I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF6I_SHIFT)) & CAN_IFLAG1_BUF6I_MASK)

BUF6I - Buffer MB6 Interrupt Or "Legacy Rx FIFO Warning" 0b1..MB6 completed transmission/reception or FIFO almost full 0b0..No such occurrence

Definition at line 4128 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF6I_MASK

#define CAN_IFLAG1_BUF6I_MASK (0x40U)

Definition at line 4122 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF6I_SHIFT

#define CAN_IFLAG1_BUF6I_SHIFT (6U)

Definition at line 4123 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF7I

#define CAN_IFLAG1_BUF7I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG1_BUF7I_SHIFT)) & CAN_IFLAG1_BUF7I_MASK)

BUF7I - Buffer MB7 Interrupt Or "Legacy Rx FIFO Overflow" 0b1..MB7 completed transmission/reception or FIFO overflow 0b0..No such occurrence

Definition at line 4135 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF7I_MASK

#define CAN_IFLAG1_BUF7I_MASK (0x80U)

Definition at line 4129 of file MIMXRT1062.h.

## ◆ CAN_IFLAG1_BUF7I_SHIFT

#define CAN_IFLAG1_BUF7I_SHIFT (7U)

Definition at line 4130 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUF63TO32I

#define CAN_IFLAG2_BUF63TO32I | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUF63TO32I_SHIFT)) & CAN_IFLAG2_BUF63TO32I_MASK)

BUF63TO32I - Buffer MB i Interrupt

Definition at line 4084 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUF63TO32I_MASK

#define CAN_IFLAG2_BUF63TO32I_MASK (0xFFFFFFFFU)

Definition at line 4080 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUF63TO32I_SHIFT

#define CAN_IFLAG2_BUF63TO32I_SHIFT (0U)

Definition at line 4081 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUFHI

#define CAN_IFLAG2_BUFHI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IFLAG2_BUFHI_SHIFT)) & CAN_IFLAG2_BUFHI_MASK)

BUFHI 0b00000000000000000000000000000001..The corresponding buffer has successfully completed transmission or reception 0b00000000000000000000000000000000..No such occurrence

Definition at line 4091 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUFHI_MASK

#define CAN_IFLAG2_BUFHI_MASK (0xFFFFFFFFU)

Definition at line 4085 of file MIMXRT1062.h.

## ◆ CAN_IFLAG2_BUFHI_SHIFT

#define CAN_IFLAG2_BUFHI_SHIFT (0U)

Definition at line 4086 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUF31TO0M

#define CAN_IMASK1_BUF31TO0M | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)

BUF31TO0M - Buffer MB i Mask

Definition at line 4068 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUF31TO0M_MASK

#define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU)

Definition at line 4064 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUF31TO0M_SHIFT

#define CAN_IMASK1_BUF31TO0M_SHIFT (0U)

Definition at line 4065 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUFLM

#define CAN_IMASK1_BUFLM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUFLM_SHIFT)) & CAN_IMASK1_BUFLM_MASK)

BUFLM 0b00000000000000000000000000000001..The corresponding buffer Interrupt is enabled 0b00000000000000000000000000000000..The corresponding buffer Interrupt is disabled

Definition at line 4075 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUFLM_MASK

#define CAN_IMASK1_BUFLM_MASK (0xFFFFFFFFU)

Definition at line 4069 of file MIMXRT1062.h.

## ◆ CAN_IMASK1_BUFLM_SHIFT

#define CAN_IMASK1_BUFLM_SHIFT (0U)

Definition at line 4070 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUF63TO32M

#define CAN_IMASK2_BUF63TO32M | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUF63TO32M_SHIFT)) & CAN_IMASK2_BUF63TO32M_MASK)

BUF63TO32M - Buffer MB i Mask

Definition at line 4052 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUF63TO32M_MASK

#define CAN_IMASK2_BUF63TO32M_MASK (0xFFFFFFFFU)

Definition at line 4048 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUF63TO32M_SHIFT

#define CAN_IMASK2_BUF63TO32M_SHIFT (0U)

Definition at line 4049 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUFHM

#define CAN_IMASK2_BUFHM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_IMASK2_BUFHM_SHIFT)) & CAN_IMASK2_BUFHM_MASK)

BUFHM 0b00000000000000000000000000000001..The corresponding buffer Interrupt is enabled 0b00000000000000000000000000000000..The corresponding buffer Interrupt is disabled

Definition at line 4059 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUFHM_MASK

#define CAN_IMASK2_BUFHM_MASK (0xFFFFFFFFU)

Definition at line 4053 of file MIMXRT1062.h.

## ◆ CAN_IMASK2_BUFHM_SHIFT

#define CAN_IMASK2_BUFHM_SHIFT (0U)

Definition at line 4054 of file MIMXRT1062.h.

## ◆ CAN_MCR_AEN

#define CAN_MCR_AEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_AEN_SHIFT)) & CAN_MCR_AEN_MASK)

AEN - Abort Enable 0b1..Abort enabled 0b0..Abort disabled

Definition at line 3550 of file MIMXRT1062.h.

## ◆ CAN_MCR_AEN_MASK

#define CAN_MCR_AEN_MASK (0x1000U)

Definition at line 3544 of file MIMXRT1062.h.

## ◆ CAN_MCR_AEN_SHIFT

#define CAN_MCR_AEN_SHIFT (12U)

Definition at line 3545 of file MIMXRT1062.h.

## ◆ CAN_MCR_DMA

#define CAN_MCR_DMA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_DMA_SHIFT)) & CAN_MCR_DMA_MASK)

DMA - DMA Enable 0b0..DMA feature for Legacy RX FIFO or Enhanced Rx FIFO are disabled. 0b1..DMA feature for Legacy RX FIFO or Enhanced Rx FIFO are enabled.

Definition at line 3564 of file MIMXRT1062.h.

## ◆ CAN_MCR_DMA_MASK

#define CAN_MCR_DMA_MASK (0x8000U)

Definition at line 3558 of file MIMXRT1062.h.

## ◆ CAN_MCR_DMA_SHIFT

#define CAN_MCR_DMA_SHIFT (15U)

Definition at line 3559 of file MIMXRT1062.h.

## ◆ CAN_MCR_DOZE

#define CAN_MCR_DOZE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_DOZE_SHIFT)) & CAN_MCR_DOZE_MASK)

DOZE - Doze Mode Enable 0b0..FlexCAN is not enabled to enter low-power mode when Doze mode is requested. 0b1..FlexCAN is enabled to enter low-power mode when Doze mode is requested.

Definition at line 3585 of file MIMXRT1062.h.

## ◆ CAN_MCR_DOZE_MASK

#define CAN_MCR_DOZE_MASK (0x40000U)

Definition at line 3579 of file MIMXRT1062.h.

## ◆ CAN_MCR_DOZE_SHIFT

#define CAN_MCR_DOZE_SHIFT (18U)

Definition at line 3580 of file MIMXRT1062.h.

## ◆ CAN_MCR_FDEN

#define CAN_MCR_FDEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FDEN_SHIFT)) & CAN_MCR_FDEN_MASK)

FDEN - CAN FD operation enable 0b1..CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats. 0b0..CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format.

Definition at line 3543 of file MIMXRT1062.h.

## ◆ CAN_MCR_FDEN_MASK

#define CAN_MCR_FDEN_MASK (0x800U)

Definition at line 3537 of file MIMXRT1062.h.

## ◆ CAN_MCR_FDEN_SHIFT

#define CAN_MCR_FDEN_SHIFT (11U)

Definition at line 3538 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZ

#define CAN_MCR_FRZ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZ_SHIFT)) & CAN_MCR_FRZ_MASK)

FRZ - Freeze Enable 0b1..Enabled to enter Freeze Mode 0b0..Not enabled to enter Freeze Mode

Definition at line 3670 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZ_MASK

#define CAN_MCR_FRZ_MASK (0x40000000U)

Definition at line 3664 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZ_SHIFT

#define CAN_MCR_FRZ_SHIFT (30U)

Definition at line 3665 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZACK

#define CAN_MCR_FRZACK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_FRZACK_SHIFT)) & CAN_MCR_FRZACK_MASK)

FRZACK - Freeze Mode Acknowledge 0b1..FLEXCAN in Freeze Mode, prescaler stopped 0b0..FLEXCAN not in Freeze Mode, prescaler running

Definition at line 3628 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZACK_MASK

#define CAN_MCR_FRZACK_MASK (0x1000000U)

Definition at line 3622 of file MIMXRT1062.h.

## ◆ CAN_MCR_FRZACK_SHIFT

#define CAN_MCR_FRZACK_SHIFT (24U)

Definition at line 3623 of file MIMXRT1062.h.

## ◆ CAN_MCR_HALT

#define CAN_MCR_HALT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_HALT_SHIFT)) & CAN_MCR_HALT_MASK)

HALT - Halt FlexCAN 0b1..Enters Freeze Mode if the FRZ bit is asserted. 0b0..No Freeze Mode request.

Definition at line 3656 of file MIMXRT1062.h.

## ◆ CAN_MCR_HALT_MASK

#define CAN_MCR_HALT_MASK (0x10000000U)

Definition at line 3650 of file MIMXRT1062.h.

## ◆ CAN_MCR_HALT_SHIFT

#define CAN_MCR_HALT_SHIFT (28U)

Definition at line 3651 of file MIMXRT1062.h.

## ◆ CAN_MCR_IDAM

#define CAN_MCR_IDAM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IDAM_SHIFT)) & CAN_MCR_IDAM_MASK)

IDAM - ID Acceptance Mode 0b00..Format A One full ID (standard or extended) per ID filter Table element. 0b01..Format B Two full standard IDs or two partial 14-bit extended IDs per ID filter Table element. 0b10..Format C Four partial 8-bit IDs (standard or extended) per ID filter Table element. 0b11..Format D All frames rejected.

Definition at line 3536 of file MIMXRT1062.h.

## ◆ CAN_MCR_IDAM_MASK

#define CAN_MCR_IDAM_MASK (0x300U)

Definition at line 3528 of file MIMXRT1062.h.

## ◆ CAN_MCR_IDAM_SHIFT

#define CAN_MCR_IDAM_SHIFT (8U)

Definition at line 3529 of file MIMXRT1062.h.

## ◆ CAN_MCR_IRMQ

#define CAN_MCR_IRMQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_IRMQ_SHIFT)) & CAN_MCR_IRMQ_MASK)

IRMQ - Individual Rx Masking And Queue Enable 0b1..Individual Rx masking and queue feature are enabled. 0b0..Individual Rx masking and queue feature are disabled.For backward compatibility, the reading of C/S word locks the MB even if it is EMPTY.

Definition at line 3571 of file MIMXRT1062.h.

## ◆ CAN_MCR_IRMQ_MASK

#define CAN_MCR_IRMQ_MASK (0x10000U)

Definition at line 3565 of file MIMXRT1062.h.

## ◆ CAN_MCR_IRMQ_SHIFT

#define CAN_MCR_IRMQ_SHIFT (16U)

Definition at line 3566 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPMACK

#define CAN_MCR_LPMACK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPMACK_SHIFT)) & CAN_MCR_LPMACK_MASK)

LPMACK - Low-Power Mode Acknowledge 0b1..FLEXCAN is either in Disable Mode, or Stop mode 0b0..FLEXCAN not in any of the low power modes

Definition at line 3599 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPMACK_MASK

#define CAN_MCR_LPMACK_MASK (0x100000U)

Definition at line 3593 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPMACK_SHIFT

#define CAN_MCR_LPMACK_SHIFT (20U)

Definition at line 3594 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPRIOEN

#define CAN_MCR_LPRIOEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_LPRIOEN_SHIFT)) & CAN_MCR_LPRIOEN_MASK)

LPRIOEN - Local Priority Enable 0b1..Local Priority enabled 0b0..Local Priority disabled

Definition at line 3557 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPRIOEN_MASK

#define CAN_MCR_LPRIOEN_MASK (0x2000U)

Definition at line 3551 of file MIMXRT1062.h.

## ◆ CAN_MCR_LPRIOEN_SHIFT

#define CAN_MCR_LPRIOEN_SHIFT (13U)

Definition at line 3552 of file MIMXRT1062.h.

## ◆ CAN_MCR_MAXMB

#define CAN_MCR_MAXMB | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MAXMB_SHIFT)) & CAN_MCR_MAXMB_MASK)

MAXMB - Number Of The Last Message Buffer

Definition at line 3527 of file MIMXRT1062.h.

## ◆ CAN_MCR_MAXMB_MASK

#define CAN_MCR_MAXMB_MASK (0x7FU)

Definition at line 3523 of file MIMXRT1062.h.

## ◆ CAN_MCR_MAXMB_SHIFT

#define CAN_MCR_MAXMB_SHIFT (0U)

Definition at line 3524 of file MIMXRT1062.h.

## ◆ CAN_MCR_MDIS

#define CAN_MCR_MDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_MDIS_SHIFT)) & CAN_MCR_MDIS_MASK)

MDIS - Module Disable 0b1..Disable the FLEXCAN module 0b0..Enable the FLEXCAN module

Definition at line 3677 of file MIMXRT1062.h.

## ◆ CAN_MCR_MDIS_MASK

#define CAN_MCR_MDIS_MASK (0x80000000U)

Definition at line 3671 of file MIMXRT1062.h.

## ◆ CAN_MCR_MDIS_SHIFT

#define CAN_MCR_MDIS_SHIFT (31U)

Definition at line 3672 of file MIMXRT1062.h.

## ◆ CAN_MCR_NOTRDY

#define CAN_MCR_NOTRDY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_NOTRDY_SHIFT)) & CAN_MCR_NOTRDY_MASK)

NOTRDY - FlexCAN Not Ready 0b1..FLEXCAN module is either in Disable Mode, Stop Mode or Freeze Mode 0b0..FLEXCAN module is either in Normal Mode, Listen-Only Mode or Loop-Back Mode

Definition at line 3649 of file MIMXRT1062.h.

## ◆ CAN_MCR_NOTRDY_MASK

#define CAN_MCR_NOTRDY_MASK (0x8000000U)

Definition at line 3643 of file MIMXRT1062.h.

## ◆ CAN_MCR_NOTRDY_SHIFT

#define CAN_MCR_NOTRDY_SHIFT (27U)

Definition at line 3644 of file MIMXRT1062.h.

## ◆ CAN_MCR_RFEN

#define CAN_MCR_RFEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_RFEN_SHIFT)) & CAN_MCR_RFEN_MASK)

RFEN - Legacy Rx FIFO Enable 0b1..FIFO enabled 0b0..FIFO not enabled

Definition at line 3663 of file MIMXRT1062.h.

## ◆ CAN_MCR_RFEN_MASK

#define CAN_MCR_RFEN_MASK (0x20000000U)

Definition at line 3657 of file MIMXRT1062.h.

## ◆ CAN_MCR_RFEN_SHIFT

#define CAN_MCR_RFEN_SHIFT (29U)

Definition at line 3658 of file MIMXRT1062.h.

## ◆ CAN_MCR_SLFWAK

#define CAN_MCR_SLFWAK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SLFWAK_SHIFT)) & CAN_MCR_SLFWAK_MASK)

SLFWAK - Self Wake Up 0b1..FLEXCAN Self Wake Up feature is enabled 0b0..FLEXCAN Self Wake Up feature is disabled

Definition at line 3613 of file MIMXRT1062.h.

## ◆ CAN_MCR_SLFWAK_MASK

#define CAN_MCR_SLFWAK_MASK (0x400000U)

Definition at line 3607 of file MIMXRT1062.h.

## ◆ CAN_MCR_SLFWAK_SHIFT

#define CAN_MCR_SLFWAK_SHIFT (22U)

Definition at line 3608 of file MIMXRT1062.h.

## ◆ CAN_MCR_SOFTRST

#define CAN_MCR_SOFTRST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SOFTRST_SHIFT)) & CAN_MCR_SOFTRST_MASK)

SOFTRST - Soft Reset 0b1..Reset the registers 0b0..No reset request

Definition at line 3635 of file MIMXRT1062.h.

## ◆ CAN_MCR_SOFTRST_MASK

#define CAN_MCR_SOFTRST_MASK (0x2000000U)

Definition at line 3629 of file MIMXRT1062.h.

## ◆ CAN_MCR_SOFTRST_SHIFT

#define CAN_MCR_SOFTRST_SHIFT (25U)

Definition at line 3630 of file MIMXRT1062.h.

## ◆ CAN_MCR_SRXDIS

#define CAN_MCR_SRXDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SRXDIS_SHIFT)) & CAN_MCR_SRXDIS_MASK)

SRXDIS - Self Reception Disable 0b1..Self reception disabled 0b0..Self reception enabled

Definition at line 3578 of file MIMXRT1062.h.

## ◆ CAN_MCR_SRXDIS_MASK

#define CAN_MCR_SRXDIS_MASK (0x20000U)

Definition at line 3572 of file MIMXRT1062.h.

## ◆ CAN_MCR_SRXDIS_SHIFT

#define CAN_MCR_SRXDIS_SHIFT (17U)

Definition at line 3573 of file MIMXRT1062.h.

## ◆ CAN_MCR_SUPV

#define CAN_MCR_SUPV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_SUPV_SHIFT)) & CAN_MCR_SUPV_MASK)

SUPV - Supervisor Mode 0b1..FlexCAN is in Supervisor Mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location 0b0..FlexCAN is in User Mode. Affected registers allow both Supervisor and Unrestricted accesses

Definition at line 3621 of file MIMXRT1062.h.

## ◆ CAN_MCR_SUPV_MASK

#define CAN_MCR_SUPV_MASK (0x800000U)

Definition at line 3614 of file MIMXRT1062.h.

## ◆ CAN_MCR_SUPV_SHIFT

#define CAN_MCR_SUPV_SHIFT (23U)

Definition at line 3615 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKMSK

#define CAN_MCR_WAKMSK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKMSK_SHIFT)) & CAN_MCR_WAKMSK_MASK)

WAKMSK - Wake Up Interrupt Mask 0b1..Wake Up Interrupt is enabled 0b0..Wake Up Interrupt is disabled

Definition at line 3642 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKMSK_MASK

#define CAN_MCR_WAKMSK_MASK (0x4000000U)

Definition at line 3636 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKMSK_SHIFT

#define CAN_MCR_WAKMSK_SHIFT (26U)

Definition at line 3637 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKSRC

#define CAN_MCR_WAKSRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WAKSRC_SHIFT)) & CAN_MCR_WAKSRC_MASK)

WAKSRC - Wake Up Source 0b1..FLEXCAN uses the filtered FLEXCAN_RX input to detect recessive to dominant edges on the CAN bus 0b0..FLEXCAN uses the unfiltered FLEXCAN_RX input to detect recessive to dominant edges on the CAN bus.

Definition at line 3592 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKSRC_MASK

#define CAN_MCR_WAKSRC_MASK (0x80000U)

Definition at line 3586 of file MIMXRT1062.h.

## ◆ CAN_MCR_WAKSRC_SHIFT

#define CAN_MCR_WAKSRC_SHIFT (19U)

Definition at line 3587 of file MIMXRT1062.h.

## ◆ CAN_MCR_WRNEN

#define CAN_MCR_WRNEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_MCR_WRNEN_SHIFT)) & CAN_MCR_WRNEN_MASK)

WRNEN - Warning Interrupt Enable 0b1..TWRN_INT and RWRN_INT bits are set when the respective error counter transition from <96 to >= 96. 0b0..TWRN_INT and RWRN_INT bits are zero, independent of the values in the error counters.

Definition at line 3606 of file MIMXRT1062.h.

## ◆ CAN_MCR_WRNEN_MASK

#define CAN_MCR_WRNEN_MASK (0x200000U)

Definition at line 3600 of file MIMXRT1062.h.

## ◆ CAN_MCR_WRNEN_SHIFT

#define CAN_MCR_WRNEN_SHIFT (21U)

Definition at line 3601 of file MIMXRT1062.h.

## ◆ CAN_RX14MASK_RX14M

#define CAN_RX14MASK_RX14M | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RX14MASK_RX14M_SHIFT)) & CAN_RX14MASK_RX14M_MASK)

RX14M - Rx Buffer 14 Mask Bits 0b00000000000000000000000000000001..The corresponding bit in the filter is checked 0b00000000000000000000000000000000..the corresponding bit in the filter is "don't care"

Definition at line 3815 of file MIMXRT1062.h.

## ◆ CAN_RX14MASK_RX14M_MASK

#define CAN_RX14MASK_RX14M_MASK (0xFFFFFFFFU)

Definition at line 3809 of file MIMXRT1062.h.

## ◆ CAN_RX14MASK_RX14M_SHIFT

#define CAN_RX14MASK_RX14M_SHIFT (0U)

Definition at line 3810 of file MIMXRT1062.h.

## ◆ CAN_RX15MASK_RX15M

#define CAN_RX15MASK_RX15M | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RX15MASK_RX15M_SHIFT)) & CAN_RX15MASK_RX15M_MASK)

RX15M - Rx Buffer 15 Mask Bits 0b00000000000000000000000000000001..The corresponding bit in the filter is checked 0b00000000000000000000000000000000..the corresponding bit in the filter is "don't care"

Definition at line 3826 of file MIMXRT1062.h.

## ◆ CAN_RX15MASK_RX15M_MASK

#define CAN_RX15MASK_RX15M_MASK (0xFFFFFFFFU)

Definition at line 3820 of file MIMXRT1062.h.

## ◆ CAN_RX15MASK_RX15M_SHIFT

#define CAN_RX15MASK_RX15M_SHIFT (0U)

Definition at line 3821 of file MIMXRT1062.h.

## ◆ CAN_RXFGMASK_FGM

#define CAN_RXFGMASK_FGM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RXFGMASK_FGM_SHIFT)) & CAN_RXFGMASK_FGM_MASK)

FGM - Legacy Rx FIFO Global Mask Bits 0b00000000000000000000000000000001..The corresponding bit in the filter is checked 0b00000000000000000000000000000000..The corresponding bit in the filter is "don't care"

Definition at line 4302 of file MIMXRT1062.h.

## ◆ CAN_RXFGMASK_FGM_MASK

#define CAN_RXFGMASK_FGM_MASK (0xFFFFFFFFU)

Definition at line 4296 of file MIMXRT1062.h.

## ◆ CAN_RXFGMASK_FGM_SHIFT

#define CAN_RXFGMASK_FGM_SHIFT (0U)

Definition at line 4297 of file MIMXRT1062.h.

## ◆ CAN_RXFIR_IDHIT

#define CAN_RXFIR_IDHIT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RXFIR_IDHIT_SHIFT)) & CAN_RXFIR_IDHIT_MASK)

IDHIT - Identifier Acceptance Filter Hit Indicator

Definition at line 4311 of file MIMXRT1062.h.

## ◆ CAN_RXFIR_IDHIT_MASK

#define CAN_RXFIR_IDHIT_MASK (0x1FFU)

Definition at line 4307 of file MIMXRT1062.h.

## ◆ CAN_RXFIR_IDHIT_SHIFT

#define CAN_RXFIR_IDHIT_SHIFT (0U)

Definition at line 4308 of file MIMXRT1062.h.

## ◆ CAN_RXIMR_COUNT

#define CAN_RXIMR_COUNT (64U)

Definition at line 4910 of file MIMXRT1062.h.

## ◆ CAN_RXIMR_MI

#define CAN_RXIMR_MI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RXIMR_MI_SHIFT)) & CAN_RXIMR_MI_MASK)

MI - Individual Mask Bits 0b00000000000000000000000000000001..The corresponding bit in the filter is checked 0b00000000000000000000000000000000..the corresponding bit in the filter is "don't care"

Definition at line 4906 of file MIMXRT1062.h.

## ◆ CAN_RXIMR_MI_MASK

#define CAN_RXIMR_MI_MASK (0xFFFFFFFFU)

Definition at line 4900 of file MIMXRT1062.h.

## ◆ CAN_RXIMR_MI_SHIFT

#define CAN_RXIMR_MI_SHIFT (0U)

Definition at line 4901 of file MIMXRT1062.h.

## ◆ CAN_RXMGMASK_MG

#define CAN_RXMGMASK_MG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_RXMGMASK_MG_SHIFT)) & CAN_RXMGMASK_MG_MASK)

MG - Rx Mailboxes Global Mask Bits 0b00000000000000000000000000000001..The corresponding bit in the filter is checked against the one received 0b00000000000000000000000000000000..the corresponding bit in the filter is "don't care"

Definition at line 3804 of file MIMXRT1062.h.

## ◆ CAN_RXMGMASK_MG_MASK

#define CAN_RXMGMASK_MG_MASK (0xFFFFFFFFU)

Definition at line 3798 of file MIMXRT1062.h.

## ◆ CAN_RXMGMASK_MG_SHIFT

#define CAN_RXMGMASK_MG_SHIFT (0U)

Definition at line 3799 of file MIMXRT1062.h.

## ◆ CAN_TIMER_TIMER

#define CAN_TIMER_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_TIMER_TIMER_SHIFT)) & CAN_TIMER_TIMER_MASK)

TIMER - Timer Value

Definition at line 3793 of file MIMXRT1062.h.

## ◆ CAN_TIMER_TIMER_MASK

#define CAN_TIMER_TIMER_MASK (0xFFFFU)

Definition at line 3789 of file MIMXRT1062.h.

## ◆ CAN_TIMER_TIMER_SHIFT

#define CAN_TIMER_TIMER_SHIFT (0U)

Definition at line 3790 of file MIMXRT1062.h.

## ◆ CAN_WORD0_COUNT

#define CAN_WORD0_COUNT (64U)

Definition at line 4869 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_0

#define CAN_WORD0_DATA_BYTE_0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_0_SHIFT)) & CAN_WORD0_DATA_BYTE_0_MASK)

DATA_BYTE_0 - Data byte 3 of Rx/Tx frame.

Definition at line 4865 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_0_MASK

#define CAN_WORD0_DATA_BYTE_0_MASK (0xFF000000U)

Definition at line 4861 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_0_SHIFT

#define CAN_WORD0_DATA_BYTE_0_SHIFT (24U)

Definition at line 4862 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_1

#define CAN_WORD0_DATA_BYTE_1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_1_SHIFT)) & CAN_WORD0_DATA_BYTE_1_MASK)

DATA_BYTE_1 - Data byte 2 of Rx/Tx frame.

Definition at line 4860 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_1_MASK

#define CAN_WORD0_DATA_BYTE_1_MASK (0xFF0000U)

Definition at line 4856 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_1_SHIFT

#define CAN_WORD0_DATA_BYTE_1_SHIFT (16U)

Definition at line 4857 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_2

#define CAN_WORD0_DATA_BYTE_2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_2_SHIFT)) & CAN_WORD0_DATA_BYTE_2_MASK)

DATA_BYTE_2 - Data byte 1 of Rx/Tx frame.

Definition at line 4855 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_2_MASK

#define CAN_WORD0_DATA_BYTE_2_MASK (0xFF00U)

Definition at line 4851 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_2_SHIFT

#define CAN_WORD0_DATA_BYTE_2_SHIFT (8U)

Definition at line 4852 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_3

#define CAN_WORD0_DATA_BYTE_3 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD0_DATA_BYTE_3_SHIFT)) & CAN_WORD0_DATA_BYTE_3_MASK)

DATA_BYTE_3 - Data byte 0 of Rx/Tx frame.

Definition at line 4850 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_3_MASK

#define CAN_WORD0_DATA_BYTE_3_MASK (0xFFU)

Definition at line 4846 of file MIMXRT1062.h.

## ◆ CAN_WORD0_DATA_BYTE_3_SHIFT

#define CAN_WORD0_DATA_BYTE_3_SHIFT (0U)

Definition at line 4847 of file MIMXRT1062.h.

## ◆ CAN_WORD1_COUNT

#define CAN_WORD1_COUNT (64U)

Definition at line 4896 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_4

#define CAN_WORD1_DATA_BYTE_4 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_4_SHIFT)) & CAN_WORD1_DATA_BYTE_4_MASK)

DATA_BYTE_4 - Data byte 3 of Rx/Tx frame.

Definition at line 4892 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_4_MASK

#define CAN_WORD1_DATA_BYTE_4_MASK (0xFF000000U)

Definition at line 4888 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_4_SHIFT

#define CAN_WORD1_DATA_BYTE_4_SHIFT (24U)

Definition at line 4889 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_5

#define CAN_WORD1_DATA_BYTE_5 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_5_SHIFT)) & CAN_WORD1_DATA_BYTE_5_MASK)

DATA_BYTE_5 - Data byte 2 of Rx/Tx frame.

Definition at line 4887 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_5_MASK

#define CAN_WORD1_DATA_BYTE_5_MASK (0xFF0000U)

Definition at line 4883 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_5_SHIFT

#define CAN_WORD1_DATA_BYTE_5_SHIFT (16U)

Definition at line 4884 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_6

#define CAN_WORD1_DATA_BYTE_6 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_6_SHIFT)) & CAN_WORD1_DATA_BYTE_6_MASK)

DATA_BYTE_6 - Data byte 1 of Rx/Tx frame.

Definition at line 4882 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_6_MASK

#define CAN_WORD1_DATA_BYTE_6_MASK (0xFF00U)

Definition at line 4878 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_6_SHIFT

#define CAN_WORD1_DATA_BYTE_6_SHIFT (8U)

Definition at line 4879 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_7

#define CAN_WORD1_DATA_BYTE_7 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD1_DATA_BYTE_7_SHIFT)) & CAN_WORD1_DATA_BYTE_7_MASK)

DATA_BYTE_7 - Data byte 0 of Rx/Tx frame.

Definition at line 4877 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_7_MASK

#define CAN_WORD1_DATA_BYTE_7_MASK (0xFFU)

Definition at line 4873 of file MIMXRT1062.h.

## ◆ CAN_WORD1_DATA_BYTE_7_SHIFT

#define CAN_WORD1_DATA_BYTE_7_SHIFT (0U)

Definition at line 4874 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB16B

#define CAN_WORD_COUNT_MB16B (42U)

Definition at line 4411 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB16B2

#define CAN_WORD_COUNT_MB16B2 (4U)

Definition at line 4414 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB32B

#define CAN_WORD_COUNT_MB32B (24U)

Definition at line 4423 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB32B2

#define CAN_WORD_COUNT_MB32B2 (8U)

Definition at line 4426 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB64B

#define CAN_WORD_COUNT_MB64B (14U)

Definition at line 4833 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB64B2

#define CAN_WORD_COUNT_MB64B2 (16U)

Definition at line 4836 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB8B

#define CAN_WORD_COUNT_MB8B (64U)

Definition at line 4399 of file MIMXRT1062.h.

## ◆ CAN_WORD_COUNT_MB8B2

#define CAN_WORD_COUNT_MB8B2 (2U)

Definition at line 4402 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_0

#define CAN_WORD_DATA_BYTE_0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_0_SHIFT)) & CAN_WORD_DATA_BYTE_0_MASK)

DATA_BYTE_0 - Data byte 3 of Rx/Tx frame.

Definition at line 4754 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_0_MASK

#define CAN_WORD_DATA_BYTE_0_MASK (0xFF000000U)

Definition at line 4750 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_0_SHIFT

#define CAN_WORD_DATA_BYTE_0_SHIFT (24U)

Definition at line 4751 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_1

#define CAN_WORD_DATA_BYTE_1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_1_SHIFT)) & CAN_WORD_DATA_BYTE_1_MASK)

DATA_BYTE_1 - Data byte 2 of Rx/Tx frame.

Definition at line 4674 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_10

#define CAN_WORD_DATA_BYTE_10 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_10_SHIFT)) & CAN_WORD_DATA_BYTE_10_MASK)

DATA_BYTE_10 - Data byte 1 of Rx/Tx frame.

Definition at line 4604 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_10_MASK

#define CAN_WORD_DATA_BYTE_10_MASK (0xFF00U)

Definition at line 4600 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_10_SHIFT

#define CAN_WORD_DATA_BYTE_10_SHIFT (8U)

Definition at line 4601 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_11

#define CAN_WORD_DATA_BYTE_11 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_11_SHIFT)) & CAN_WORD_DATA_BYTE_11_MASK)

DATA_BYTE_11 - Data byte 0 of Rx/Tx frame.

Definition at line 4524 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_11_MASK

#define CAN_WORD_DATA_BYTE_11_MASK (0xFFU)

Definition at line 4520 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_11_SHIFT

#define CAN_WORD_DATA_BYTE_11_SHIFT (0U)

Definition at line 4521 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_12

#define CAN_WORD_DATA_BYTE_12 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_12_SHIFT)) & CAN_WORD_DATA_BYTE_12_MASK)

DATA_BYTE_12 - Data byte 3 of Rx/Tx frame.

Definition at line 4769 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_12_MASK

#define CAN_WORD_DATA_BYTE_12_MASK (0xFF000000U)

Definition at line 4765 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_12_SHIFT

#define CAN_WORD_DATA_BYTE_12_SHIFT (24U)

Definition at line 4766 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_13

#define CAN_WORD_DATA_BYTE_13 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_13_SHIFT)) & CAN_WORD_DATA_BYTE_13_MASK)

DATA_BYTE_13 - Data byte 2 of Rx/Tx frame.

Definition at line 4689 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_13_MASK

#define CAN_WORD_DATA_BYTE_13_MASK (0xFF0000U)

Definition at line 4685 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_13_SHIFT

#define CAN_WORD_DATA_BYTE_13_SHIFT (16U)

Definition at line 4686 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_14

#define CAN_WORD_DATA_BYTE_14 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_14_SHIFT)) & CAN_WORD_DATA_BYTE_14_MASK)

DATA_BYTE_14 - Data byte 1 of Rx/Tx frame.

Definition at line 4609 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_14_MASK

#define CAN_WORD_DATA_BYTE_14_MASK (0xFF00U)

Definition at line 4605 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_14_SHIFT

#define CAN_WORD_DATA_BYTE_14_SHIFT (8U)

Definition at line 4606 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_15

#define CAN_WORD_DATA_BYTE_15 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_15_SHIFT)) & CAN_WORD_DATA_BYTE_15_MASK)

DATA_BYTE_15 - Data byte 0 of Rx/Tx frame.

Definition at line 4529 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_15_MASK

#define CAN_WORD_DATA_BYTE_15_MASK (0xFFU)

Definition at line 4525 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_15_SHIFT

#define CAN_WORD_DATA_BYTE_15_SHIFT (0U)

Definition at line 4526 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_16

#define CAN_WORD_DATA_BYTE_16 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_16_SHIFT)) & CAN_WORD_DATA_BYTE_16_MASK)

DATA_BYTE_16 - Data byte 3 of Rx/Tx frame.

Definition at line 4774 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_16_MASK

#define CAN_WORD_DATA_BYTE_16_MASK (0xFF000000U)

Definition at line 4770 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_16_SHIFT

#define CAN_WORD_DATA_BYTE_16_SHIFT (24U)

Definition at line 4771 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_17

#define CAN_WORD_DATA_BYTE_17 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_17_SHIFT)) & CAN_WORD_DATA_BYTE_17_MASK)

DATA_BYTE_17 - Data byte 2 of Rx/Tx frame.

Definition at line 4694 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_17_MASK

#define CAN_WORD_DATA_BYTE_17_MASK (0xFF0000U)

Definition at line 4690 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_17_SHIFT

#define CAN_WORD_DATA_BYTE_17_SHIFT (16U)

Definition at line 4691 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_18

#define CAN_WORD_DATA_BYTE_18 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_18_SHIFT)) & CAN_WORD_DATA_BYTE_18_MASK)

DATA_BYTE_18 - Data byte 1 of Rx/Tx frame.

Definition at line 4614 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_18_MASK

#define CAN_WORD_DATA_BYTE_18_MASK (0xFF00U)

Definition at line 4610 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_18_SHIFT

#define CAN_WORD_DATA_BYTE_18_SHIFT (8U)

Definition at line 4611 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_19

#define CAN_WORD_DATA_BYTE_19 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_19_SHIFT)) & CAN_WORD_DATA_BYTE_19_MASK)

DATA_BYTE_19 - Data byte 0 of Rx/Tx frame.

Definition at line 4534 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_19_MASK

#define CAN_WORD_DATA_BYTE_19_MASK (0xFFU)

Definition at line 4530 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_19_SHIFT

#define CAN_WORD_DATA_BYTE_19_SHIFT (0U)

Definition at line 4531 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_1_MASK

#define CAN_WORD_DATA_BYTE_1_MASK (0xFF0000U)

Definition at line 4670 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_1_SHIFT

#define CAN_WORD_DATA_BYTE_1_SHIFT (16U)

Definition at line 4671 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_2

#define CAN_WORD_DATA_BYTE_2 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_2_SHIFT)) & CAN_WORD_DATA_BYTE_2_MASK)

DATA_BYTE_2 - Data byte 1 of Rx/Tx frame.

Definition at line 4594 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_20

#define CAN_WORD_DATA_BYTE_20 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_20_SHIFT)) & CAN_WORD_DATA_BYTE_20_MASK)

DATA_BYTE_20 - Data byte 3 of Rx/Tx frame.

Definition at line 4779 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_20_MASK

#define CAN_WORD_DATA_BYTE_20_MASK (0xFF000000U)

Definition at line 4775 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_20_SHIFT

#define CAN_WORD_DATA_BYTE_20_SHIFT (24U)

Definition at line 4776 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_21

#define CAN_WORD_DATA_BYTE_21 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_21_SHIFT)) & CAN_WORD_DATA_BYTE_21_MASK)

DATA_BYTE_21 - Data byte 2 of Rx/Tx frame.

Definition at line 4699 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_21_MASK

#define CAN_WORD_DATA_BYTE_21_MASK (0xFF0000U)

Definition at line 4695 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_21_SHIFT

#define CAN_WORD_DATA_BYTE_21_SHIFT (16U)

Definition at line 4696 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_22

#define CAN_WORD_DATA_BYTE_22 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_22_SHIFT)) & CAN_WORD_DATA_BYTE_22_MASK)

DATA_BYTE_22 - Data byte 1 of Rx/Tx frame.

Definition at line 4619 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_22_MASK

#define CAN_WORD_DATA_BYTE_22_MASK (0xFF00U)

Definition at line 4615 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_22_SHIFT

#define CAN_WORD_DATA_BYTE_22_SHIFT (8U)

Definition at line 4616 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_23

#define CAN_WORD_DATA_BYTE_23 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_23_SHIFT)) & CAN_WORD_DATA_BYTE_23_MASK)

DATA_BYTE_23 - Data byte 0 of Rx/Tx frame.

Definition at line 4539 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_23_MASK

#define CAN_WORD_DATA_BYTE_23_MASK (0xFFU)

Definition at line 4535 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_23_SHIFT

#define CAN_WORD_DATA_BYTE_23_SHIFT (0U)

Definition at line 4536 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_24

#define CAN_WORD_DATA_BYTE_24 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_24_SHIFT)) & CAN_WORD_DATA_BYTE_24_MASK)

DATA_BYTE_24 - Data byte 3 of Rx/Tx frame.

Definition at line 4784 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_24_MASK

#define CAN_WORD_DATA_BYTE_24_MASK (0xFF000000U)

Definition at line 4780 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_24_SHIFT

#define CAN_WORD_DATA_BYTE_24_SHIFT (24U)

Definition at line 4781 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_25

#define CAN_WORD_DATA_BYTE_25 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_25_SHIFT)) & CAN_WORD_DATA_BYTE_25_MASK)

DATA_BYTE_25 - Data byte 2 of Rx/Tx frame.

Definition at line 4704 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_25_MASK

#define CAN_WORD_DATA_BYTE_25_MASK (0xFF0000U)

Definition at line 4700 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_25_SHIFT

#define CAN_WORD_DATA_BYTE_25_SHIFT (16U)

Definition at line 4701 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_26

#define CAN_WORD_DATA_BYTE_26 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_26_SHIFT)) & CAN_WORD_DATA_BYTE_26_MASK)

DATA_BYTE_26 - Data byte 1 of Rx/Tx frame.

Definition at line 4624 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_26_MASK

#define CAN_WORD_DATA_BYTE_26_MASK (0xFF00U)

Definition at line 4620 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_26_SHIFT

#define CAN_WORD_DATA_BYTE_26_SHIFT (8U)

Definition at line 4621 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_27

#define CAN_WORD_DATA_BYTE_27 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_27_SHIFT)) & CAN_WORD_DATA_BYTE_27_MASK)

DATA_BYTE_27 - Data byte 0 of Rx/Tx frame.

Definition at line 4544 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_27_MASK

#define CAN_WORD_DATA_BYTE_27_MASK (0xFFU)

Definition at line 4540 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_27_SHIFT

#define CAN_WORD_DATA_BYTE_27_SHIFT (0U)

Definition at line 4541 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_28

#define CAN_WORD_DATA_BYTE_28 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_28_SHIFT)) & CAN_WORD_DATA_BYTE_28_MASK)

DATA_BYTE_28 - Data byte 3 of Rx/Tx frame.

Definition at line 4789 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_28_MASK

#define CAN_WORD_DATA_BYTE_28_MASK (0xFF000000U)

Definition at line 4785 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_28_SHIFT

#define CAN_WORD_DATA_BYTE_28_SHIFT (24U)

Definition at line 4786 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_29

#define CAN_WORD_DATA_BYTE_29 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_29_SHIFT)) & CAN_WORD_DATA_BYTE_29_MASK)

DATA_BYTE_29 - Data byte 2 of Rx/Tx frame.

Definition at line 4709 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_29_MASK

#define CAN_WORD_DATA_BYTE_29_MASK (0xFF0000U)

Definition at line 4705 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_29_SHIFT

#define CAN_WORD_DATA_BYTE_29_SHIFT (16U)

Definition at line 4706 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_2_MASK

#define CAN_WORD_DATA_BYTE_2_MASK (0xFF00U)

Definition at line 4590 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_2_SHIFT

#define CAN_WORD_DATA_BYTE_2_SHIFT (8U)

Definition at line 4591 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_3

#define CAN_WORD_DATA_BYTE_3 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_3_SHIFT)) & CAN_WORD_DATA_BYTE_3_MASK)

DATA_BYTE_3 - Data byte 0 of Rx/Tx frame.

Definition at line 4514 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_30

#define CAN_WORD_DATA_BYTE_30 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_30_SHIFT)) & CAN_WORD_DATA_BYTE_30_MASK)

DATA_BYTE_30 - Data byte 1 of Rx/Tx frame.

Definition at line 4629 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_30_MASK

#define CAN_WORD_DATA_BYTE_30_MASK (0xFF00U)

Definition at line 4625 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_30_SHIFT

#define CAN_WORD_DATA_BYTE_30_SHIFT (8U)

Definition at line 4626 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_31

#define CAN_WORD_DATA_BYTE_31 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_31_SHIFT)) & CAN_WORD_DATA_BYTE_31_MASK)

DATA_BYTE_31 - Data byte 0 of Rx/Tx frame.

Definition at line 4549 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_31_MASK

#define CAN_WORD_DATA_BYTE_31_MASK (0xFFU)

Definition at line 4545 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_31_SHIFT

#define CAN_WORD_DATA_BYTE_31_SHIFT (0U)

Definition at line 4546 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_32

#define CAN_WORD_DATA_BYTE_32 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_32_SHIFT)) & CAN_WORD_DATA_BYTE_32_MASK)

DATA_BYTE_32 - Data byte 3 of Rx/Tx frame.

Definition at line 4794 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_32_MASK

#define CAN_WORD_DATA_BYTE_32_MASK (0xFF000000U)

Definition at line 4790 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_32_SHIFT

#define CAN_WORD_DATA_BYTE_32_SHIFT (24U)

Definition at line 4791 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_33

#define CAN_WORD_DATA_BYTE_33 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_33_SHIFT)) & CAN_WORD_DATA_BYTE_33_MASK)

DATA_BYTE_33 - Data byte 2 of Rx/Tx frame.

Definition at line 4714 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_33_MASK

#define CAN_WORD_DATA_BYTE_33_MASK (0xFF0000U)

Definition at line 4710 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_33_SHIFT

#define CAN_WORD_DATA_BYTE_33_SHIFT (16U)

Definition at line 4711 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_34

#define CAN_WORD_DATA_BYTE_34 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_34_SHIFT)) & CAN_WORD_DATA_BYTE_34_MASK)

DATA_BYTE_34 - Data byte 1 of Rx/Tx frame.

Definition at line 4634 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_34_MASK

#define CAN_WORD_DATA_BYTE_34_MASK (0xFF00U)

Definition at line 4630 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_34_SHIFT

#define CAN_WORD_DATA_BYTE_34_SHIFT (8U)

Definition at line 4631 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_35

#define CAN_WORD_DATA_BYTE_35 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_35_SHIFT)) & CAN_WORD_DATA_BYTE_35_MASK)

DATA_BYTE_35 - Data byte 0 of Rx/Tx frame.

Definition at line 4554 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_35_MASK

#define CAN_WORD_DATA_BYTE_35_MASK (0xFFU)

Definition at line 4550 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_35_SHIFT

#define CAN_WORD_DATA_BYTE_35_SHIFT (0U)

Definition at line 4551 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_36

#define CAN_WORD_DATA_BYTE_36 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_36_SHIFT)) & CAN_WORD_DATA_BYTE_36_MASK)

DATA_BYTE_36 - Data byte 3 of Rx/Tx frame.

Definition at line 4799 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_36_MASK

#define CAN_WORD_DATA_BYTE_36_MASK (0xFF000000U)

Definition at line 4795 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_36_SHIFT

#define CAN_WORD_DATA_BYTE_36_SHIFT (24U)

Definition at line 4796 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_37

#define CAN_WORD_DATA_BYTE_37 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_37_SHIFT)) & CAN_WORD_DATA_BYTE_37_MASK)

DATA_BYTE_37 - Data byte 2 of Rx/Tx frame.

Definition at line 4719 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_37_MASK

#define CAN_WORD_DATA_BYTE_37_MASK (0xFF0000U)

Definition at line 4715 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_37_SHIFT

#define CAN_WORD_DATA_BYTE_37_SHIFT (16U)

Definition at line 4716 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_38

#define CAN_WORD_DATA_BYTE_38 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_38_SHIFT)) & CAN_WORD_DATA_BYTE_38_MASK)

DATA_BYTE_38 - Data byte 1 of Rx/Tx frame.

Definition at line 4639 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_38_MASK

#define CAN_WORD_DATA_BYTE_38_MASK (0xFF00U)

Definition at line 4635 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_38_SHIFT

#define CAN_WORD_DATA_BYTE_38_SHIFT (8U)

Definition at line 4636 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_39

#define CAN_WORD_DATA_BYTE_39 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_39_SHIFT)) & CAN_WORD_DATA_BYTE_39_MASK)

DATA_BYTE_39 - Data byte 0 of Rx/Tx frame.

Definition at line 4559 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_39_MASK

#define CAN_WORD_DATA_BYTE_39_MASK (0xFFU)

Definition at line 4555 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_39_SHIFT

#define CAN_WORD_DATA_BYTE_39_SHIFT (0U)

Definition at line 4556 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_3_MASK

#define CAN_WORD_DATA_BYTE_3_MASK (0xFFU)

Definition at line 4510 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_3_SHIFT

#define CAN_WORD_DATA_BYTE_3_SHIFT (0U)

Definition at line 4511 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_4

#define CAN_WORD_DATA_BYTE_4 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_4_SHIFT)) & CAN_WORD_DATA_BYTE_4_MASK)

DATA_BYTE_4 - Data byte 3 of Rx/Tx frame.

Definition at line 4759 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_40

#define CAN_WORD_DATA_BYTE_40 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_40_SHIFT)) & CAN_WORD_DATA_BYTE_40_MASK)

DATA_BYTE_40 - Data byte 3 of Rx/Tx frame.

Definition at line 4804 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_40_MASK

#define CAN_WORD_DATA_BYTE_40_MASK (0xFF000000U)

Definition at line 4800 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_40_SHIFT

#define CAN_WORD_DATA_BYTE_40_SHIFT (24U)

Definition at line 4801 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_41

#define CAN_WORD_DATA_BYTE_41 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_41_SHIFT)) & CAN_WORD_DATA_BYTE_41_MASK)

DATA_BYTE_41 - Data byte 2 of Rx/Tx frame.

Definition at line 4724 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_41_MASK

#define CAN_WORD_DATA_BYTE_41_MASK (0xFF0000U)

Definition at line 4720 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_41_SHIFT

#define CAN_WORD_DATA_BYTE_41_SHIFT (16U)

Definition at line 4721 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_42

#define CAN_WORD_DATA_BYTE_42 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_42_SHIFT)) & CAN_WORD_DATA_BYTE_42_MASK)

DATA_BYTE_42 - Data byte 1 of Rx/Tx frame.

Definition at line 4644 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_42_MASK

#define CAN_WORD_DATA_BYTE_42_MASK (0xFF00U)

Definition at line 4640 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_42_SHIFT

#define CAN_WORD_DATA_BYTE_42_SHIFT (8U)

Definition at line 4641 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_43

#define CAN_WORD_DATA_BYTE_43 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_43_SHIFT)) & CAN_WORD_DATA_BYTE_43_MASK)

DATA_BYTE_43 - Data byte 0 of Rx/Tx frame.

Definition at line 4564 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_43_MASK

#define CAN_WORD_DATA_BYTE_43_MASK (0xFFU)

Definition at line 4560 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_43_SHIFT

#define CAN_WORD_DATA_BYTE_43_SHIFT (0U)

Definition at line 4561 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_44

#define CAN_WORD_DATA_BYTE_44 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_44_SHIFT)) & CAN_WORD_DATA_BYTE_44_MASK)

DATA_BYTE_44 - Data byte 3 of Rx/Tx frame.

Definition at line 4809 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_44_MASK

#define CAN_WORD_DATA_BYTE_44_MASK (0xFF000000U)

Definition at line 4805 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_44_SHIFT

#define CAN_WORD_DATA_BYTE_44_SHIFT (24U)

Definition at line 4806 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_45

#define CAN_WORD_DATA_BYTE_45 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_45_SHIFT)) & CAN_WORD_DATA_BYTE_45_MASK)

DATA_BYTE_45 - Data byte 2 of Rx/Tx frame.

Definition at line 4729 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_45_MASK

#define CAN_WORD_DATA_BYTE_45_MASK (0xFF0000U)

Definition at line 4725 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_45_SHIFT

#define CAN_WORD_DATA_BYTE_45_SHIFT (16U)

Definition at line 4726 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_46

#define CAN_WORD_DATA_BYTE_46 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_46_SHIFT)) & CAN_WORD_DATA_BYTE_46_MASK)

DATA_BYTE_46 - Data byte 1 of Rx/Tx frame.

Definition at line 4649 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_46_MASK

#define CAN_WORD_DATA_BYTE_46_MASK (0xFF00U)

Definition at line 4645 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_46_SHIFT

#define CAN_WORD_DATA_BYTE_46_SHIFT (8U)

Definition at line 4646 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_47

#define CAN_WORD_DATA_BYTE_47 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_47_SHIFT)) & CAN_WORD_DATA_BYTE_47_MASK)

DATA_BYTE_47 - Data byte 0 of Rx/Tx frame.

Definition at line 4569 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_47_MASK

#define CAN_WORD_DATA_BYTE_47_MASK (0xFFU)

Definition at line 4565 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_47_SHIFT

#define CAN_WORD_DATA_BYTE_47_SHIFT (0U)

Definition at line 4566 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_48

#define CAN_WORD_DATA_BYTE_48 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_48_SHIFT)) & CAN_WORD_DATA_BYTE_48_MASK)

DATA_BYTE_48 - Data byte 3 of Rx/Tx frame.

Definition at line 4814 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_48_MASK

#define CAN_WORD_DATA_BYTE_48_MASK (0xFF000000U)

Definition at line 4810 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_48_SHIFT

#define CAN_WORD_DATA_BYTE_48_SHIFT (24U)

Definition at line 4811 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_49

#define CAN_WORD_DATA_BYTE_49 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_49_SHIFT)) & CAN_WORD_DATA_BYTE_49_MASK)

DATA_BYTE_49 - Data byte 2 of Rx/Tx frame.

Definition at line 4734 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_49_MASK

#define CAN_WORD_DATA_BYTE_49_MASK (0xFF0000U)

Definition at line 4730 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_49_SHIFT

#define CAN_WORD_DATA_BYTE_49_SHIFT (16U)

Definition at line 4731 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_4_MASK

#define CAN_WORD_DATA_BYTE_4_MASK (0xFF000000U)

Definition at line 4755 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_4_SHIFT

#define CAN_WORD_DATA_BYTE_4_SHIFT (24U)

Definition at line 4756 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_5

#define CAN_WORD_DATA_BYTE_5 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_5_SHIFT)) & CAN_WORD_DATA_BYTE_5_MASK)

DATA_BYTE_5 - Data byte 2 of Rx/Tx frame.

Definition at line 4679 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_50

#define CAN_WORD_DATA_BYTE_50 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_50_SHIFT)) & CAN_WORD_DATA_BYTE_50_MASK)

DATA_BYTE_50 - Data byte 1 of Rx/Tx frame.

Definition at line 4654 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_50_MASK

#define CAN_WORD_DATA_BYTE_50_MASK (0xFF00U)

Definition at line 4650 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_50_SHIFT

#define CAN_WORD_DATA_BYTE_50_SHIFT (8U)

Definition at line 4651 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_51

#define CAN_WORD_DATA_BYTE_51 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_51_SHIFT)) & CAN_WORD_DATA_BYTE_51_MASK)

DATA_BYTE_51 - Data byte 0 of Rx/Tx frame.

Definition at line 4574 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_51_MASK

#define CAN_WORD_DATA_BYTE_51_MASK (0xFFU)

Definition at line 4570 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_51_SHIFT

#define CAN_WORD_DATA_BYTE_51_SHIFT (0U)

Definition at line 4571 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_52

#define CAN_WORD_DATA_BYTE_52 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_52_SHIFT)) & CAN_WORD_DATA_BYTE_52_MASK)

DATA_BYTE_52 - Data byte 3 of Rx/Tx frame.

Definition at line 4819 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_52_MASK

#define CAN_WORD_DATA_BYTE_52_MASK (0xFF000000U)

Definition at line 4815 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_52_SHIFT

#define CAN_WORD_DATA_BYTE_52_SHIFT (24U)

Definition at line 4816 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_53

#define CAN_WORD_DATA_BYTE_53 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_53_SHIFT)) & CAN_WORD_DATA_BYTE_53_MASK)

DATA_BYTE_53 - Data byte 2 of Rx/Tx frame.

Definition at line 4739 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_53_MASK

#define CAN_WORD_DATA_BYTE_53_MASK (0xFF0000U)

Definition at line 4735 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_53_SHIFT

#define CAN_WORD_DATA_BYTE_53_SHIFT (16U)

Definition at line 4736 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_54

#define CAN_WORD_DATA_BYTE_54 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_54_SHIFT)) & CAN_WORD_DATA_BYTE_54_MASK)

DATA_BYTE_54 - Data byte 1 of Rx/Tx frame.

Definition at line 4659 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_54_MASK

#define CAN_WORD_DATA_BYTE_54_MASK (0xFF00U)

Definition at line 4655 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_54_SHIFT

#define CAN_WORD_DATA_BYTE_54_SHIFT (8U)

Definition at line 4656 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_55

#define CAN_WORD_DATA_BYTE_55 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_55_SHIFT)) & CAN_WORD_DATA_BYTE_55_MASK)

DATA_BYTE_55 - Data byte 0 of Rx/Tx frame.

Definition at line 4579 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_55_MASK

#define CAN_WORD_DATA_BYTE_55_MASK (0xFFU)

Definition at line 4575 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_55_SHIFT

#define CAN_WORD_DATA_BYTE_55_SHIFT (0U)

Definition at line 4576 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_56

#define CAN_WORD_DATA_BYTE_56 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_56_SHIFT)) & CAN_WORD_DATA_BYTE_56_MASK)

DATA_BYTE_56 - Data byte 3 of Rx/Tx frame.

Definition at line 4824 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_56_MASK

#define CAN_WORD_DATA_BYTE_56_MASK (0xFF000000U)

Definition at line 4820 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_56_SHIFT

#define CAN_WORD_DATA_BYTE_56_SHIFT (24U)

Definition at line 4821 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_57

#define CAN_WORD_DATA_BYTE_57 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_57_SHIFT)) & CAN_WORD_DATA_BYTE_57_MASK)

DATA_BYTE_57 - Data byte 2 of Rx/Tx frame.

Definition at line 4744 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_57_MASK

#define CAN_WORD_DATA_BYTE_57_MASK (0xFF0000U)

Definition at line 4740 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_57_SHIFT

#define CAN_WORD_DATA_BYTE_57_SHIFT (16U)

Definition at line 4741 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_58

#define CAN_WORD_DATA_BYTE_58 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_58_SHIFT)) & CAN_WORD_DATA_BYTE_58_MASK)

DATA_BYTE_58 - Data byte 1 of Rx/Tx frame.

Definition at line 4664 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_58_MASK

#define CAN_WORD_DATA_BYTE_58_MASK (0xFF00U)

Definition at line 4660 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_58_SHIFT

#define CAN_WORD_DATA_BYTE_58_SHIFT (8U)

Definition at line 4661 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_59

#define CAN_WORD_DATA_BYTE_59 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_59_SHIFT)) & CAN_WORD_DATA_BYTE_59_MASK)

DATA_BYTE_59 - Data byte 0 of Rx/Tx frame.

Definition at line 4584 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_59_MASK

#define CAN_WORD_DATA_BYTE_59_MASK (0xFFU)

Definition at line 4580 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_59_SHIFT

#define CAN_WORD_DATA_BYTE_59_SHIFT (0U)

Definition at line 4581 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_5_MASK

#define CAN_WORD_DATA_BYTE_5_MASK (0xFF0000U)

Definition at line 4675 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_5_SHIFT

#define CAN_WORD_DATA_BYTE_5_SHIFT (16U)

Definition at line 4676 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_6

#define CAN_WORD_DATA_BYTE_6 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_6_SHIFT)) & CAN_WORD_DATA_BYTE_6_MASK)

DATA_BYTE_6 - Data byte 1 of Rx/Tx frame.

Definition at line 4599 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_60

#define CAN_WORD_DATA_BYTE_60 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_60_SHIFT)) & CAN_WORD_DATA_BYTE_60_MASK)

DATA_BYTE_60 - Data byte 3 of Rx/Tx frame.

Definition at line 4829 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_60_MASK

#define CAN_WORD_DATA_BYTE_60_MASK (0xFF000000U)

Definition at line 4825 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_60_SHIFT

#define CAN_WORD_DATA_BYTE_60_SHIFT (24U)

Definition at line 4826 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_61

#define CAN_WORD_DATA_BYTE_61 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_61_SHIFT)) & CAN_WORD_DATA_BYTE_61_MASK)

DATA_BYTE_61 - Data byte 2 of Rx/Tx frame.

Definition at line 4749 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_61_MASK

#define CAN_WORD_DATA_BYTE_61_MASK (0xFF0000U)

Definition at line 4745 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_61_SHIFT

#define CAN_WORD_DATA_BYTE_61_SHIFT (16U)

Definition at line 4746 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_62

#define CAN_WORD_DATA_BYTE_62 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_62_SHIFT)) & CAN_WORD_DATA_BYTE_62_MASK)

DATA_BYTE_62 - Data byte 1 of Rx/Tx frame.

Definition at line 4669 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_62_MASK

#define CAN_WORD_DATA_BYTE_62_MASK (0xFF00U)

Definition at line 4665 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_62_SHIFT

#define CAN_WORD_DATA_BYTE_62_SHIFT (8U)

Definition at line 4666 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_63

#define CAN_WORD_DATA_BYTE_63 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_63_SHIFT)) & CAN_WORD_DATA_BYTE_63_MASK)

DATA_BYTE_63 - Data byte 0 of Rx/Tx frame.

Definition at line 4589 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_63_MASK

#define CAN_WORD_DATA_BYTE_63_MASK (0xFFU)

Definition at line 4585 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_63_SHIFT

#define CAN_WORD_DATA_BYTE_63_SHIFT (0U)

Definition at line 4586 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_6_MASK

#define CAN_WORD_DATA_BYTE_6_MASK (0xFF00U)

Definition at line 4595 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_6_SHIFT

#define CAN_WORD_DATA_BYTE_6_SHIFT (8U)

Definition at line 4596 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_7

#define CAN_WORD_DATA_BYTE_7 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_7_SHIFT)) & CAN_WORD_DATA_BYTE_7_MASK)

DATA_BYTE_7 - Data byte 0 of Rx/Tx frame.

Definition at line 4519 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_7_MASK

#define CAN_WORD_DATA_BYTE_7_MASK (0xFFU)

Definition at line 4515 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_7_SHIFT

#define CAN_WORD_DATA_BYTE_7_SHIFT (0U)

Definition at line 4516 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_8

#define CAN_WORD_DATA_BYTE_8 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_8_SHIFT)) & CAN_WORD_DATA_BYTE_8_MASK)

DATA_BYTE_8 - Data byte 3 of Rx/Tx frame.

Definition at line 4764 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_8_MASK

#define CAN_WORD_DATA_BYTE_8_MASK (0xFF000000U)

Definition at line 4760 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_8_SHIFT

#define CAN_WORD_DATA_BYTE_8_SHIFT (24U)

Definition at line 4761 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_9

#define CAN_WORD_DATA_BYTE_9 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << CAN_WORD_DATA_BYTE_9_SHIFT)) & CAN_WORD_DATA_BYTE_9_MASK)

DATA_BYTE_9 - Data byte 2 of Rx/Tx frame.

Definition at line 4684 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_9_MASK

#define CAN_WORD_DATA_BYTE_9_MASK (0xFF0000U)

Definition at line 4680 of file MIMXRT1062.h.

## ◆ CAN_WORD_DATA_BYTE_9_SHIFT

#define CAN_WORD_DATA_BYTE_9_SHIFT (16U)

Definition at line 4681 of file MIMXRT1062.h.