Callisto4Bootloader: device/system_MIMXRT1062.h Source File

Callisto4Bootloader

system_MIMXRT1062.h
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1 /*
2 ** ###################################################################
3 ** Processors: MIMXRT1062CVJ5A
4 ** MIMXRT1062CVL5A
5 ** MIMXRT1062DVJ6A
6 ** MIMXRT1062DVL6A
7 **
8 ** Compilers: Freescale C/C++ for Embedded ARM
9 ** GNU C Compiler
10 ** IAR ANSI C/C++ Compiler for ARM
11 ** Keil ARM C/C++ Compiler
12 ** MCUXpresso Compiler
13 **
14 ** Reference manual: IMXRT1060RM Rev.1, 12/2018 | IMXRT1060SRM Rev.3
15 ** Version: rev. 1.2, 2019-04-29
16 ** Build: b191113
17 **
18 ** Abstract:
19 ** Provides a system configuration function and a global variable that
20 ** contains the system frequency. It configures the device and initializes
21 ** the oscillator (PLL) that is part of the microcontroller device.
22 **
23 ** Copyright 2016 Freescale Semiconductor, Inc.
24 ** Copyright 2016-2019 NXP
25 ** All rights reserved.
26 **
27 ** SPDX-License-Identifier: BSD-3-Clause
28 **
29 ** http: www.nxp.com
30 ** mail: support@nxp.com
31 **
32 ** Revisions:
33 ** - rev. 0.1 (2017-01-10)
34 ** Initial version.
35 ** - rev. 1.0 (2018-11-16)
36 ** Update header files to align with IMXRT1060RM Rev.0.
37 ** - rev. 1.1 (2018-11-27)
38 ** Update header files to align with IMXRT1060RM Rev.1.
39 ** - rev. 1.2 (2019-04-29)
40 ** Add SET/CLR/TOG register group to register CTRL, STAT, CHANNELCTRL, CH0STAT, CH0OPTS, CH1STAT, CH1OPTS, CH2STAT, CH2OPTS, CH3STAT, CH3OPTS of DCP module.
41 **
42 ** ###################################################################
43 */
44
56 #ifndef _SYSTEM_MIMXRT1062_H_
57 #define _SYSTEM_MIMXRT1062_H_
59 #ifdef __cplusplus
60 extern "C" {
61 #endif
62
63 #include <stdint.h>
64
65
66 #ifndef DISABLE_WDOG
67 #define DISABLE_WDOG 1
68 #endif
69
70 /* Define clock source values */
71
72 #define CPU_XTAL_CLK_HZ 24000000UL /* Value of the external crystal or oscillator clock frequency in Hz */
73
74 #define CPU_CLK1_HZ 0UL /* Value of the CLK1 (select the CLK1_N/CLK1_P as source) frequency in Hz */
75 /* If CLOCK1_P,CLOCK1_N is choose as the pll bypass clock source, please implement the CLKPN_FREQ define, otherwise 0 will be returned. */
76
77 #define DEFAULT_SYSTEM_CLOCK 528000000UL /* Default System clock value */
78
79
89 extern uint32_t SystemCoreClock;
90
98 void SystemInit (void);
99
107 void SystemCoreClockUpdate (void);
108
119 void SystemInitHook (void);
120
121 #ifdef __cplusplus
122 }
123 #endif
124
125 #endif /* _SYSTEM_MIMXRT1062_H_ */
SystemCoreClockUpdate
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock variable.
Definition: system_MIMXRT1062.c:134
SystemInit
void SystemInit(void)
Setup the microcontroller system.
Definition: system_MIMXRT1062.c:71
SystemCoreClock
uint32_t SystemCoreClock
System clock frequency (core clock)
Definition: system_MIMXRT1062.c:65
SystemInitHook
void SystemInitHook(void)
SystemInit function hook.