Callisto4Bootloader: ENC Register Masks

Callisto4Bootloader

ENC Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » ENC Peripheral Access Layer

## CTRL - Control Register

#define | ENC_CTRL_CMPIE_MASK (0x1U)
#define | ENC_CTRL_CMPIE_SHIFT (0U)
#define | ENC_CTRL_CMPIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)
#define | ENC_CTRL_CMPIRQ_MASK (0x2U)
#define | ENC_CTRL_CMPIRQ_SHIFT (1U)
#define | ENC_CTRL_CMPIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)
#define | ENC_CTRL_WDE_MASK (0x4U)
#define | ENC_CTRL_WDE_SHIFT (2U)
#define | ENC_CTRL_WDE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)
#define | ENC_CTRL_DIE_MASK (0x8U)
#define | ENC_CTRL_DIE_SHIFT (3U)
#define | ENC_CTRL_DIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)
#define | ENC_CTRL_DIRQ_MASK (0x10U)
#define | ENC_CTRL_DIRQ_SHIFT (4U)
#define | ENC_CTRL_DIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)
#define | ENC_CTRL_XNE_MASK (0x20U)
#define | ENC_CTRL_XNE_SHIFT (5U)
#define | ENC_CTRL_XNE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)
#define | ENC_CTRL_XIP_MASK (0x40U)
#define | ENC_CTRL_XIP_SHIFT (6U)
#define | ENC_CTRL_XIP(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)
#define | ENC_CTRL_XIE_MASK (0x80U)
#define | ENC_CTRL_XIE_SHIFT (7U)
#define | ENC_CTRL_XIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)
#define | ENC_CTRL_XIRQ_MASK (0x100U)
#define | ENC_CTRL_XIRQ_SHIFT (8U)
#define | ENC_CTRL_XIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)
#define | ENC_CTRL_PH1_MASK (0x200U)
#define | ENC_CTRL_PH1_SHIFT (9U)
#define | ENC_CTRL_PH1(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)
#define | ENC_CTRL_REV_MASK (0x400U)
#define | ENC_CTRL_REV_SHIFT (10U)
#define | ENC_CTRL_REV(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)
#define | ENC_CTRL_SWIP_MASK (0x800U)
#define | ENC_CTRL_SWIP_SHIFT (11U)
#define | ENC_CTRL_SWIP(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)
#define | ENC_CTRL_HNE_MASK (0x1000U)
#define | ENC_CTRL_HNE_SHIFT (12U)
#define | ENC_CTRL_HNE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)
#define | ENC_CTRL_HIP_MASK (0x2000U)
#define | ENC_CTRL_HIP_SHIFT (13U)
#define | ENC_CTRL_HIP(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)
#define | ENC_CTRL_HIE_MASK (0x4000U)
#define | ENC_CTRL_HIE_SHIFT (14U)
#define | ENC_CTRL_HIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)
#define | ENC_CTRL_HIRQ_MASK (0x8000U)
#define | ENC_CTRL_HIRQ_SHIFT (15U)
#define | ENC_CTRL_HIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)

## FILT - Input Filter Register

#define | ENC_FILT_FILT_PER_MASK (0xFFU)
#define | ENC_FILT_FILT_PER_SHIFT (0U)
#define | ENC_FILT_FILT_PER(x) (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)
#define | ENC_FILT_FILT_CNT_MASK (0x700U)
#define | ENC_FILT_FILT_CNT_SHIFT (8U)
#define | ENC_FILT_FILT_CNT(x) (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)

## WTR - Watchdog Timeout Register

#define | ENC_WTR_WDOG_MASK (0xFFFFU)
#define | ENC_WTR_WDOG_SHIFT (0U)
#define | ENC_WTR_WDOG(x) (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)

## POSD - Position Difference Counter Register

#define | ENC_POSD_POSD_MASK (0xFFFFU)
#define | ENC_POSD_POSD_SHIFT (0U)
#define | ENC_POSD_POSD(x) (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)

## POSDH - Position Difference Hold Register

#define | ENC_POSDH_POSDH_MASK (0xFFFFU)
#define | ENC_POSDH_POSDH_SHIFT (0U)
#define | ENC_POSDH_POSDH(x) (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)

## REV - Revolution Counter Register

#define | ENC_REV_REV_MASK (0xFFFFU)
#define | ENC_REV_REV_SHIFT (0U)
#define | ENC_REV_REV(x) (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)

## REVH - Revolution Hold Register

#define | ENC_REVH_REVH_MASK (0xFFFFU)
#define | ENC_REVH_REVH_SHIFT (0U)
#define | ENC_REVH_REVH(x) (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)

## UPOS - Upper Position Counter Register

#define | ENC_UPOS_POS_MASK (0xFFFFU)
#define | ENC_UPOS_POS_SHIFT (0U)
#define | ENC_UPOS_POS(x) (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)

## LPOS - Lower Position Counter Register

#define | ENC_LPOS_POS_MASK (0xFFFFU)
#define | ENC_LPOS_POS_SHIFT (0U)
#define | ENC_LPOS_POS(x) (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)

## UPOSH - Upper Position Hold Register

#define | ENC_UPOSH_POSH_MASK (0xFFFFU)
#define | ENC_UPOSH_POSH_SHIFT (0U)
#define | ENC_UPOSH_POSH(x) (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)

## LPOSH - Lower Position Hold Register

#define | ENC_LPOSH_POSH_MASK (0xFFFFU)
#define | ENC_LPOSH_POSH_SHIFT (0U)
#define | ENC_LPOSH_POSH(x) (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)

## UINIT - Upper Initialization Register

#define | ENC_UINIT_INIT_MASK (0xFFFFU)
#define | ENC_UINIT_INIT_SHIFT (0U)
#define | ENC_UINIT_INIT(x) (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)

## LINIT - Lower Initialization Register

#define | ENC_LINIT_INIT_MASK (0xFFFFU)
#define | ENC_LINIT_INIT_SHIFT (0U)
#define | ENC_LINIT_INIT(x) (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)

## IMR - Input Monitor Register

#define | ENC_IMR_HOME_MASK (0x1U)
#define | ENC_IMR_HOME_SHIFT (0U)
#define | ENC_IMR_HOME(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)
#define | ENC_IMR_INDEX_MASK (0x2U)
#define | ENC_IMR_INDEX_SHIFT (1U)
#define | ENC_IMR_INDEX(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)
#define | ENC_IMR_PHB_MASK (0x4U)
#define | ENC_IMR_PHB_SHIFT (2U)
#define | ENC_IMR_PHB(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)
#define | ENC_IMR_PHA_MASK (0x8U)
#define | ENC_IMR_PHA_SHIFT (3U)
#define | ENC_IMR_PHA(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)
#define | ENC_IMR_FHOM_MASK (0x10U)
#define | ENC_IMR_FHOM_SHIFT (4U)
#define | ENC_IMR_FHOM(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)
#define | ENC_IMR_FIND_MASK (0x20U)
#define | ENC_IMR_FIND_SHIFT (5U)
#define | ENC_IMR_FIND(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)
#define | ENC_IMR_FPHB_MASK (0x40U)
#define | ENC_IMR_FPHB_SHIFT (6U)
#define | ENC_IMR_FPHB(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)
#define | ENC_IMR_FPHA_MASK (0x80U)
#define | ENC_IMR_FPHA_SHIFT (7U)
#define | ENC_IMR_FPHA(x) (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)

## TST - Test Register

#define | ENC_TST_TEST_COUNT_MASK (0xFFU)
#define | ENC_TST_TEST_COUNT_SHIFT (0U)
#define | ENC_TST_TEST_COUNT(x) (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)
#define | ENC_TST_TEST_PERIOD_MASK (0x1F00U)
#define | ENC_TST_TEST_PERIOD_SHIFT (8U)
#define | ENC_TST_TEST_PERIOD(x) (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)
#define | ENC_TST_QDN_MASK (0x2000U)
#define | ENC_TST_QDN_SHIFT (13U)
#define | ENC_TST_QDN(x) (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)
#define | ENC_TST_TCE_MASK (0x4000U)
#define | ENC_TST_TCE_SHIFT (14U)
#define | ENC_TST_TCE(x) (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)
#define | ENC_TST_TEN_MASK (0x8000U)
#define | ENC_TST_TEN_SHIFT (15U)
#define | ENC_TST_TEN(x) (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)

## CTRL2 - Control 2 Register

#define | ENC_CTRL2_UPDHLD_MASK (0x1U)
#define | ENC_CTRL2_UPDHLD_SHIFT (0U)
#define | ENC_CTRL2_UPDHLD(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)
#define | ENC_CTRL2_UPDPOS_MASK (0x2U)
#define | ENC_CTRL2_UPDPOS_SHIFT (1U)
#define | ENC_CTRL2_UPDPOS(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)
#define | ENC_CTRL2_MOD_MASK (0x4U)
#define | ENC_CTRL2_MOD_SHIFT (2U)
#define | ENC_CTRL2_MOD(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)
#define | ENC_CTRL2_DIR_MASK (0x8U)
#define | ENC_CTRL2_DIR_SHIFT (3U)
#define | ENC_CTRL2_DIR(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)
#define | ENC_CTRL2_RUIE_MASK (0x10U)
#define | ENC_CTRL2_RUIE_SHIFT (4U)
#define | ENC_CTRL2_RUIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)
#define | ENC_CTRL2_RUIRQ_MASK (0x20U)
#define | ENC_CTRL2_RUIRQ_SHIFT (5U)
#define | ENC_CTRL2_RUIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)
#define | ENC_CTRL2_ROIE_MASK (0x40U)
#define | ENC_CTRL2_ROIE_SHIFT (6U)
#define | ENC_CTRL2_ROIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)
#define | ENC_CTRL2_ROIRQ_MASK (0x80U)
#define | ENC_CTRL2_ROIRQ_SHIFT (7U)
#define | ENC_CTRL2_ROIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)
#define | ENC_CTRL2_REVMOD_MASK (0x100U)
#define | ENC_CTRL2_REVMOD_SHIFT (8U)
#define | ENC_CTRL2_REVMOD(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)
#define | ENC_CTRL2_OUTCTL_MASK (0x200U)
#define | ENC_CTRL2_OUTCTL_SHIFT (9U)
#define | ENC_CTRL2_OUTCTL(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)
#define | ENC_CTRL2_SABIE_MASK (0x400U)
#define | ENC_CTRL2_SABIE_SHIFT (10U)
#define | ENC_CTRL2_SABIE(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)
#define | ENC_CTRL2_SABIRQ_MASK (0x800U)
#define | ENC_CTRL2_SABIRQ_SHIFT (11U)
#define | ENC_CTRL2_SABIRQ(x) (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)
#define | PWM_CTRL2_CLK_SEL_MASK (0x3U)
#define | PWM_CTRL2_CLK_SEL_SHIFT (0U)
#define | PWM_CTRL2_CLK_SEL(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)
#define | PWM_CTRL2_RELOAD_SEL_MASK (0x4U)
#define | PWM_CTRL2_RELOAD_SEL_SHIFT (2U)
#define | PWM_CTRL2_RELOAD_SEL(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)
#define | PWM_CTRL2_FORCE_SEL_MASK (0x38U)
#define | PWM_CTRL2_FORCE_SEL_SHIFT (3U)
#define | PWM_CTRL2_FORCE_SEL(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)
#define | PWM_CTRL2_FORCE_MASK (0x40U)
#define | PWM_CTRL2_FORCE_SHIFT (6U)
#define | PWM_CTRL2_FORCE(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)
#define | PWM_CTRL2_FRCEN_MASK (0x80U)
#define | PWM_CTRL2_FRCEN_SHIFT (7U)
#define | PWM_CTRL2_FRCEN(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)
#define | PWM_CTRL2_INIT_SEL_MASK (0x300U)
#define | PWM_CTRL2_INIT_SEL_SHIFT (8U)
#define | PWM_CTRL2_INIT_SEL(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)
#define | PWM_CTRL2_PWMX_INIT_MASK (0x400U)
#define | PWM_CTRL2_PWMX_INIT_SHIFT (10U)
#define | PWM_CTRL2_PWMX_INIT(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)
#define | PWM_CTRL2_PWM45_INIT_MASK (0x800U)
#define | PWM_CTRL2_PWM45_INIT_SHIFT (11U)
#define | PWM_CTRL2_PWM45_INIT(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)
#define | PWM_CTRL2_PWM23_INIT_MASK (0x1000U)
#define | PWM_CTRL2_PWM23_INIT_SHIFT (12U)
#define | PWM_CTRL2_PWM23_INIT(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)
#define | PWM_CTRL2_INDEP_MASK (0x2000U)
#define | PWM_CTRL2_INDEP_SHIFT (13U)
#define | PWM_CTRL2_INDEP(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)
#define | PWM_CTRL2_WAITEN_MASK (0x4000U)
#define | PWM_CTRL2_WAITEN_SHIFT (14U)
#define | PWM_CTRL2_WAITEN(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)
#define | PWM_CTRL2_DBGEN_MASK (0x8000U)
#define | PWM_CTRL2_DBGEN_SHIFT (15U)
#define | PWM_CTRL2_DBGEN(x) (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)

## UMOD - Upper Modulus Register

#define | ENC_UMOD_MOD_MASK (0xFFFFU)
#define | ENC_UMOD_MOD_SHIFT (0U)
#define | ENC_UMOD_MOD(x) (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)

## LMOD - Lower Modulus Register

#define | ENC_LMOD_MOD_MASK (0xFFFFU)
#define | ENC_LMOD_MOD_SHIFT (0U)
#define | ENC_LMOD_MOD(x) (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)

## UCOMP - Upper Position Compare Register

#define | ENC_UCOMP_COMP_MASK (0xFFFFU)
#define | ENC_UCOMP_COMP_SHIFT (0U)
#define | ENC_UCOMP_COMP(x) (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)

## LCOMP - Lower Position Compare Register

#define | ENC_LCOMP_COMP_MASK (0xFFFFU)
#define | ENC_LCOMP_COMP_SHIFT (0U)
#define | ENC_LCOMP_COMP(x) (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ ENC_CTRL2_DIR

#define ENC_CTRL2_DIR | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_DIR_SHIFT)) & ENC_CTRL2_DIR_MASK)

DIR - Count Direction Flag 0b0..Last count was in the down direction 0b1..Last count was in the up direction

Definition at line 16652 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_DIR_MASK

#define ENC_CTRL2_DIR_MASK (0x8U)

Definition at line 16646 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_DIR_SHIFT

#define ENC_CTRL2_DIR_SHIFT (3U)

Definition at line 16647 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_MOD

#define ENC_CTRL2_MOD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_MOD_SHIFT)) & ENC_CTRL2_MOD_MASK)

MOD - Enable Modulo Counting 0b0..Disable modulo counting 0b1..Enable modulo counting

Definition at line 16645 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_MOD_MASK

#define ENC_CTRL2_MOD_MASK (0x4U)

Definition at line 16639 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_MOD_SHIFT

#define ENC_CTRL2_MOD_SHIFT (2U)

Definition at line 16640 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_OUTCTL

#define ENC_CTRL2_OUTCTL | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_OUTCTL_SHIFT)) & ENC_CTRL2_OUTCTL_MASK)

OUTCTL - Output Control 0b0..POSMATCH pulses when a match occurs between the position counters (POS) and the compare value (COMP). 0b1..POSMATCH pulses when the UPOS, LPOS, REV, or POSD registers are read.

Definition at line 16694 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_OUTCTL_MASK

#define ENC_CTRL2_OUTCTL_MASK (0x200U)

Definition at line 16688 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_OUTCTL_SHIFT

#define ENC_CTRL2_OUTCTL_SHIFT (9U)

Definition at line 16689 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_REVMOD

#define ENC_CTRL2_REVMOD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_REVMOD_SHIFT)) & ENC_CTRL2_REVMOD_MASK)

REVMOD - Revolution Counter Modulus Enable 0b0..Use INDEX pulse to increment/decrement revolution counter (REV). 0b1..Use modulus counting roll-over/under to increment/decrement revolution counter (REV).

Definition at line 16687 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_REVMOD_MASK

#define ENC_CTRL2_REVMOD_MASK (0x100U)

Definition at line 16681 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_REVMOD_SHIFT

#define ENC_CTRL2_REVMOD_SHIFT (8U)

Definition at line 16682 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIE

#define ENC_CTRL2_ROIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIE_SHIFT)) & ENC_CTRL2_ROIE_MASK)

ROIE - Roll-over Interrupt Enable 0b0..Roll-over interrupt is disabled 0b1..Roll-over interrupt is enabled

Definition at line 16673 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIE_MASK

#define ENC_CTRL2_ROIE_MASK (0x40U)

Definition at line 16667 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIE_SHIFT

#define ENC_CTRL2_ROIE_SHIFT (6U)

Definition at line 16668 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIRQ

#define ENC_CTRL2_ROIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_ROIRQ_SHIFT)) & ENC_CTRL2_ROIRQ_MASK)

ROIRQ - Roll-over Interrupt Request 0b0..No roll-over has occurred 0b1..Roll-over has occurred

Definition at line 16680 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIRQ_MASK

#define ENC_CTRL2_ROIRQ_MASK (0x80U)

Definition at line 16674 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_ROIRQ_SHIFT

#define ENC_CTRL2_ROIRQ_SHIFT (7U)

Definition at line 16675 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIE

#define ENC_CTRL2_RUIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIE_SHIFT)) & ENC_CTRL2_RUIE_MASK)

RUIE - Roll-under Interrupt Enable 0b0..Roll-under interrupt is disabled 0b1..Roll-under interrupt is enabled

Definition at line 16659 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIE_MASK

#define ENC_CTRL2_RUIE_MASK (0x10U)

Definition at line 16653 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIE_SHIFT

#define ENC_CTRL2_RUIE_SHIFT (4U)

Definition at line 16654 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIRQ

#define ENC_CTRL2_RUIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_RUIRQ_SHIFT)) & ENC_CTRL2_RUIRQ_MASK)

RUIRQ - Roll-under Interrupt Request 0b0..No roll-under has occurred 0b1..Roll-under has occurred

Definition at line 16666 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIRQ_MASK

#define ENC_CTRL2_RUIRQ_MASK (0x20U)

Definition at line 16660 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_RUIRQ_SHIFT

#define ENC_CTRL2_RUIRQ_SHIFT (5U)

Definition at line 16661 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIE

#define ENC_CTRL2_SABIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIE_SHIFT)) & ENC_CTRL2_SABIE_MASK)

SABIE - Simultaneous PHASEA and PHASEB Change Interrupt Enable 0b0..Simultaneous PHASEA and PHASEB change interrupt disabled. 0b1..Simultaneous PHASEA and PHASEB change interrupt enabled.

Definition at line 16701 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIE_MASK

#define ENC_CTRL2_SABIE_MASK (0x400U)

Definition at line 16695 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIE_SHIFT

#define ENC_CTRL2_SABIE_SHIFT (10U)

Definition at line 16696 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIRQ

#define ENC_CTRL2_SABIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_SABIRQ_SHIFT)) & ENC_CTRL2_SABIRQ_MASK)

SABIRQ - Simultaneous PHASEA and PHASEB Change Interrupt Request 0b0..No simultaneous change of PHASEA and PHASEB has occurred. 0b1..A simultaneous change of PHASEA and PHASEB has occurred.

Definition at line 16708 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIRQ_MASK

#define ENC_CTRL2_SABIRQ_MASK (0x800U)

Definition at line 16702 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_SABIRQ_SHIFT

#define ENC_CTRL2_SABIRQ_SHIFT (11U)

Definition at line 16703 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDHLD

#define ENC_CTRL2_UPDHLD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDHLD_SHIFT)) & ENC_CTRL2_UPDHLD_MASK)

UPDHLD - Update Hold Registers 0b0..Disable updates of hold registers on rising edge of TRIGGER 0b1..Enable updates of hold registers on rising edge of TRIGGER

Definition at line 16631 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDHLD_MASK

#define ENC_CTRL2_UPDHLD_MASK (0x1U)

Definition at line 16625 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDHLD_SHIFT

#define ENC_CTRL2_UPDHLD_SHIFT (0U)

Definition at line 16626 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDPOS

#define ENC_CTRL2_UPDPOS | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL2_UPDPOS_SHIFT)) & ENC_CTRL2_UPDPOS_MASK)

UPDPOS - Update Position Registers 0b0..No action for POSD, REV, UPOS and LPOS on rising edge of TRIGGER 0b1..Clear POSD, REV, UPOS and LPOS on rising edge of TRIGGER

Definition at line 16638 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDPOS_MASK

#define ENC_CTRL2_UPDPOS_MASK (0x2U)

Definition at line 16632 of file MIMXRT1062.h.

## ◆ ENC_CTRL2_UPDPOS_SHIFT

#define ENC_CTRL2_UPDPOS_SHIFT (1U)

Definition at line 16633 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIE

#define ENC_CTRL_CMPIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIE_SHIFT)) & ENC_CTRL_CMPIE_MASK)

CMPIE - Compare Interrupt Enable 0b0..Compare interrupt is disabled 0b1..Compare interrupt is enabled

Definition at line 16362 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIE_MASK

#define ENC_CTRL_CMPIE_MASK (0x1U)

Definition at line 16356 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIE_SHIFT

#define ENC_CTRL_CMPIE_SHIFT (0U)

Definition at line 16357 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIRQ

#define ENC_CTRL_CMPIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_CMPIRQ_SHIFT)) & ENC_CTRL_CMPIRQ_MASK)

CMPIRQ - Compare Interrupt Request 0b0..No match has occurred 0b1..COMP match has occurred

Definition at line 16369 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIRQ_MASK

#define ENC_CTRL_CMPIRQ_MASK (0x2U)

Definition at line 16363 of file MIMXRT1062.h.

## ◆ ENC_CTRL_CMPIRQ_SHIFT

#define ENC_CTRL_CMPIRQ_SHIFT (1U)

Definition at line 16364 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIE

#define ENC_CTRL_DIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIE_SHIFT)) & ENC_CTRL_DIE_MASK)

DIE - Watchdog Timeout Interrupt Enable 0b0..Watchdog timer interrupt is disabled 0b1..Watchdog timer interrupt is enabled

Definition at line 16383 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIE_MASK

#define ENC_CTRL_DIE_MASK (0x8U)

Definition at line 16377 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIE_SHIFT

#define ENC_CTRL_DIE_SHIFT (3U)

Definition at line 16378 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIRQ

#define ENC_CTRL_DIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_DIRQ_SHIFT)) & ENC_CTRL_DIRQ_MASK)

DIRQ - Watchdog Timeout Interrupt Request 0b0..No interrupt has occurred 0b1..Watchdog timeout interrupt has occurred

Definition at line 16390 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIRQ_MASK

#define ENC_CTRL_DIRQ_MASK (0x10U)

Definition at line 16384 of file MIMXRT1062.h.

## ◆ ENC_CTRL_DIRQ_SHIFT

#define ENC_CTRL_DIRQ_SHIFT (4U)

Definition at line 16385 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIE

#define ENC_CTRL_HIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIE_SHIFT)) & ENC_CTRL_HIE_MASK)

HIE - HOME Interrupt Enable 0b0..Disable HOME interrupts 0b1..Enable HOME interrupts

Definition at line 16463 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIE_MASK

#define ENC_CTRL_HIE_MASK (0x4000U)

Definition at line 16457 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIE_SHIFT

#define ENC_CTRL_HIE_SHIFT (14U)

Definition at line 16458 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIP

#define ENC_CTRL_HIP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIP_SHIFT)) & ENC_CTRL_HIP_MASK)

HIP - Enable HOME to Initialize Position Counters UPOS and LPOS 0b0..No action 0b1..HOME signal initializes the position counter

Definition at line 16456 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIP_MASK

#define ENC_CTRL_HIP_MASK (0x2000U)

Definition at line 16450 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIP_SHIFT

#define ENC_CTRL_HIP_SHIFT (13U)

Definition at line 16451 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIRQ

#define ENC_CTRL_HIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HIRQ_SHIFT)) & ENC_CTRL_HIRQ_MASK)

HIRQ - HOME Signal Transition Interrupt Request 0b0..No interrupt 0b1..HOME signal transition interrupt request

Definition at line 16470 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIRQ_MASK

#define ENC_CTRL_HIRQ_MASK (0x8000U)

Definition at line 16464 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HIRQ_SHIFT

#define ENC_CTRL_HIRQ_SHIFT (15U)

Definition at line 16465 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HNE

#define ENC_CTRL_HNE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_HNE_SHIFT)) & ENC_CTRL_HNE_MASK)

HNE - Use Negative Edge of HOME Input 0b0..Use positive going edge-to-trigger initialization of position counters UPOS and LPOS 0b1..Use negative going edge-to-trigger initialization of position counters UPOS and LPOS

Definition at line 16449 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HNE_MASK

#define ENC_CTRL_HNE_MASK (0x1000U)

Definition at line 16443 of file MIMXRT1062.h.

## ◆ ENC_CTRL_HNE_SHIFT

#define ENC_CTRL_HNE_SHIFT (12U)

Definition at line 16444 of file MIMXRT1062.h.

## ◆ ENC_CTRL_PH1

#define ENC_CTRL_PH1 | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_PH1_SHIFT)) & ENC_CTRL_PH1_MASK)

PH1 - Enable Signal Phase Count Mode 0b0..Use standard quadrature decoder where PHASEA and PHASEB represent a two phase quadrature signal. 0b1..Bypass the quadrature decoder. A positive transition of the PHASEA input generates a count signal. The PHASEB input and the REV bit control the counter direction. If CTRL[REV] = 0, PHASEB = 0, then count up If CTRL[REV] = 0, PHASEB = 1, then count down If CTRL[REV] = 1, PHASEB = 0, then count down If CTRL[REV] = 1, PHASEB = 1, then count up

Definition at line 16428 of file MIMXRT1062.h.

## ◆ ENC_CTRL_PH1_MASK

#define ENC_CTRL_PH1_MASK (0x200U)

Definition at line 16419 of file MIMXRT1062.h.

## ◆ ENC_CTRL_PH1_SHIFT

#define ENC_CTRL_PH1_SHIFT (9U)

Definition at line 16420 of file MIMXRT1062.h.

## ◆ ENC_CTRL_REV

#define ENC_CTRL_REV | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_REV_SHIFT)) & ENC_CTRL_REV_MASK)

REV - Enable Reverse Direction Counting 0b0..Count normally 0b1..Count in the reverse direction

Definition at line 16435 of file MIMXRT1062.h.

## ◆ ENC_CTRL_REV_MASK

#define ENC_CTRL_REV_MASK (0x400U)

Definition at line 16429 of file MIMXRT1062.h.

## ◆ ENC_CTRL_REV_SHIFT

#define ENC_CTRL_REV_SHIFT (10U)

Definition at line 16430 of file MIMXRT1062.h.

## ◆ ENC_CTRL_SWIP

#define ENC_CTRL_SWIP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_SWIP_SHIFT)) & ENC_CTRL_SWIP_MASK)

SWIP - Software Triggered Initialization of Position Counters UPOS and LPOS 0b0..No action 0b1..Initialize position counter

Definition at line 16442 of file MIMXRT1062.h.

## ◆ ENC_CTRL_SWIP_MASK

#define ENC_CTRL_SWIP_MASK (0x800U)

Definition at line 16436 of file MIMXRT1062.h.

## ◆ ENC_CTRL_SWIP_SHIFT

#define ENC_CTRL_SWIP_SHIFT (11U)

Definition at line 16437 of file MIMXRT1062.h.

## ◆ ENC_CTRL_WDE

#define ENC_CTRL_WDE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_WDE_SHIFT)) & ENC_CTRL_WDE_MASK)

WDE - Watchdog Enable 0b0..Watchdog timer is disabled 0b1..Watchdog timer is enabled

Definition at line 16376 of file MIMXRT1062.h.

## ◆ ENC_CTRL_WDE_MASK

#define ENC_CTRL_WDE_MASK (0x4U)

Definition at line 16370 of file MIMXRT1062.h.

## ◆ ENC_CTRL_WDE_SHIFT

#define ENC_CTRL_WDE_SHIFT (2U)

Definition at line 16371 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIE

#define ENC_CTRL_XIE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIE_SHIFT)) & ENC_CTRL_XIE_MASK)

XIE - INDEX Pulse Interrupt Enable 0b0..INDEX pulse interrupt is disabled 0b1..INDEX pulse interrupt is enabled

Definition at line 16411 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIE_MASK

#define ENC_CTRL_XIE_MASK (0x80U)

Definition at line 16405 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIE_SHIFT

#define ENC_CTRL_XIE_SHIFT (7U)

Definition at line 16406 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIP

#define ENC_CTRL_XIP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIP_SHIFT)) & ENC_CTRL_XIP_MASK)

XIP - INDEX Triggered Initialization of Position Counters UPOS and LPOS 0b0..No action 0b1..INDEX pulse initializes the position counter

Definition at line 16404 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIP_MASK

#define ENC_CTRL_XIP_MASK (0x40U)

Definition at line 16398 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIP_SHIFT

#define ENC_CTRL_XIP_SHIFT (6U)

Definition at line 16399 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIRQ

#define ENC_CTRL_XIRQ | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XIRQ_SHIFT)) & ENC_CTRL_XIRQ_MASK)

XIRQ - INDEX Pulse Interrupt Request 0b0..No interrupt has occurred 0b1..INDEX pulse interrupt has occurred

Definition at line 16418 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIRQ_MASK

#define ENC_CTRL_XIRQ_MASK (0x100U)

Definition at line 16412 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XIRQ_SHIFT

#define ENC_CTRL_XIRQ_SHIFT (8U)

Definition at line 16413 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XNE

#define ENC_CTRL_XNE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_CTRL_XNE_SHIFT)) & ENC_CTRL_XNE_MASK)

XNE - Use Negative Edge of INDEX Pulse 0b0..Use positive transition edge of INDEX pulse 0b1..Use negative transition edge of INDEX pulse

Definition at line 16397 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XNE_MASK

#define ENC_CTRL_XNE_MASK (0x20U)

Definition at line 16391 of file MIMXRT1062.h.

## ◆ ENC_CTRL_XNE_SHIFT

#define ENC_CTRL_XNE_SHIFT (5U)

Definition at line 16392 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_CNT

#define ENC_FILT_FILT_CNT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_CNT_SHIFT)) & ENC_FILT_FILT_CNT_MASK)

FILT_CNT - Input Filter Sample Count

Definition at line 16484 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_CNT_MASK

#define ENC_FILT_FILT_CNT_MASK (0x700U)

Definition at line 16480 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_CNT_SHIFT

#define ENC_FILT_FILT_CNT_SHIFT (8U)

Definition at line 16481 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_PER

#define ENC_FILT_FILT_PER | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_FILT_FILT_PER_SHIFT)) & ENC_FILT_FILT_PER_MASK)

FILT_PER - Input Filter Sample Period

Definition at line 16479 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_PER_MASK

#define ENC_FILT_FILT_PER_MASK (0xFFU)

Definition at line 16475 of file MIMXRT1062.h.

## ◆ ENC_FILT_FILT_PER_SHIFT

#define ENC_FILT_FILT_PER_SHIFT (0U)

Definition at line 16476 of file MIMXRT1062.h.

## ◆ ENC_IMR_FHOM

#define ENC_IMR_FHOM | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FHOM_SHIFT)) & ENC_IMR_FHOM_MASK)

Definition at line 16580 of file MIMXRT1062.h.

## ◆ ENC_IMR_FHOM_MASK

#define ENC_IMR_FHOM_MASK (0x10U)

Definition at line 16578 of file MIMXRT1062.h.

## ◆ ENC_IMR_FHOM_SHIFT

#define ENC_IMR_FHOM_SHIFT (4U)

Definition at line 16579 of file MIMXRT1062.h.

## ◆ ENC_IMR_FIND

#define ENC_IMR_FIND | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FIND_SHIFT)) & ENC_IMR_FIND_MASK)

Definition at line 16583 of file MIMXRT1062.h.

## ◆ ENC_IMR_FIND_MASK

#define ENC_IMR_FIND_MASK (0x20U)

Definition at line 16581 of file MIMXRT1062.h.

## ◆ ENC_IMR_FIND_SHIFT

#define ENC_IMR_FIND_SHIFT (5U)

Definition at line 16582 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHA

#define ENC_IMR_FPHA | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHA_SHIFT)) & ENC_IMR_FPHA_MASK)

Definition at line 16589 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHA_MASK

#define ENC_IMR_FPHA_MASK (0x80U)

Definition at line 16587 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHA_SHIFT

#define ENC_IMR_FPHA_SHIFT (7U)

Definition at line 16588 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHB

#define ENC_IMR_FPHB | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_FPHB_SHIFT)) & ENC_IMR_FPHB_MASK)

Definition at line 16586 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHB_MASK

#define ENC_IMR_FPHB_MASK (0x40U)

Definition at line 16584 of file MIMXRT1062.h.

## ◆ ENC_IMR_FPHB_SHIFT

#define ENC_IMR_FPHB_SHIFT (6U)

Definition at line 16585 of file MIMXRT1062.h.

## ◆ ENC_IMR_HOME

#define ENC_IMR_HOME | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_HOME_SHIFT)) & ENC_IMR_HOME_MASK)

Definition at line 16568 of file MIMXRT1062.h.

## ◆ ENC_IMR_HOME_MASK

#define ENC_IMR_HOME_MASK (0x1U)

Definition at line 16566 of file MIMXRT1062.h.

## ◆ ENC_IMR_HOME_SHIFT

#define ENC_IMR_HOME_SHIFT (0U)

Definition at line 16567 of file MIMXRT1062.h.

## ◆ ENC_IMR_INDEX

#define ENC_IMR_INDEX | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_INDEX_SHIFT)) & ENC_IMR_INDEX_MASK)

Definition at line 16571 of file MIMXRT1062.h.

## ◆ ENC_IMR_INDEX_MASK

#define ENC_IMR_INDEX_MASK (0x2U)

Definition at line 16569 of file MIMXRT1062.h.

## ◆ ENC_IMR_INDEX_SHIFT

#define ENC_IMR_INDEX_SHIFT (1U)

Definition at line 16570 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHA

#define ENC_IMR_PHA | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHA_SHIFT)) & ENC_IMR_PHA_MASK)

Definition at line 16577 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHA_MASK

#define ENC_IMR_PHA_MASK (0x8U)

Definition at line 16575 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHA_SHIFT

#define ENC_IMR_PHA_SHIFT (3U)

Definition at line 16576 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHB

#define ENC_IMR_PHB | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_IMR_PHB_SHIFT)) & ENC_IMR_PHB_MASK)

Definition at line 16574 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHB_MASK

#define ENC_IMR_PHB_MASK (0x4U)

Definition at line 16572 of file MIMXRT1062.h.

## ◆ ENC_IMR_PHB_SHIFT

#define ENC_IMR_PHB_SHIFT (2U)

Definition at line 16573 of file MIMXRT1062.h.

## ◆ ENC_LCOMP_COMP

#define ENC_LCOMP_COMP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_LCOMP_COMP_SHIFT)) & ENC_LCOMP_COMP_MASK)

Definition at line 16736 of file MIMXRT1062.h.

## ◆ ENC_LCOMP_COMP_MASK

#define ENC_LCOMP_COMP_MASK (0xFFFFU)

Definition at line 16734 of file MIMXRT1062.h.

## ◆ ENC_LCOMP_COMP_SHIFT

#define ENC_LCOMP_COMP_SHIFT (0U)

Definition at line 16735 of file MIMXRT1062.h.

## ◆ ENC_LINIT_INIT

#define ENC_LINIT_INIT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_LINIT_INIT_SHIFT)) & ENC_LINIT_INIT_MASK)

Definition at line 16561 of file MIMXRT1062.h.

## ◆ ENC_LINIT_INIT_MASK

#define ENC_LINIT_INIT_MASK (0xFFFFU)

Definition at line 16559 of file MIMXRT1062.h.

## ◆ ENC_LINIT_INIT_SHIFT

#define ENC_LINIT_INIT_SHIFT (0U)

Definition at line 16560 of file MIMXRT1062.h.

## ◆ ENC_LMOD_MOD

#define ENC_LMOD_MOD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_LMOD_MOD_SHIFT)) & ENC_LMOD_MOD_MASK)

Definition at line 16722 of file MIMXRT1062.h.

## ◆ ENC_LMOD_MOD_MASK

#define ENC_LMOD_MOD_MASK (0xFFFFU)

Definition at line 16720 of file MIMXRT1062.h.

## ◆ ENC_LMOD_MOD_SHIFT

#define ENC_LMOD_MOD_SHIFT (0U)

Definition at line 16721 of file MIMXRT1062.h.

## ◆ ENC_LPOS_POS

#define ENC_LPOS_POS | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_LPOS_POS_SHIFT)) & ENC_LPOS_POS_MASK)

Definition at line 16533 of file MIMXRT1062.h.

## ◆ ENC_LPOS_POS_MASK

#define ENC_LPOS_POS_MASK (0xFFFFU)

Definition at line 16531 of file MIMXRT1062.h.

## ◆ ENC_LPOS_POS_SHIFT

#define ENC_LPOS_POS_SHIFT (0U)

Definition at line 16532 of file MIMXRT1062.h.

## ◆ ENC_LPOSH_POSH

#define ENC_LPOSH_POSH | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_LPOSH_POSH_SHIFT)) & ENC_LPOSH_POSH_MASK)

Definition at line 16547 of file MIMXRT1062.h.

## ◆ ENC_LPOSH_POSH_MASK

#define ENC_LPOSH_POSH_MASK (0xFFFFU)

Definition at line 16545 of file MIMXRT1062.h.

## ◆ ENC_LPOSH_POSH_SHIFT

#define ENC_LPOSH_POSH_SHIFT (0U)

Definition at line 16546 of file MIMXRT1062.h.

## ◆ ENC_POSD_POSD

#define ENC_POSD_POSD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_POSD_POSD_SHIFT)) & ENC_POSD_POSD_MASK)

Definition at line 16498 of file MIMXRT1062.h.

## ◆ ENC_POSD_POSD_MASK

#define ENC_POSD_POSD_MASK (0xFFFFU)

Definition at line 16496 of file MIMXRT1062.h.

## ◆ ENC_POSD_POSD_SHIFT

#define ENC_POSD_POSD_SHIFT (0U)

Definition at line 16497 of file MIMXRT1062.h.

## ◆ ENC_POSDH_POSDH

#define ENC_POSDH_POSDH | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_POSDH_POSDH_SHIFT)) & ENC_POSDH_POSDH_MASK)

Definition at line 16505 of file MIMXRT1062.h.

## ◆ ENC_POSDH_POSDH_MASK

#define ENC_POSDH_POSDH_MASK (0xFFFFU)

Definition at line 16503 of file MIMXRT1062.h.

## ◆ ENC_POSDH_POSDH_SHIFT

#define ENC_POSDH_POSDH_SHIFT (0U)

Definition at line 16504 of file MIMXRT1062.h.

## ◆ ENC_REV_REV

#define ENC_REV_REV | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_REV_REV_SHIFT)) & ENC_REV_REV_MASK)

Definition at line 16512 of file MIMXRT1062.h.

## ◆ ENC_REV_REV_MASK

#define ENC_REV_REV_MASK (0xFFFFU)

Definition at line 16510 of file MIMXRT1062.h.

## ◆ ENC_REV_REV_SHIFT

#define ENC_REV_REV_SHIFT (0U)

Definition at line 16511 of file MIMXRT1062.h.

## ◆ ENC_REVH_REVH

#define ENC_REVH_REVH | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_REVH_REVH_SHIFT)) & ENC_REVH_REVH_MASK)

Definition at line 16519 of file MIMXRT1062.h.

## ◆ ENC_REVH_REVH_MASK

#define ENC_REVH_REVH_MASK (0xFFFFU)

Definition at line 16517 of file MIMXRT1062.h.

## ◆ ENC_REVH_REVH_SHIFT

#define ENC_REVH_REVH_SHIFT (0U)

Definition at line 16518 of file MIMXRT1062.h.

## ◆ ENC_TST_QDN

#define ENC_TST_QDN | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_TST_QDN_SHIFT)) & ENC_TST_QDN_MASK)

QDN - Quadrature Decoder Negative Signal 0b0..Leaves quadrature decoder signal in a positive direction 0b1..Generates a negative quadrature decoder signal

Definition at line 16606 of file MIMXRT1062.h.

## ◆ ENC_TST_QDN_MASK

#define ENC_TST_QDN_MASK (0x2000U)

Definition at line 16600 of file MIMXRT1062.h.

## ◆ ENC_TST_QDN_SHIFT

#define ENC_TST_QDN_SHIFT (13U)

Definition at line 16601 of file MIMXRT1062.h.

## ◆ ENC_TST_TCE

#define ENC_TST_TCE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_TST_TCE_SHIFT)) & ENC_TST_TCE_MASK)

TCE - Test Counter Enable 0b0..Test count is not enabled 0b1..Test count is enabled

Definition at line 16613 of file MIMXRT1062.h.

## ◆ ENC_TST_TCE_MASK

#define ENC_TST_TCE_MASK (0x4000U)

Definition at line 16607 of file MIMXRT1062.h.

## ◆ ENC_TST_TCE_SHIFT

#define ENC_TST_TCE_SHIFT (14U)

Definition at line 16608 of file MIMXRT1062.h.

## ◆ ENC_TST_TEN

#define ENC_TST_TEN | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEN_SHIFT)) & ENC_TST_TEN_MASK)

TEN - Test Mode Enable 0b0..Test module is not enabled 0b1..Test module is enabled

Definition at line 16620 of file MIMXRT1062.h.

## ◆ ENC_TST_TEN_MASK

#define ENC_TST_TEN_MASK (0x8000U)

Definition at line 16614 of file MIMXRT1062.h.

## ◆ ENC_TST_TEN_SHIFT

#define ENC_TST_TEN_SHIFT (15U)

Definition at line 16615 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_COUNT

#define ENC_TST_TEST_COUNT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_COUNT_SHIFT)) & ENC_TST_TEST_COUNT_MASK)

Definition at line 16596 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_COUNT_MASK

#define ENC_TST_TEST_COUNT_MASK (0xFFU)

Definition at line 16594 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_COUNT_SHIFT

#define ENC_TST_TEST_COUNT_SHIFT (0U)

Definition at line 16595 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_PERIOD

#define ENC_TST_TEST_PERIOD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_TST_TEST_PERIOD_SHIFT)) & ENC_TST_TEST_PERIOD_MASK)

Definition at line 16599 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_PERIOD_MASK

#define ENC_TST_TEST_PERIOD_MASK (0x1F00U)

Definition at line 16597 of file MIMXRT1062.h.

## ◆ ENC_TST_TEST_PERIOD_SHIFT

#define ENC_TST_TEST_PERIOD_SHIFT (8U)

Definition at line 16598 of file MIMXRT1062.h.

## ◆ ENC_UCOMP_COMP

#define ENC_UCOMP_COMP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_UCOMP_COMP_SHIFT)) & ENC_UCOMP_COMP_MASK)

Definition at line 16729 of file MIMXRT1062.h.

## ◆ ENC_UCOMP_COMP_MASK

#define ENC_UCOMP_COMP_MASK (0xFFFFU)

Definition at line 16727 of file MIMXRT1062.h.

## ◆ ENC_UCOMP_COMP_SHIFT

#define ENC_UCOMP_COMP_SHIFT (0U)

Definition at line 16728 of file MIMXRT1062.h.

## ◆ ENC_UINIT_INIT

#define ENC_UINIT_INIT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_UINIT_INIT_SHIFT)) & ENC_UINIT_INIT_MASK)

Definition at line 16554 of file MIMXRT1062.h.

## ◆ ENC_UINIT_INIT_MASK

#define ENC_UINIT_INIT_MASK (0xFFFFU)

Definition at line 16552 of file MIMXRT1062.h.

## ◆ ENC_UINIT_INIT_SHIFT

#define ENC_UINIT_INIT_SHIFT (0U)

Definition at line 16553 of file MIMXRT1062.h.

## ◆ ENC_UMOD_MOD

#define ENC_UMOD_MOD | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_UMOD_MOD_SHIFT)) & ENC_UMOD_MOD_MASK)

Definition at line 16715 of file MIMXRT1062.h.

## ◆ ENC_UMOD_MOD_MASK

#define ENC_UMOD_MOD_MASK (0xFFFFU)

Definition at line 16713 of file MIMXRT1062.h.

## ◆ ENC_UMOD_MOD_SHIFT

#define ENC_UMOD_MOD_SHIFT (0U)

Definition at line 16714 of file MIMXRT1062.h.

## ◆ ENC_UPOS_POS

#define ENC_UPOS_POS | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_UPOS_POS_SHIFT)) & ENC_UPOS_POS_MASK)

Definition at line 16526 of file MIMXRT1062.h.

## ◆ ENC_UPOS_POS_MASK

#define ENC_UPOS_POS_MASK (0xFFFFU)

Definition at line 16524 of file MIMXRT1062.h.

## ◆ ENC_UPOS_POS_SHIFT

#define ENC_UPOS_POS_SHIFT (0U)

Definition at line 16525 of file MIMXRT1062.h.

## ◆ ENC_UPOSH_POSH

#define ENC_UPOSH_POSH | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_UPOSH_POSH_SHIFT)) & ENC_UPOSH_POSH_MASK)

Definition at line 16540 of file MIMXRT1062.h.

## ◆ ENC_UPOSH_POSH_MASK

#define ENC_UPOSH_POSH_MASK (0xFFFFU)

Definition at line 16538 of file MIMXRT1062.h.

## ◆ ENC_UPOSH_POSH_SHIFT

#define ENC_UPOSH_POSH_SHIFT (0U)

Definition at line 16539 of file MIMXRT1062.h.

## ◆ ENC_WTR_WDOG

#define ENC_WTR_WDOG | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << ENC_WTR_WDOG_SHIFT)) & ENC_WTR_WDOG_MASK)

Definition at line 16491 of file MIMXRT1062.h.

## ◆ ENC_WTR_WDOG_MASK

#define ENC_WTR_WDOG_MASK (0xFFFFU)

Definition at line 16489 of file MIMXRT1062.h.

## ◆ ENC_WTR_WDOG_SHIFT

#define ENC_WTR_WDOG_SHIFT (0U)

Definition at line 16490 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_CLK_SEL

#define PWM_CTRL2_CLK_SEL | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_CLK_SEL_SHIFT)) & PWM_CTRL2_CLK_SEL_MASK)

CLK_SEL - Clock Source Select 0b00..The IPBus clock is used as the clock for the local prescaler and counter. 0b01..EXT_CLK is used as the clock for the local prescaler and counter. 0b10..Submodule 0's clock (AUX_CLK) is used as the source clock for the local prescaler and counter. This setting should not be used in submodule 0 as it will force the clock to logic 0. 0b11..reserved

Definition at line 33164 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_CLK_SEL_MASK

#define PWM_CTRL2_CLK_SEL_MASK (0x3U)

Definition at line 33155 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_CLK_SEL_SHIFT

#define PWM_CTRL2_CLK_SEL_SHIFT (0U)

Definition at line 33156 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_DBGEN

#define PWM_CTRL2_DBGEN | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_DBGEN_SHIFT)) & PWM_CTRL2_DBGEN_MASK)

DBGEN - Debug Enable

Definition at line 33244 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_DBGEN_MASK

#define PWM_CTRL2_DBGEN_MASK (0x8000U)

Definition at line 33240 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_DBGEN_SHIFT

#define PWM_CTRL2_DBGEN_SHIFT (15U)

Definition at line 33241 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE

#define PWM_CTRL2_FORCE | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SHIFT)) & PWM_CTRL2_FORCE_MASK)

FORCE - Force Initialization

Definition at line 33193 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE_MASK

#define PWM_CTRL2_FORCE_MASK (0x40U)

Definition at line 33189 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE_SEL

#define PWM_CTRL2_FORCE_SEL | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FORCE_SEL_SHIFT)) & PWM_CTRL2_FORCE_SEL_MASK)

FORCE_SEL - This read/write bit determines the source of the FORCE OUTPUT signal for this submodule. 0b000..The local force signal, CTRL2[FORCE], from this submodule is used to force updates. 0b001..The master force signal from submodule 0 is used to force updates. This setting should not be used in submodule 0 as it will hold the FORCE OUTPUT signal to logic 0. 0b010..The local reload signal from this submodule is used to force updates without regard to the state of LDOK. 0b011..The master reload signal from submodule0 is used to force updates if LDOK is set. This setting should not be used in submodule0 as it will hold the FORCE OUTPUT signal to logic 0. 0b100..The local sync signal from this submodule is used to force updates. 0b101..The master sync signal from submodule0 is used to force updates. This setting should not be used in submodule0 as it will hold the FORCE OUTPUT signal to logic 0. 0b110..The external force signal, EXT_FORCE, from outside the PWM module causes updates. 0b111..The external sync signal, EXT_SYNC, from outside the PWM module causes updates.

Definition at line 33188 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE_SEL_MASK

#define PWM_CTRL2_FORCE_SEL_MASK (0x38U)

Definition at line 33173 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE_SEL_SHIFT

#define PWM_CTRL2_FORCE_SEL_SHIFT (3U)

Definition at line 33174 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FORCE_SHIFT

#define PWM_CTRL2_FORCE_SHIFT (6U)

Definition at line 33190 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FRCEN

#define PWM_CTRL2_FRCEN | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_FRCEN_SHIFT)) & PWM_CTRL2_FRCEN_MASK)

FRCEN - FRCEN 0b0..Initialization from a FORCE_OUT is disabled. 0b1..Initialization from a FORCE_OUT is enabled.

Definition at line 33200 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FRCEN_MASK

#define PWM_CTRL2_FRCEN_MASK (0x80U)

Definition at line 33194 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_FRCEN_SHIFT

#define PWM_CTRL2_FRCEN_SHIFT (7U)

Definition at line 33195 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INDEP

#define PWM_CTRL2_INDEP | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INDEP_SHIFT)) & PWM_CTRL2_INDEP_MASK)

INDEP - Independent or Complementary Pair Operation 0b0..PWM_A and PWM_B form a complementary PWM pair. 0b1..PWM_A and PWM_B outputs are independent PWMs.

Definition at line 33234 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INDEP_MASK

#define PWM_CTRL2_INDEP_MASK (0x2000U)

Definition at line 33228 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INDEP_SHIFT

#define PWM_CTRL2_INDEP_SHIFT (13U)

Definition at line 33229 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INIT_SEL

#define PWM_CTRL2_INIT_SEL | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_INIT_SEL_SHIFT)) & PWM_CTRL2_INIT_SEL_MASK)

INIT_SEL - Initialization Control Select 0b00..Local sync (PWM_X) causes initialization. 0b01..Master reload from submodule 0 causes initialization. This setting should not be used in submodule 0 as it will force the INIT signal to logic 0. The submodule counter will only reinitialize when a master reload occurs. 0b10..Master sync from submodule 0 causes initialization. This setting should not be used in submodule 0 as it will force the INIT signal to logic 0. 0b11..EXT_SYNC causes initialization.

Definition at line 33212 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INIT_SEL_MASK

#define PWM_CTRL2_INIT_SEL_MASK (0x300U)

Definition at line 33201 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_INIT_SEL_SHIFT

#define PWM_CTRL2_INIT_SEL_SHIFT (8U)

Definition at line 33202 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM23_INIT

#define PWM_CTRL2_PWM23_INIT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM23_INIT_SHIFT)) & PWM_CTRL2_PWM23_INIT_MASK)

PWM23_INIT - PWM23 Initial Value

Definition at line 33227 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM23_INIT_MASK

#define PWM_CTRL2_PWM23_INIT_MASK (0x1000U)

Definition at line 33223 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM23_INIT_SHIFT

#define PWM_CTRL2_PWM23_INIT_SHIFT (12U)

Definition at line 33224 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM45_INIT

#define PWM_CTRL2_PWM45_INIT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWM45_INIT_SHIFT)) & PWM_CTRL2_PWM45_INIT_MASK)

PWM45_INIT - PWM45 Initial Value

Definition at line 33222 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM45_INIT_MASK

#define PWM_CTRL2_PWM45_INIT_MASK (0x800U)

Definition at line 33218 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWM45_INIT_SHIFT

#define PWM_CTRL2_PWM45_INIT_SHIFT (11U)

Definition at line 33219 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWMX_INIT

#define PWM_CTRL2_PWMX_INIT | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_PWMX_INIT_SHIFT)) & PWM_CTRL2_PWMX_INIT_MASK)

PWMX_INIT - PWM_X Initial Value

Definition at line 33217 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWMX_INIT_MASK

#define PWM_CTRL2_PWMX_INIT_MASK (0x400U)

Definition at line 33213 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_PWMX_INIT_SHIFT

#define PWM_CTRL2_PWMX_INIT_SHIFT (10U)

Definition at line 33214 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_RELOAD_SEL

#define PWM_CTRL2_RELOAD_SEL | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_RELOAD_SEL_SHIFT)) & PWM_CTRL2_RELOAD_SEL_MASK)

RELOAD_SEL - Reload Source Select 0b0..The local RELOAD signal is used to reload registers. 0b1..The master RELOAD signal (from submodule 0) is used to reload registers. This setting should not be used in submodule 0 as it will force the RELOAD signal to logic 0.

Definition at line 33172 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_RELOAD_SEL_MASK

#define PWM_CTRL2_RELOAD_SEL_MASK (0x4U)

Definition at line 33165 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_RELOAD_SEL_SHIFT

#define PWM_CTRL2_RELOAD_SEL_SHIFT (2U)

Definition at line 33166 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_WAITEN

#define PWM_CTRL2_WAITEN | ( |  | x | ) | (((uint16_t)(((uint16_t)(x)) << PWM_CTRL2_WAITEN_SHIFT)) & PWM_CTRL2_WAITEN_MASK)

WAITEN - WAIT Enable

Definition at line 33239 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_WAITEN_MASK

#define PWM_CTRL2_WAITEN_MASK (0x4000U)

Definition at line 33235 of file MIMXRT1062.h.

## ◆ PWM_CTRL2_WAITEN_SHIFT

#define PWM_CTRL2_WAITEN_SHIFT (14U)

Definition at line 33236 of file MIMXRT1062.h.