Callisto4Bootloader: lib/c4_watchdog_types.h Source File

Callisto4Bootloader

c4_watchdog_types.h
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1
13 #ifndef C4_WATCHDOG_TYPES_H_
14 #define C4_WATCHDOG_TYPES_H_
15
16
17 /*******************************************************************************
18 * Includes
19 ******************************************************************************/
20 #include <stdint.h>
21
22 /*******************************************************************************
23 * Defines
24 ******************************************************************************/
25
26 /*******************************************************************************
27 * Structures
28 ******************************************************************************/
29
35 typedef struct
36 {
48 union
49 {
50 struct
51 {
52 uint16_t WDZST:1;
62 uint16_t WDBG :1;
70 uint16_t WDE :1;
79 uint16_t WDT :1;
90 uint16_t SRS :1;
100 uint16_t WDA :1;
107 uint16_t SRE :1;
116 uint16_t WDW :1;
124 uint16_t WT :8;
142 } B;
143 uint16_t R;
144 } WCR;
152 union
153 {
154 struct
155 {
156 uint16_t WSR;
165 } B;
166 uint16_t R;
167 } WSR;
181 union
182 {
183 struct
184 {
185 uint16_t SFTW:1;
192 uint16_t TOUT:1;
199 uint16_t rsvd1:2;
200 uint16_t POR :1;
205 uint16_t rsvd2:11;
206 } B;
207 uint16_t R;
208 } WRSR;
213 union c4_WDOG_wicr
214 {
215 struct
216 {
217 uint16_t WICT:8;
231 uint16_t resvd:6;
232 uint16_t WTIS:1;
240 uint16_t WIE :1;
249 } B;
250 uint16_t R;
251 } WICR;
256 union
257 {
258 struct
259 {
260 uint16_t PDE :1;
273 uint16_t resvd:15;
274 } B;
275 uint16_t R;
276 } WMCR;
277
278 } c4_WDOG_reg_t;
279
285 typedef struct
286 {
291 union
292 {
293 struct
294 {
295 uint32_t rsvd_0 : 7;
296 uint32_t maskWdogRst : 4;
313 uint32_t rsvd_1 : 2;
314 uint32_t core0Rst : 1;
321 uint32_t rsvd_2 : 3;
322 uint32_t core0DbgRst : 1;
329 uint32_t rsvd_3 : 7;
330 uint32_t dbgRstMskPg : 1;
334 uint32_t rsvd_4 : 2;
335 uint32_t maskWdog3Rst : 4;
344 } B;
345 uint32_t R;
346 } SCR;
355 union
356 {
357 struct
358 {
359 uint32_t bootCfg1: 8;
360 uint32_t bootCfg2: 8;
361 uint32_t bootCfg3: 8;
362 uint32_t bootCfg4: 8;
363 } B;
364 uint32_t R;
365 } SBMR1;
378 union
379 {
380 struct
381 {
382 uint32_t ippResetB : 1;
387 uint32_t lockupSysResetReq : 1;
397 uint32_t csuResetB : 1;
402 uint32_t ippUserResetB : 1;
407 uint32_t wdogRstB : 1;
413 uint32_t jtagRstB : 1;
420 uint32_t jtagSwRst : 1;
427 uint32_t wdog3RstB : 1;
434 uint32_t tempSenseRstB : 1;
442 uint32_t rsvd_0 : 23;
443 } B;
444 uint32_t R;
445 } SRSR;
447 uint32_t RESERVED_0[4];
454 union
455 {
456 struct
457 {
458 uint32_t secConfig : 2;
463 uint32_t rsvd_0 : 1;
464 uint32_t dirBtDis : 1;
467 uint32_t btFuseSel : 1;
469 uint32_t rsvd1 : 19;
470 uint32_t bmod : 2;
473 uint32_t rsvd_3 : 6;
474 } B;
475 uint32_t R;
476 } SBMR2;
481 union
482 {
483 struct
484 {
485 uint32_t rsvd_0;
486 } B;
487 uint32_t R;
488 } GPR[10];
489 } c4_SRC_reg_t;
490 /*******************************************************************************
491 * Prototypes
492 ******************************************************************************/
493
494 /*******************************************************************************
495 * Variables
496 ******************************************************************************/
497
498 extern c4_WDOG_reg_t * const sWdogRegisters[];
499
500 /*******************************************************************************
501 Interface Functions
502 ******************************************************************************/
503
504 #endif /* C4_WATCHDOG_TYPES_H_ */
c4_WDOG_reg_t::TOUT
uint16_t TOUT
TOUT.
Definition: c4_watchdog_types.h:192
c4_WDOG_reg_t::c4_WDOG_wicr
Watchdog Interrupt Control.
Definition: c4_watchdog_types.h:213
c4_WDOG_reg_t::SFTW
uint16_t SFTW
Software Reset.
Definition: c4_watchdog_types.h:185
c4_WDOG_reg_t::c4_WDOG_wicr::WICT
uint16_t WICT
Watchdog Interrupt Count Time-out field This determines how long before the counter time-out must the...
Definition: c4_watchdog_types.h:217
c4_WDOG_reg_t::resvd
uint16_t resvd
Definition: c4_watchdog_types.h:273
sWdogRegisters
c4_WDOG_reg_t *const sWdogRegisters[]
Watchdog control registers.
Definition: c4_watchdog.c:85
c4_WDOG_reg_t
Structure to overlay on the watchdog registers.
Definition: c4_watchdog_types.h:32
c4_SRC_reg_t
System Reset Controller (SRC)
Definition: c4_watchdog_types.h:282
c4_WDOG_reg_t::c4_WDOG_wicr::resvd
uint16_t resvd
reserved
Definition: c4_watchdog_types.h:231
c4_WDOG_reg_t::c4_WDOG_wicr::WTIS
uint16_t WTIS
Watchdog TImer Interrupt Status bit.
Definition: c4_watchdog_types.h:232
c4_WDOG_reg_t::c4_WDOG_wicr::WIE
uint16_t WIE
Watchdog Timer Interrupt enable bit.
Definition: c4_watchdog_types.h:240
c4_WDOG_reg_t::c4_WDOG_wicr::R
uint16_t R
Definition: c4_watchdog_types.h:250
c4_WDOG_reg_t::PDE
uint16_t PDE
Power Down Enable bit.
Definition: c4_watchdog_types.h:260
c4_WDOG_reg_t::rsvd1
uint16_t rsvd1
reserved
Definition: c4_watchdog_types.h:199
c4_WDOG_reg_t::POR
uint16_t POR
Power On Reset. Indicates whether the reset is the result of a power on reset.
Definition: c4_watchdog_types.h:200
c4_WDOG_reg_t::WSR
uint16_t WSR
Definition: c4_watchdog_types.h:156
c4_WDOG_reg_t::rsvd2
uint16_t rsvd2
reserved
Definition: c4_watchdog_types.h:205