Callisto4Bootloader: CMP Register Masks

Callisto4Bootloader

CMP Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » CMP Peripheral Access Layer

## CR0 - CMP Control Register 0

#define | CMP_CR0_HYSTCTR_MASK (0x3U)
#define | CMP_CR0_HYSTCTR_SHIFT (0U)
#define | CMP_CR0_HYSTCTR(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)
#define | CMP_CR0_FILTER_CNT_MASK (0x70U)
#define | CMP_CR0_FILTER_CNT_SHIFT (4U)
#define | CMP_CR0_FILTER_CNT(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)

## CR1 - CMP Control Register 1

#define | CMP_CR1_EN_MASK (0x1U)
#define | CMP_CR1_EN_SHIFT (0U)
#define | CMP_CR1_EN(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)
#define | CMP_CR1_OPE_MASK (0x2U)
#define | CMP_CR1_OPE_SHIFT (1U)
#define | CMP_CR1_OPE(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)
#define | CMP_CR1_COS_MASK (0x4U)
#define | CMP_CR1_COS_SHIFT (2U)
#define | CMP_CR1_COS(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)
#define | CMP_CR1_INV_MASK (0x8U)
#define | CMP_CR1_INV_SHIFT (3U)
#define | CMP_CR1_INV(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)
#define | CMP_CR1_PMODE_MASK (0x10U)
#define | CMP_CR1_PMODE_SHIFT (4U)
#define | CMP_CR1_PMODE(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)
#define | CMP_CR1_WE_MASK (0x40U)
#define | CMP_CR1_WE_SHIFT (6U)
#define | CMP_CR1_WE(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)
#define | CMP_CR1_SE_MASK (0x80U)
#define | CMP_CR1_SE_SHIFT (7U)
#define | CMP_CR1_SE(x) (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)

## FPR - CMP Filter Period Register

#define | CMP_FPR_FILT_PER_MASK (0xFFU)
#define | CMP_FPR_FILT_PER_SHIFT (0U)
#define | CMP_FPR_FILT_PER(x) (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)

## SCR - CMP Status and Control Register

#define | CMP_SCR_COUT_MASK (0x1U)
#define | CMP_SCR_COUT_SHIFT (0U)
#define | CMP_SCR_COUT(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)
#define | CMP_SCR_CFF_MASK (0x2U)
#define | CMP_SCR_CFF_SHIFT (1U)
#define | CMP_SCR_CFF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)
#define | CMP_SCR_CFR_MASK (0x4U)
#define | CMP_SCR_CFR_SHIFT (2U)
#define | CMP_SCR_CFR(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)
#define | CMP_SCR_IEF_MASK (0x8U)
#define | CMP_SCR_IEF_SHIFT (3U)
#define | CMP_SCR_IEF(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)
#define | CMP_SCR_IER_MASK (0x10U)
#define | CMP_SCR_IER_SHIFT (4U)
#define | CMP_SCR_IER(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)
#define | CMP_SCR_DMAEN_MASK (0x40U)
#define | CMP_SCR_DMAEN_SHIFT (6U)
#define | CMP_SCR_DMAEN(x) (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)

## DACCR - DAC Control Register

#define | CMP_DACCR_VOSEL_MASK (0x3FU)
#define | CMP_DACCR_VOSEL_SHIFT (0U)
#define | CMP_DACCR_VOSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)
#define | CMP_DACCR_VRSEL_MASK (0x40U)
#define | CMP_DACCR_VRSEL_SHIFT (6U)
#define | CMP_DACCR_VRSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)
#define | CMP_DACCR_DACEN_MASK (0x80U)
#define | CMP_DACCR_DACEN_SHIFT (7U)
#define | CMP_DACCR_DACEN(x) (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)

## MUXCR - MUX Control Register

#define | CMP_MUXCR_MSEL_MASK (0x7U)
#define | CMP_MUXCR_MSEL_SHIFT (0U)
#define | CMP_MUXCR_MSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)
#define | CMP_MUXCR_PSEL_MASK (0x38U)
#define | CMP_MUXCR_PSEL_SHIFT (3U)
#define | CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ CMP_CR0_FILTER_CNT

#define CMP_CR0_FILTER_CNT | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR0_FILTER_CNT_SHIFT)) & CMP_CR0_FILTER_CNT_MASK)

FILTER_CNT - Filter Sample Count 0b000..Filter is disabled. If SE = 1, then COUT is a logic 0. This is not a legal state, and is not recommended. If SE = 0, COUT = COUTA. 0b001..One sample must agree. The comparator output is simply sampled. 0b010..2 consecutive samples must agree. 0b011..3 consecutive samples must agree. 0b100..4 consecutive samples must agree. 0b101..5 consecutive samples must agree. 0b110..6 consecutive samples must agree. 0b111..7 consecutive samples must agree.

Definition at line 9766 of file MIMXRT1062.h.

## ◆ CMP_CR0_FILTER_CNT_MASK

#define CMP_CR0_FILTER_CNT_MASK (0x70U)

Definition at line 9754 of file MIMXRT1062.h.

## ◆ CMP_CR0_FILTER_CNT_SHIFT

#define CMP_CR0_FILTER_CNT_SHIFT (4U)

Definition at line 9755 of file MIMXRT1062.h.

## ◆ CMP_CR0_HYSTCTR

#define CMP_CR0_HYSTCTR | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR0_HYSTCTR_SHIFT)) & CMP_CR0_HYSTCTR_MASK)

HYSTCTR - Comparator hard block hysteresis control 0b00..Level 0 0b01..Level 1 0b10..Level 2 0b11..Level 3

Definition at line 9753 of file MIMXRT1062.h.

## ◆ CMP_CR0_HYSTCTR_MASK

#define CMP_CR0_HYSTCTR_MASK (0x3U)

Definition at line 9745 of file MIMXRT1062.h.

## ◆ CMP_CR0_HYSTCTR_SHIFT

#define CMP_CR0_HYSTCTR_SHIFT (0U)

Definition at line 9746 of file MIMXRT1062.h.

## ◆ CMP_CR1_COS

#define CMP_CR1_COS | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_COS_SHIFT)) & CMP_CR1_COS_MASK)

COS - Comparator Output Select 0b0..Set the filtered comparator output (CMPO) to equal COUT. 0b1..Set the unfiltered comparator output (CMPO) to equal COUTA.

Definition at line 9793 of file MIMXRT1062.h.

## ◆ CMP_CR1_COS_MASK

#define CMP_CR1_COS_MASK (0x4U)

Definition at line 9787 of file MIMXRT1062.h.

## ◆ CMP_CR1_COS_SHIFT

#define CMP_CR1_COS_SHIFT (2U)

Definition at line 9788 of file MIMXRT1062.h.

## ◆ CMP_CR1_EN

#define CMP_CR1_EN | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_EN_SHIFT)) & CMP_CR1_EN_MASK)

EN - Comparator Module Enable 0b0..Analog Comparator is disabled. 0b1..Analog Comparator is enabled.

Definition at line 9777 of file MIMXRT1062.h.

## ◆ CMP_CR1_EN_MASK

#define CMP_CR1_EN_MASK (0x1U)

Definition at line 9771 of file MIMXRT1062.h.

## ◆ CMP_CR1_EN_SHIFT

#define CMP_CR1_EN_SHIFT (0U)

Definition at line 9772 of file MIMXRT1062.h.

## ◆ CMP_CR1_INV

#define CMP_CR1_INV | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_INV_SHIFT)) & CMP_CR1_INV_MASK)

INV - Comparator INVERT 0b0..Does not invert the comparator output. 0b1..Inverts the comparator output.

Definition at line 9800 of file MIMXRT1062.h.

## ◆ CMP_CR1_INV_MASK

#define CMP_CR1_INV_MASK (0x8U)

Definition at line 9794 of file MIMXRT1062.h.

## ◆ CMP_CR1_INV_SHIFT

#define CMP_CR1_INV_SHIFT (3U)

Definition at line 9795 of file MIMXRT1062.h.

## ◆ CMP_CR1_OPE

#define CMP_CR1_OPE | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_OPE_SHIFT)) & CMP_CR1_OPE_MASK)

OPE - Comparator Output Pin Enable 0b0..CMPO is not available on the associated CMPO output pin. If the comparator does not own the pin, this field has no effect. 0b1..CMPO is available on the associated CMPO output pin. The comparator output (CMPO) is driven out on the associated CMPO output pin if the comparator owns the pin. If the comparator does not own the field, this bit has no effect.

Definition at line 9786 of file MIMXRT1062.h.

## ◆ CMP_CR1_OPE_MASK

#define CMP_CR1_OPE_MASK (0x2U)

Definition at line 9778 of file MIMXRT1062.h.

## ◆ CMP_CR1_OPE_SHIFT

#define CMP_CR1_OPE_SHIFT (1U)

Definition at line 9779 of file MIMXRT1062.h.

## ◆ CMP_CR1_PMODE

#define CMP_CR1_PMODE | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_PMODE_SHIFT)) & CMP_CR1_PMODE_MASK)

PMODE - Power Mode Select 0b0..Low-Speed (LS) Comparison mode selected. In this mode, CMP has slower output propagation delay and lower current consumption. 0b1..High-Speed (HS) Comparison mode selected. In this mode, CMP has faster output propagation delay and higher current consumption.

Definition at line 9807 of file MIMXRT1062.h.

## ◆ CMP_CR1_PMODE_MASK

#define CMP_CR1_PMODE_MASK (0x10U)

Definition at line 9801 of file MIMXRT1062.h.

## ◆ CMP_CR1_PMODE_SHIFT

#define CMP_CR1_PMODE_SHIFT (4U)

Definition at line 9802 of file MIMXRT1062.h.

## ◆ CMP_CR1_SE

#define CMP_CR1_SE | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_SE_SHIFT)) & CMP_CR1_SE_MASK)

SE - Sample Enable 0b0..Sampling mode is not selected. 0b1..Sampling mode is selected.

Definition at line 9821 of file MIMXRT1062.h.

## ◆ CMP_CR1_SE_MASK

#define CMP_CR1_SE_MASK (0x80U)

Definition at line 9815 of file MIMXRT1062.h.

## ◆ CMP_CR1_SE_SHIFT

#define CMP_CR1_SE_SHIFT (7U)

Definition at line 9816 of file MIMXRT1062.h.

## ◆ CMP_CR1_WE

#define CMP_CR1_WE | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_CR1_WE_SHIFT)) & CMP_CR1_WE_MASK)

WE - Windowing Enable 0b0..Windowing mode is not selected. 0b1..Windowing mode is selected.

Definition at line 9814 of file MIMXRT1062.h.

## ◆ CMP_CR1_WE_MASK

#define CMP_CR1_WE_MASK (0x40U)

Definition at line 9808 of file MIMXRT1062.h.

## ◆ CMP_CR1_WE_SHIFT

#define CMP_CR1_WE_SHIFT (6U)

Definition at line 9809 of file MIMXRT1062.h.

## ◆ CMP_DACCR_DACEN

#define CMP_DACCR_DACEN | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_DACEN_SHIFT)) & CMP_DACCR_DACEN_MASK)

DACEN - DAC Enable 0b0..DAC is disabled. 0b1..DAC is enabled.

Definition at line 9897 of file MIMXRT1062.h.

## ◆ CMP_DACCR_DACEN_MASK

#define CMP_DACCR_DACEN_MASK (0x80U)

Definition at line 9891 of file MIMXRT1062.h.

## ◆ CMP_DACCR_DACEN_SHIFT

#define CMP_DACCR_DACEN_SHIFT (7U)

Definition at line 9892 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VOSEL

#define CMP_DACCR_VOSEL | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VOSEL_SHIFT)) & CMP_DACCR_VOSEL_MASK)

VOSEL - DAC Output Voltage Select

Definition at line 9883 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VOSEL_MASK

#define CMP_DACCR_VOSEL_MASK (0x3FU)

Definition at line 9879 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VOSEL_SHIFT

#define CMP_DACCR_VOSEL_SHIFT (0U)

Definition at line 9880 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VRSEL

#define CMP_DACCR_VRSEL | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_DACCR_VRSEL_SHIFT)) & CMP_DACCR_VRSEL_MASK)

VRSEL - Supply Voltage Reference Source Select 0b0..Vin1 is selected as resistor ladder network supply reference. 0b1..Vin2 is selected as resistor ladder network supply reference.

Definition at line 9890 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VRSEL_MASK

#define CMP_DACCR_VRSEL_MASK (0x40U)

Definition at line 9884 of file MIMXRT1062.h.

## ◆ CMP_DACCR_VRSEL_SHIFT

#define CMP_DACCR_VRSEL_SHIFT (6U)

Definition at line 9885 of file MIMXRT1062.h.

## ◆ CMP_FPR_FILT_PER

#define CMP_FPR_FILT_PER | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_FPR_FILT_PER_SHIFT)) & CMP_FPR_FILT_PER_MASK)

FILT_PER - Filter Sample Period

Definition at line 9830 of file MIMXRT1062.h.

## ◆ CMP_FPR_FILT_PER_MASK

#define CMP_FPR_FILT_PER_MASK (0xFFU)

Definition at line 9826 of file MIMXRT1062.h.

## ◆ CMP_FPR_FILT_PER_SHIFT

#define CMP_FPR_FILT_PER_SHIFT (0U)

Definition at line 9827 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_MSEL

#define CMP_MUXCR_MSEL | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_MSEL_SHIFT)) & CMP_MUXCR_MSEL_MASK)

MSEL - Minus Input Mux Control 0b000..IN0 0b001..IN1 0b010..IN2 0b011..IN3 0b100..IN4 0b101..IN5 0b110..IN6 0b111..IN7

Definition at line 9914 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_MSEL_MASK

#define CMP_MUXCR_MSEL_MASK (0x7U)

Definition at line 9902 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_MSEL_SHIFT

#define CMP_MUXCR_MSEL_SHIFT (0U)

Definition at line 9903 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_PSEL

#define CMP_MUXCR_PSEL | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_MUXCR_PSEL_SHIFT)) & CMP_MUXCR_PSEL_MASK)

PSEL - Plus Input Mux Control 0b000..IN0 0b001..IN1 0b010..IN2 0b011..IN3 0b100..IN4 0b101..IN5 0b110..IN6 0b111..IN7

Definition at line 9927 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_PSEL_MASK

#define CMP_MUXCR_PSEL_MASK (0x38U)

Definition at line 9915 of file MIMXRT1062.h.

## ◆ CMP_MUXCR_PSEL_SHIFT

#define CMP_MUXCR_PSEL_SHIFT (3U)

Definition at line 9916 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFF

#define CMP_SCR_CFF | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFF_SHIFT)) & CMP_SCR_CFF_MASK)

CFF - Analog Comparator Flag Falling 0b0..Falling-edge on COUT has not been detected. 0b1..Falling-edge on COUT has occurred.

Definition at line 9846 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFF_MASK

#define CMP_SCR_CFF_MASK (0x2U)

Definition at line 9840 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFF_SHIFT

#define CMP_SCR_CFF_SHIFT (1U)

Definition at line 9841 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFR

#define CMP_SCR_CFR | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_CFR_SHIFT)) & CMP_SCR_CFR_MASK)

CFR - Analog Comparator Flag Rising 0b0..Rising-edge on COUT has not been detected. 0b1..Rising-edge on COUT has occurred.

Definition at line 9853 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFR_MASK

#define CMP_SCR_CFR_MASK (0x4U)

Definition at line 9847 of file MIMXRT1062.h.

## ◆ CMP_SCR_CFR_SHIFT

#define CMP_SCR_CFR_SHIFT (2U)

Definition at line 9848 of file MIMXRT1062.h.

## ◆ CMP_SCR_COUT

#define CMP_SCR_COUT | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_COUT_SHIFT)) & CMP_SCR_COUT_MASK)

COUT - Analog Comparator Output

Definition at line 9839 of file MIMXRT1062.h.

## ◆ CMP_SCR_COUT_MASK

#define CMP_SCR_COUT_MASK (0x1U)

Definition at line 9835 of file MIMXRT1062.h.

## ◆ CMP_SCR_COUT_SHIFT

#define CMP_SCR_COUT_SHIFT (0U)

Definition at line 9836 of file MIMXRT1062.h.

## ◆ CMP_SCR_DMAEN

#define CMP_SCR_DMAEN | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_DMAEN_SHIFT)) & CMP_SCR_DMAEN_MASK)

DMAEN - DMA Enable Control 0b0..DMA is disabled. 0b1..DMA is enabled.

Definition at line 9874 of file MIMXRT1062.h.

## ◆ CMP_SCR_DMAEN_MASK

#define CMP_SCR_DMAEN_MASK (0x40U)

Definition at line 9868 of file MIMXRT1062.h.

## ◆ CMP_SCR_DMAEN_SHIFT

#define CMP_SCR_DMAEN_SHIFT (6U)

Definition at line 9869 of file MIMXRT1062.h.

## ◆ CMP_SCR_IEF

#define CMP_SCR_IEF | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IEF_SHIFT)) & CMP_SCR_IEF_MASK)

IEF - Comparator Interrupt Enable Falling 0b0..Interrupt is disabled. 0b1..Interrupt is enabled.

Definition at line 9860 of file MIMXRT1062.h.

## ◆ CMP_SCR_IEF_MASK

#define CMP_SCR_IEF_MASK (0x8U)

Definition at line 9854 of file MIMXRT1062.h.

## ◆ CMP_SCR_IEF_SHIFT

#define CMP_SCR_IEF_SHIFT (3U)

Definition at line 9855 of file MIMXRT1062.h.

## ◆ CMP_SCR_IER

#define CMP_SCR_IER | ( |  | x | ) | (((uint8_t)(((uint8_t)(x)) << CMP_SCR_IER_SHIFT)) & CMP_SCR_IER_MASK)

IER - Comparator Interrupt Enable Rising 0b0..Interrupt is disabled. 0b1..Interrupt is enabled.

Definition at line 9867 of file MIMXRT1062.h.

## ◆ CMP_SCR_IER_MASK

#define CMP_SCR_IER_MASK (0x10U)

Definition at line 9861 of file MIMXRT1062.h.

## ◆ CMP_SCR_IER_SHIFT

#define CMP_SCR_IER_SHIFT (4U)

Definition at line 9862 of file MIMXRT1062.h.