Callisto4Bootloader: board/board.h Source File

Callisto4Bootloader

board.h
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1 /*
2 * Copyright 2018-2019 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #ifndef _BOARD_H_
9 #define _BOARD_H_
10
11 #include "clock_config.h"
12 #include "fsl_common.h"
13 #include "fsl_gpio.h"
14 #include "fsl_clock.h"
15
16 /*******************************************************************************
17 * Definitions
18 ******************************************************************************/
20 #define BOARD_NAME "MIMXRT1060-EVK"
21
22 /* The UART to use for debug messages. */
23 #define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
24 #define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART1
25 #define BOARD_DEBUG_UART_INSTANCE 1U
26
27 #define BOARD_DEBUG_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
28
29 #define BOARD_UART_IRQ LPUART1_IRQn
30 #define BOARD_UART_IRQ_HANDLER LPUART1_IRQHandler
31
32 #ifndef BOARD_DEBUG_UART_BAUDRATE
33 #define BOARD_DEBUG_UART_BAUDRATE (115200U)
34 #endif /* BOARD_DEBUG_UART_BAUDRATE */
35
37 #define LOGIC_LED_ON (0U)
38 #define LOGIC_LED_OFF (1U)
39 #ifndef BOARD_USER_LED_GPIO
40 //#define BOARD_USER_LED_GPIO GPIO1 for the eval board
41 #define BOARD_USER_LED_GPIO GPIO2
42 #endif
43 #ifndef BOARD_USER_LED_GPIO_PIN
44 #define BOARD_USER_LED_GPIO_PIN (9U)
45 #endif
46
47 #define USER_LED_INIT(output) \
48 GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, output); \
49 BOARD_USER_LED_GPIO->GDIR |= (1U << BOARD_USER_LED_GPIO_PIN)
50 #define USER_LED_ON() \
51 GPIO_PortClear(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN)
52 #define USER_LED_OFF() GPIO_PortSet(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN)
53 #define USER_LED_TOGGLE() \
54 GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, \
55 0x1 ^ GPIO_PinRead(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN))
58 #ifndef BOARD_USER_BUTTON_GPIO
59 #define BOARD_USER_BUTTON_GPIO GPIO5
60 #endif
61 #ifndef BOARD_USER_BUTTON_GPIO_PIN
62 #define BOARD_USER_BUTTON_GPIO_PIN (0U)
63 #endif
64 #define BOARD_USER_BUTTON_IRQ GPIO5_Combined_0_15_IRQn
65 #define BOARD_USER_BUTTON_IRQ_HANDLER GPIO5_Combined_0_15_IRQHandler
66 #define BOARD_USER_BUTTON_NAME "SW8"
67
69 #define BOARD_FLASH_SIZE (0x800000U)
70
72 #define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */
73
74 /* USB PHY condfiguration */
75 #define BOARD_USB_PHY_D_CAL (0x0CU)
76 #define BOARD_USB_PHY_TXCAL45DP (0x06U)
77 #define BOARD_USB_PHY_TXCAL45DM (0x06U)
78
79 #define BOARD_ARDUINO_INT_IRQ (GPIO1_INT3_IRQn)
80 #define BOARD_ARDUINO_I2C_IRQ (LPI2C1_IRQn)
81 #define BOARD_ARDUINO_I2C_INDEX (1)
82 #define BOARD_USDHC1_BASEADDR USDHC1
83 #define BOARD_USDHC2_BASEADDR USDHC2
84 #define BOARD_USDHC_CD_GPIO_BASE GPIO2
85 #define BOARD_USDHC_CD_GPIO_PIN 28
86 #define BOARD_USDHC_CD_PORT_IRQ GPIO2_Combined_16_31_IRQn
87 #define BOARD_USDHC_CD_PORT_IRQ_HANDLER GPIO2_Combined_16_31_IRQHandler
88
89 #define BOARD_USDHC_CD_STATUS() (GPIO_PinRead(BOARD_USDHC_CD_GPIO_BASE, BOARD_USDHC_CD_GPIO_PIN))
90
91 #define BOARD_USDHC_CD_INTERRUPT_STATUS() (GPIO_PortGetInterruptFlags(BOARD_USDHC_CD_GPIO_BASE))
92 #define BOARD_USDHC_CD_CLEAR_INTERRUPT(flag) (GPIO_PortClearInterruptFlags(BOARD_USDHC_CD_GPIO_BASE, flag))
93
94 #define BOARD_USDHC_CD_GPIO_INIT() \
95 { \
96 gpio_pin_config_t sw_config = { \
97 kGPIO_DigitalInput, \
98 0, \
99 kGPIO_IntRisingOrFallingEdge, \
100 }; \
101 GPIO_PinInit(BOARD_USDHC_CD_GPIO_BASE, BOARD_USDHC_CD_GPIO_PIN, &sw_config); \
102 GPIO_PortEnableInterrupts(BOARD_USDHC_CD_GPIO_BASE, 1U << BOARD_USDHC_CD_GPIO_PIN); \
103 GPIO_PortClearInterruptFlags(BOARD_USDHC_CD_GPIO_BASE, ~0); \
104 }
105 #define BOARD_HAS_SDCARD (1U)
106 #define BOARD_SD_POWER_RESET_GPIO (GPIO1)
107 #define BOARD_SD_POWER_RESET_GPIO_PIN (19U)
108
109 #define BOARD_USDHC_CARD_INSERT_CD_LEVEL (0U)
110
111 #define BOARD_USDHC_MMCCARD_POWER_CONTROL(state)
112
113 #define BOARD_USDHC_MMCCARD_POWER_CONTROL_INIT() \
114 { \
115 gpio_pin_config_t sw_config = { \
116 kGPIO_DigitalOutput, \
117 0, \
118 kGPIO_NoIntmode, \
119 }; \
120 GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config); \
121 GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, true); \
122 }
123
124 #define BOARD_USDHC_SDCARD_POWER_CONTROL_INIT() \
125 { \
126 gpio_pin_config_t sw_config = { \
127 kGPIO_DigitalOutput, \
128 0, \
129 kGPIO_NoIntmode, \
130 }; \
131 GPIO_PinInit(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, &sw_config); \
132 }
133
134 #define BOARD_USDHC_SDCARD_POWER_CONTROL(state) \
135 (GPIO_PinWrite(BOARD_SD_POWER_RESET_GPIO, BOARD_SD_POWER_RESET_GPIO_PIN, state))
136
137 #define BOARD_USDHC1_CLK_FREQ (CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) / (CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U))
138 #define BOARD_USDHC2_CLK_FREQ (CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) / (CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U))
139
140 #define BOARD_SD_HOST_BASEADDR BOARD_USDHC1_BASEADDR
141 #define BOARD_SD_HOST_CLK_FREQ BOARD_USDHC1_CLK_FREQ
142 #define BOARD_SD_HOST_IRQ USDHC1_IRQn
143
144 #define BOARD_MMC_HOST_BASEADDR BOARD_USDHC2_BASEADDR
145 #define BOARD_MMC_HOST_CLK_FREQ BOARD_USDHC2_CLK_FREQ
146 #define BOARD_MMC_HOST_IRQ USDHC2_IRQn
147 #define BOARD_MMC_VCCQ_SUPPLY kMMC_VoltageWindow170to195
148 #define BOARD_MMC_VCC_SUPPLY kMMC_VoltageWindows270to360
149 /* we are using the BB SD socket to DEMO the MMC example,but the
150 * SD socket provide 4bit bus only, so we define this macro to avoid
151 * 8bit data bus test
152 */
153 #define BOARD_MMC_SUPPORT_8BIT_BUS (1U)
154
155 #define BOARD_SD_HOST_SUPPORT_SDR104_FREQ (200000000U)
156 #define BOARD_SD_HOST_SUPPORT_HS200_FREQ (180000000U)
157
159 #define BOARD_INITGT202SHIELD_PWRON_GPIO GPIO1
160 #define BOARD_INITGT202SHIELD_PWRON_PORT 1U
161 #define BOARD_INITGT202SHIELD_PWRON_GPIO_PIN 3U
162 #define BOARD_INITGT202SHIELD_PWRON_PIN_NAME GPIO1_3
163 #define BOARD_INITGT202SHIELD_PWRON_LABEL "PWRON"
164 #define BOARD_INITGT202SHIELD_PWRON_NAME "PWRON"
165 #define BOARD_INITGT202SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput
167 #define BOARD_INITGT202SHIELD_IRQ_GPIO GPIO1
168 #define BOARD_INITGT202SHIELD_IRQ_PORT 1U
169 #define BOARD_INITGT202SHIELD_IRQ_GPIO_PIN 19U
170 #define BOARD_INITGT202SHIELD_IRQ_PIN_NAME GPIO1_19
171 #define BOARD_INITGT202SHIELD_IRQ_LABEL "IRQ"
172 #define BOARD_INITGT202SHIELD_IRQ_NAME "IRQ"
173 #define BOARD_INITGT202SHIELD_IRQ_DIRECTION kGPIO_DigitalInput
175 #define BOARD_INITSILEX2401SHIELD_PWRON_GPIO GPIO1
176 #define BOARD_INITSILEX2401SHIELD_PWRON_PORT 1U
177 #define BOARD_INITSILEX2401SHIELD_PWRON_GPIO_PIN 9U
178 #define BOARD_INITSILEX2401SHIELD_PWRON_PIN_NAME GPIO1_9
179 #define BOARD_INITSILEX2401SHIELD_PWRON_LABEL "PWRON"
180 #define BOARD_INITSILEX2401SHIELD_PWRON_NAME "PWRON"
181 #define BOARD_INITSILEX2401SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput
183 #define BOARD_INITSILEX2401SHIELD_IRQ_GPIO GPIO1
184 #define BOARD_INITSILEX2401SHIELD_IRQ_PORT 1U
185 #define BOARD_INITSILEX2401SHIELD_IRQ_GPIO_PIN 11U
186 #define BOARD_INITSILEX2401SHIELD_IRQ_PIN_NAME GPIO1_11
187 #define BOARD_INITSILEX2401SHIELD_IRQ_LABEL "IRQ"
188 #define BOARD_INITSILEX2401SHIELD_IRQ_NAME "IRQ"
189 #define BOARD_INITSILEX2401SHIELD_IRQ_DIRECTION kGPIO_DigitalInput
191 /* @Brief Board accelerator sensor configuration */
192 #define BOARD_ACCEL_I2C_BASEADDR LPI2C1
193 /* Select USB1 PLL (480 MHz) as LPI2C's clock source */
194 #define BOARD_ACCEL_I2C_CLOCK_SOURCE_SELECT (0U)
195 /* Clock divider for LPI2C clock source */
196 #define BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER (5U)
197 #define BOARD_ACCEL_I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER + 1U))
198
199 #define BOARD_CODEC_I2C_BASEADDR LPI2C1
200 #define BOARD_CODEC_I2C_INSTANCE 1U
201 #define BOARD_CODEC_I2C_CLOCK_SOURCE_SELECT (0U)
202 #define BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER (5U)
203 #define BOARD_CODEC_I2C_CLOCK_FREQ (10000000U)
204
205 /* @Brief Board CAMERA configuration */
206 #define BOARD_CAMERA_I2C_BASEADDR LPI2C1
207 #define BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER (5U)
208 #define BOARD_CAMERA_I2C_CLOCK_SOURCE_SELECT (0U) /* Select USB1 PLL (480 MHz) as LPI2C's clock source */
209 #define BOARD_CAMERA_I2C_CLOCK_FREQ \
210 (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER + 1U))
211
212 #define BOARD_CAMERA_I2C_SCL_GPIO GPIO1
213 #define BOARD_CAMERA_I2C_SCL_PIN 16
214 #define BOARD_CAMERA_I2C_SDA_GPIO GPIO1
215 #define BOARD_CAMERA_I2C_SDA_PIN 17
216 #define BOARD_CAMERA_PWDN_GPIO GPIO1
217 #define BOARD_CAMERA_PWDN_PIN 4
218
219 /* @Brief Board Bluetooth HCI UART configuration */
220 #define BOARD_BT_UART_BASEADDR LPUART3
221 #define BOARD_BT_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
222 #define BOARD_BT_UART_IRQ LPUART3_IRQn
223 #define BOARD_BT_UART_IRQ_HANDLER LPUART3_IRQHandler
224
225 #if defined(__cplusplus)
226 extern "C" {
227 #endif /* __cplusplus */
228
229 /*******************************************************************************
230 * API
231 ******************************************************************************/
232 uint32_t BOARD_DebugConsoleSrcFreq(void);
233
234 void BOARD_InitDebugConsole(void);
235
236 void BOARD_ConfigMPU(void);
237 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
238 void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz);
239 status_t BOARD_LPI2C_Send(LPI2C_Type *base,
240 uint8_t deviceAddress,
241 uint32_t subAddress,
242 uint8_t subaddressSize,
243 uint8_t *txBuff,
244 uint8_t txBuffSize);
245 status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
246 uint8_t deviceAddress,
247 uint32_t subAddress,
248 uint8_t subaddressSize,
249 uint8_t *rxBuff,
250 uint8_t rxBuffSize);
251 status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
252 uint8_t deviceAddress,
253 uint32_t subAddress,
254 uint8_t subaddressSize,
255 uint8_t *txBuff,
256 uint8_t txBuffSize);
257 status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
258 uint8_t deviceAddress,
259 uint32_t subAddress,
260 uint8_t subaddressSize,
261 uint8_t *rxBuff,
262 uint8_t rxBuffSize);
263 void BOARD_Accel_I2C_Init(void);
264 status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
265 status_t BOARD_Accel_I2C_Receive(
266 uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
267 void BOARD_Codec_I2C_Init(void);
268 status_t BOARD_Codec_I2C_Send(
269 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
270 status_t BOARD_Codec_I2C_Receive(
271 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
272 void BOARD_Camera_I2C_Init(void);
273 status_t BOARD_Camera_I2C_Send(
274 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
275 status_t BOARD_Camera_I2C_Receive(
276 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
277
278 status_t BOARD_Camera_I2C_SendSCCB(
279 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
280 status_t BOARD_Camera_I2C_ReceiveSCCB(
281 uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
282 #endif /* SDK_I2C_BASED_COMPONENT_USED */
283
284 void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength);
285 void BOARD_MMC_Pin_Config(uint32_t speed, uint32_t strength);
286
287 #if defined(__cplusplus)
288 }
289 #endif /* __cplusplus */
290
291 #endif /* _BOARD_H_ */
LPI2C_Type
Definition: MIMXRT1062.h:26674
clock_config.h
BOARD_MMC_Pin_Config
void BOARD_MMC_Pin_Config(uint32_t speed, uint32_t strength)
Definition: board.c:405
BOARD_DebugConsoleSrcFreq
uint32_t BOARD_DebugConsoleSrcFreq(void)
Definition: board.c:22
BOARD_SD_Pin_Config
void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength)
Definition: board.c:372
BOARD_InitDebugConsole
void BOARD_InitDebugConsole(void)
Definition: board.c:41
BOARD_ConfigMPU
void BOARD_ConfigMPU(void)
Definition: board.c:233