Callisto4Bootloader: PMU_Type Struct Reference

Callisto4Bootloader

Data Fields
PMU_Type Struct Reference
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » PMU Peripheral Access Layer

`#include <MIMXRT1062.h>`

## Data Fields

uint8_t | RESERVED_0 [272]
__IO uint32_t | REG_1P1
__IO uint32_t | REG_1P1_SET
__IO uint32_t | REG_1P1_CLR
__IO uint32_t | REG_1P1_TOG
__IO uint32_t | REG_3P0
__IO uint32_t | REG_3P0_SET
__IO uint32_t | REG_3P0_CLR
__IO uint32_t | REG_3P0_TOG
__IO uint32_t | REG_2P5
__IO uint32_t | REG_2P5_SET
__IO uint32_t | REG_2P5_CLR
__IO uint32_t | REG_2P5_TOG
__IO uint32_t | REG_CORE
__IO uint32_t | REG_CORE_SET
__IO uint32_t | REG_CORE_CLR
__IO uint32_t | REG_CORE_TOG
__IO uint32_t | MISC0
__IO uint32_t | MISC0_SET
__IO uint32_t | MISC0_CLR
__IO uint32_t | MISC0_TOG
__IO uint32_t | MISC1
__IO uint32_t | MISC1_SET
__IO uint32_t | MISC1_CLR
__IO uint32_t | MISC1_TOG
__IO uint32_t | MISC2
__IO uint32_t | MISC2_SET
__IO uint32_t | MISC2_CLR
__IO uint32_t | MISC2_TOG

## Detailed Description

PMU - Register Layout Typedef

Definition at line 30884 of file MIMXRT1062.h.

The documentation for this struct was generated from the following file:

- device/MIMXRT1062.h