Callisto4Bootloader: LPI2C Register Masks

Callisto4Bootloader

LPI2C Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » LPI2C Peripheral Access Layer

## VERID - Version ID Register

#define | LPI2C_VERID_FEATURE_MASK (0xFFFFU)
#define | LPI2C_VERID_FEATURE_SHIFT (0U)
#define | LPI2C_VERID_FEATURE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
#define | LPI2C_VERID_MINOR_MASK (0xFF0000U)
#define | LPI2C_VERID_MINOR_SHIFT (16U)
#define | LPI2C_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
#define | LPI2C_VERID_MAJOR_MASK (0xFF000000U)
#define | LPI2C_VERID_MAJOR_SHIFT (24U)
#define | LPI2C_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)

## PARAM - Parameter Register

#define | LPI2C_PARAM_MTXFIFO_MASK (0xFU)
#define | LPI2C_PARAM_MTXFIFO_SHIFT (0U)
#define | LPI2C_PARAM_MTXFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
#define | LPI2C_PARAM_MRXFIFO_MASK (0xF00U)
#define | LPI2C_PARAM_MRXFIFO_SHIFT (8U)
#define | LPI2C_PARAM_MRXFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)

## MCR - Master Control Register

#define | LPI2C_MCR_MEN_MASK (0x1U)
#define | LPI2C_MCR_MEN_SHIFT (0U)
#define | LPI2C_MCR_MEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
#define | LPI2C_MCR_RST_MASK (0x2U)
#define | LPI2C_MCR_RST_SHIFT (1U)
#define | LPI2C_MCR_RST(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
#define | LPI2C_MCR_DOZEN_MASK (0x4U)
#define | LPI2C_MCR_DOZEN_SHIFT (2U)
#define | LPI2C_MCR_DOZEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)
#define | LPI2C_MCR_DBGEN_MASK (0x8U)
#define | LPI2C_MCR_DBGEN_SHIFT (3U)
#define | LPI2C_MCR_DBGEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)
#define | LPI2C_MCR_RTF_MASK (0x100U)
#define | LPI2C_MCR_RTF_SHIFT (8U)
#define | LPI2C_MCR_RTF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)
#define | LPI2C_MCR_RRF_MASK (0x200U)
#define | LPI2C_MCR_RRF_SHIFT (9U)
#define | LPI2C_MCR_RRF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)

## MSR - Master Status Register

#define | LPI2C_MSR_TDF_MASK (0x1U)
#define | LPI2C_MSR_TDF_SHIFT (0U)
#define | LPI2C_MSR_TDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)
#define | LPI2C_MSR_RDF_MASK (0x2U)
#define | LPI2C_MSR_RDF_SHIFT (1U)
#define | LPI2C_MSR_RDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)
#define | LPI2C_MSR_EPF_MASK (0x100U)
#define | LPI2C_MSR_EPF_SHIFT (8U)
#define | LPI2C_MSR_EPF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)
#define | LPI2C_MSR_SDF_MASK (0x200U)
#define | LPI2C_MSR_SDF_SHIFT (9U)
#define | LPI2C_MSR_SDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)
#define | LPI2C_MSR_NDF_MASK (0x400U)
#define | LPI2C_MSR_NDF_SHIFT (10U)
#define | LPI2C_MSR_NDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)
#define | LPI2C_MSR_ALF_MASK (0x800U)
#define | LPI2C_MSR_ALF_SHIFT (11U)
#define | LPI2C_MSR_ALF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)
#define | LPI2C_MSR_FEF_MASK (0x1000U)
#define | LPI2C_MSR_FEF_SHIFT (12U)
#define | LPI2C_MSR_FEF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)
#define | LPI2C_MSR_PLTF_MASK (0x2000U)
#define | LPI2C_MSR_PLTF_SHIFT (13U)
#define | LPI2C_MSR_PLTF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)
#define | LPI2C_MSR_DMF_MASK (0x4000U)
#define | LPI2C_MSR_DMF_SHIFT (14U)
#define | LPI2C_MSR_DMF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)
#define | LPI2C_MSR_MBF_MASK (0x1000000U)
#define | LPI2C_MSR_MBF_SHIFT (24U)
#define | LPI2C_MSR_MBF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)
#define | LPI2C_MSR_BBF_MASK (0x2000000U)
#define | LPI2C_MSR_BBF_SHIFT (25U)
#define | LPI2C_MSR_BBF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)

## MIER - Master Interrupt Enable Register

#define | LPI2C_MIER_TDIE_MASK (0x1U)
#define | LPI2C_MIER_TDIE_SHIFT (0U)
#define | LPI2C_MIER_TDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)
#define | LPI2C_MIER_RDIE_MASK (0x2U)
#define | LPI2C_MIER_RDIE_SHIFT (1U)
#define | LPI2C_MIER_RDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)
#define | LPI2C_MIER_EPIE_MASK (0x100U)
#define | LPI2C_MIER_EPIE_SHIFT (8U)
#define | LPI2C_MIER_EPIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)
#define | LPI2C_MIER_SDIE_MASK (0x200U)
#define | LPI2C_MIER_SDIE_SHIFT (9U)
#define | LPI2C_MIER_SDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)
#define | LPI2C_MIER_NDIE_MASK (0x400U)
#define | LPI2C_MIER_NDIE_SHIFT (10U)
#define | LPI2C_MIER_NDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)
#define | LPI2C_MIER_ALIE_MASK (0x800U)
#define | LPI2C_MIER_ALIE_SHIFT (11U)
#define | LPI2C_MIER_ALIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)
#define | LPI2C_MIER_FEIE_MASK (0x1000U)
#define | LPI2C_MIER_FEIE_SHIFT (12U)
#define | LPI2C_MIER_FEIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)
#define | LPI2C_MIER_PLTIE_MASK (0x2000U)
#define | LPI2C_MIER_PLTIE_SHIFT (13U)
#define | LPI2C_MIER_PLTIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)
#define | LPI2C_MIER_DMIE_MASK (0x4000U)
#define | LPI2C_MIER_DMIE_SHIFT (14U)
#define | LPI2C_MIER_DMIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)

## MDER - Master DMA Enable Register

#define | LPI2C_MDER_TDDE_MASK (0x1U)
#define | LPI2C_MDER_TDDE_SHIFT (0U)
#define | LPI2C_MDER_TDDE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)
#define | LPI2C_MDER_RDDE_MASK (0x2U)
#define | LPI2C_MDER_RDDE_SHIFT (1U)
#define | LPI2C_MDER_RDDE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)

## MCFGR0 - Master Configuration Register 0

#define | LPI2C_MCFGR0_HREN_MASK (0x1U)
#define | LPI2C_MCFGR0_HREN_SHIFT (0U)
#define | LPI2C_MCFGR0_HREN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)
#define | LPI2C_MCFGR0_HRPOL_MASK (0x2U)
#define | LPI2C_MCFGR0_HRPOL_SHIFT (1U)
#define | LPI2C_MCFGR0_HRPOL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)
#define | LPI2C_MCFGR0_HRSEL_MASK (0x4U)
#define | LPI2C_MCFGR0_HRSEL_SHIFT (2U)
#define | LPI2C_MCFGR0_HRSEL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)
#define | LPI2C_MCFGR0_CIRFIFO_MASK (0x100U)
#define | LPI2C_MCFGR0_CIRFIFO_SHIFT (8U)
#define | LPI2C_MCFGR0_CIRFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)
#define | LPI2C_MCFGR0_RDMO_MASK (0x200U)
#define | LPI2C_MCFGR0_RDMO_SHIFT (9U)
#define | LPI2C_MCFGR0_RDMO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)

## MCFGR1 - Master Configuration Register 1

#define | LPI2C_MCFGR1_PRESCALE_MASK (0x7U)
#define | LPI2C_MCFGR1_PRESCALE_SHIFT (0U)
#define | LPI2C_MCFGR1_PRESCALE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)
#define | LPI2C_MCFGR1_AUTOSTOP_MASK (0x100U)
#define | LPI2C_MCFGR1_AUTOSTOP_SHIFT (8U)
#define | LPI2C_MCFGR1_AUTOSTOP(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)
#define | LPI2C_MCFGR1_IGNACK_MASK (0x200U)
#define | LPI2C_MCFGR1_IGNACK_SHIFT (9U)
#define | LPI2C_MCFGR1_IGNACK(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)
#define | LPI2C_MCFGR1_TIMECFG_MASK (0x400U)
#define | LPI2C_MCFGR1_TIMECFG_SHIFT (10U)
#define | LPI2C_MCFGR1_TIMECFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)
#define | LPI2C_MCFGR1_MATCFG_MASK (0x70000U)
#define | LPI2C_MCFGR1_MATCFG_SHIFT (16U)
#define | LPI2C_MCFGR1_MATCFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)
#define | LPI2C_MCFGR1_PINCFG_MASK (0x7000000U)
#define | LPI2C_MCFGR1_PINCFG_SHIFT (24U)
#define | LPI2C_MCFGR1_PINCFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)

## MCFGR2 - Master Configuration Register 2

#define | LPI2C_MCFGR2_BUSIDLE_MASK (0xFFFU)
#define | LPI2C_MCFGR2_BUSIDLE_SHIFT (0U)
#define | LPI2C_MCFGR2_BUSIDLE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)
#define | LPI2C_MCFGR2_FILTSCL_MASK (0xF0000U)
#define | LPI2C_MCFGR2_FILTSCL_SHIFT (16U)
#define | LPI2C_MCFGR2_FILTSCL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)
#define | LPI2C_MCFGR2_FILTSDA_MASK (0xF000000U)
#define | LPI2C_MCFGR2_FILTSDA_SHIFT (24U)
#define | LPI2C_MCFGR2_FILTSDA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)

## MCFGR3 - Master Configuration Register 3

#define | LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U)
#define | LPI2C_MCFGR3_PINLOW_SHIFT (8U)
#define | LPI2C_MCFGR3_PINLOW(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)

## MDMR - Master Data Match Register

#define | LPI2C_MDMR_MATCH0_MASK (0xFFU)
#define | LPI2C_MDMR_MATCH0_SHIFT (0U)
#define | LPI2C_MDMR_MATCH0(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)
#define | LPI2C_MDMR_MATCH1_MASK (0xFF0000U)
#define | LPI2C_MDMR_MATCH1_SHIFT (16U)
#define | LPI2C_MDMR_MATCH1(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)

## MCCR0 - Master Clock Configuration Register 0

#define | LPI2C_MCCR0_CLKLO_MASK (0x3FU)
#define | LPI2C_MCCR0_CLKLO_SHIFT (0U)
#define | LPI2C_MCCR0_CLKLO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)
#define | LPI2C_MCCR0_CLKHI_MASK (0x3F00U)
#define | LPI2C_MCCR0_CLKHI_SHIFT (8U)
#define | LPI2C_MCCR0_CLKHI(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)
#define | LPI2C_MCCR0_SETHOLD_MASK (0x3F0000U)
#define | LPI2C_MCCR0_SETHOLD_SHIFT (16U)
#define | LPI2C_MCCR0_SETHOLD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)
#define | LPI2C_MCCR0_DATAVD_MASK (0x3F000000U)
#define | LPI2C_MCCR0_DATAVD_SHIFT (24U)
#define | LPI2C_MCCR0_DATAVD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)

## MCCR1 - Master Clock Configuration Register 1

#define | LPI2C_MCCR1_CLKLO_MASK (0x3FU)
#define | LPI2C_MCCR1_CLKLO_SHIFT (0U)
#define | LPI2C_MCCR1_CLKLO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)
#define | LPI2C_MCCR1_CLKHI_MASK (0x3F00U)
#define | LPI2C_MCCR1_CLKHI_SHIFT (8U)
#define | LPI2C_MCCR1_CLKHI(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)
#define | LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U)
#define | LPI2C_MCCR1_SETHOLD_SHIFT (16U)
#define | LPI2C_MCCR1_SETHOLD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)
#define | LPI2C_MCCR1_DATAVD_MASK (0x3F000000U)
#define | LPI2C_MCCR1_DATAVD_SHIFT (24U)
#define | LPI2C_MCCR1_DATAVD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)

## MFCR - Master FIFO Control Register

#define | LPI2C_MFCR_TXWATER_MASK (0x3U)
#define | LPI2C_MFCR_TXWATER_SHIFT (0U)
#define | LPI2C_MFCR_TXWATER(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)
#define | LPI2C_MFCR_RXWATER_MASK (0x30000U)
#define | LPI2C_MFCR_RXWATER_SHIFT (16U)
#define | LPI2C_MFCR_RXWATER(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)

## MFSR - Master FIFO Status Register

#define | LPI2C_MFSR_TXCOUNT_MASK (0x7U)
#define | LPI2C_MFSR_TXCOUNT_SHIFT (0U)
#define | LPI2C_MFSR_TXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)
#define | LPI2C_MFSR_RXCOUNT_MASK (0x70000U)
#define | LPI2C_MFSR_RXCOUNT_SHIFT (16U)
#define | LPI2C_MFSR_RXCOUNT(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)

## MTDR - Master Transmit Data Register

#define | LPI2C_MTDR_DATA_MASK (0xFFU)
#define | LPI2C_MTDR_DATA_SHIFT (0U)
#define | LPI2C_MTDR_DATA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)
#define | LPI2C_MTDR_CMD_MASK (0x700U)
#define | LPI2C_MTDR_CMD_SHIFT (8U)
#define | LPI2C_MTDR_CMD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)

## MRDR - Master Receive Data Register

#define | LPI2C_MRDR_DATA_MASK (0xFFU)
#define | LPI2C_MRDR_DATA_SHIFT (0U)
#define | LPI2C_MRDR_DATA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)
#define | LPI2C_MRDR_RXEMPTY_MASK (0x4000U)
#define | LPI2C_MRDR_RXEMPTY_SHIFT (14U)
#define | LPI2C_MRDR_RXEMPTY(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)

## SCR - Slave Control Register

#define | LPI2C_SCR_SEN_MASK (0x1U)
#define | LPI2C_SCR_SEN_SHIFT (0U)
#define | LPI2C_SCR_SEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)
#define | LPI2C_SCR_RST_MASK (0x2U)
#define | LPI2C_SCR_RST_SHIFT (1U)
#define | LPI2C_SCR_RST(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)
#define | LPI2C_SCR_FILTEN_MASK (0x10U)
#define | LPI2C_SCR_FILTEN_SHIFT (4U)
#define | LPI2C_SCR_FILTEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)
#define | LPI2C_SCR_FILTDZ_MASK (0x20U)
#define | LPI2C_SCR_FILTDZ_SHIFT (5U)
#define | LPI2C_SCR_FILTDZ(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)
#define | LPI2C_SCR_RTF_MASK (0x100U)
#define | LPI2C_SCR_RTF_SHIFT (8U)
#define | LPI2C_SCR_RTF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)
#define | LPI2C_SCR_RRF_MASK (0x200U)
#define | LPI2C_SCR_RRF_SHIFT (9U)
#define | LPI2C_SCR_RRF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)

## SSR - Slave Status Register

#define | LPI2C_SSR_TDF_MASK (0x1U)
#define | LPI2C_SSR_TDF_SHIFT (0U)
#define | LPI2C_SSR_TDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)
#define | LPI2C_SSR_RDF_MASK (0x2U)
#define | LPI2C_SSR_RDF_SHIFT (1U)
#define | LPI2C_SSR_RDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)
#define | LPI2C_SSR_AVF_MASK (0x4U)
#define | LPI2C_SSR_AVF_SHIFT (2U)
#define | LPI2C_SSR_AVF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)
#define | LPI2C_SSR_TAF_MASK (0x8U)
#define | LPI2C_SSR_TAF_SHIFT (3U)
#define | LPI2C_SSR_TAF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)
#define | LPI2C_SSR_RSF_MASK (0x100U)
#define | LPI2C_SSR_RSF_SHIFT (8U)
#define | LPI2C_SSR_RSF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)
#define | LPI2C_SSR_SDF_MASK (0x200U)
#define | LPI2C_SSR_SDF_SHIFT (9U)
#define | LPI2C_SSR_SDF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)
#define | LPI2C_SSR_BEF_MASK (0x400U)
#define | LPI2C_SSR_BEF_SHIFT (10U)
#define | LPI2C_SSR_BEF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)
#define | LPI2C_SSR_FEF_MASK (0x800U)
#define | LPI2C_SSR_FEF_SHIFT (11U)
#define | LPI2C_SSR_FEF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)
#define | LPI2C_SSR_AM0F_MASK (0x1000U)
#define | LPI2C_SSR_AM0F_SHIFT (12U)
#define | LPI2C_SSR_AM0F(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)
#define | LPI2C_SSR_AM1F_MASK (0x2000U)
#define | LPI2C_SSR_AM1F_SHIFT (13U)
#define | LPI2C_SSR_AM1F(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)
#define | LPI2C_SSR_GCF_MASK (0x4000U)
#define | LPI2C_SSR_GCF_SHIFT (14U)
#define | LPI2C_SSR_GCF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)
#define | LPI2C_SSR_SARF_MASK (0x8000U)
#define | LPI2C_SSR_SARF_SHIFT (15U)
#define | LPI2C_SSR_SARF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)
#define | LPI2C_SSR_SBF_MASK (0x1000000U)
#define | LPI2C_SSR_SBF_SHIFT (24U)
#define | LPI2C_SSR_SBF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)
#define | LPI2C_SSR_BBF_MASK (0x2000000U)
#define | LPI2C_SSR_BBF_SHIFT (25U)
#define | LPI2C_SSR_BBF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)

## SIER - Slave Interrupt Enable Register

#define | LPI2C_SIER_TDIE_MASK (0x1U)
#define | LPI2C_SIER_TDIE_SHIFT (0U)
#define | LPI2C_SIER_TDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)
#define | LPI2C_SIER_RDIE_MASK (0x2U)
#define | LPI2C_SIER_RDIE_SHIFT (1U)
#define | LPI2C_SIER_RDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)
#define | LPI2C_SIER_AVIE_MASK (0x4U)
#define | LPI2C_SIER_AVIE_SHIFT (2U)
#define | LPI2C_SIER_AVIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)
#define | LPI2C_SIER_TAIE_MASK (0x8U)
#define | LPI2C_SIER_TAIE_SHIFT (3U)
#define | LPI2C_SIER_TAIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)
#define | LPI2C_SIER_RSIE_MASK (0x100U)
#define | LPI2C_SIER_RSIE_SHIFT (8U)
#define | LPI2C_SIER_RSIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)
#define | LPI2C_SIER_SDIE_MASK (0x200U)
#define | LPI2C_SIER_SDIE_SHIFT (9U)
#define | LPI2C_SIER_SDIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)
#define | LPI2C_SIER_BEIE_MASK (0x400U)
#define | LPI2C_SIER_BEIE_SHIFT (10U)
#define | LPI2C_SIER_BEIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)
#define | LPI2C_SIER_FEIE_MASK (0x800U)
#define | LPI2C_SIER_FEIE_SHIFT (11U)
#define | LPI2C_SIER_FEIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)
#define | LPI2C_SIER_AM0IE_MASK (0x1000U)
#define | LPI2C_SIER_AM0IE_SHIFT (12U)
#define | LPI2C_SIER_AM0IE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)
#define | LPI2C_SIER_AM1F_MASK (0x2000U)
#define | LPI2C_SIER_AM1F_SHIFT (13U)
#define | LPI2C_SIER_AM1F(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)
#define | LPI2C_SIER_GCIE_MASK (0x4000U)
#define | LPI2C_SIER_GCIE_SHIFT (14U)
#define | LPI2C_SIER_GCIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)
#define | LPI2C_SIER_SARIE_MASK (0x8000U)
#define | LPI2C_SIER_SARIE_SHIFT (15U)
#define | LPI2C_SIER_SARIE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)

## SDER - Slave DMA Enable Register

#define | LPI2C_SDER_TDDE_MASK (0x1U)
#define | LPI2C_SDER_TDDE_SHIFT (0U)
#define | LPI2C_SDER_TDDE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)
#define | LPI2C_SDER_RDDE_MASK (0x2U)
#define | LPI2C_SDER_RDDE_SHIFT (1U)
#define | LPI2C_SDER_RDDE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)
#define | LPI2C_SDER_AVDE_MASK (0x4U)
#define | LPI2C_SDER_AVDE_SHIFT (2U)
#define | LPI2C_SDER_AVDE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)

## SCFGR1 - Slave Configuration Register 1

#define | LPI2C_SCFGR1_ADRSTALL_MASK (0x1U)
#define | LPI2C_SCFGR1_ADRSTALL_SHIFT (0U)
#define | LPI2C_SCFGR1_ADRSTALL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)
#define | LPI2C_SCFGR1_RXSTALL_MASK (0x2U)
#define | LPI2C_SCFGR1_RXSTALL_SHIFT (1U)
#define | LPI2C_SCFGR1_RXSTALL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)
#define | LPI2C_SCFGR1_TXDSTALL_MASK (0x4U)
#define | LPI2C_SCFGR1_TXDSTALL_SHIFT (2U)
#define | LPI2C_SCFGR1_TXDSTALL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)
#define | LPI2C_SCFGR1_ACKSTALL_MASK (0x8U)
#define | LPI2C_SCFGR1_ACKSTALL_SHIFT (3U)
#define | LPI2C_SCFGR1_ACKSTALL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)
#define | LPI2C_SCFGR1_GCEN_MASK (0x100U)
#define | LPI2C_SCFGR1_GCEN_SHIFT (8U)
#define | LPI2C_SCFGR1_GCEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)
#define | LPI2C_SCFGR1_SAEN_MASK (0x200U)
#define | LPI2C_SCFGR1_SAEN_SHIFT (9U)
#define | LPI2C_SCFGR1_SAEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)
#define | LPI2C_SCFGR1_TXCFG_MASK (0x400U)
#define | LPI2C_SCFGR1_TXCFG_SHIFT (10U)
#define | LPI2C_SCFGR1_TXCFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)
#define | LPI2C_SCFGR1_RXCFG_MASK (0x800U)
#define | LPI2C_SCFGR1_RXCFG_SHIFT (11U)
#define | LPI2C_SCFGR1_RXCFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)
#define | LPI2C_SCFGR1_IGNACK_MASK (0x1000U)
#define | LPI2C_SCFGR1_IGNACK_SHIFT (12U)
#define | LPI2C_SCFGR1_IGNACK(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)
#define | LPI2C_SCFGR1_HSMEN_MASK (0x2000U)
#define | LPI2C_SCFGR1_HSMEN_SHIFT (13U)
#define | LPI2C_SCFGR1_HSMEN(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)
#define | LPI2C_SCFGR1_ADDRCFG_MASK (0x70000U)
#define | LPI2C_SCFGR1_ADDRCFG_SHIFT (16U)
#define | LPI2C_SCFGR1_ADDRCFG(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)

## SCFGR2 - Slave Configuration Register 2

#define | LPI2C_SCFGR2_CLKHOLD_MASK (0xFU)
#define | LPI2C_SCFGR2_CLKHOLD_SHIFT (0U)
#define | LPI2C_SCFGR2_CLKHOLD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)
#define | LPI2C_SCFGR2_DATAVD_MASK (0x3F00U)
#define | LPI2C_SCFGR2_DATAVD_SHIFT (8U)
#define | LPI2C_SCFGR2_DATAVD(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)
#define | LPI2C_SCFGR2_FILTSCL_MASK (0xF0000U)
#define | LPI2C_SCFGR2_FILTSCL_SHIFT (16U)
#define | LPI2C_SCFGR2_FILTSCL(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)
#define | LPI2C_SCFGR2_FILTSDA_MASK (0xF000000U)
#define | LPI2C_SCFGR2_FILTSDA_SHIFT (24U)
#define | LPI2C_SCFGR2_FILTSDA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)

## SAMR - Slave Address Match Register

#define | LPI2C_SAMR_ADDR0_MASK (0x7FEU)
#define | LPI2C_SAMR_ADDR0_SHIFT (1U)
#define | LPI2C_SAMR_ADDR0(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
#define | LPI2C_SAMR_ADDR1_MASK (0x7FE0000U)
#define | LPI2C_SAMR_ADDR1_SHIFT (17U)
#define | LPI2C_SAMR_ADDR1(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)

## SASR - Slave Address Status Register

#define | LPI2C_SASR_RADDR_MASK (0x7FFU)
#define | LPI2C_SASR_RADDR_SHIFT (0U)
#define | LPI2C_SASR_RADDR(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)
#define | LPI2C_SASR_ANV_MASK (0x4000U)
#define | LPI2C_SASR_ANV_SHIFT (14U)
#define | LPI2C_SASR_ANV(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)

## STAR - Slave Transmit ACK Register

#define | LPI2C_STAR_TXNACK_MASK (0x1U)
#define | LPI2C_STAR_TXNACK_SHIFT (0U)
#define | LPI2C_STAR_TXNACK(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)

## STDR - Slave Transmit Data Register

#define | LPI2C_STDR_DATA_MASK (0xFFU)
#define | LPI2C_STDR_DATA_SHIFT (0U)
#define | LPI2C_STDR_DATA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)

## SRDR - Slave Receive Data Register

#define | LPI2C_SRDR_DATA_MASK (0xFFU)
#define | LPI2C_SRDR_DATA_SHIFT (0U)
#define | LPI2C_SRDR_DATA(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)
#define | LPI2C_SRDR_RXEMPTY_MASK (0x4000U)
#define | LPI2C_SRDR_RXEMPTY_SHIFT (14U)
#define | LPI2C_SRDR_RXEMPTY(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)
#define | LPI2C_SRDR_SOF_MASK (0x8000U)
#define | LPI2C_SRDR_SOF_SHIFT (15U)
#define | LPI2C_SRDR_SOF(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ LPI2C_MCCR0_CLKHI

#define LPI2C_MCCR0_CLKHI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKHI_SHIFT)) & LPI2C_MCCR0_CLKHI_MASK)

CLKHI - Clock High Period

Definition at line 27129 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_CLKHI_MASK

#define LPI2C_MCCR0_CLKHI_MASK (0x3F00U)

Definition at line 27125 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_CLKHI_SHIFT

#define LPI2C_MCCR0_CLKHI_SHIFT (8U)

Definition at line 27126 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_CLKLO

#define LPI2C_MCCR0_CLKLO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_CLKLO_SHIFT)) & LPI2C_MCCR0_CLKLO_MASK)

CLKLO - Clock Low Period

Definition at line 27124 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_CLKLO_MASK

#define LPI2C_MCCR0_CLKLO_MASK (0x3FU)

Definition at line 27120 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_CLKLO_SHIFT

#define LPI2C_MCCR0_CLKLO_SHIFT (0U)

Definition at line 27121 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_DATAVD

#define LPI2C_MCCR0_DATAVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_DATAVD_SHIFT)) & LPI2C_MCCR0_DATAVD_MASK)

DATAVD - Data Valid Delay

Definition at line 27139 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_DATAVD_MASK

#define LPI2C_MCCR0_DATAVD_MASK (0x3F000000U)

Definition at line 27135 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_DATAVD_SHIFT

#define LPI2C_MCCR0_DATAVD_SHIFT (24U)

Definition at line 27136 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_SETHOLD

#define LPI2C_MCCR0_SETHOLD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR0_SETHOLD_SHIFT)) & LPI2C_MCCR0_SETHOLD_MASK)

SETHOLD - Setup Hold Delay

Definition at line 27134 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_SETHOLD_MASK

#define LPI2C_MCCR0_SETHOLD_MASK (0x3F0000U)

Definition at line 27130 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR0_SETHOLD_SHIFT

#define LPI2C_MCCR0_SETHOLD_SHIFT (16U)

Definition at line 27131 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKHI

#define LPI2C_MCCR1_CLKHI | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKHI_SHIFT)) & LPI2C_MCCR1_CLKHI_MASK)

CLKHI - Clock High Period

Definition at line 27153 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKHI_MASK

#define LPI2C_MCCR1_CLKHI_MASK (0x3F00U)

Definition at line 27149 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKHI_SHIFT

#define LPI2C_MCCR1_CLKHI_SHIFT (8U)

Definition at line 27150 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKLO

#define LPI2C_MCCR1_CLKLO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_CLKLO_SHIFT)) & LPI2C_MCCR1_CLKLO_MASK)

CLKLO - Clock Low Period

Definition at line 27148 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKLO_MASK

#define LPI2C_MCCR1_CLKLO_MASK (0x3FU)

Definition at line 27144 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_CLKLO_SHIFT

#define LPI2C_MCCR1_CLKLO_SHIFT (0U)

Definition at line 27145 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_DATAVD

#define LPI2C_MCCR1_DATAVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_DATAVD_SHIFT)) & LPI2C_MCCR1_DATAVD_MASK)

DATAVD - Data Valid Delay

Definition at line 27163 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_DATAVD_MASK

#define LPI2C_MCCR1_DATAVD_MASK (0x3F000000U)

Definition at line 27159 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_DATAVD_SHIFT

#define LPI2C_MCCR1_DATAVD_SHIFT (24U)

Definition at line 27160 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_SETHOLD

#define LPI2C_MCCR1_SETHOLD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCCR1_SETHOLD_SHIFT)) & LPI2C_MCCR1_SETHOLD_MASK)

SETHOLD - Setup Hold Delay

Definition at line 27158 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_SETHOLD_MASK

#define LPI2C_MCCR1_SETHOLD_MASK (0x3F0000U)

Definition at line 27154 of file MIMXRT1062.h.

## ◆ LPI2C_MCCR1_SETHOLD_SHIFT

#define LPI2C_MCCR1_SETHOLD_SHIFT (16U)

Definition at line 27155 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_CIRFIFO

#define LPI2C_MCFGR0_CIRFIFO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_CIRFIFO_SHIFT)) & LPI2C_MCFGR0_CIRFIFO_MASK)

CIRFIFO - Circular FIFO Enable 0b0..Circular FIFO is disabled 0b1..Circular FIFO is enabled

Definition at line 27002 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_CIRFIFO_MASK

#define LPI2C_MCFGR0_CIRFIFO_MASK (0x100U)

Definition at line 26996 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_CIRFIFO_SHIFT

#define LPI2C_MCFGR0_CIRFIFO_SHIFT (8U)

Definition at line 26997 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HREN

#define LPI2C_MCFGR0_HREN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HREN_SHIFT)) & LPI2C_MCFGR0_HREN_MASK)

HREN - Host Request Enable 0b0..Host request input is disabled 0b1..Host request input is enabled

Definition at line 26981 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HREN_MASK

#define LPI2C_MCFGR0_HREN_MASK (0x1U)

Definition at line 26975 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HREN_SHIFT

#define LPI2C_MCFGR0_HREN_SHIFT (0U)

Definition at line 26976 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRPOL

#define LPI2C_MCFGR0_HRPOL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRPOL_SHIFT)) & LPI2C_MCFGR0_HRPOL_MASK)

HRPOL - Host Request Polarity 0b0..Active low 0b1..Active high

Definition at line 26988 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRPOL_MASK

#define LPI2C_MCFGR0_HRPOL_MASK (0x2U)

Definition at line 26982 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRPOL_SHIFT

#define LPI2C_MCFGR0_HRPOL_SHIFT (1U)

Definition at line 26983 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRSEL

#define LPI2C_MCFGR0_HRSEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_HRSEL_SHIFT)) & LPI2C_MCFGR0_HRSEL_MASK)

HRSEL - Host Request Select 0b0..Host request input is pin HREQ 0b1..Host request input is input trigger

Definition at line 26995 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRSEL_MASK

#define LPI2C_MCFGR0_HRSEL_MASK (0x4U)

Definition at line 26989 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_HRSEL_SHIFT

#define LPI2C_MCFGR0_HRSEL_SHIFT (2U)

Definition at line 26990 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_RDMO

#define LPI2C_MCFGR0_RDMO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR0_RDMO_SHIFT)) & LPI2C_MCFGR0_RDMO_MASK)

RDMO - Receive Data Match Only 0b0..Received data is stored in the receive FIFO 0b1..Received data is discarded unless the the Data Match Flag (MSR[DMF]) is set

Definition at line 27009 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_RDMO_MASK

#define LPI2C_MCFGR0_RDMO_MASK (0x200U)

Definition at line 27003 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR0_RDMO_SHIFT

#define LPI2C_MCFGR0_RDMO_SHIFT (9U)

Definition at line 27004 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_AUTOSTOP

#define LPI2C_MCFGR1_AUTOSTOP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_AUTOSTOP_SHIFT)) & LPI2C_MCFGR1_AUTOSTOP_MASK)

AUTOSTOP - Automatic STOP Generation 0b0..No effect 0b1..STOP condition is automatically generated whenever the transmit FIFO is empty and the LPI2C master is busy

Definition at line 27033 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_AUTOSTOP_MASK

#define LPI2C_MCFGR1_AUTOSTOP_MASK (0x100U)

Definition at line 27027 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_AUTOSTOP_SHIFT

#define LPI2C_MCFGR1_AUTOSTOP_SHIFT (8U)

Definition at line 27028 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_IGNACK

#define LPI2C_MCFGR1_IGNACK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_IGNACK_SHIFT)) & LPI2C_MCFGR1_IGNACK_MASK)

IGNACK - IGNACK 0b0..LPI2C Master will receive ACK and NACK normally 0b1..LPI2C Master will treat a received NACK as if it (NACK) was an ACK

Definition at line 27040 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_IGNACK_MASK

#define LPI2C_MCFGR1_IGNACK_MASK (0x200U)

Definition at line 27034 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_IGNACK_SHIFT

#define LPI2C_MCFGR1_IGNACK_SHIFT (9U)

Definition at line 27035 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_MATCFG

#define LPI2C_MCFGR1_MATCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_MATCFG_SHIFT)) & LPI2C_MCFGR1_MATCFG_MASK)

MATCFG - Match Configuration 0b000..Match is disabled 0b001..Reserved 0b010..Match is enabled (1st data word equals MATCH0 OR MATCH1) 0b011..Match is enabled (any data word equals MATCH0 OR MATCH1) 0b100..Match is enabled (1st data word equals MATCH0 AND 2nd data word equals MATCH1) 0b101..Match is enabled (any data word equals MATCH0 AND next data word equals MATCH1) 0b110..Match is enabled (1st data word AND MATCH1 equals MATCH0 AND MATCH1) 0b111..Match is enabled (any data word AND MATCH1 equals MATCH0 AND MATCH1)

Definition at line 27060 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_MATCFG_MASK

#define LPI2C_MCFGR1_MATCFG_MASK (0x70000U)

Definition at line 27048 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_MATCFG_SHIFT

#define LPI2C_MCFGR1_MATCFG_SHIFT (16U)

Definition at line 27049 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PINCFG

#define LPI2C_MCFGR1_PINCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PINCFG_SHIFT)) & LPI2C_MCFGR1_PINCFG_MASK)

PINCFG - Pin Configuration 0b000..2-pin open drain mode 0b001..2-pin output only mode (ultra-fast mode) 0b010..2-pin push-pull mode 0b011..4-pin push-pull mode 0b100..2-pin open drain mode with separate LPI2C slave 0b101..2-pin output only mode (ultra-fast mode) with separate LPI2C slave 0b110..2-pin push-pull mode with separate LPI2C slave 0b111..4-pin push-pull mode (inverted outputs)

Definition at line 27073 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PINCFG_MASK

#define LPI2C_MCFGR1_PINCFG_MASK (0x7000000U)

Definition at line 27061 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PINCFG_SHIFT

#define LPI2C_MCFGR1_PINCFG_SHIFT (24U)

Definition at line 27062 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PRESCALE

#define LPI2C_MCFGR1_PRESCALE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_PRESCALE_SHIFT)) & LPI2C_MCFGR1_PRESCALE_MASK)

PRESCALE - Prescaler 0b000..Divide by 1 0b001..Divide by 2 0b010..Divide by 4 0b011..Divide by 8 0b100..Divide by 16 0b101..Divide by 32 0b110..Divide by 64 0b111..Divide by 128

Definition at line 27026 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PRESCALE_MASK

#define LPI2C_MCFGR1_PRESCALE_MASK (0x7U)

Definition at line 27014 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_PRESCALE_SHIFT

#define LPI2C_MCFGR1_PRESCALE_SHIFT (0U)

Definition at line 27015 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_TIMECFG

#define LPI2C_MCFGR1_TIMECFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR1_TIMECFG_SHIFT)) & LPI2C_MCFGR1_TIMECFG_MASK)

TIMECFG - Timeout Configuration 0b0..Pin Low Timeout Flag will set if SCL is low for longer than the configured timeout 0b1..Pin Low Timeout Flag will set if either SCL or SDA is low for longer than the configured timeout

Definition at line 27047 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_TIMECFG_MASK

#define LPI2C_MCFGR1_TIMECFG_MASK (0x400U)

Definition at line 27041 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR1_TIMECFG_SHIFT

#define LPI2C_MCFGR1_TIMECFG_SHIFT (10U)

Definition at line 27042 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_BUSIDLE

#define LPI2C_MCFGR2_BUSIDLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_BUSIDLE_SHIFT)) & LPI2C_MCFGR2_BUSIDLE_MASK)

BUSIDLE - Bus Idle Timeout

Definition at line 27082 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_BUSIDLE_MASK

#define LPI2C_MCFGR2_BUSIDLE_MASK (0xFFFU)

Definition at line 27078 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_BUSIDLE_SHIFT

#define LPI2C_MCFGR2_BUSIDLE_SHIFT (0U)

Definition at line 27079 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSCL

#define LPI2C_MCFGR2_FILTSCL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSCL_SHIFT)) & LPI2C_MCFGR2_FILTSCL_MASK)

FILTSCL - Glitch Filter SCL

Definition at line 27087 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSCL_MASK

#define LPI2C_MCFGR2_FILTSCL_MASK (0xF0000U)

Definition at line 27083 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSCL_SHIFT

#define LPI2C_MCFGR2_FILTSCL_SHIFT (16U)

Definition at line 27084 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSDA

#define LPI2C_MCFGR2_FILTSDA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR2_FILTSDA_SHIFT)) & LPI2C_MCFGR2_FILTSDA_MASK)

FILTSDA - Glitch Filter SDA

Definition at line 27092 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSDA_MASK

#define LPI2C_MCFGR2_FILTSDA_MASK (0xF000000U)

Definition at line 27088 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR2_FILTSDA_SHIFT

#define LPI2C_MCFGR2_FILTSDA_SHIFT (24U)

Definition at line 27089 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR3_PINLOW

#define LPI2C_MCFGR3_PINLOW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCFGR3_PINLOW_SHIFT)) & LPI2C_MCFGR3_PINLOW_MASK)

PINLOW - Pin Low Timeout

Definition at line 27101 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR3_PINLOW_MASK

#define LPI2C_MCFGR3_PINLOW_MASK (0xFFF00U)

Definition at line 27097 of file MIMXRT1062.h.

## ◆ LPI2C_MCFGR3_PINLOW_SHIFT

#define LPI2C_MCFGR3_PINLOW_SHIFT (8U)

Definition at line 27098 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DBGEN

#define LPI2C_MCR_DBGEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DBGEN_SHIFT)) & LPI2C_MCR_DBGEN_MASK)

DBGEN - Debug Enable 0b0..Master is disabled in debug mode 0b1..Master is enabled in debug mode

Definition at line 26790 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DBGEN_MASK

#define LPI2C_MCR_DBGEN_MASK (0x8U)

Definition at line 26784 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DBGEN_SHIFT

#define LPI2C_MCR_DBGEN_SHIFT (3U)

Definition at line 26785 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DOZEN

#define LPI2C_MCR_DOZEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_DOZEN_SHIFT)) & LPI2C_MCR_DOZEN_MASK)

DOZEN - Doze mode enable 0b0..Master is enabled in Doze mode 0b1..Master is disabled in Doze mode

Definition at line 26783 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DOZEN_MASK

#define LPI2C_MCR_DOZEN_MASK (0x4U)

Definition at line 26777 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_DOZEN_SHIFT

#define LPI2C_MCR_DOZEN_SHIFT (2U)

Definition at line 26778 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_MEN

#define LPI2C_MCR_MEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)

MEN - Master Enable 0b0..Master logic is disabled 0b1..Master logic is enabled

Definition at line 26769 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_MEN_MASK

#define LPI2C_MCR_MEN_MASK (0x1U)

Definition at line 26763 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_MEN_SHIFT

#define LPI2C_MCR_MEN_SHIFT (0U)

Definition at line 26764 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RRF

#define LPI2C_MCR_RRF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RRF_SHIFT)) & LPI2C_MCR_RRF_MASK)

RRF - Reset Receive FIFO 0b0..No effect 0b1..Receive FIFO is reset

Definition at line 26804 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RRF_MASK

#define LPI2C_MCR_RRF_MASK (0x200U)

Definition at line 26798 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RRF_SHIFT

#define LPI2C_MCR_RRF_SHIFT (9U)

Definition at line 26799 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RST

#define LPI2C_MCR_RST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)

RST - Software Reset 0b0..Master logic is not reset 0b1..Master logic is reset

Definition at line 26776 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RST_MASK

#define LPI2C_MCR_RST_MASK (0x2U)

Definition at line 26770 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RST_SHIFT

#define LPI2C_MCR_RST_SHIFT (1U)

Definition at line 26771 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RTF

#define LPI2C_MCR_RTF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MCR_RTF_SHIFT)) & LPI2C_MCR_RTF_MASK)

RTF - Reset Transmit FIFO 0b0..No effect 0b1..Transmit FIFO is reset

Definition at line 26797 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RTF_MASK

#define LPI2C_MCR_RTF_MASK (0x100U)

Definition at line 26791 of file MIMXRT1062.h.

## ◆ LPI2C_MCR_RTF_SHIFT

#define LPI2C_MCR_RTF_SHIFT (8U)

Definition at line 26792 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_RDDE

#define LPI2C_MDER_RDDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_RDDE_SHIFT)) & LPI2C_MDER_RDDE_MASK)

RDDE - Receive Data DMA Enable 0b0..DMA request is disabled 0b1..DMA request is enabled

Definition at line 26970 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_RDDE_MASK

#define LPI2C_MDER_RDDE_MASK (0x2U)

Definition at line 26964 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_RDDE_SHIFT

#define LPI2C_MDER_RDDE_SHIFT (1U)

Definition at line 26965 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_TDDE

#define LPI2C_MDER_TDDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MDER_TDDE_SHIFT)) & LPI2C_MDER_TDDE_MASK)

TDDE - Transmit Data DMA Enable 0b0..DMA request is disabled 0b1..DMA request is enabled

Definition at line 26963 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_TDDE_MASK

#define LPI2C_MDER_TDDE_MASK (0x1U)

Definition at line 26957 of file MIMXRT1062.h.

## ◆ LPI2C_MDER_TDDE_SHIFT

#define LPI2C_MDER_TDDE_SHIFT (0U)

Definition at line 26958 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH0

#define LPI2C_MDMR_MATCH0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH0_SHIFT)) & LPI2C_MDMR_MATCH0_MASK)

MATCH0 - Match 0 Value

Definition at line 27110 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH0_MASK

#define LPI2C_MDMR_MATCH0_MASK (0xFFU)

Definition at line 27106 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH0_SHIFT

#define LPI2C_MDMR_MATCH0_SHIFT (0U)

Definition at line 27107 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH1

#define LPI2C_MDMR_MATCH1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MDMR_MATCH1_SHIFT)) & LPI2C_MDMR_MATCH1_MASK)

MATCH1 - Match 1 Value

Definition at line 27115 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH1_MASK

#define LPI2C_MDMR_MATCH1_MASK (0xFF0000U)

Definition at line 27111 of file MIMXRT1062.h.

## ◆ LPI2C_MDMR_MATCH1_SHIFT

#define LPI2C_MDMR_MATCH1_SHIFT (16U)

Definition at line 27112 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_RXWATER

#define LPI2C_MFCR_RXWATER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_RXWATER_SHIFT)) & LPI2C_MFCR_RXWATER_MASK)

RXWATER - Receive FIFO Watermark

Definition at line 27177 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_RXWATER_MASK

#define LPI2C_MFCR_RXWATER_MASK (0x30000U)

Definition at line 27173 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_RXWATER_SHIFT

#define LPI2C_MFCR_RXWATER_SHIFT (16U)

Definition at line 27174 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_TXWATER

#define LPI2C_MFCR_TXWATER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MFCR_TXWATER_SHIFT)) & LPI2C_MFCR_TXWATER_MASK)

TXWATER - Transmit FIFO Watermark

Definition at line 27172 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_TXWATER_MASK

#define LPI2C_MFCR_TXWATER_MASK (0x3U)

Definition at line 27168 of file MIMXRT1062.h.

## ◆ LPI2C_MFCR_TXWATER_SHIFT

#define LPI2C_MFCR_TXWATER_SHIFT (0U)

Definition at line 27169 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_RXCOUNT

#define LPI2C_MFSR_RXCOUNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_RXCOUNT_SHIFT)) & LPI2C_MFSR_RXCOUNT_MASK)

RXCOUNT - Receive FIFO Count

Definition at line 27191 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_RXCOUNT_MASK

#define LPI2C_MFSR_RXCOUNT_MASK (0x70000U)

Definition at line 27187 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_RXCOUNT_SHIFT

#define LPI2C_MFSR_RXCOUNT_SHIFT (16U)

Definition at line 27188 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_TXCOUNT

#define LPI2C_MFSR_TXCOUNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MFSR_TXCOUNT_SHIFT)) & LPI2C_MFSR_TXCOUNT_MASK)

TXCOUNT - Transmit FIFO Count

Definition at line 27186 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_TXCOUNT_MASK

#define LPI2C_MFSR_TXCOUNT_MASK (0x7U)

Definition at line 27182 of file MIMXRT1062.h.

## ◆ LPI2C_MFSR_TXCOUNT_SHIFT

#define LPI2C_MFSR_TXCOUNT_SHIFT (0U)

Definition at line 27183 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_ALIE

#define LPI2C_MIER_ALIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_ALIE_SHIFT)) & LPI2C_MIER_ALIE_MASK)

ALIE - Arbitration Lost Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26931 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_ALIE_MASK

#define LPI2C_MIER_ALIE_MASK (0x800U)

Definition at line 26925 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_ALIE_SHIFT

#define LPI2C_MIER_ALIE_SHIFT (11U)

Definition at line 26926 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_DMIE

#define LPI2C_MIER_DMIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_DMIE_SHIFT)) & LPI2C_MIER_DMIE_MASK)

DMIE - Data Match Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26952 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_DMIE_MASK

#define LPI2C_MIER_DMIE_MASK (0x4000U)

Definition at line 26946 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_DMIE_SHIFT

#define LPI2C_MIER_DMIE_SHIFT (14U)

Definition at line 26947 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_EPIE

#define LPI2C_MIER_EPIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_EPIE_SHIFT)) & LPI2C_MIER_EPIE_MASK)

EPIE - End Packet Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26910 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_EPIE_MASK

#define LPI2C_MIER_EPIE_MASK (0x100U)

Definition at line 26904 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_EPIE_SHIFT

#define LPI2C_MIER_EPIE_SHIFT (8U)

Definition at line 26905 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_FEIE

#define LPI2C_MIER_FEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_FEIE_SHIFT)) & LPI2C_MIER_FEIE_MASK)

FEIE - FIFO Error Interrupt Enable 0b0..Enabled 0b1..Disabled

Definition at line 26938 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_FEIE_MASK

#define LPI2C_MIER_FEIE_MASK (0x1000U)

Definition at line 26932 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_FEIE_SHIFT

#define LPI2C_MIER_FEIE_SHIFT (12U)

Definition at line 26933 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_NDIE

#define LPI2C_MIER_NDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_NDIE_SHIFT)) & LPI2C_MIER_NDIE_MASK)

NDIE - NACK Detect Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26924 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_NDIE_MASK

#define LPI2C_MIER_NDIE_MASK (0x400U)

Definition at line 26918 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_NDIE_SHIFT

#define LPI2C_MIER_NDIE_SHIFT (10U)

Definition at line 26919 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_PLTIE

#define LPI2C_MIER_PLTIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_PLTIE_SHIFT)) & LPI2C_MIER_PLTIE_MASK)

PLTIE - Pin Low Timeout Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26945 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_PLTIE_MASK

#define LPI2C_MIER_PLTIE_MASK (0x2000U)

Definition at line 26939 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_PLTIE_SHIFT

#define LPI2C_MIER_PLTIE_SHIFT (13U)

Definition at line 26940 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_RDIE

#define LPI2C_MIER_RDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_RDIE_SHIFT)) & LPI2C_MIER_RDIE_MASK)

RDIE - Receive Data Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26903 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_RDIE_MASK

#define LPI2C_MIER_RDIE_MASK (0x2U)

Definition at line 26897 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_RDIE_SHIFT

#define LPI2C_MIER_RDIE_SHIFT (1U)

Definition at line 26898 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_SDIE

#define LPI2C_MIER_SDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_SDIE_SHIFT)) & LPI2C_MIER_SDIE_MASK)

SDIE - STOP Detect Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26917 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_SDIE_MASK

#define LPI2C_MIER_SDIE_MASK (0x200U)

Definition at line 26911 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_SDIE_SHIFT

#define LPI2C_MIER_SDIE_SHIFT (9U)

Definition at line 26912 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_TDIE

#define LPI2C_MIER_TDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MIER_TDIE_SHIFT)) & LPI2C_MIER_TDIE_MASK)

TDIE - Transmit Data Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 26896 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_TDIE_MASK

#define LPI2C_MIER_TDIE_MASK (0x1U)

Definition at line 26890 of file MIMXRT1062.h.

## ◆ LPI2C_MIER_TDIE_SHIFT

#define LPI2C_MIER_TDIE_SHIFT (0U)

Definition at line 26891 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_DATA

#define LPI2C_MRDR_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_DATA_SHIFT)) & LPI2C_MRDR_DATA_MASK)

DATA - Receive Data

Definition at line 27222 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_DATA_MASK

#define LPI2C_MRDR_DATA_MASK (0xFFU)

Definition at line 27218 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_DATA_SHIFT

#define LPI2C_MRDR_DATA_SHIFT (0U)

Definition at line 27219 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_RXEMPTY

#define LPI2C_MRDR_RXEMPTY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MRDR_RXEMPTY_SHIFT)) & LPI2C_MRDR_RXEMPTY_MASK)

RXEMPTY - RX Empty 0b0..Receive FIFO is not empty 0b1..Receive FIFO is empty

Definition at line 27229 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_RXEMPTY_MASK

#define LPI2C_MRDR_RXEMPTY_MASK (0x4000U)

Definition at line 27223 of file MIMXRT1062.h.

## ◆ LPI2C_MRDR_RXEMPTY_SHIFT

#define LPI2C_MRDR_RXEMPTY_SHIFT (14U)

Definition at line 27224 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_ALF

#define LPI2C_MSR_ALF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_ALF_SHIFT)) & LPI2C_MSR_ALF_MASK)

ALF - Arbitration Lost Flag 0b0..Master has not lost arbitration 0b1..Master has lost arbitration

Definition at line 26850 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_ALF_MASK

#define LPI2C_MSR_ALF_MASK (0x800U)

Definition at line 26844 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_ALF_SHIFT

#define LPI2C_MSR_ALF_SHIFT (11U)

Definition at line 26845 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_BBF

#define LPI2C_MSR_BBF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_BBF_SHIFT)) & LPI2C_MSR_BBF_MASK)

BBF - Bus Busy Flag 0b0..I2C Bus is idle 0b1..I2C Bus is busy

Definition at line 26885 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_BBF_MASK

#define LPI2C_MSR_BBF_MASK (0x2000000U)

Definition at line 26879 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_BBF_SHIFT

#define LPI2C_MSR_BBF_SHIFT (25U)

Definition at line 26880 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_DMF

#define LPI2C_MSR_DMF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_DMF_SHIFT)) & LPI2C_MSR_DMF_MASK)

DMF - Data Match Flag 0b0..Have not received matching data 0b1..Have received matching data

Definition at line 26871 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_DMF_MASK

#define LPI2C_MSR_DMF_MASK (0x4000U)

Definition at line 26865 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_DMF_SHIFT

#define LPI2C_MSR_DMF_SHIFT (14U)

Definition at line 26866 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_EPF

#define LPI2C_MSR_EPF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_EPF_SHIFT)) & LPI2C_MSR_EPF_MASK)

EPF - End Packet Flag 0b0..Master has not generated a STOP or Repeated START condition 0b1..Master has generated a STOP or Repeated START condition

Definition at line 26829 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_EPF_MASK

#define LPI2C_MSR_EPF_MASK (0x100U)

Definition at line 26823 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_EPF_SHIFT

#define LPI2C_MSR_EPF_SHIFT (8U)

Definition at line 26824 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_FEF

#define LPI2C_MSR_FEF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_FEF_SHIFT)) & LPI2C_MSR_FEF_MASK)

FEF - FIFO Error Flag 0b0..No error 0b1..Master sending or receiving data without a START condition

Definition at line 26857 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_FEF_MASK

#define LPI2C_MSR_FEF_MASK (0x1000U)

Definition at line 26851 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_FEF_SHIFT

#define LPI2C_MSR_FEF_SHIFT (12U)

Definition at line 26852 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_MBF

#define LPI2C_MSR_MBF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_MBF_SHIFT)) & LPI2C_MSR_MBF_MASK)

MBF - Master Busy Flag 0b0..I2C Master is idle 0b1..I2C Master is busy

Definition at line 26878 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_MBF_MASK

#define LPI2C_MSR_MBF_MASK (0x1000000U)

Definition at line 26872 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_MBF_SHIFT

#define LPI2C_MSR_MBF_SHIFT (24U)

Definition at line 26873 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_NDF

#define LPI2C_MSR_NDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_NDF_SHIFT)) & LPI2C_MSR_NDF_MASK)

NDF - NACK Detect Flag 0b0..Unexpected NACK was not detected 0b1..Unexpected NACK was detected

Definition at line 26843 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_NDF_MASK

#define LPI2C_MSR_NDF_MASK (0x400U)

Definition at line 26837 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_NDF_SHIFT

#define LPI2C_MSR_NDF_SHIFT (10U)

Definition at line 26838 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_PLTF

#define LPI2C_MSR_PLTF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_PLTF_SHIFT)) & LPI2C_MSR_PLTF_MASK)

PLTF - Pin Low Timeout Flag 0b0..Pin low timeout has not occurred or is disabled 0b1..Pin low timeout has occurred

Definition at line 26864 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_PLTF_MASK

#define LPI2C_MSR_PLTF_MASK (0x2000U)

Definition at line 26858 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_PLTF_SHIFT

#define LPI2C_MSR_PLTF_SHIFT (13U)

Definition at line 26859 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_RDF

#define LPI2C_MSR_RDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_RDF_SHIFT)) & LPI2C_MSR_RDF_MASK)

RDF - Receive Data Flag 0b0..Receive Data is not ready 0b1..Receive data is ready

Definition at line 26822 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_RDF_MASK

#define LPI2C_MSR_RDF_MASK (0x2U)

Definition at line 26816 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_RDF_SHIFT

#define LPI2C_MSR_RDF_SHIFT (1U)

Definition at line 26817 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_SDF

#define LPI2C_MSR_SDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_SDF_SHIFT)) & LPI2C_MSR_SDF_MASK)

SDF - STOP Detect Flag 0b0..Master has not generated a STOP condition 0b1..Master has generated a STOP condition

Definition at line 26836 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_SDF_MASK

#define LPI2C_MSR_SDF_MASK (0x200U)

Definition at line 26830 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_SDF_SHIFT

#define LPI2C_MSR_SDF_SHIFT (9U)

Definition at line 26831 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_TDF

#define LPI2C_MSR_TDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MSR_TDF_SHIFT)) & LPI2C_MSR_TDF_MASK)

TDF - Transmit Data Flag 0b0..Transmit data is not requested 0b1..Transmit data is requested

Definition at line 26815 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_TDF_MASK

#define LPI2C_MSR_TDF_MASK (0x1U)

Definition at line 26809 of file MIMXRT1062.h.

## ◆ LPI2C_MSR_TDF_SHIFT

#define LPI2C_MSR_TDF_SHIFT (0U)

Definition at line 26810 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_CMD

#define LPI2C_MTDR_CMD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_CMD_SHIFT)) & LPI2C_MTDR_CMD_MASK)

CMD - Command Data 0b000..Transmit DATA[7:0] 0b001..Receive (DATA[7:0] + 1) bytes 0b010..Generate STOP condition 0b011..Receive and discard (DATA[7:0] + 1) bytes 0b100..Generate (repeated) START and transmit address in DATA[7:0] 0b101..Generate (repeated) START and transmit address in DATA[7:0]. This transfer expects a NACK to be returned. 0b110..Generate (repeated) START and transmit address in DATA[7:0] using high speed mode 0b111..Generate (repeated) START and transmit address in DATA[7:0] using high speed mode. This transfer expects a NACK to be returned.

Definition at line 27213 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_CMD_MASK

#define LPI2C_MTDR_CMD_MASK (0x700U)

Definition at line 27201 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_CMD_SHIFT

#define LPI2C_MTDR_CMD_SHIFT (8U)

Definition at line 27202 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_DATA

#define LPI2C_MTDR_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_MTDR_DATA_SHIFT)) & LPI2C_MTDR_DATA_MASK)

DATA - Transmit Data

Definition at line 27200 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_DATA_MASK

#define LPI2C_MTDR_DATA_MASK (0xFFU)

Definition at line 27196 of file MIMXRT1062.h.

## ◆ LPI2C_MTDR_DATA_SHIFT

#define LPI2C_MTDR_DATA_SHIFT (0U)

Definition at line 27197 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MRXFIFO

#define LPI2C_PARAM_MRXFIFO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)

MRXFIFO - Master Receive FIFO Size

Definition at line 26758 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MRXFIFO_MASK

#define LPI2C_PARAM_MRXFIFO_MASK (0xF00U)

Definition at line 26754 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MRXFIFO_SHIFT

#define LPI2C_PARAM_MRXFIFO_SHIFT (8U)

Definition at line 26755 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MTXFIFO

#define LPI2C_PARAM_MTXFIFO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)

MTXFIFO - Master Transmit FIFO Size

Definition at line 26753 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MTXFIFO_MASK

#define LPI2C_PARAM_MTXFIFO_MASK (0xFU)

Definition at line 26749 of file MIMXRT1062.h.

## ◆ LPI2C_PARAM_MTXFIFO_SHIFT

#define LPI2C_PARAM_MTXFIFO_SHIFT (0U)

Definition at line 26750 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR0

#define LPI2C_SAMR_ADDR0 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)

ADDR0 - Address 0 Value

Definition at line 27612 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR0_MASK

#define LPI2C_SAMR_ADDR0_MASK (0x7FEU)

Definition at line 27608 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR0_SHIFT

#define LPI2C_SAMR_ADDR0_SHIFT (1U)

Definition at line 27609 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR1

#define LPI2C_SAMR_ADDR1 | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR1_SHIFT)) & LPI2C_SAMR_ADDR1_MASK)

ADDR1 - Address 1 Value

Definition at line 27617 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR1_MASK

#define LPI2C_SAMR_ADDR1_MASK (0x7FE0000U)

Definition at line 27613 of file MIMXRT1062.h.

## ◆ LPI2C_SAMR_ADDR1_SHIFT

#define LPI2C_SAMR_ADDR1_SHIFT (17U)

Definition at line 27614 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_ANV

#define LPI2C_SASR_ANV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_ANV_SHIFT)) & LPI2C_SASR_ANV_MASK)

ANV - Address Not Valid 0b0..Received Address (RADDR) is valid 0b1..Received Address (RADDR) is not valid

Definition at line 27633 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_ANV_MASK

#define LPI2C_SASR_ANV_MASK (0x4000U)

Definition at line 27627 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_ANV_SHIFT

#define LPI2C_SASR_ANV_SHIFT (14U)

Definition at line 27628 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_RADDR

#define LPI2C_SASR_RADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SASR_RADDR_SHIFT)) & LPI2C_SASR_RADDR_MASK)

RADDR - Received Address

Definition at line 27626 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_RADDR_MASK

#define LPI2C_SASR_RADDR_MASK (0x7FFU)

Definition at line 27622 of file MIMXRT1062.h.

## ◆ LPI2C_SASR_RADDR_SHIFT

#define LPI2C_SASR_RADDR_SHIFT (0U)

Definition at line 27623 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ACKSTALL

#define LPI2C_SCFGR1_ACKSTALL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ACKSTALL_SHIFT)) & LPI2C_SCFGR1_ACKSTALL_MASK)

ACKSTALL - ACK SCL Stall 0b0..Clock stretching is disabled 0b1..Clock stretching is enabled

Definition at line 27522 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ACKSTALL_MASK

#define LPI2C_SCFGR1_ACKSTALL_MASK (0x8U)

Definition at line 27516 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ACKSTALL_SHIFT

#define LPI2C_SCFGR1_ACKSTALL_SHIFT (3U)

Definition at line 27517 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADDRCFG

#define LPI2C_SCFGR1_ADDRCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADDRCFG_SHIFT)) & LPI2C_SCFGR1_ADDRCFG_MASK)

ADDRCFG - Address Configuration 0b000..Address match 0 (7-bit) 0b001..Address match 0 (10-bit) 0b010..Address match 0 (7-bit) or Address match 1 (7-bit) 0b011..Address match 0 (10-bit) or Address match 1 (10-bit) 0b100..Address match 0 (7-bit) or Address match 1 (10-bit) 0b101..Address match 0 (10-bit) or Address match 1 (7-bit) 0b110..From Address match 0 (7-bit) to Address match 1 (7-bit) 0b111..From Address match 0 (10-bit) to Address match 1 (10-bit)

Definition at line 27579 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADDRCFG_MASK

#define LPI2C_SCFGR1_ADDRCFG_MASK (0x70000U)

Definition at line 27567 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADDRCFG_SHIFT

#define LPI2C_SCFGR1_ADDRCFG_SHIFT (16U)

Definition at line 27568 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADRSTALL

#define LPI2C_SCFGR1_ADRSTALL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_ADRSTALL_SHIFT)) & LPI2C_SCFGR1_ADRSTALL_MASK)

ADRSTALL - Address SCL Stall 0b0..Clock stretching is disabled 0b1..Clock stretching is enabled

Definition at line 27501 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADRSTALL_MASK

#define LPI2C_SCFGR1_ADRSTALL_MASK (0x1U)

Definition at line 27495 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_ADRSTALL_SHIFT

#define LPI2C_SCFGR1_ADRSTALL_SHIFT (0U)

Definition at line 27496 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_GCEN

#define LPI2C_SCFGR1_GCEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_GCEN_SHIFT)) & LPI2C_SCFGR1_GCEN_MASK)

GCEN - General Call Enable 0b0..General Call address is disabled 0b1..General Call address is enabled

Definition at line 27529 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_GCEN_MASK

#define LPI2C_SCFGR1_GCEN_MASK (0x100U)

Definition at line 27523 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_GCEN_SHIFT

#define LPI2C_SCFGR1_GCEN_SHIFT (8U)

Definition at line 27524 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_HSMEN

#define LPI2C_SCFGR1_HSMEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_HSMEN_SHIFT)) & LPI2C_SCFGR1_HSMEN_MASK)

HSMEN - High Speed Mode Enable 0b0..Disables detection of HS-mode master code 0b1..Enables detection of HS-mode master code

Definition at line 27566 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_HSMEN_MASK

#define LPI2C_SCFGR1_HSMEN_MASK (0x2000U)

Definition at line 27560 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_HSMEN_SHIFT

#define LPI2C_SCFGR1_HSMEN_SHIFT (13U)

Definition at line 27561 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_IGNACK

#define LPI2C_SCFGR1_IGNACK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_IGNACK_SHIFT)) & LPI2C_SCFGR1_IGNACK_MASK)

IGNACK - Ignore NACK 0b0..Slave will end transfer when NACK is detected 0b1..Slave will not end transfer when NACK detected

Definition at line 27559 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_IGNACK_MASK

#define LPI2C_SCFGR1_IGNACK_MASK (0x1000U)

Definition at line 27553 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_IGNACK_SHIFT

#define LPI2C_SCFGR1_IGNACK_SHIFT (12U)

Definition at line 27554 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXCFG

#define LPI2C_SCFGR1_RXCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXCFG_SHIFT)) & LPI2C_SCFGR1_RXCFG_MASK)

RXCFG - Receive Data Configuration 0b0..Reading the Receive Data register will return received data and clear the Receive Data flag (MSR[RDF]). 0b1..Reading the Receive Data register when the Address Valid flag (SSR[AVF])is set, will return the Address Status register and clear the Address Valid flag. Reading the Receive Data register when the Address Valid flag is clear, will return received data and clear the Receive Data flag (MSR[RDF]).

Definition at line 27552 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXCFG_MASK

#define LPI2C_SCFGR1_RXCFG_MASK (0x800U)

Definition at line 27544 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXCFG_SHIFT

#define LPI2C_SCFGR1_RXCFG_SHIFT (11U)

Definition at line 27545 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXSTALL

#define LPI2C_SCFGR1_RXSTALL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_RXSTALL_SHIFT)) & LPI2C_SCFGR1_RXSTALL_MASK)

RXSTALL - RX SCL Stall 0b0..Clock stretching is disabled 0b1..Clock stretching is enabled

Definition at line 27508 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXSTALL_MASK

#define LPI2C_SCFGR1_RXSTALL_MASK (0x2U)

Definition at line 27502 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_RXSTALL_SHIFT

#define LPI2C_SCFGR1_RXSTALL_SHIFT (1U)

Definition at line 27503 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_SAEN

#define LPI2C_SCFGR1_SAEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_SAEN_SHIFT)) & LPI2C_SCFGR1_SAEN_MASK)

SAEN - SMBus Alert Enable 0b0..Disables match on SMBus Alert 0b1..Enables match on SMBus Alert

Definition at line 27536 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_SAEN_MASK

#define LPI2C_SCFGR1_SAEN_MASK (0x200U)

Definition at line 27530 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_SAEN_SHIFT

#define LPI2C_SCFGR1_SAEN_SHIFT (9U)

Definition at line 27531 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXCFG

#define LPI2C_SCFGR1_TXCFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXCFG_SHIFT)) & LPI2C_SCFGR1_TXCFG_MASK)

TXCFG - Transmit Flag Configuration 0b0..Transmit Data Flag will only assert during a slave-transmit transfer when the Transmit Data register is empty 0b1..Transmit Data Flag will assert whenever the Transmit Data register is empty

Definition at line 27543 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXCFG_MASK

#define LPI2C_SCFGR1_TXCFG_MASK (0x400U)

Definition at line 27537 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXCFG_SHIFT

#define LPI2C_SCFGR1_TXCFG_SHIFT (10U)

Definition at line 27538 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXDSTALL

#define LPI2C_SCFGR1_TXDSTALL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR1_TXDSTALL_SHIFT)) & LPI2C_SCFGR1_TXDSTALL_MASK)

TXDSTALL - TX Data SCL Stall 0b0..Clock stretching is disabled 0b1..Clock stretching is enabled

Definition at line 27515 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXDSTALL_MASK

#define LPI2C_SCFGR1_TXDSTALL_MASK (0x4U)

Definition at line 27509 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR1_TXDSTALL_SHIFT

#define LPI2C_SCFGR1_TXDSTALL_SHIFT (2U)

Definition at line 27510 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_CLKHOLD

#define LPI2C_SCFGR2_CLKHOLD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_CLKHOLD_SHIFT)) & LPI2C_SCFGR2_CLKHOLD_MASK)

CLKHOLD - Clock Hold Time

Definition at line 27588 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_CLKHOLD_MASK

#define LPI2C_SCFGR2_CLKHOLD_MASK (0xFU)

Definition at line 27584 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_CLKHOLD_SHIFT

#define LPI2C_SCFGR2_CLKHOLD_SHIFT (0U)

Definition at line 27585 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_DATAVD

#define LPI2C_SCFGR2_DATAVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_DATAVD_SHIFT)) & LPI2C_SCFGR2_DATAVD_MASK)

DATAVD - Data Valid Delay

Definition at line 27593 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_DATAVD_MASK

#define LPI2C_SCFGR2_DATAVD_MASK (0x3F00U)

Definition at line 27589 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_DATAVD_SHIFT

#define LPI2C_SCFGR2_DATAVD_SHIFT (8U)

Definition at line 27590 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSCL

#define LPI2C_SCFGR2_FILTSCL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSCL_SHIFT)) & LPI2C_SCFGR2_FILTSCL_MASK)

FILTSCL - Glitch Filter SCL

Definition at line 27598 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSCL_MASK

#define LPI2C_SCFGR2_FILTSCL_MASK (0xF0000U)

Definition at line 27594 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSCL_SHIFT

#define LPI2C_SCFGR2_FILTSCL_SHIFT (16U)

Definition at line 27595 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSDA

#define LPI2C_SCFGR2_FILTSDA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCFGR2_FILTSDA_SHIFT)) & LPI2C_SCFGR2_FILTSDA_MASK)

FILTSDA - Glitch Filter SDA

Definition at line 27603 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSDA_MASK

#define LPI2C_SCFGR2_FILTSDA_MASK (0xF000000U)

Definition at line 27599 of file MIMXRT1062.h.

## ◆ LPI2C_SCFGR2_FILTSDA_SHIFT

#define LPI2C_SCFGR2_FILTSDA_SHIFT (24U)

Definition at line 27600 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTDZ

#define LPI2C_SCR_FILTDZ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTDZ_SHIFT)) & LPI2C_SCR_FILTDZ_MASK)

FILTDZ - Filter Doze Enable 0b0..Filter remains enabled in Doze mode 0b1..Filter is disabled in Doze mode

Definition at line 27261 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTDZ_MASK

#define LPI2C_SCR_FILTDZ_MASK (0x20U)

Definition at line 27255 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTDZ_SHIFT

#define LPI2C_SCR_FILTDZ_SHIFT (5U)

Definition at line 27256 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTEN

#define LPI2C_SCR_FILTEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_FILTEN_SHIFT)) & LPI2C_SCR_FILTEN_MASK)

FILTEN - Filter Enable 0b0..Disable digital filter and output delay counter for slave mode 0b1..Enable digital filter and output delay counter for slave mode

Definition at line 27254 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTEN_MASK

#define LPI2C_SCR_FILTEN_MASK (0x10U)

Definition at line 27248 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_FILTEN_SHIFT

#define LPI2C_SCR_FILTEN_SHIFT (4U)

Definition at line 27249 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RRF

#define LPI2C_SCR_RRF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RRF_SHIFT)) & LPI2C_SCR_RRF_MASK)

RRF - Reset Receive FIFO 0b0..No effect 0b1..Receive Data Register is now empty

Definition at line 27275 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RRF_MASK

#define LPI2C_SCR_RRF_MASK (0x200U)

Definition at line 27269 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RRF_SHIFT

#define LPI2C_SCR_RRF_SHIFT (9U)

Definition at line 27270 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RST

#define LPI2C_SCR_RST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RST_SHIFT)) & LPI2C_SCR_RST_MASK)

RST - Software Reset 0b0..Slave mode logic is not reset 0b1..Slave mode logic is reset

Definition at line 27247 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RST_MASK

#define LPI2C_SCR_RST_MASK (0x2U)

Definition at line 27241 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RST_SHIFT

#define LPI2C_SCR_RST_SHIFT (1U)

Definition at line 27242 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RTF

#define LPI2C_SCR_RTF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_RTF_SHIFT)) & LPI2C_SCR_RTF_MASK)

RTF - Reset Transmit FIFO 0b0..No effect 0b1..Transmit Data Register is now empty

Definition at line 27268 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RTF_MASK

#define LPI2C_SCR_RTF_MASK (0x100U)

Definition at line 27262 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_RTF_SHIFT

#define LPI2C_SCR_RTF_SHIFT (8U)

Definition at line 27263 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_SEN

#define LPI2C_SCR_SEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SCR_SEN_SHIFT)) & LPI2C_SCR_SEN_MASK)

SEN - Slave Enable 0b0..I2C Slave mode is disabled 0b1..I2C Slave mode is enabled

Definition at line 27240 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_SEN_MASK

#define LPI2C_SCR_SEN_MASK (0x1U)

Definition at line 27234 of file MIMXRT1062.h.

## ◆ LPI2C_SCR_SEN_SHIFT

#define LPI2C_SCR_SEN_SHIFT (0U)

Definition at line 27235 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_AVDE

#define LPI2C_SDER_AVDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_AVDE_SHIFT)) & LPI2C_SDER_AVDE_MASK)

AVDE - Address Valid DMA Enable 0b0..DMA request is disabled 0b1..DMA request is enabled

Definition at line 27490 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_AVDE_MASK

#define LPI2C_SDER_AVDE_MASK (0x4U)

Definition at line 27484 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_AVDE_SHIFT

#define LPI2C_SDER_AVDE_SHIFT (2U)

Definition at line 27485 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_RDDE

#define LPI2C_SDER_RDDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_RDDE_SHIFT)) & LPI2C_SDER_RDDE_MASK)

RDDE - Receive Data DMA Enable 0b0..DMA request is disabled 0b1..DMA request is enabled

Definition at line 27483 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_RDDE_MASK

#define LPI2C_SDER_RDDE_MASK (0x2U)

Definition at line 27477 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_RDDE_SHIFT

#define LPI2C_SDER_RDDE_SHIFT (1U)

Definition at line 27478 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_TDDE

#define LPI2C_SDER_TDDE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SDER_TDDE_SHIFT)) & LPI2C_SDER_TDDE_MASK)

TDDE - Transmit Data DMA Enable 0b0..DMA request is disabled 0b1..DMA request is enabled

Definition at line 27476 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_TDDE_MASK

#define LPI2C_SDER_TDDE_MASK (0x1U)

Definition at line 27470 of file MIMXRT1062.h.

## ◆ LPI2C_SDER_TDDE_SHIFT

#define LPI2C_SDER_TDDE_SHIFT (0U)

Definition at line 27471 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM0IE

#define LPI2C_SIER_AM0IE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM0IE_SHIFT)) & LPI2C_SIER_AM0IE_MASK)

AM0IE - Address Match 0 Interrupt Enable 0b0..Enabled 0b1..Disabled

Definition at line 27444 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM0IE_MASK

#define LPI2C_SIER_AM0IE_MASK (0x1000U)

Definition at line 27438 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM0IE_SHIFT

#define LPI2C_SIER_AM0IE_SHIFT (12U)

Definition at line 27439 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM1F

#define LPI2C_SIER_AM1F | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AM1F_SHIFT)) & LPI2C_SIER_AM1F_MASK)

AM1F - Address Match 1 Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27451 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM1F_MASK

#define LPI2C_SIER_AM1F_MASK (0x2000U)

Definition at line 27445 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AM1F_SHIFT

#define LPI2C_SIER_AM1F_SHIFT (13U)

Definition at line 27446 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AVIE

#define LPI2C_SIER_AVIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_AVIE_SHIFT)) & LPI2C_SIER_AVIE_MASK)

AVIE - Address Valid Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27402 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AVIE_MASK

#define LPI2C_SIER_AVIE_MASK (0x4U)

Definition at line 27396 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_AVIE_SHIFT

#define LPI2C_SIER_AVIE_SHIFT (2U)

Definition at line 27397 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_BEIE

#define LPI2C_SIER_BEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_BEIE_SHIFT)) & LPI2C_SIER_BEIE_MASK)

BEIE - Bit Error Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27430 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_BEIE_MASK

#define LPI2C_SIER_BEIE_MASK (0x400U)

Definition at line 27424 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_BEIE_SHIFT

#define LPI2C_SIER_BEIE_SHIFT (10U)

Definition at line 27425 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_FEIE

#define LPI2C_SIER_FEIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_FEIE_SHIFT)) & LPI2C_SIER_FEIE_MASK)

FEIE - FIFO Error Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27437 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_FEIE_MASK

#define LPI2C_SIER_FEIE_MASK (0x800U)

Definition at line 27431 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_FEIE_SHIFT

#define LPI2C_SIER_FEIE_SHIFT (11U)

Definition at line 27432 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_GCIE

#define LPI2C_SIER_GCIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_GCIE_SHIFT)) & LPI2C_SIER_GCIE_MASK)

GCIE - General Call Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27458 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_GCIE_MASK

#define LPI2C_SIER_GCIE_MASK (0x4000U)

Definition at line 27452 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_GCIE_SHIFT

#define LPI2C_SIER_GCIE_SHIFT (14U)

Definition at line 27453 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RDIE

#define LPI2C_SIER_RDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RDIE_SHIFT)) & LPI2C_SIER_RDIE_MASK)

RDIE - Receive Data Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27395 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RDIE_MASK

#define LPI2C_SIER_RDIE_MASK (0x2U)

Definition at line 27389 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RDIE_SHIFT

#define LPI2C_SIER_RDIE_SHIFT (1U)

Definition at line 27390 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RSIE

#define LPI2C_SIER_RSIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_RSIE_SHIFT)) & LPI2C_SIER_RSIE_MASK)

RSIE - Repeated Start Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27416 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RSIE_MASK

#define LPI2C_SIER_RSIE_MASK (0x100U)

Definition at line 27410 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_RSIE_SHIFT

#define LPI2C_SIER_RSIE_SHIFT (8U)

Definition at line 27411 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SARIE

#define LPI2C_SIER_SARIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SARIE_SHIFT)) & LPI2C_SIER_SARIE_MASK)

SARIE - SMBus Alert Response Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27465 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SARIE_MASK

#define LPI2C_SIER_SARIE_MASK (0x8000U)

Definition at line 27459 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SARIE_SHIFT

#define LPI2C_SIER_SARIE_SHIFT (15U)

Definition at line 27460 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SDIE

#define LPI2C_SIER_SDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_SDIE_SHIFT)) & LPI2C_SIER_SDIE_MASK)

SDIE - STOP Detect Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27423 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SDIE_MASK

#define LPI2C_SIER_SDIE_MASK (0x200U)

Definition at line 27417 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_SDIE_SHIFT

#define LPI2C_SIER_SDIE_SHIFT (9U)

Definition at line 27418 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TAIE

#define LPI2C_SIER_TAIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TAIE_SHIFT)) & LPI2C_SIER_TAIE_MASK)

TAIE - Transmit ACK Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27409 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TAIE_MASK

#define LPI2C_SIER_TAIE_MASK (0x8U)

Definition at line 27403 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TAIE_SHIFT

#define LPI2C_SIER_TAIE_SHIFT (3U)

Definition at line 27404 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TDIE

#define LPI2C_SIER_TDIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SIER_TDIE_SHIFT)) & LPI2C_SIER_TDIE_MASK)

TDIE - Transmit Data Interrupt Enable 0b0..Disabled 0b1..Enabled

Definition at line 27388 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TDIE_MASK

#define LPI2C_SIER_TDIE_MASK (0x1U)

Definition at line 27382 of file MIMXRT1062.h.

## ◆ LPI2C_SIER_TDIE_SHIFT

#define LPI2C_SIER_TDIE_SHIFT (0U)

Definition at line 27383 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_DATA

#define LPI2C_SRDR_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_DATA_SHIFT)) & LPI2C_SRDR_DATA_MASK)

DATA - Receive Data

Definition at line 27662 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_DATA_MASK

#define LPI2C_SRDR_DATA_MASK (0xFFU)

Definition at line 27658 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_DATA_SHIFT

#define LPI2C_SRDR_DATA_SHIFT (0U)

Definition at line 27659 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_RXEMPTY

#define LPI2C_SRDR_RXEMPTY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_RXEMPTY_SHIFT)) & LPI2C_SRDR_RXEMPTY_MASK)

RXEMPTY - RX Empty 0b0..The Receive Data Register is not empty 0b1..The Receive Data Register is empty

Definition at line 27669 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_RXEMPTY_MASK

#define LPI2C_SRDR_RXEMPTY_MASK (0x4000U)

Definition at line 27663 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_RXEMPTY_SHIFT

#define LPI2C_SRDR_RXEMPTY_SHIFT (14U)

Definition at line 27664 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_SOF

#define LPI2C_SRDR_SOF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SRDR_SOF_SHIFT)) & LPI2C_SRDR_SOF_MASK)

SOF - Start Of Frame 0b0..Indicates this is not the first data word since a (repeated) START or STOP condition 0b1..Indicates this is the first data word since a (repeated) START or STOP condition

Definition at line 27676 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_SOF_MASK

#define LPI2C_SRDR_SOF_MASK (0x8000U)

Definition at line 27670 of file MIMXRT1062.h.

## ◆ LPI2C_SRDR_SOF_SHIFT

#define LPI2C_SRDR_SOF_SHIFT (15U)

Definition at line 27671 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM0F

#define LPI2C_SSR_AM0F | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM0F_SHIFT)) & LPI2C_SSR_AM0F_MASK)

AM0F - Address Match 0 Flag 0b0..Have not received an ADDR0 matching address 0b1..Have received an ADDR0 matching address

Definition at line 27342 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM0F_MASK

#define LPI2C_SSR_AM0F_MASK (0x1000U)

Definition at line 27336 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM0F_SHIFT

#define LPI2C_SSR_AM0F_SHIFT (12U)

Definition at line 27337 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM1F

#define LPI2C_SSR_AM1F | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AM1F_SHIFT)) & LPI2C_SSR_AM1F_MASK)

AM1F - Address Match 1 Flag 0b0..Have not received an ADDR1 or ADDR0/ADDR1 range matching address 0b1..Have received an ADDR1 or ADDR0/ADDR1 range matching address

Definition at line 27349 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM1F_MASK

#define LPI2C_SSR_AM1F_MASK (0x2000U)

Definition at line 27343 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AM1F_SHIFT

#define LPI2C_SSR_AM1F_SHIFT (13U)

Definition at line 27344 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AVF

#define LPI2C_SSR_AVF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_AVF_SHIFT)) & LPI2C_SSR_AVF_MASK)

AVF - Address Valid Flag 0b0..Address Status Register is not valid 0b1..Address Status Register is valid

Definition at line 27300 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AVF_MASK

#define LPI2C_SSR_AVF_MASK (0x4U)

Definition at line 27294 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_AVF_SHIFT

#define LPI2C_SSR_AVF_SHIFT (2U)

Definition at line 27295 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BBF

#define LPI2C_SSR_BBF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BBF_SHIFT)) & LPI2C_SSR_BBF_MASK)

BBF - Bus Busy Flag 0b0..I2C Bus is idle 0b1..I2C Bus is busy

Definition at line 27377 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BBF_MASK

#define LPI2C_SSR_BBF_MASK (0x2000000U)

Definition at line 27371 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BBF_SHIFT

#define LPI2C_SSR_BBF_SHIFT (25U)

Definition at line 27372 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BEF

#define LPI2C_SSR_BEF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_BEF_SHIFT)) & LPI2C_SSR_BEF_MASK)

BEF - Bit Error Flag 0b0..Slave has not detected a bit error 0b1..Slave has detected a bit error

Definition at line 27328 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BEF_MASK

#define LPI2C_SSR_BEF_MASK (0x400U)

Definition at line 27322 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_BEF_SHIFT

#define LPI2C_SSR_BEF_SHIFT (10U)

Definition at line 27323 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_FEF

#define LPI2C_SSR_FEF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_FEF_SHIFT)) & LPI2C_SSR_FEF_MASK)

FEF - FIFO Error Flag 0b0..FIFO underflow or overflow was not detected 0b1..FIFO underflow or overflow was detected

Definition at line 27335 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_FEF_MASK

#define LPI2C_SSR_FEF_MASK (0x800U)

Definition at line 27329 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_FEF_SHIFT

#define LPI2C_SSR_FEF_SHIFT (11U)

Definition at line 27330 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_GCF

#define LPI2C_SSR_GCF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_GCF_SHIFT)) & LPI2C_SSR_GCF_MASK)

GCF - General Call Flag 0b0..Slave has not detected the General Call Address or the General Call Address is disabled 0b1..Slave has detected the General Call Address

Definition at line 27356 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_GCF_MASK

#define LPI2C_SSR_GCF_MASK (0x4000U)

Definition at line 27350 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_GCF_SHIFT

#define LPI2C_SSR_GCF_SHIFT (14U)

Definition at line 27351 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RDF

#define LPI2C_SSR_RDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RDF_SHIFT)) & LPI2C_SSR_RDF_MASK)

RDF - Receive Data Flag 0b0..Receive data is not ready 0b1..Receive data is ready

Definition at line 27293 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RDF_MASK

#define LPI2C_SSR_RDF_MASK (0x2U)

Definition at line 27287 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RDF_SHIFT

#define LPI2C_SSR_RDF_SHIFT (1U)

Definition at line 27288 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RSF

#define LPI2C_SSR_RSF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_RSF_SHIFT)) & LPI2C_SSR_RSF_MASK)

RSF - Repeated Start Flag 0b0..Slave has not detected a Repeated START condition 0b1..Slave has detected a Repeated START condition

Definition at line 27314 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RSF_MASK

#define LPI2C_SSR_RSF_MASK (0x100U)

Definition at line 27308 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_RSF_SHIFT

#define LPI2C_SSR_RSF_SHIFT (8U)

Definition at line 27309 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SARF

#define LPI2C_SSR_SARF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SARF_SHIFT)) & LPI2C_SSR_SARF_MASK)

SARF - SMBus Alert Response Flag 0b0..SMBus Alert Response is disabled or not detected 0b1..SMBus Alert Response is enabled and detected

Definition at line 27363 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SARF_MASK

#define LPI2C_SSR_SARF_MASK (0x8000U)

Definition at line 27357 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SARF_SHIFT

#define LPI2C_SSR_SARF_SHIFT (15U)

Definition at line 27358 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SBF

#define LPI2C_SSR_SBF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SBF_SHIFT)) & LPI2C_SSR_SBF_MASK)

SBF - Slave Busy Flag 0b0..I2C Slave is idle 0b1..I2C Slave is busy

Definition at line 27370 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SBF_MASK

#define LPI2C_SSR_SBF_MASK (0x1000000U)

Definition at line 27364 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SBF_SHIFT

#define LPI2C_SSR_SBF_SHIFT (24U)

Definition at line 27365 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SDF

#define LPI2C_SSR_SDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_SDF_SHIFT)) & LPI2C_SSR_SDF_MASK)

SDF - STOP Detect Flag 0b0..Slave has not detected a STOP condition 0b1..Slave has detected a STOP condition

Definition at line 27321 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SDF_MASK

#define LPI2C_SSR_SDF_MASK (0x200U)

Definition at line 27315 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_SDF_SHIFT

#define LPI2C_SSR_SDF_SHIFT (9U)

Definition at line 27316 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TAF

#define LPI2C_SSR_TAF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TAF_SHIFT)) & LPI2C_SSR_TAF_MASK)

TAF - Transmit ACK Flag 0b0..Transmit ACK/NACK is not required 0b1..Transmit ACK/NACK is required

Definition at line 27307 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TAF_MASK

#define LPI2C_SSR_TAF_MASK (0x8U)

Definition at line 27301 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TAF_SHIFT

#define LPI2C_SSR_TAF_SHIFT (3U)

Definition at line 27302 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TDF

#define LPI2C_SSR_TDF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_SSR_TDF_SHIFT)) & LPI2C_SSR_TDF_MASK)

TDF - Transmit Data Flag 0b0..Transmit data not requested 0b1..Transmit data is requested

Definition at line 27286 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TDF_MASK

#define LPI2C_SSR_TDF_MASK (0x1U)

Definition at line 27280 of file MIMXRT1062.h.

## ◆ LPI2C_SSR_TDF_SHIFT

#define LPI2C_SSR_TDF_SHIFT (0U)

Definition at line 27281 of file MIMXRT1062.h.

## ◆ LPI2C_STAR_TXNACK

#define LPI2C_STAR_TXNACK | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_STAR_TXNACK_SHIFT)) & LPI2C_STAR_TXNACK_MASK)

TXNACK - Transmit NACK 0b0..Write a Transmit ACK for each received word 0b1..Write a Transmit NACK for each received word

Definition at line 27644 of file MIMXRT1062.h.

## ◆ LPI2C_STAR_TXNACK_MASK

#define LPI2C_STAR_TXNACK_MASK (0x1U)

Definition at line 27638 of file MIMXRT1062.h.

## ◆ LPI2C_STAR_TXNACK_SHIFT

#define LPI2C_STAR_TXNACK_SHIFT (0U)

Definition at line 27639 of file MIMXRT1062.h.

## ◆ LPI2C_STDR_DATA

#define LPI2C_STDR_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_STDR_DATA_SHIFT)) & LPI2C_STDR_DATA_MASK)

DATA - Transmit Data

Definition at line 27653 of file MIMXRT1062.h.

## ◆ LPI2C_STDR_DATA_MASK

#define LPI2C_STDR_DATA_MASK (0xFFU)

Definition at line 27649 of file MIMXRT1062.h.

## ◆ LPI2C_STDR_DATA_SHIFT

#define LPI2C_STDR_DATA_SHIFT (0U)

Definition at line 27650 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_FEATURE

#define LPI2C_VERID_FEATURE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)

FEATURE - Feature Specification Number 0b0000000000000010..Master only, with standard feature set 0b0000000000000011..Master and slave, with standard feature set

Definition at line 26734 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_FEATURE_MASK

#define LPI2C_VERID_FEATURE_MASK (0xFFFFU)

Definition at line 26728 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_FEATURE_SHIFT

#define LPI2C_VERID_FEATURE_SHIFT (0U)

Definition at line 26729 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MAJOR

#define LPI2C_VERID_MAJOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)

MAJOR - Major Version Number

Definition at line 26744 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MAJOR_MASK

#define LPI2C_VERID_MAJOR_MASK (0xFF000000U)

Definition at line 26740 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MAJOR_SHIFT

#define LPI2C_VERID_MAJOR_SHIFT (24U)

Definition at line 26741 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MINOR

#define LPI2C_VERID_MINOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)

MINOR - Minor Version Number

Definition at line 26739 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MINOR_MASK

#define LPI2C_VERID_MINOR_MASK (0xFF0000U)

Definition at line 26735 of file MIMXRT1062.h.

## ◆ LPI2C_VERID_MINOR_SHIFT

#define LPI2C_VERID_MINOR_SHIFT (16U)

Definition at line 26736 of file MIMXRT1062.h.