Callisto4Bootloader: Status and Control Registers

Callisto4Bootloader

Modules | Data Structures
Status and Control Registers
Defines and Type Definitions

Core Register type definitions. More...

## Modules

| Nested Vectored Interrupt Controller (NVIC)
| Type definitions for the NVIC Registers.

## Data Structures

union | APSR_Type
| Union type to access the Application Program Status Register (APSR). More...
union | IPSR_Type
| Union type to access the Interrupt Program Status Register (IPSR). More...
union | xPSR_Type
| Union type to access the Special-Purpose Program Status Registers (xPSR). More...
union | CONTROL_Type
| Union type to access the Control Registers (CONTROL). More...
#define | APSR_N_Pos 31U
#define | APSR_N_Msk (1UL << APSR_N_Pos)
#define | APSR_Z_Pos 30U
#define | APSR_Z_Msk (1UL << APSR_Z_Pos)
#define | APSR_C_Pos 29U
#define | APSR_C_Msk (1UL << APSR_C_Pos)
#define | APSR_V_Pos 28U
#define | APSR_V_Msk (1UL << APSR_V_Pos)
#define | APSR_Q_Pos 27U
#define | APSR_Q_Msk (1UL << APSR_Q_Pos)
#define | APSR_GE_Pos 16U
#define | APSR_GE_Msk (0xFUL << APSR_GE_Pos)
#define | IPSR_ISR_Pos 0U
#define | IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)
#define | xPSR_N_Pos 31U
#define | xPSR_N_Msk (1UL << xPSR_N_Pos)
#define | xPSR_Z_Pos 30U
#define | xPSR_Z_Msk (1UL << xPSR_Z_Pos)
#define | xPSR_C_Pos 29U
#define | xPSR_C_Msk (1UL << xPSR_C_Pos)
#define | xPSR_V_Pos 28U
#define | xPSR_V_Msk (1UL << xPSR_V_Pos)
#define | xPSR_Q_Pos 27U
#define | xPSR_Q_Msk (1UL << xPSR_Q_Pos)
#define | xPSR_IT_Pos 25U
#define | xPSR_IT_Msk (3UL << xPSR_IT_Pos)
#define | xPSR_T_Pos 24U
#define | xPSR_T_Msk (1UL << xPSR_T_Pos)
#define | xPSR_GE_Pos 16U
#define | xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)
#define | xPSR_ISR_Pos 0U
#define | xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)
#define | CONTROL_SFPA_Pos 3U
#define | CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos)
#define | CONTROL_FPCA_Pos 2U
#define | CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)
#define | CONTROL_SPSEL_Pos 1U
#define | CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)
#define | CONTROL_nPRIV_Pos 0U
#define | CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)
#define | APSR_N_Pos 31U
#define | APSR_N_Msk (1UL << APSR_N_Pos)
#define | APSR_Z_Pos 30U
#define | APSR_Z_Msk (1UL << APSR_Z_Pos)
#define | APSR_C_Pos 29U
#define | APSR_C_Msk (1UL << APSR_C_Pos)
#define | APSR_V_Pos 28U
#define | APSR_V_Msk (1UL << APSR_V_Pos)
#define | IPSR_ISR_Pos 0U
#define | IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)
#define | xPSR_N_Pos 31U
#define | xPSR_N_Msk (1UL << xPSR_N_Pos)
#define | xPSR_Z_Pos 30U
#define | xPSR_Z_Msk (1UL << xPSR_Z_Pos)
#define | xPSR_C_Pos 29U
#define | xPSR_C_Msk (1UL << xPSR_C_Pos)
#define | xPSR_V_Pos 28U
#define | xPSR_V_Msk (1UL << xPSR_V_Pos)
#define | xPSR_T_Pos 24U
#define | xPSR_T_Msk (1UL << xPSR_T_Pos)
#define | xPSR_ISR_Pos 0U
#define | xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)
#define | CONTROL_SPSEL_Pos 1U
#define | CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)
#define | CONTROL_nPRIV_Pos 0U
#define | CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)
#define | APSR_N_Pos 31U
#define | APSR_N_Msk (1UL << APSR_N_Pos)
#define | APSR_Z_Pos 30U
#define | APSR_Z_Msk (1UL << APSR_Z_Pos)
#define | APSR_C_Pos 29U
#define | APSR_C_Msk (1UL << APSR_C_Pos)
#define | APSR_V_Pos 28U
#define | APSR_V_Msk (1UL << APSR_V_Pos)
#define | APSR_Q_Pos 27U
#define | APSR_Q_Msk (1UL << APSR_Q_Pos)
#define | APSR_GE_Pos 16U
#define | APSR_GE_Msk (0xFUL << APSR_GE_Pos)
#define | IPSR_ISR_Pos 0U
#define | IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)
#define | xPSR_N_Pos 31U
#define | xPSR_N_Msk (1UL << xPSR_N_Pos)
#define | xPSR_Z_Pos 30U
#define | xPSR_Z_Msk (1UL << xPSR_Z_Pos)
#define | xPSR_C_Pos 29U
#define | xPSR_C_Msk (1UL << xPSR_C_Pos)
#define | xPSR_V_Pos 28U
#define | xPSR_V_Msk (1UL << xPSR_V_Pos)
#define | xPSR_Q_Pos 27U
#define | xPSR_Q_Msk (1UL << xPSR_Q_Pos)
#define | xPSR_IT_Pos 25U
#define | xPSR_IT_Msk (3UL << xPSR_IT_Pos)
#define | xPSR_T_Pos 24U
#define | xPSR_T_Msk (1UL << xPSR_T_Pos)
#define | xPSR_GE_Pos 16U
#define | xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)
#define | xPSR_ISR_Pos 0U
#define | xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)
#define | CONTROL_SFPA_Pos 3U
#define | CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos)
#define | CONTROL_FPCA_Pos 2U
#define | CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)
#define | CONTROL_SPSEL_Pos 1U
#define | CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)
#define | CONTROL_nPRIV_Pos 0U
#define | CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)
#define | APSR_N_Pos 31U
#define | APSR_N_Msk (1UL << APSR_N_Pos)
#define | APSR_Z_Pos 30U
#define | APSR_Z_Msk (1UL << APSR_Z_Pos)
#define | APSR_C_Pos 29U
#define | APSR_C_Msk (1UL << APSR_C_Pos)
#define | APSR_V_Pos 28U
#define | APSR_V_Msk (1UL << APSR_V_Pos)
#define | APSR_Q_Pos 27U
#define | APSR_Q_Msk (1UL << APSR_Q_Pos)
#define | APSR_GE_Pos 16U
#define | APSR_GE_Msk (0xFUL << APSR_GE_Pos)
#define | IPSR_ISR_Pos 0U
#define | IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)
#define | xPSR_N_Pos 31U
#define | xPSR_N_Msk (1UL << xPSR_N_Pos)
#define | xPSR_Z_Pos 30U
#define | xPSR_Z_Msk (1UL << xPSR_Z_Pos)
#define | xPSR_C_Pos 29U
#define | xPSR_C_Msk (1UL << xPSR_C_Pos)
#define | xPSR_V_Pos 28U
#define | xPSR_V_Msk (1UL << xPSR_V_Pos)
#define | xPSR_Q_Pos 27U
#define | xPSR_Q_Msk (1UL << xPSR_Q_Pos)
#define | xPSR_ICI_IT_2_Pos 25U
#define | xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos)
#define | xPSR_T_Pos 24U
#define | xPSR_T_Msk (1UL << xPSR_T_Pos)
#define | xPSR_GE_Pos 16U
#define | xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)
#define | xPSR_ICI_IT_1_Pos 10U
#define | xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos)
#define | xPSR_ISR_Pos 0U
#define | xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)
#define | CONTROL_FPCA_Pos 2U
#define | CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)
#define | CONTROL_SPSEL_Pos 1U
#define | CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)
#define | CONTROL_nPRIV_Pos 0U
#define | CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)

## Detailed Description

Core Register type definitions.

## Macro Definition Documentation

## ◆ APSR_C_Msk [1/4]

#define APSR_C_Msk (1UL << APSR_C_Pos)

APSR: C Mask

Definition at line 252 of file core_armv8mbl.h.

## ◆ APSR_C_Msk [2/4]

#define APSR_C_Msk (1UL << APSR_C_Pos)

APSR: C Mask

Definition at line 296 of file core_cm7.h.

## ◆ APSR_C_Msk [3/4]

#define APSR_C_Msk (1UL << APSR_C_Pos)

APSR: C Mask

Definition at line 336 of file core_armv8mml.h.

## ◆ APSR_C_Msk [4/4]

#define APSR_C_Msk (1UL << APSR_C_Pos)

APSR: C Mask

Definition at line 338 of file core_armv81mml.h.

## ◆ APSR_C_Pos [1/4]

#define APSR_C_Pos 29U

APSR: C Position

Definition at line 251 of file core_armv8mbl.h.

## ◆ APSR_C_Pos [2/4]

#define APSR_C_Pos 29U

APSR: C Position

Definition at line 295 of file core_cm7.h.

## ◆ APSR_C_Pos [3/4]

#define APSR_C_Pos 29U

APSR: C Position

Definition at line 335 of file core_armv8mml.h.

## ◆ APSR_C_Pos [4/4]

#define APSR_C_Pos 29U

APSR: C Position

Definition at line 337 of file core_armv81mml.h.

## ◆ APSR_GE_Msk [1/3]

#define APSR_GE_Msk (0xFUL << APSR_GE_Pos)

APSR: GE Mask

Definition at line 305 of file core_cm7.h.

## ◆ APSR_GE_Msk [2/3]

#define APSR_GE_Msk (0xFUL << APSR_GE_Pos)

APSR: GE Mask

Definition at line 345 of file core_armv8mml.h.

## ◆ APSR_GE_Msk [3/3]

#define APSR_GE_Msk (0xFUL << APSR_GE_Pos)

APSR: GE Mask

Definition at line 347 of file core_armv81mml.h.

## ◆ APSR_GE_Pos [1/3]

#define APSR_GE_Pos 16U

APSR: GE Position

Definition at line 304 of file core_cm7.h.

## ◆ APSR_GE_Pos [2/3]

#define APSR_GE_Pos 16U

APSR: GE Position

Definition at line 344 of file core_armv8mml.h.

## ◆ APSR_GE_Pos [3/3]

#define APSR_GE_Pos 16U

APSR: GE Position

Definition at line 346 of file core_armv81mml.h.

## ◆ APSR_N_Msk [1/4]

#define APSR_N_Msk (1UL << APSR_N_Pos)

APSR: N Mask

Definition at line 246 of file core_armv8mbl.h.

## ◆ APSR_N_Msk [2/4]

#define APSR_N_Msk (1UL << APSR_N_Pos)

APSR: N Mask

Definition at line 290 of file core_cm7.h.

## ◆ APSR_N_Msk [3/4]

#define APSR_N_Msk (1UL << APSR_N_Pos)

APSR: N Mask

Definition at line 330 of file core_armv8mml.h.

## ◆ APSR_N_Msk [4/4]

#define APSR_N_Msk (1UL << APSR_N_Pos)

APSR: N Mask

Definition at line 332 of file core_armv81mml.h.

## ◆ APSR_N_Pos [1/4]

#define APSR_N_Pos 31U

APSR: N Position

Definition at line 245 of file core_armv8mbl.h.

## ◆ APSR_N_Pos [2/4]

#define APSR_N_Pos 31U

APSR: N Position

Definition at line 289 of file core_cm7.h.

## ◆ APSR_N_Pos [3/4]

#define APSR_N_Pos 31U

APSR: N Position

Definition at line 329 of file core_armv8mml.h.

## ◆ APSR_N_Pos [4/4]

#define APSR_N_Pos 31U

APSR: N Position

Definition at line 331 of file core_armv81mml.h.

## ◆ APSR_Q_Msk [1/3]

#define APSR_Q_Msk (1UL << APSR_Q_Pos)

APSR: Q Mask

Definition at line 302 of file core_cm7.h.

## ◆ APSR_Q_Msk [2/3]

#define APSR_Q_Msk (1UL << APSR_Q_Pos)

APSR: Q Mask

Definition at line 342 of file core_armv8mml.h.

## ◆ APSR_Q_Msk [3/3]

#define APSR_Q_Msk (1UL << APSR_Q_Pos)

APSR: Q Mask

Definition at line 344 of file core_armv81mml.h.

## ◆ APSR_Q_Pos [1/3]

#define APSR_Q_Pos 27U

APSR: Q Position

Definition at line 301 of file core_cm7.h.

## ◆ APSR_Q_Pos [2/3]

#define APSR_Q_Pos 27U

APSR: Q Position

Definition at line 341 of file core_armv8mml.h.

## ◆ APSR_Q_Pos [3/3]

#define APSR_Q_Pos 27U

APSR: Q Position

Definition at line 343 of file core_armv81mml.h.

## ◆ APSR_V_Msk [1/4]

#define APSR_V_Msk (1UL << APSR_V_Pos)

APSR: V Mask

Definition at line 255 of file core_armv8mbl.h.

## ◆ APSR_V_Msk [2/4]

#define APSR_V_Msk (1UL << APSR_V_Pos)

APSR: V Mask

Definition at line 299 of file core_cm7.h.

## ◆ APSR_V_Msk [3/4]

#define APSR_V_Msk (1UL << APSR_V_Pos)

APSR: V Mask

Definition at line 339 of file core_armv8mml.h.

## ◆ APSR_V_Msk [4/4]

#define APSR_V_Msk (1UL << APSR_V_Pos)

APSR: V Mask

Definition at line 341 of file core_armv81mml.h.

## ◆ APSR_V_Pos [1/4]

#define APSR_V_Pos 28U

APSR: V Position

Definition at line 254 of file core_armv8mbl.h.

## ◆ APSR_V_Pos [2/4]

#define APSR_V_Pos 28U

APSR: V Position

Definition at line 298 of file core_cm7.h.

## ◆ APSR_V_Pos [3/4]

#define APSR_V_Pos 28U

APSR: V Position

Definition at line 338 of file core_armv8mml.h.

## ◆ APSR_V_Pos [4/4]

#define APSR_V_Pos 28U

APSR: V Position

Definition at line 340 of file core_armv81mml.h.

## ◆ APSR_Z_Msk [1/4]

#define APSR_Z_Msk (1UL << APSR_Z_Pos)

APSR: Z Mask

Definition at line 249 of file core_armv8mbl.h.

## ◆ APSR_Z_Msk [2/4]

#define APSR_Z_Msk (1UL << APSR_Z_Pos)

APSR: Z Mask

Definition at line 293 of file core_cm7.h.

## ◆ APSR_Z_Msk [3/4]

#define APSR_Z_Msk (1UL << APSR_Z_Pos)

APSR: Z Mask

Definition at line 333 of file core_armv8mml.h.

## ◆ APSR_Z_Msk [4/4]

#define APSR_Z_Msk (1UL << APSR_Z_Pos)

APSR: Z Mask

Definition at line 335 of file core_armv81mml.h.

## ◆ APSR_Z_Pos [1/4]

#define APSR_Z_Pos 30U

APSR: Z Position

Definition at line 248 of file core_armv8mbl.h.

## ◆ APSR_Z_Pos [2/4]

#define APSR_Z_Pos 30U

APSR: Z Position

Definition at line 292 of file core_cm7.h.

## ◆ APSR_Z_Pos [3/4]

#define APSR_Z_Pos 30U

APSR: Z Position

Definition at line 332 of file core_armv8mml.h.

## ◆ APSR_Z_Pos [4/4]

#define APSR_Z_Pos 30U

APSR: Z Position

Definition at line 334 of file core_armv81mml.h.

## ◆ CONTROL_FPCA_Msk [1/3]

#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)

CONTROL: FPCA Mask

Definition at line 398 of file core_cm7.h.

## ◆ CONTROL_FPCA_Msk [2/3]

#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)

CONTROL: FPCA Mask

Definition at line 438 of file core_armv8mml.h.

## ◆ CONTROL_FPCA_Msk [3/3]

#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos)

CONTROL: FPCA Mask

Definition at line 440 of file core_armv81mml.h.

## ◆ CONTROL_FPCA_Pos [1/3]

#define CONTROL_FPCA_Pos 2U

CONTROL: FPCA Position

Definition at line 397 of file core_cm7.h.

## ◆ CONTROL_FPCA_Pos [2/3]

#define CONTROL_FPCA_Pos 2U

CONTROL: FPCA Position

Definition at line 437 of file core_armv8mml.h.

## ◆ CONTROL_FPCA_Pos [3/3]

#define CONTROL_FPCA_Pos 2U

CONTROL: FPCA Position

Definition at line 439 of file core_armv81mml.h.

## ◆ CONTROL_nPRIV_Msk [1/4]

#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)

CONTROL: nPRIV Mask

Definition at line 334 of file core_armv8mbl.h.

## ◆ CONTROL_nPRIV_Msk [2/4]

#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)

CONTROL: nPRIV Mask

Definition at line 404 of file core_cm7.h.

## ◆ CONTROL_nPRIV_Msk [3/4]

#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)

CONTROL: nPRIV Mask

Definition at line 444 of file core_armv8mml.h.

## ◆ CONTROL_nPRIV_Msk [4/4]

#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/)

CONTROL: nPRIV Mask

Definition at line 446 of file core_armv81mml.h.

## ◆ CONTROL_nPRIV_Pos [1/4]

#define CONTROL_nPRIV_Pos 0U

CONTROL: nPRIV Position

Definition at line 333 of file core_armv8mbl.h.

## ◆ CONTROL_nPRIV_Pos [2/4]

#define CONTROL_nPRIV_Pos 0U

CONTROL: nPRIV Position

Definition at line 403 of file core_cm7.h.

## ◆ CONTROL_nPRIV_Pos [3/4]

#define CONTROL_nPRIV_Pos 0U

CONTROL: nPRIV Position

Definition at line 443 of file core_armv8mml.h.

## ◆ CONTROL_nPRIV_Pos [4/4]

#define CONTROL_nPRIV_Pos 0U

CONTROL: nPRIV Position

Definition at line 445 of file core_armv81mml.h.

## ◆ CONTROL_SFPA_Msk [1/2]

#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos)

CONTROL: SFPA Mask

Definition at line 435 of file core_armv8mml.h.

## ◆ CONTROL_SFPA_Msk [2/2]

#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos)

CONTROL: SFPA Mask

Definition at line 437 of file core_armv81mml.h.

## ◆ CONTROL_SFPA_Pos [1/2]

#define CONTROL_SFPA_Pos 3U

CONTROL: SFPA Position

Definition at line 434 of file core_armv8mml.h.

## ◆ CONTROL_SFPA_Pos [2/2]

#define CONTROL_SFPA_Pos 3U

CONTROL: SFPA Position

Definition at line 436 of file core_armv81mml.h.

## ◆ CONTROL_SPSEL_Msk [1/4]

#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)

CONTROL: SPSEL Mask

Definition at line 331 of file core_armv8mbl.h.

## ◆ CONTROL_SPSEL_Msk [2/4]

#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)

CONTROL: SPSEL Mask

Definition at line 401 of file core_cm7.h.

## ◆ CONTROL_SPSEL_Msk [3/4]

#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)

CONTROL: SPSEL Mask

Definition at line 441 of file core_armv8mml.h.

## ◆ CONTROL_SPSEL_Msk [4/4]

#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos)

CONTROL: SPSEL Mask

Definition at line 443 of file core_armv81mml.h.

## ◆ CONTROL_SPSEL_Pos [1/4]

#define CONTROL_SPSEL_Pos 1U

CONTROL: SPSEL Position

Definition at line 330 of file core_armv8mbl.h.

## ◆ CONTROL_SPSEL_Pos [2/4]

#define CONTROL_SPSEL_Pos 1U

CONTROL: SPSEL Position

Definition at line 400 of file core_cm7.h.

## ◆ CONTROL_SPSEL_Pos [3/4]

#define CONTROL_SPSEL_Pos 1U

CONTROL: SPSEL Position

Definition at line 440 of file core_armv8mml.h.

## ◆ CONTROL_SPSEL_Pos [4/4]

#define CONTROL_SPSEL_Pos 1U

CONTROL: SPSEL Position

Definition at line 442 of file core_armv81mml.h.

## ◆ IPSR_ISR_Msk [1/4]

#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)

IPSR: ISR Mask

Definition at line 273 of file core_armv8mbl.h.

## ◆ IPSR_ISR_Msk [2/4]

#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)

IPSR: ISR Mask

Definition at line 323 of file core_cm7.h.

## ◆ IPSR_ISR_Msk [3/4]

#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)

IPSR: ISR Mask

Definition at line 363 of file core_armv8mml.h.

## ◆ IPSR_ISR_Msk [4/4]

#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/)

IPSR: ISR Mask

Definition at line 365 of file core_armv81mml.h.

## ◆ IPSR_ISR_Pos [1/4]

#define IPSR_ISR_Pos 0U

IPSR: ISR Position

Definition at line 272 of file core_armv8mbl.h.

## ◆ IPSR_ISR_Pos [2/4]

#define IPSR_ISR_Pos 0U

IPSR: ISR Position

Definition at line 322 of file core_cm7.h.

## ◆ IPSR_ISR_Pos [3/4]

#define IPSR_ISR_Pos 0U

IPSR: ISR Position

Definition at line 362 of file core_armv8mml.h.

## ◆ IPSR_ISR_Pos [4/4]

#define IPSR_ISR_Pos 0U

IPSR: ISR Position

Definition at line 364 of file core_armv81mml.h.

## ◆ xPSR_C_Msk [1/4]

#define xPSR_C_Msk (1UL << xPSR_C_Pos)

xPSR: C Mask

Definition at line 303 of file core_armv8mbl.h.

## ◆ xPSR_C_Msk [2/4]

#define xPSR_C_Msk (1UL << xPSR_C_Pos)

xPSR: C Mask

Definition at line 357 of file core_cm7.h.

## ◆ xPSR_C_Msk [3/4]

#define xPSR_C_Msk (1UL << xPSR_C_Pos)

xPSR: C Mask

Definition at line 396 of file core_armv8mml.h.

## ◆ xPSR_C_Msk [4/4]

#define xPSR_C_Msk (1UL << xPSR_C_Pos)

xPSR: C Mask

Definition at line 398 of file core_armv81mml.h.

## ◆ xPSR_C_Pos [1/4]

#define xPSR_C_Pos 29U

xPSR: C Position

Definition at line 302 of file core_armv8mbl.h.

## ◆ xPSR_C_Pos [2/4]

#define xPSR_C_Pos 29U

xPSR: C Position

Definition at line 356 of file core_cm7.h.

## ◆ xPSR_C_Pos [3/4]

#define xPSR_C_Pos 29U

xPSR: C Position

Definition at line 395 of file core_armv8mml.h.

## ◆ xPSR_C_Pos [4/4]

#define xPSR_C_Pos 29U

xPSR: C Position

Definition at line 397 of file core_armv81mml.h.

## ◆ xPSR_GE_Msk [1/3]

#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)

xPSR: GE Mask

Definition at line 372 of file core_cm7.h.

## ◆ xPSR_GE_Msk [2/3]

#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)

xPSR: GE Mask

Definition at line 411 of file core_armv8mml.h.

## ◆ xPSR_GE_Msk [3/3]

#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos)

xPSR: GE Mask

Definition at line 413 of file core_armv81mml.h.

## ◆ xPSR_GE_Pos [1/3]

#define xPSR_GE_Pos 16U

xPSR: GE Position

Definition at line 371 of file core_cm7.h.

## ◆ xPSR_GE_Pos [2/3]

#define xPSR_GE_Pos 16U

xPSR: GE Position

Definition at line 410 of file core_armv8mml.h.

## ◆ xPSR_GE_Pos [3/3]

#define xPSR_GE_Pos 16U

xPSR: GE Position

Definition at line 412 of file core_armv81mml.h.

## ◆ xPSR_ICI_IT_1_Msk

#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos)

xPSR: ICI/IT part 1 Mask

Definition at line 375 of file core_cm7.h.

## ◆ xPSR_ICI_IT_1_Pos

#define xPSR_ICI_IT_1_Pos 10U

xPSR: ICI/IT part 1 Position

Definition at line 374 of file core_cm7.h.

## ◆ xPSR_ICI_IT_2_Msk

#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos)

xPSR: ICI/IT part 2 Mask

Definition at line 366 of file core_cm7.h.

## ◆ xPSR_ICI_IT_2_Pos

#define xPSR_ICI_IT_2_Pos 25U

xPSR: ICI/IT part 2 Position

Definition at line 365 of file core_cm7.h.

## ◆ xPSR_ISR_Msk [1/4]

#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)

xPSR: ISR Mask

Definition at line 312 of file core_armv8mbl.h.

## ◆ xPSR_ISR_Msk [2/4]

#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)

xPSR: ISR Mask

Definition at line 378 of file core_cm7.h.

## ◆ xPSR_ISR_Msk [3/4]

#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)

xPSR: ISR Mask

Definition at line 414 of file core_armv8mml.h.

## ◆ xPSR_ISR_Msk [4/4]

#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/)

xPSR: ISR Mask

Definition at line 416 of file core_armv81mml.h.

## ◆ xPSR_ISR_Pos [1/4]

#define xPSR_ISR_Pos 0U

xPSR: ISR Position

Definition at line 311 of file core_armv8mbl.h.

## ◆ xPSR_ISR_Pos [2/4]

#define xPSR_ISR_Pos 0U

xPSR: ISR Position

Definition at line 377 of file core_cm7.h.

## ◆ xPSR_ISR_Pos [3/4]

#define xPSR_ISR_Pos 0U

xPSR: ISR Position

Definition at line 413 of file core_armv8mml.h.

## ◆ xPSR_ISR_Pos [4/4]

#define xPSR_ISR_Pos 0U

xPSR: ISR Position

Definition at line 415 of file core_armv81mml.h.

## ◆ xPSR_IT_Msk [1/2]

#define xPSR_IT_Msk (3UL << xPSR_IT_Pos)

xPSR: IT Mask

Definition at line 405 of file core_armv8mml.h.

## ◆ xPSR_IT_Msk [2/2]

#define xPSR_IT_Msk (3UL << xPSR_IT_Pos)

xPSR: IT Mask

Definition at line 407 of file core_armv81mml.h.

## ◆ xPSR_IT_Pos [1/2]

#define xPSR_IT_Pos 25U

xPSR: IT Position

Definition at line 404 of file core_armv8mml.h.

## ◆ xPSR_IT_Pos [2/2]

#define xPSR_IT_Pos 25U

xPSR: IT Position

Definition at line 406 of file core_armv81mml.h.

## ◆ xPSR_N_Msk [1/4]

#define xPSR_N_Msk (1UL << xPSR_N_Pos)

xPSR: N Mask

Definition at line 297 of file core_armv8mbl.h.

## ◆ xPSR_N_Msk [2/4]

#define xPSR_N_Msk (1UL << xPSR_N_Pos)

xPSR: N Mask

Definition at line 351 of file core_cm7.h.

## ◆ xPSR_N_Msk [3/4]

#define xPSR_N_Msk (1UL << xPSR_N_Pos)

xPSR: N Mask

Definition at line 390 of file core_armv8mml.h.

## ◆ xPSR_N_Msk [4/4]

#define xPSR_N_Msk (1UL << xPSR_N_Pos)

xPSR: N Mask

Definition at line 392 of file core_armv81mml.h.

## ◆ xPSR_N_Pos [1/4]

#define xPSR_N_Pos 31U

xPSR: N Position

Definition at line 296 of file core_armv8mbl.h.

## ◆ xPSR_N_Pos [2/4]

#define xPSR_N_Pos 31U

xPSR: N Position

Definition at line 350 of file core_cm7.h.

## ◆ xPSR_N_Pos [3/4]

#define xPSR_N_Pos 31U

xPSR: N Position

Definition at line 389 of file core_armv8mml.h.

## ◆ xPSR_N_Pos [4/4]

#define xPSR_N_Pos 31U

xPSR: N Position

Definition at line 391 of file core_armv81mml.h.

## ◆ xPSR_Q_Msk [1/3]

#define xPSR_Q_Msk (1UL << xPSR_Q_Pos)

xPSR: Q Mask

Definition at line 363 of file core_cm7.h.

## ◆ xPSR_Q_Msk [2/3]

#define xPSR_Q_Msk (1UL << xPSR_Q_Pos)

xPSR: Q Mask

Definition at line 402 of file core_armv8mml.h.

## ◆ xPSR_Q_Msk [3/3]

#define xPSR_Q_Msk (1UL << xPSR_Q_Pos)

xPSR: Q Mask

Definition at line 404 of file core_armv81mml.h.

## ◆ xPSR_Q_Pos [1/3]

#define xPSR_Q_Pos 27U

xPSR: Q Position

Definition at line 362 of file core_cm7.h.

## ◆ xPSR_Q_Pos [2/3]

#define xPSR_Q_Pos 27U

xPSR: Q Position

Definition at line 401 of file core_armv8mml.h.

## ◆ xPSR_Q_Pos [3/3]

#define xPSR_Q_Pos 27U

xPSR: Q Position

Definition at line 403 of file core_armv81mml.h.

## ◆ xPSR_T_Msk [1/4]

#define xPSR_T_Msk (1UL << xPSR_T_Pos)

xPSR: T Mask

Definition at line 309 of file core_armv8mbl.h.

## ◆ xPSR_T_Msk [2/4]

#define xPSR_T_Msk (1UL << xPSR_T_Pos)

xPSR: T Mask

Definition at line 369 of file core_cm7.h.

## ◆ xPSR_T_Msk [3/4]

#define xPSR_T_Msk (1UL << xPSR_T_Pos)

xPSR: T Mask

Definition at line 408 of file core_armv8mml.h.

## ◆ xPSR_T_Msk [4/4]

#define xPSR_T_Msk (1UL << xPSR_T_Pos)

xPSR: T Mask

Definition at line 410 of file core_armv81mml.h.

## ◆ xPSR_T_Pos [1/4]

#define xPSR_T_Pos 24U

xPSR: T Position

Definition at line 308 of file core_armv8mbl.h.

## ◆ xPSR_T_Pos [2/4]

#define xPSR_T_Pos 24U

xPSR: T Position

Definition at line 368 of file core_cm7.h.

## ◆ xPSR_T_Pos [3/4]

#define xPSR_T_Pos 24U

xPSR: T Position

Definition at line 407 of file core_armv8mml.h.

## ◆ xPSR_T_Pos [4/4]

#define xPSR_T_Pos 24U

xPSR: T Position

Definition at line 409 of file core_armv81mml.h.

## ◆ xPSR_V_Msk [1/4]

#define xPSR_V_Msk (1UL << xPSR_V_Pos)

xPSR: V Mask

Definition at line 306 of file core_armv8mbl.h.

## ◆ xPSR_V_Msk [2/4]

#define xPSR_V_Msk (1UL << xPSR_V_Pos)

xPSR: V Mask

Definition at line 360 of file core_cm7.h.

## ◆ xPSR_V_Msk [3/4]

#define xPSR_V_Msk (1UL << xPSR_V_Pos)

xPSR: V Mask

Definition at line 399 of file core_armv8mml.h.

## ◆ xPSR_V_Msk [4/4]

#define xPSR_V_Msk (1UL << xPSR_V_Pos)

xPSR: V Mask

Definition at line 401 of file core_armv81mml.h.

## ◆ xPSR_V_Pos [1/4]

#define xPSR_V_Pos 28U

xPSR: V Position

Definition at line 305 of file core_armv8mbl.h.

## ◆ xPSR_V_Pos [2/4]

#define xPSR_V_Pos 28U

xPSR: V Position

Definition at line 359 of file core_cm7.h.

## ◆ xPSR_V_Pos [3/4]

#define xPSR_V_Pos 28U

xPSR: V Position

Definition at line 398 of file core_armv8mml.h.

## ◆ xPSR_V_Pos [4/4]

#define xPSR_V_Pos 28U

xPSR: V Position

Definition at line 400 of file core_armv81mml.h.

## ◆ xPSR_Z_Msk [1/4]

#define xPSR_Z_Msk (1UL << xPSR_Z_Pos)

xPSR: Z Mask

Definition at line 300 of file core_armv8mbl.h.

## ◆ xPSR_Z_Msk [2/4]

#define xPSR_Z_Msk (1UL << xPSR_Z_Pos)

xPSR: Z Mask

Definition at line 354 of file core_cm7.h.

## ◆ xPSR_Z_Msk [3/4]

#define xPSR_Z_Msk (1UL << xPSR_Z_Pos)

xPSR: Z Mask

Definition at line 393 of file core_armv8mml.h.

## ◆ xPSR_Z_Msk [4/4]

#define xPSR_Z_Msk (1UL << xPSR_Z_Pos)

xPSR: Z Mask

Definition at line 395 of file core_armv81mml.h.

## ◆ xPSR_Z_Pos [1/4]

#define xPSR_Z_Pos 30U

xPSR: Z Position

Definition at line 299 of file core_armv8mbl.h.

## ◆ xPSR_Z_Pos [2/4]

#define xPSR_Z_Pos 30U

xPSR: Z Position

Definition at line 353 of file core_cm7.h.

## ◆ xPSR_Z_Pos [3/4]

#define xPSR_Z_Pos 30U

xPSR: Z Position

Definition at line 392 of file core_armv8mml.h.

## ◆ xPSR_Z_Pos [4/4]

#define xPSR_Z_Pos 30U

xPSR: Z Position

Definition at line 394 of file core_armv81mml.h.