Callisto4Bootloader: Nested Vectored Interrupt Controller (NVIC)

Callisto4Bootloader

Modules | Data Structures
Nested Vectored Interrupt Controller (NVIC)
Defines and Type Definitions » Status and Control Registers

Type definitions for the NVIC Registers. More...

## Modules

| System Control Block (SCB)
| Type definitions for the System Control Block Registers.

## Data Structures

struct | NVIC_Type
| Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...
#define | NVIC_STIR_INTID_Pos 0U
#define | NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)
#define | NVIC_STIR_INTID_Pos 0U
#define | NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)
#define | NVIC_STIR_INTID_Pos 0U
#define | NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)

## Detailed Description

Type definitions for the NVIC Registers.

## Macro Definition Documentation

## ◆ NVIC_STIR_INTID_Msk [1/3]

#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)

STIR: INTLINESNUM Mask

Definition at line 438 of file core_cm7.h.

## ◆ NVIC_STIR_INTID_Msk [2/3]

#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)

STIR: INTLINESNUM Mask

Definition at line 480 of file core_armv8mml.h.

## ◆ NVIC_STIR_INTID_Msk [3/3]

#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)

STIR: INTLINESNUM Mask

Definition at line 482 of file core_armv81mml.h.

## ◆ NVIC_STIR_INTID_Pos [1/3]

#define NVIC_STIR_INTID_Pos 0U

STIR: INTLINESNUM Position

Definition at line 437 of file core_cm7.h.

## ◆ NVIC_STIR_INTID_Pos [2/3]

#define NVIC_STIR_INTID_Pos 0U

STIR: INTLINESNUM Position

Definition at line 479 of file core_armv8mml.h.

## ◆ NVIC_STIR_INTID_Pos [3/3]

#define NVIC_STIR_INTID_Pos 0U

STIR: INTLINESNUM Position

Definition at line 481 of file core_armv81mml.h.