Callisto4Bootloader: PIT Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
PIT Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| PIT Register Masks

## Data Structures

struct | PIT_Type

## Macros

#define | PIT_BASE (0x40084000u)
#define | PIT ((PIT_Type *)PIT_BASE)
#define | PIT_BASE_ADDRS { PIT_BASE }
#define | PIT_BASE_PTRS { PIT }
#define | PIT_IRQS { { PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn } }

## Detailed Description

## Macro Definition Documentation

## ◆ PIT

#define PIT ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

Definition at line 30861 of file MIMXRT1062.h.

## ◆ PIT_BASE

#define PIT_BASE (0x40084000u)

Peripheral PIT base address

Definition at line 30859 of file MIMXRT1062.h.

## ◆ PIT_BASE_ADDRS

#define PIT_BASE_ADDRS { PIT_BASE }

Array initializer of PIT peripheral base addresses

Definition at line 30863 of file MIMXRT1062.h.

## ◆ PIT_BASE_PTRS

#define PIT_BASE_PTRS { PIT }

Array initializer of PIT peripheral base pointers

Definition at line 30865 of file MIMXRT1062.h.

## ◆ PIT_IRQS

#define PIT_IRQS { { PIT_IRQn, PIT_IRQn, PIT_IRQn, PIT_IRQn } }

Interrupt vectors for the PIT peripheral type

Definition at line 30867 of file MIMXRT1062.h.