Callisto4Bootloader: IOMUXC_SNVS_GPR Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
IOMUXC_SNVS_GPR Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| IOMUXC_SNVS_GPR Register Masks

## Data Structures

struct | IOMUXC_SNVS_GPR_Type

## Macros

#define | IOMUXC_SNVS_GPR_BASE (0x400A4000u)
#define | IOMUXC_SNVS_GPR ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)
#define | IOMUXC_SNVS_GPR_BASE_ADDRS { IOMUXC_SNVS_GPR_BASE }
#define | IOMUXC_SNVS_GPR_BASE_PTRS { IOMUXC_SNVS_GPR }

## Detailed Description

## Macro Definition Documentation

## ◆ IOMUXC_SNVS_GPR

#define IOMUXC_SNVS_GPR ((IOMUXC_SNVS_GPR_Type *)IOMUXC_SNVS_GPR_BASE)

Peripheral IOMUXC_SNVS_GPR base pointer

Definition at line 24954 of file MIMXRT1062.h.

## ◆ IOMUXC_SNVS_GPR_BASE

#define IOMUXC_SNVS_GPR_BASE (0x400A4000u)

Peripheral IOMUXC_SNVS_GPR base address

Definition at line 24952 of file MIMXRT1062.h.

## ◆ IOMUXC_SNVS_GPR_BASE_ADDRS

#define IOMUXC_SNVS_GPR_BASE_ADDRS { IOMUXC_SNVS_GPR_BASE }

Array initializer of IOMUXC_SNVS_GPR peripheral base addresses

Definition at line 24956 of file MIMXRT1062.h.

## ◆ IOMUXC_SNVS_GPR_BASE_PTRS

#define IOMUXC_SNVS_GPR_BASE_PTRS { IOMUXC_SNVS_GPR }

Array initializer of IOMUXC_SNVS_GPR peripheral base pointers

Definition at line 24958 of file MIMXRT1062.h.