Callisto4Bootloader: TMR Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
TMR Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| TMR Register Masks

## Data Structures

struct | TMR_Type

## Macros

#define | TMR1_BASE (0x401DC000u)
#define | TMR1 ((TMR_Type *)TMR1_BASE)
#define | TMR2_BASE (0x401E0000u)
#define | TMR2 ((TMR_Type *)TMR2_BASE)
#define | TMR3_BASE (0x401E4000u)
#define | TMR3 ((TMR_Type *)TMR3_BASE)
#define | TMR4_BASE (0x401E8000u)
#define | TMR4 ((TMR_Type *)TMR4_BASE)
#define | TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
#define | TMR_BASE_PTRS { (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4 }
#define | TMR_IRQS { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn }

## Detailed Description

## Macro Definition Documentation

## ◆ TMR1

#define TMR1 ((TMR_Type *)TMR1_BASE)

Peripheral TMR1 base pointer

Definition at line 40224 of file MIMXRT1062.h.

## ◆ TMR1_BASE

#define TMR1_BASE (0x401DC000u)

Peripheral TMR1 base address

Definition at line 40222 of file MIMXRT1062.h.

## ◆ TMR2

#define TMR2 ((TMR_Type *)TMR2_BASE)

Peripheral TMR2 base pointer

Definition at line 40228 of file MIMXRT1062.h.

## ◆ TMR2_BASE

#define TMR2_BASE (0x401E0000u)

Peripheral TMR2 base address

Definition at line 40226 of file MIMXRT1062.h.

## ◆ TMR3

#define TMR3 ((TMR_Type *)TMR3_BASE)

Peripheral TMR3 base pointer

Definition at line 40232 of file MIMXRT1062.h.

## ◆ TMR3_BASE

#define TMR3_BASE (0x401E4000u)

Peripheral TMR3 base address

Definition at line 40230 of file MIMXRT1062.h.

## ◆ TMR4

#define TMR4 ((TMR_Type *)TMR4_BASE)

Peripheral TMR4 base pointer

Definition at line 40236 of file MIMXRT1062.h.

## ◆ TMR4_BASE

#define TMR4_BASE (0x401E8000u)

Peripheral TMR4 base address

Definition at line 40234 of file MIMXRT1062.h.

## ◆ TMR_BASE_ADDRS

#define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }

Array initializer of TMR peripheral base addresses

Definition at line 40238 of file MIMXRT1062.h.

## ◆ TMR_BASE_PTRS

#define TMR_BASE_PTRS { (TMR_Type *)0u, TMR1, TMR2, TMR3, TMR4 }

Array initializer of TMR peripheral base pointers

Definition at line 40240 of file MIMXRT1062.h.

## ◆ TMR_IRQS

#define TMR_IRQS { NotAvail_IRQn, TMR1_IRQn, TMR2_IRQn, TMR3_IRQn, TMR4_IRQn }

Interrupt vectors for the TMR peripheral type

Definition at line 40242 of file MIMXRT1062.h.