Callisto4Bootloader: PIT Register Masks

Callisto4Bootloader

Macros
PIT Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » PIT Peripheral Access Layer

## Macros

#define | PIT_LDVAL_COUNT (4U)
#define | PIT_CVAL_COUNT (4U)
#define | PIT_TCTRL_COUNT (4U)
#define | PIT_TFLG_COUNT (4U)

## MCR - PIT Module Control Register

#define | PIT_MCR_FRZ_MASK (0x1U)
#define | PIT_MCR_FRZ_SHIFT (0U)
#define | PIT_MCR_FRZ(x) (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)
#define | PIT_MCR_MDIS_MASK (0x2U)
#define | PIT_MCR_MDIS_SHIFT (1U)
#define | PIT_MCR_MDIS(x) (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)

## LTMR64H - PIT Upper Lifetime Timer Register

#define | PIT_LTMR64H_LTH_MASK (0xFFFFFFFFU)
#define | PIT_LTMR64H_LTH_SHIFT (0U)
#define | PIT_LTMR64H_LTH(x) (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)

## LTMR64L - PIT Lower Lifetime Timer Register

#define | PIT_LTMR64L_LTL_MASK (0xFFFFFFFFU)
#define | PIT_LTMR64L_LTL_SHIFT (0U)
#define | PIT_LTMR64L_LTL(x) (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)

## LDVAL - Timer Load Value Register

#define | PIT_LDVAL_TSV_MASK (0xFFFFFFFFU)
#define | PIT_LDVAL_TSV_SHIFT (0U)
#define | PIT_LDVAL_TSV(x) (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)

## CVAL - Current Timer Value Register

#define | PIT_CVAL_TVL_MASK (0xFFFFFFFFU)
#define | PIT_CVAL_TVL_SHIFT (0U)
#define | PIT_CVAL_TVL(x) (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)

## TCTRL - Timer Control Register

#define | PIT_TCTRL_TEN_MASK (0x1U)
#define | PIT_TCTRL_TEN_SHIFT (0U)
#define | PIT_TCTRL_TEN(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)
#define | PIT_TCTRL_TIE_MASK (0x2U)
#define | PIT_TCTRL_TIE_SHIFT (1U)
#define | PIT_TCTRL_TIE(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)
#define | PIT_TCTRL_CHN_MASK (0x4U)
#define | PIT_TCTRL_CHN_SHIFT (2U)
#define | PIT_TCTRL_CHN(x) (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)

## TFLG - Timer Flag Register

#define | PIT_TFLG_TIF_MASK (0x1U)
#define | PIT_TFLG_TIF_SHIFT (0U)
#define | PIT_TFLG_TIF(x) (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ PIT_CVAL_COUNT

#define PIT_CVAL_COUNT (4U)

Definition at line 30807 of file MIMXRT1062.h.

## ◆ PIT_CVAL_TVL

#define PIT_CVAL_TVL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_CVAL_TVL_SHIFT)) & PIT_CVAL_TVL_MASK)

TVL - Current Timer Value

Definition at line 30803 of file MIMXRT1062.h.

## ◆ PIT_CVAL_TVL_MASK

#define PIT_CVAL_TVL_MASK (0xFFFFFFFFU)

Definition at line 30799 of file MIMXRT1062.h.

## ◆ PIT_CVAL_TVL_SHIFT

#define PIT_CVAL_TVL_SHIFT (0U)

Definition at line 30800 of file MIMXRT1062.h.

## ◆ PIT_LDVAL_COUNT

#define PIT_LDVAL_COUNT (4U)

Definition at line 30795 of file MIMXRT1062.h.

## ◆ PIT_LDVAL_TSV

#define PIT_LDVAL_TSV | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_LDVAL_TSV_SHIFT)) & PIT_LDVAL_TSV_MASK)

TSV - Timer Start Value

Definition at line 30791 of file MIMXRT1062.h.

## ◆ PIT_LDVAL_TSV_MASK

#define PIT_LDVAL_TSV_MASK (0xFFFFFFFFU)

Definition at line 30787 of file MIMXRT1062.h.

## ◆ PIT_LDVAL_TSV_SHIFT

#define PIT_LDVAL_TSV_SHIFT (0U)

Definition at line 30788 of file MIMXRT1062.h.

## ◆ PIT_LTMR64H_LTH

#define PIT_LTMR64H_LTH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64H_LTH_SHIFT)) & PIT_LTMR64H_LTH_MASK)

LTH - Life Timer value

Definition at line 30773 of file MIMXRT1062.h.

## ◆ PIT_LTMR64H_LTH_MASK

#define PIT_LTMR64H_LTH_MASK (0xFFFFFFFFU)

Definition at line 30769 of file MIMXRT1062.h.

## ◆ PIT_LTMR64H_LTH_SHIFT

#define PIT_LTMR64H_LTH_SHIFT (0U)

Definition at line 30770 of file MIMXRT1062.h.

## ◆ PIT_LTMR64L_LTL

#define PIT_LTMR64L_LTL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_LTMR64L_LTL_SHIFT)) & PIT_LTMR64L_LTL_MASK)

LTL - Life Timer value

Definition at line 30782 of file MIMXRT1062.h.

## ◆ PIT_LTMR64L_LTL_MASK

#define PIT_LTMR64L_LTL_MASK (0xFFFFFFFFU)

Definition at line 30778 of file MIMXRT1062.h.

## ◆ PIT_LTMR64L_LTL_SHIFT

#define PIT_LTMR64L_LTL_SHIFT (0U)

Definition at line 30779 of file MIMXRT1062.h.

## ◆ PIT_MCR_FRZ

#define PIT_MCR_FRZ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_MCR_FRZ_SHIFT)) & PIT_MCR_FRZ_MASK)

FRZ - Freeze 0b0..Timers continue to run in Debug mode. 0b1..Timers are stopped in Debug mode.

Definition at line 30757 of file MIMXRT1062.h.

## ◆ PIT_MCR_FRZ_MASK

#define PIT_MCR_FRZ_MASK (0x1U)

Definition at line 30751 of file MIMXRT1062.h.

## ◆ PIT_MCR_FRZ_SHIFT

#define PIT_MCR_FRZ_SHIFT (0U)

Definition at line 30752 of file MIMXRT1062.h.

## ◆ PIT_MCR_MDIS

#define PIT_MCR_MDIS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_MCR_MDIS_SHIFT)) & PIT_MCR_MDIS_MASK)

MDIS - Module Disable - (PIT section) 0b0..Clock for standard PIT timers is enabled. 0b1..Clock for standard PIT timers is disabled.

Definition at line 30764 of file MIMXRT1062.h.

## ◆ PIT_MCR_MDIS_MASK

#define PIT_MCR_MDIS_MASK (0x2U)

Definition at line 30758 of file MIMXRT1062.h.

## ◆ PIT_MCR_MDIS_SHIFT

#define PIT_MCR_MDIS_SHIFT (1U)

Definition at line 30759 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_CHN

#define PIT_TCTRL_CHN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_CHN_SHIFT)) & PIT_TCTRL_CHN_MASK)

CHN - Chain Mode 0b0..Timer is not chained. 0b1..Timer is chained to previous timer. For example, for Channel 2, if this field is set, Timer 2 is chained to Timer 1.

Definition at line 30831 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_CHN_MASK

#define PIT_TCTRL_CHN_MASK (0x4U)

Definition at line 30825 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_CHN_SHIFT

#define PIT_TCTRL_CHN_SHIFT (2U)

Definition at line 30826 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_COUNT

#define PIT_TCTRL_COUNT (4U)

Definition at line 30835 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TEN

#define PIT_TCTRL_TEN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TEN_SHIFT)) & PIT_TCTRL_TEN_MASK)

TEN - Timer Enable 0b0..Timer n is disabled. 0b1..Timer n is enabled.

Definition at line 30817 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TEN_MASK

#define PIT_TCTRL_TEN_MASK (0x1U)

Definition at line 30811 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TEN_SHIFT

#define PIT_TCTRL_TEN_SHIFT (0U)

Definition at line 30812 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TIE

#define PIT_TCTRL_TIE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_TCTRL_TIE_SHIFT)) & PIT_TCTRL_TIE_MASK)

TIE - Timer Interrupt Enable 0b0..Interrupt requests from Timer n are disabled. 0b1..Interrupt will be requested whenever TIF is set.

Definition at line 30824 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TIE_MASK

#define PIT_TCTRL_TIE_MASK (0x2U)

Definition at line 30818 of file MIMXRT1062.h.

## ◆ PIT_TCTRL_TIE_SHIFT

#define PIT_TCTRL_TIE_SHIFT (1U)

Definition at line 30819 of file MIMXRT1062.h.

## ◆ PIT_TFLG_COUNT

#define PIT_TFLG_COUNT (4U)

Definition at line 30849 of file MIMXRT1062.h.

## ◆ PIT_TFLG_TIF

#define PIT_TFLG_TIF | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PIT_TFLG_TIF_SHIFT)) & PIT_TFLG_TIF_MASK)

TIF - Timer Interrupt Flag 0b0..Timeout has not yet occurred. 0b1..Timeout has occurred.

Definition at line 30845 of file MIMXRT1062.h.

## ◆ PIT_TFLG_TIF_MASK

#define PIT_TFLG_TIF_MASK (0x1U)

Definition at line 30839 of file MIMXRT1062.h.

## ◆ PIT_TFLG_TIF_SHIFT

#define PIT_TFLG_TIF_SHIFT (0U)

Definition at line 30840 of file MIMXRT1062.h.