Callisto4Bootloader: GPT Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
GPT Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| GPT Register Masks

## Data Structures

struct | GPT_Type

## Macros

#define | GPT1_BASE (0x401EC000u)
#define | GPT1 ((GPT_Type *)GPT1_BASE)
#define | GPT2_BASE (0x401F0000u)
#define | GPT2 ((GPT_Type *)GPT2_BASE)
#define | GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE }
#define | GPT_BASE_PTRS { (GPT_Type *)0u, GPT1, GPT2 }
#define | GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }

## Detailed Description

## Macro Definition Documentation

## ◆ GPT1

#define GPT1 ((GPT_Type *)GPT1_BASE)

Peripheral GPT1 base pointer

Definition at line 21060 of file MIMXRT1062.h.

## ◆ GPT1_BASE

#define GPT1_BASE (0x401EC000u)

Peripheral GPT1 base address

Definition at line 21058 of file MIMXRT1062.h.

## ◆ GPT2

#define GPT2 ((GPT_Type *)GPT2_BASE)

Peripheral GPT2 base pointer

Definition at line 21064 of file MIMXRT1062.h.

## ◆ GPT2_BASE

#define GPT2_BASE (0x401F0000u)

Peripheral GPT2 base address

Definition at line 21062 of file MIMXRT1062.h.

## ◆ GPT_BASE_ADDRS

#define GPT_BASE_ADDRS { 0u, GPT1_BASE, GPT2_BASE }

Array initializer of GPT peripheral base addresses

Definition at line 21066 of file MIMXRT1062.h.

## ◆ GPT_BASE_PTRS

#define GPT_BASE_PTRS { (GPT_Type *)0u, GPT1, GPT2 }

Array initializer of GPT peripheral base pointers

Definition at line 21068 of file MIMXRT1062.h.

## ◆ GPT_IRQS

#define GPT_IRQS { NotAvail_IRQn, GPT1_IRQn, GPT2_IRQn }

Interrupt vectors for the GPT peripheral type

Definition at line 21070 of file MIMXRT1062.h.