Callisto4Bootloader: USDHC Peripheral Access Layer

Callisto4Bootloader

Modules | Data Structures | Macros
USDHC Peripheral Access Layer
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer

## Modules

| USDHC Register Masks

## Data Structures

struct | USDHC_Type

## Macros

#define | USDHC1_BASE (0x402C0000u)
#define | USDHC1 ((USDHC_Type *)USDHC1_BASE)
#define | USDHC2_BASE (0x402C4000u)
#define | USDHC2 ((USDHC_Type *)USDHC2_BASE)
#define | USDHC_BASE_ADDRS { 0u, USDHC1_BASE, USDHC2_BASE }
#define | USDHC_BASE_PTRS { (USDHC_Type *)0u, USDHC1, USDHC2 }
#define | USDHC_IRQS { NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn }

## Detailed Description

## Macro Definition Documentation

## ◆ USDHC1

#define USDHC1 ((USDHC_Type *)USDHC1_BASE)

Peripheral USDHC1 base pointer

Definition at line 46294 of file MIMXRT1062.h.

## ◆ USDHC1_BASE

#define USDHC1_BASE (0x402C0000u)

Peripheral USDHC1 base address

Definition at line 46292 of file MIMXRT1062.h.

## ◆ USDHC2

#define USDHC2 ((USDHC_Type *)USDHC2_BASE)

Peripheral USDHC2 base pointer

Definition at line 46298 of file MIMXRT1062.h.

## ◆ USDHC2_BASE

#define USDHC2_BASE (0x402C4000u)

Peripheral USDHC2 base address

Definition at line 46296 of file MIMXRT1062.h.

## ◆ USDHC_BASE_ADDRS

#define USDHC_BASE_ADDRS { 0u, USDHC1_BASE, USDHC2_BASE }

Array initializer of USDHC peripheral base addresses

Definition at line 46300 of file MIMXRT1062.h.

## ◆ USDHC_BASE_PTRS

#define USDHC_BASE_PTRS { (USDHC_Type *)0u, USDHC1, USDHC2 }

Array initializer of USDHC peripheral base pointers

Definition at line 46302 of file MIMXRT1062.h.

## ◆ USDHC_IRQS

#define USDHC_IRQS { NotAvail_IRQn, USDHC1_IRQn, USDHC2_IRQn }

Interrupt vectors for the USDHC peripheral type

Definition at line 46304 of file MIMXRT1062.h.