Callisto4Bootloader: DCP Register Masks

Callisto4Bootloader

DCP Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » DCP Peripheral Access Layer

## CTRL - DCP control register 0

#define | DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)
#define | DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
#define | DCP_CTRL_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)
#define | DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
#define | DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)
#define | DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
#define | DCP_CTRL_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)
#define | DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK (0x400000U)
#define | DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT (22U)
#define | DCP_CTRL_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)
#define | DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK (0x800000U)
#define | DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT (23U)
#define | DCP_CTRL_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)
#define | DCP_CTRL_PRESENT_SHA_MASK (0x10000000U)
#define | DCP_CTRL_PRESENT_SHA_SHIFT (28U)
#define | DCP_CTRL_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)
#define | DCP_CTRL_PRESENT_CRYPTO_MASK (0x20000000U)
#define | DCP_CTRL_PRESENT_CRYPTO_SHIFT (29U)
#define | DCP_CTRL_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)
#define | DCP_CTRL_CLKGATE_MASK (0x40000000U)
#define | DCP_CTRL_CLKGATE_SHIFT (30U)
#define | DCP_CTRL_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)
#define | DCP_CTRL_SFTRST_MASK (0x80000000U)
#define | DCP_CTRL_SFTRST_SHIFT (31U)
#define | DCP_CTRL_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)

## CTRL_SET - DCP control register 0

#define | DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)
#define | DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
#define | DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)
#define | DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
#define | DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK (0x400000U)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT (22U)
#define | DCP_CTRL_SET_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK)
#define | DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK (0x800000U)
#define | DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT (23U)
#define | DCP_CTRL_SET_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK)
#define | DCP_CTRL_SET_PRESENT_SHA_MASK (0x10000000U)
#define | DCP_CTRL_SET_PRESENT_SHA_SHIFT (28U)
#define | DCP_CTRL_SET_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_SHA_SHIFT)) & DCP_CTRL_SET_PRESENT_SHA_MASK)
#define | DCP_CTRL_SET_PRESENT_CRYPTO_MASK (0x20000000U)
#define | DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT (29U)
#define | DCP_CTRL_SET_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_SET_PRESENT_CRYPTO_MASK)
#define | DCP_CTRL_SET_CLKGATE_MASK (0x40000000U)
#define | DCP_CTRL_SET_CLKGATE_SHIFT (30U)
#define | DCP_CTRL_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CLKGATE_SHIFT)) & DCP_CTRL_SET_CLKGATE_MASK)
#define | DCP_CTRL_SET_SFTRST_MASK (0x80000000U)
#define | DCP_CTRL_SET_SFTRST_SHIFT (31U)
#define | DCP_CTRL_SET_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_SFTRST_SHIFT)) & DCP_CTRL_SET_SFTRST_MASK)

## CTRL_CLR - DCP control register 0

#define | DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)
#define | DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
#define | DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)
#define | DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
#define | DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK (0x400000U)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT (22U)
#define | DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK)
#define | DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK (0x800000U)
#define | DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT (23U)
#define | DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK)
#define | DCP_CTRL_CLR_PRESENT_SHA_MASK (0x10000000U)
#define | DCP_CTRL_CLR_PRESENT_SHA_SHIFT (28U)
#define | DCP_CTRL_CLR_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_SHA_SHIFT)) & DCP_CTRL_CLR_PRESENT_SHA_MASK)
#define | DCP_CTRL_CLR_PRESENT_CRYPTO_MASK (0x20000000U)
#define | DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT (29U)
#define | DCP_CTRL_CLR_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_CLR_PRESENT_CRYPTO_MASK)
#define | DCP_CTRL_CLR_CLKGATE_MASK (0x40000000U)
#define | DCP_CTRL_CLR_CLKGATE_SHIFT (30U)
#define | DCP_CTRL_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CLKGATE_SHIFT)) & DCP_CTRL_CLR_CLKGATE_MASK)
#define | DCP_CTRL_CLR_SFTRST_MASK (0x80000000U)
#define | DCP_CTRL_CLR_SFTRST_SHIFT (31U)
#define | DCP_CTRL_CLR_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_SFTRST_SHIFT)) & DCP_CTRL_CLR_SFTRST_MASK)

## CTRL_TOG - DCP control register 0

#define | DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)
#define | DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)
#define | DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)
#define | DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)
#define | DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK (0x400000U)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT (22U)
#define | DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK)
#define | DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK (0x800000U)
#define | DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT (23U)
#define | DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK)
#define | DCP_CTRL_TOG_PRESENT_SHA_MASK (0x10000000U)
#define | DCP_CTRL_TOG_PRESENT_SHA_SHIFT (28U)
#define | DCP_CTRL_TOG_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_SHA_SHIFT)) & DCP_CTRL_TOG_PRESENT_SHA_MASK)
#define | DCP_CTRL_TOG_PRESENT_CRYPTO_MASK (0x20000000U)
#define | DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT (29U)
#define | DCP_CTRL_TOG_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_TOG_PRESENT_CRYPTO_MASK)
#define | DCP_CTRL_TOG_CLKGATE_MASK (0x40000000U)
#define | DCP_CTRL_TOG_CLKGATE_SHIFT (30U)
#define | DCP_CTRL_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CLKGATE_SHIFT)) & DCP_CTRL_TOG_CLKGATE_MASK)
#define | DCP_CTRL_TOG_SFTRST_MASK (0x80000000U)
#define | DCP_CTRL_TOG_SFTRST_SHIFT (31U)
#define | DCP_CTRL_TOG_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_SFTRST_SHIFT)) & DCP_CTRL_TOG_SFTRST_MASK)

## STAT - DCP status register

#define | DCP_STAT_IRQ_MASK (0xFU)
#define | DCP_STAT_IRQ_SHIFT (0U)
#define | DCP_STAT_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)
#define | DCP_STAT_RSVD_IRQ_MASK (0x100U)
#define | DCP_STAT_RSVD_IRQ_SHIFT (8U)
#define | DCP_STAT_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)
#define | DCP_STAT_READY_CHANNELS_MASK (0xFF0000U)
#define | DCP_STAT_READY_CHANNELS_SHIFT (16U)
#define | DCP_STAT_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)
#define | DCP_STAT_CUR_CHANNEL_MASK (0xF000000U)
#define | DCP_STAT_CUR_CHANNEL_SHIFT (24U)
#define | DCP_STAT_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)
#define | DCP_STAT_OTP_KEY_READY_MASK (0x10000000U)
#define | DCP_STAT_OTP_KEY_READY_SHIFT (28U)
#define | DCP_STAT_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)

## STAT_SET - DCP status register

#define | DCP_STAT_SET_IRQ_MASK (0xFU)
#define | DCP_STAT_SET_IRQ_SHIFT (0U)
#define | DCP_STAT_SET_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_IRQ_SHIFT)) & DCP_STAT_SET_IRQ_MASK)
#define | DCP_STAT_SET_RSVD_IRQ_MASK (0x100U)
#define | DCP_STAT_SET_RSVD_IRQ_SHIFT (8U)
#define | DCP_STAT_SET_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_RSVD_IRQ_SHIFT)) & DCP_STAT_SET_RSVD_IRQ_MASK)
#define | DCP_STAT_SET_READY_CHANNELS_MASK (0xFF0000U)
#define | DCP_STAT_SET_READY_CHANNELS_SHIFT (16U)
#define | DCP_STAT_SET_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_READY_CHANNELS_SHIFT)) & DCP_STAT_SET_READY_CHANNELS_MASK)
#define | DCP_STAT_SET_CUR_CHANNEL_MASK (0xF000000U)
#define | DCP_STAT_SET_CUR_CHANNEL_SHIFT (24U)
#define | DCP_STAT_SET_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_CUR_CHANNEL_SHIFT)) & DCP_STAT_SET_CUR_CHANNEL_MASK)
#define | DCP_STAT_SET_OTP_KEY_READY_MASK (0x10000000U)
#define | DCP_STAT_SET_OTP_KEY_READY_SHIFT (28U)
#define | DCP_STAT_SET_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_OTP_KEY_READY_SHIFT)) & DCP_STAT_SET_OTP_KEY_READY_MASK)

## STAT_CLR - DCP status register

#define | DCP_STAT_CLR_IRQ_MASK (0xFU)
#define | DCP_STAT_CLR_IRQ_SHIFT (0U)
#define | DCP_STAT_CLR_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_IRQ_SHIFT)) & DCP_STAT_CLR_IRQ_MASK)
#define | DCP_STAT_CLR_RSVD_IRQ_MASK (0x100U)
#define | DCP_STAT_CLR_RSVD_IRQ_SHIFT (8U)
#define | DCP_STAT_CLR_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_RSVD_IRQ_SHIFT)) & DCP_STAT_CLR_RSVD_IRQ_MASK)
#define | DCP_STAT_CLR_READY_CHANNELS_MASK (0xFF0000U)
#define | DCP_STAT_CLR_READY_CHANNELS_SHIFT (16U)
#define | DCP_STAT_CLR_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_READY_CHANNELS_SHIFT)) & DCP_STAT_CLR_READY_CHANNELS_MASK)
#define | DCP_STAT_CLR_CUR_CHANNEL_MASK (0xF000000U)
#define | DCP_STAT_CLR_CUR_CHANNEL_SHIFT (24U)
#define | DCP_STAT_CLR_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_CUR_CHANNEL_SHIFT)) & DCP_STAT_CLR_CUR_CHANNEL_MASK)
#define | DCP_STAT_CLR_OTP_KEY_READY_MASK (0x10000000U)
#define | DCP_STAT_CLR_OTP_KEY_READY_SHIFT (28U)
#define | DCP_STAT_CLR_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_OTP_KEY_READY_SHIFT)) & DCP_STAT_CLR_OTP_KEY_READY_MASK)

## STAT_TOG - DCP status register

#define | DCP_STAT_TOG_IRQ_MASK (0xFU)
#define | DCP_STAT_TOG_IRQ_SHIFT (0U)
#define | DCP_STAT_TOG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_IRQ_SHIFT)) & DCP_STAT_TOG_IRQ_MASK)
#define | DCP_STAT_TOG_RSVD_IRQ_MASK (0x100U)
#define | DCP_STAT_TOG_RSVD_IRQ_SHIFT (8U)
#define | DCP_STAT_TOG_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_RSVD_IRQ_SHIFT)) & DCP_STAT_TOG_RSVD_IRQ_MASK)
#define | DCP_STAT_TOG_READY_CHANNELS_MASK (0xFF0000U)
#define | DCP_STAT_TOG_READY_CHANNELS_SHIFT (16U)
#define | DCP_STAT_TOG_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_READY_CHANNELS_SHIFT)) & DCP_STAT_TOG_READY_CHANNELS_MASK)
#define | DCP_STAT_TOG_CUR_CHANNEL_MASK (0xF000000U)
#define | DCP_STAT_TOG_CUR_CHANNEL_SHIFT (24U)
#define | DCP_STAT_TOG_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_CUR_CHANNEL_SHIFT)) & DCP_STAT_TOG_CUR_CHANNEL_MASK)
#define | DCP_STAT_TOG_OTP_KEY_READY_MASK (0x10000000U)
#define | DCP_STAT_TOG_OTP_KEY_READY_SHIFT (28U)
#define | DCP_STAT_TOG_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_OTP_KEY_READY_SHIFT)) & DCP_STAT_TOG_OTP_KEY_READY_MASK)

## CHANNELCTRL - DCP channel control register

#define | DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK (0xFFU)
#define | DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT (0U)
#define | DCP_CHANNELCTRL_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
#define | DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
#define | DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK (0x10000U)
#define | DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT (16U)
#define | DCP_CHANNELCTRL_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)
#define | DCP_CHANNELCTRL_RSVD_MASK (0xFFFE0000U)
#define | DCP_CHANNELCTRL_RSVD_SHIFT (17U)
#define | DCP_CHANNELCTRL_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)

## CHANNELCTRL_SET - DCP channel control register

#define | DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK (0xFFU)
#define | DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT (0U)
#define | DCP_CHANNELCTRL_SET_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
#define | DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
#define | DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK (0x10000U)
#define | DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT (16U)
#define | DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK)
#define | DCP_CHANNELCTRL_SET_RSVD_MASK (0xFFFE0000U)
#define | DCP_CHANNELCTRL_SET_RSVD_SHIFT (17U)
#define | DCP_CHANNELCTRL_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_RSVD_SHIFT)) & DCP_CHANNELCTRL_SET_RSVD_MASK)

## CHANNELCTRL_CLR - DCP channel control register

#define | DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK (0xFFU)
#define | DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT (0U)
#define | DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
#define | DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
#define | DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK (0x10000U)
#define | DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT (16U)
#define | DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK)
#define | DCP_CHANNELCTRL_CLR_RSVD_MASK (0xFFFE0000U)
#define | DCP_CHANNELCTRL_CLR_RSVD_SHIFT (17U)
#define | DCP_CHANNELCTRL_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_RSVD_SHIFT)) & DCP_CHANNELCTRL_CLR_RSVD_MASK)

## CHANNELCTRL_TOG - DCP channel control register

#define | DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK (0xFFU)
#define | DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT (0U)
#define | DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)
#define | DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT (8U)
#define | DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK)
#define | DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK (0x10000U)
#define | DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT (16U)
#define | DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK)
#define | DCP_CHANNELCTRL_TOG_RSVD_MASK (0xFFFE0000U)
#define | DCP_CHANNELCTRL_TOG_RSVD_SHIFT (17U)
#define | DCP_CHANNELCTRL_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_RSVD_SHIFT)) & DCP_CHANNELCTRL_TOG_RSVD_MASK)

## CAPABILITY0 - DCP capability 0 register

#define | DCP_CAPABILITY0_NUM_KEYS_MASK (0xFFU)
#define | DCP_CAPABILITY0_NUM_KEYS_SHIFT (0U)
#define | DCP_CAPABILITY0_NUM_KEYS(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)
#define | DCP_CAPABILITY0_NUM_CHANNELS_MASK (0xF00U)
#define | DCP_CAPABILITY0_NUM_CHANNELS_SHIFT (8U)
#define | DCP_CAPABILITY0_NUM_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)
#define | DCP_CAPABILITY0_RSVD_MASK (0x1FFFF000U)
#define | DCP_CAPABILITY0_RSVD_SHIFT (12U)
#define | DCP_CAPABILITY0_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)
#define | DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK (0x20000000U)
#define | DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT (29U)
#define | DCP_CAPABILITY0_DISABLE_UNIQUE_KEY(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) & DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)
#define | DCP_CAPABILITY0_DISABLE_DECRYPT_MASK (0x80000000U)
#define | DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT (31U)
#define | DCP_CAPABILITY0_DISABLE_DECRYPT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)

## CAPABILITY1 - DCP capability 1 register

#define | DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK (0xFFFFU)
#define | DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT (0U)
#define | DCP_CAPABILITY1_CIPHER_ALGORITHMS(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)
#define | DCP_CAPABILITY1_HASH_ALGORITHMS_MASK (0xFFFF0000U)
#define | DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT (16U)
#define | DCP_CAPABILITY1_HASH_ALGORITHMS(x) (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)

## CONTEXT - DCP context buffer pointer

#define | DCP_CONTEXT_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_CONTEXT_ADDR_SHIFT (0U)
#define | DCP_CONTEXT_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)

## KEY - DCP key index

#define | DCP_KEY_SUBWORD_MASK (0x3U)
#define | DCP_KEY_SUBWORD_SHIFT (0U)
#define | DCP_KEY_SUBWORD(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)
#define | DCP_KEY_RSVD_SUBWORD_MASK (0xCU)
#define | DCP_KEY_RSVD_SUBWORD_SHIFT (2U)
#define | DCP_KEY_RSVD_SUBWORD(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)
#define | DCP_KEY_INDEX_MASK (0x30U)
#define | DCP_KEY_INDEX_SHIFT (4U)
#define | DCP_KEY_INDEX(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)
#define | DCP_KEY_RSVD_INDEX_MASK (0xC0U)
#define | DCP_KEY_RSVD_INDEX_SHIFT (6U)
#define | DCP_KEY_RSVD_INDEX(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)
#define | DCP_KEY_RSVD_MASK (0xFFFFFF00U)
#define | DCP_KEY_RSVD_SHIFT (8U)
#define | DCP_KEY_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)

## KEYDATA - DCP key data

#define | DCP_KEYDATA_DATA_MASK (0xFFFFFFFFU)
#define | DCP_KEYDATA_DATA_SHIFT (0U)
#define | DCP_KEYDATA_DATA(x) (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)

## PACKET0 - DCP work packet 0 status register

#define | DCP_PACKET0_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_PACKET0_ADDR_SHIFT (0U)
#define | DCP_PACKET0_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)

## PACKET1 - DCP work packet 1 status register

#define | DCP_PACKET1_INTERRUPT_MASK (0x1U)
#define | DCP_PACKET1_INTERRUPT_SHIFT (0U)
#define | DCP_PACKET1_INTERRUPT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)
#define | DCP_PACKET1_DECR_SEMAPHORE_MASK (0x2U)
#define | DCP_PACKET1_DECR_SEMAPHORE_SHIFT (1U)
#define | DCP_PACKET1_DECR_SEMAPHORE(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)
#define | DCP_PACKET1_CHAIN_MASK (0x4U)
#define | DCP_PACKET1_CHAIN_SHIFT (2U)
#define | DCP_PACKET1_CHAIN(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)
#define | DCP_PACKET1_CHAIN_CONTIGUOUS_MASK (0x8U)
#define | DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT (3U)
#define | DCP_PACKET1_CHAIN_CONTIGUOUS(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)
#define | DCP_PACKET1_ENABLE_MEMCOPY_MASK (0x10U)
#define | DCP_PACKET1_ENABLE_MEMCOPY_SHIFT (4U)
#define | DCP_PACKET1_ENABLE_MEMCOPY(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)
#define | DCP_PACKET1_ENABLE_CIPHER_MASK (0x20U)
#define | DCP_PACKET1_ENABLE_CIPHER_SHIFT (5U)
#define | DCP_PACKET1_ENABLE_CIPHER(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)
#define | DCP_PACKET1_ENABLE_HASH_MASK (0x40U)
#define | DCP_PACKET1_ENABLE_HASH_SHIFT (6U)
#define | DCP_PACKET1_ENABLE_HASH(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)
#define | DCP_PACKET1_ENABLE_BLIT_MASK (0x80U)
#define | DCP_PACKET1_ENABLE_BLIT_SHIFT (7U)
#define | DCP_PACKET1_ENABLE_BLIT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)
#define | DCP_PACKET1_CIPHER_ENCRYPT_MASK (0x100U)
#define | DCP_PACKET1_CIPHER_ENCRYPT_SHIFT (8U)
#define | DCP_PACKET1_CIPHER_ENCRYPT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)
#define | DCP_PACKET1_CIPHER_INIT_MASK (0x200U)
#define | DCP_PACKET1_CIPHER_INIT_SHIFT (9U)
#define | DCP_PACKET1_CIPHER_INIT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)
#define | DCP_PACKET1_OTP_KEY_MASK (0x400U)
#define | DCP_PACKET1_OTP_KEY_SHIFT (10U)
#define | DCP_PACKET1_OTP_KEY(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)
#define | DCP_PACKET1_PAYLOAD_KEY_MASK (0x800U)
#define | DCP_PACKET1_PAYLOAD_KEY_SHIFT (11U)
#define | DCP_PACKET1_PAYLOAD_KEY(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)
#define | DCP_PACKET1_HASH_INIT_MASK (0x1000U)
#define | DCP_PACKET1_HASH_INIT_SHIFT (12U)
#define | DCP_PACKET1_HASH_INIT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)
#define | DCP_PACKET1_HASH_TERM_MASK (0x2000U)
#define | DCP_PACKET1_HASH_TERM_SHIFT (13U)
#define | DCP_PACKET1_HASH_TERM(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)
#define | DCP_PACKET1_CHECK_HASH_MASK (0x4000U)
#define | DCP_PACKET1_CHECK_HASH_SHIFT (14U)
#define | DCP_PACKET1_CHECK_HASH(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)
#define | DCP_PACKET1_HASH_OUTPUT_MASK (0x8000U)
#define | DCP_PACKET1_HASH_OUTPUT_SHIFT (15U)
#define | DCP_PACKET1_HASH_OUTPUT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)
#define | DCP_PACKET1_CONSTANT_FILL_MASK (0x10000U)
#define | DCP_PACKET1_CONSTANT_FILL_SHIFT (16U)
#define | DCP_PACKET1_CONSTANT_FILL(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)
#define | DCP_PACKET1_TEST_SEMA_IRQ_MASK (0x20000U)
#define | DCP_PACKET1_TEST_SEMA_IRQ_SHIFT (17U)
#define | DCP_PACKET1_TEST_SEMA_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)
#define | DCP_PACKET1_KEY_BYTESWAP_MASK (0x40000U)
#define | DCP_PACKET1_KEY_BYTESWAP_SHIFT (18U)
#define | DCP_PACKET1_KEY_BYTESWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)
#define | DCP_PACKET1_KEY_WORDSWAP_MASK (0x80000U)
#define | DCP_PACKET1_KEY_WORDSWAP_SHIFT (19U)
#define | DCP_PACKET1_KEY_WORDSWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)
#define | DCP_PACKET1_INPUT_BYTESWAP_MASK (0x100000U)
#define | DCP_PACKET1_INPUT_BYTESWAP_SHIFT (20U)
#define | DCP_PACKET1_INPUT_BYTESWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)
#define | DCP_PACKET1_INPUT_WORDSWAP_MASK (0x200000U)
#define | DCP_PACKET1_INPUT_WORDSWAP_SHIFT (21U)
#define | DCP_PACKET1_INPUT_WORDSWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)
#define | DCP_PACKET1_OUTPUT_BYTESWAP_MASK (0x400000U)
#define | DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT (22U)
#define | DCP_PACKET1_OUTPUT_BYTESWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)
#define | DCP_PACKET1_OUTPUT_WORDSWAP_MASK (0x800000U)
#define | DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT (23U)
#define | DCP_PACKET1_OUTPUT_WORDSWAP(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)
#define | DCP_PACKET1_TAG_MASK (0xFF000000U)
#define | DCP_PACKET1_TAG_SHIFT (24U)
#define | DCP_PACKET1_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)

## PACKET2 - DCP work packet 2 status register

#define | DCP_PACKET2_CIPHER_SELECT_MASK (0xFU)
#define | DCP_PACKET2_CIPHER_SELECT_SHIFT (0U)
#define | DCP_PACKET2_CIPHER_SELECT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)
#define | DCP_PACKET2_CIPHER_MODE_MASK (0xF0U)
#define | DCP_PACKET2_CIPHER_MODE_SHIFT (4U)
#define | DCP_PACKET2_CIPHER_MODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)
#define | DCP_PACKET2_KEY_SELECT_MASK (0xFF00U)
#define | DCP_PACKET2_KEY_SELECT_SHIFT (8U)
#define | DCP_PACKET2_KEY_SELECT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)
#define | DCP_PACKET2_HASH_SELECT_MASK (0xF0000U)
#define | DCP_PACKET2_HASH_SELECT_SHIFT (16U)
#define | DCP_PACKET2_HASH_SELECT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)
#define | DCP_PACKET2_RSVD_MASK (0xF00000U)
#define | DCP_PACKET2_RSVD_SHIFT (20U)
#define | DCP_PACKET2_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)
#define | DCP_PACKET2_CIPHER_CFG_MASK (0xFF000000U)
#define | DCP_PACKET2_CIPHER_CFG_SHIFT (24U)
#define | DCP_PACKET2_CIPHER_CFG(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)

## PACKET3 - DCP work packet 3 status register

#define | DCP_PACKET3_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_PACKET3_ADDR_SHIFT (0U)
#define | DCP_PACKET3_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)

## PACKET4 - DCP work packet 4 status register

#define | DCP_PACKET4_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_PACKET4_ADDR_SHIFT (0U)
#define | DCP_PACKET4_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)

## PACKET5 - DCP work packet 5 status register

#define | DCP_PACKET5_COUNT_MASK (0xFFFFFFFFU)
#define | DCP_PACKET5_COUNT_SHIFT (0U)
#define | DCP_PACKET5_COUNT(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)

## PACKET6 - DCP work packet 6 status register

#define | DCP_PACKET6_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_PACKET6_ADDR_SHIFT (0U)
#define | DCP_PACKET6_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)

## CH0CMDPTR - DCP channel 0 command pointer address register

#define | DCP_CH0CMDPTR_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_CH0CMDPTR_ADDR_SHIFT (0U)
#define | DCP_CH0CMDPTR_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)

## CH0SEMA - DCP channel 0 semaphore register

#define | DCP_CH0SEMA_INCREMENT_MASK (0xFFU)
#define | DCP_CH0SEMA_INCREMENT_SHIFT (0U)
#define | DCP_CH0SEMA_INCREMENT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)
#define | DCP_CH0SEMA_VALUE_MASK (0xFF0000U)
#define | DCP_CH0SEMA_VALUE_SHIFT (16U)
#define | DCP_CH0SEMA_VALUE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)

## CH0STAT - DCP channel 0 status register

#define | DCP_CH0STAT_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH0STAT_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH0STAT_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)
#define | DCP_CH0STAT_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH0STAT_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH0STAT_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)
#define | DCP_CH0STAT_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH0STAT_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH0STAT_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)
#define | DCP_CH0STAT_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH0STAT_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH0STAT_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)
#define | DCP_CH0STAT_ERROR_SRC_MASK (0x10U)
#define | DCP_CH0STAT_ERROR_SRC_SHIFT (4U)
#define | DCP_CH0STAT_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)
#define | DCP_CH0STAT_ERROR_DST_MASK (0x20U)
#define | DCP_CH0STAT_ERROR_DST_SHIFT (5U)
#define | DCP_CH0STAT_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)
#define | DCP_CH0STAT_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH0STAT_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)
#define | DCP_CH0STAT_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH0STAT_ERROR_CODE_SHIFT (16U)
#define | DCP_CH0STAT_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)
#define | DCP_CH0STAT_TAG_MASK (0xFF000000U)
#define | DCP_CH0STAT_TAG_SHIFT (24U)
#define | DCP_CH0STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)

## CH0STAT_SET - DCP channel 0 status register

#define | DCP_CH0STAT_SET_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH0STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_SET_RSVD_COMPLETE_MASK)
#define | DCP_CH0STAT_SET_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH0STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_SET_HASH_MISMATCH_MASK)
#define | DCP_CH0STAT_SET_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH0STAT_SET_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH0STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_SET_ERROR_SETUP_MASK)
#define | DCP_CH0STAT_SET_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH0STAT_SET_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH0STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_SET_ERROR_PACKET_MASK)
#define | DCP_CH0STAT_SET_ERROR_SRC_MASK (0x10U)
#define | DCP_CH0STAT_SET_ERROR_SRC_SHIFT (4U)
#define | DCP_CH0STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH0STAT_SET_ERROR_SRC_MASK)
#define | DCP_CH0STAT_SET_ERROR_DST_MASK (0x20U)
#define | DCP_CH0STAT_SET_ERROR_DST_SHIFT (5U)
#define | DCP_CH0STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_DST_SHIFT)) & DCP_CH0STAT_SET_ERROR_DST_MASK)
#define | DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH0STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK)
#define | DCP_CH0STAT_SET_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH0STAT_SET_ERROR_CODE_SHIFT (16U)
#define | DCP_CH0STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH0STAT_SET_ERROR_CODE_MASK)
#define | DCP_CH0STAT_SET_TAG_MASK (0xFF000000U)
#define | DCP_CH0STAT_SET_TAG_SHIFT (24U)
#define | DCP_CH0STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_TAG_SHIFT)) & DCP_CH0STAT_SET_TAG_MASK)

## CH0STAT_CLR - DCP channel 0 status register

#define | DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH0STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK)
#define | DCP_CH0STAT_CLR_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH0STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_CLR_HASH_MISMATCH_MASK)
#define | DCP_CH0STAT_CLR_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH0STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SETUP_MASK)
#define | DCP_CH0STAT_CLR_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH0STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PACKET_MASK)
#define | DCP_CH0STAT_CLR_ERROR_SRC_MASK (0x10U)
#define | DCP_CH0STAT_CLR_ERROR_SRC_SHIFT (4U)
#define | DCP_CH0STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SRC_MASK)
#define | DCP_CH0STAT_CLR_ERROR_DST_MASK (0x20U)
#define | DCP_CH0STAT_CLR_ERROR_DST_SHIFT (5U)
#define | DCP_CH0STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH0STAT_CLR_ERROR_DST_MASK)
#define | DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH0STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK)
#define | DCP_CH0STAT_CLR_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH0STAT_CLR_ERROR_CODE_SHIFT (16U)
#define | DCP_CH0STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH0STAT_CLR_ERROR_CODE_MASK)
#define | DCP_CH0STAT_CLR_TAG_MASK (0xFF000000U)
#define | DCP_CH0STAT_CLR_TAG_SHIFT (24U)
#define | DCP_CH0STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_TAG_SHIFT)) & DCP_CH0STAT_CLR_TAG_MASK)

## CH0STAT_TOG - DCP channel 0 status register

#define | DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH0STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK)
#define | DCP_CH0STAT_TOG_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH0STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_TOG_HASH_MISMATCH_MASK)
#define | DCP_CH0STAT_TOG_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH0STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SETUP_MASK)
#define | DCP_CH0STAT_TOG_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH0STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PACKET_MASK)
#define | DCP_CH0STAT_TOG_ERROR_SRC_MASK (0x10U)
#define | DCP_CH0STAT_TOG_ERROR_SRC_SHIFT (4U)
#define | DCP_CH0STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SRC_MASK)
#define | DCP_CH0STAT_TOG_ERROR_DST_MASK (0x20U)
#define | DCP_CH0STAT_TOG_ERROR_DST_SHIFT (5U)
#define | DCP_CH0STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH0STAT_TOG_ERROR_DST_MASK)
#define | DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH0STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK)
#define | DCP_CH0STAT_TOG_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH0STAT_TOG_ERROR_CODE_SHIFT (16U)
#define | DCP_CH0STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH0STAT_TOG_ERROR_CODE_MASK)
#define | DCP_CH0STAT_TOG_TAG_MASK (0xFF000000U)
#define | DCP_CH0STAT_TOG_TAG_SHIFT (24U)
#define | DCP_CH0STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_TAG_SHIFT)) & DCP_CH0STAT_TOG_TAG_MASK)

## CH0OPTS - DCP channel 0 options register

#define | DCP_CH0OPTS_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH0OPTS_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH0OPTS_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)
#define | DCP_CH0OPTS_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH0OPTS_RSVD_SHIFT (16U)
#define | DCP_CH0OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)

## CH0OPTS_SET - DCP channel 0 options register

#define | DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH0OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK)
#define | DCP_CH0OPTS_SET_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH0OPTS_SET_RSVD_SHIFT (16U)
#define | DCP_CH0OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RSVD_SHIFT)) & DCP_CH0OPTS_SET_RSVD_MASK)

## CH0OPTS_CLR - DCP channel 0 options register

#define | DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH0OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK)
#define | DCP_CH0OPTS_CLR_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH0OPTS_CLR_RSVD_SHIFT (16U)
#define | DCP_CH0OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RSVD_SHIFT)) & DCP_CH0OPTS_CLR_RSVD_MASK)

## CH0OPTS_TOG - DCP channel 0 options register

#define | DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH0OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK)
#define | DCP_CH0OPTS_TOG_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH0OPTS_TOG_RSVD_SHIFT (16U)
#define | DCP_CH0OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RSVD_SHIFT)) & DCP_CH0OPTS_TOG_RSVD_MASK)

## CH1CMDPTR - DCP channel 1 command pointer address register

#define | DCP_CH1CMDPTR_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_CH1CMDPTR_ADDR_SHIFT (0U)
#define | DCP_CH1CMDPTR_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)

## CH1SEMA - DCP channel 1 semaphore register

#define | DCP_CH1SEMA_INCREMENT_MASK (0xFFU)
#define | DCP_CH1SEMA_INCREMENT_SHIFT (0U)
#define | DCP_CH1SEMA_INCREMENT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)
#define | DCP_CH1SEMA_VALUE_MASK (0xFF0000U)
#define | DCP_CH1SEMA_VALUE_SHIFT (16U)
#define | DCP_CH1SEMA_VALUE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)

## CH1STAT - DCP channel 1 status register

#define | DCP_CH1STAT_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH1STAT_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH1STAT_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)
#define | DCP_CH1STAT_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH1STAT_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH1STAT_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)
#define | DCP_CH1STAT_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH1STAT_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH1STAT_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)
#define | DCP_CH1STAT_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH1STAT_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH1STAT_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)
#define | DCP_CH1STAT_ERROR_SRC_MASK (0x10U)
#define | DCP_CH1STAT_ERROR_SRC_SHIFT (4U)
#define | DCP_CH1STAT_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)
#define | DCP_CH1STAT_ERROR_DST_MASK (0x20U)
#define | DCP_CH1STAT_ERROR_DST_SHIFT (5U)
#define | DCP_CH1STAT_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)
#define | DCP_CH1STAT_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH1STAT_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)
#define | DCP_CH1STAT_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH1STAT_ERROR_CODE_SHIFT (16U)
#define | DCP_CH1STAT_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)
#define | DCP_CH1STAT_TAG_MASK (0xFF000000U)
#define | DCP_CH1STAT_TAG_SHIFT (24U)
#define | DCP_CH1STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)

## CH1STAT_SET - DCP channel 1 status register

#define | DCP_CH1STAT_SET_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH1STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_SET_RSVD_COMPLETE_MASK)
#define | DCP_CH1STAT_SET_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH1STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_SET_HASH_MISMATCH_MASK)
#define | DCP_CH1STAT_SET_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH1STAT_SET_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH1STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_SET_ERROR_SETUP_MASK)
#define | DCP_CH1STAT_SET_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH1STAT_SET_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH1STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_SET_ERROR_PACKET_MASK)
#define | DCP_CH1STAT_SET_ERROR_SRC_MASK (0x10U)
#define | DCP_CH1STAT_SET_ERROR_SRC_SHIFT (4U)
#define | DCP_CH1STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH1STAT_SET_ERROR_SRC_MASK)
#define | DCP_CH1STAT_SET_ERROR_DST_MASK (0x20U)
#define | DCP_CH1STAT_SET_ERROR_DST_SHIFT (5U)
#define | DCP_CH1STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_DST_SHIFT)) & DCP_CH1STAT_SET_ERROR_DST_MASK)
#define | DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH1STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK)
#define | DCP_CH1STAT_SET_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH1STAT_SET_ERROR_CODE_SHIFT (16U)
#define | DCP_CH1STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH1STAT_SET_ERROR_CODE_MASK)
#define | DCP_CH1STAT_SET_TAG_MASK (0xFF000000U)
#define | DCP_CH1STAT_SET_TAG_SHIFT (24U)
#define | DCP_CH1STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_TAG_SHIFT)) & DCP_CH1STAT_SET_TAG_MASK)

## CH1STAT_CLR - DCP channel 1 status register

#define | DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH1STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK)
#define | DCP_CH1STAT_CLR_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH1STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_CLR_HASH_MISMATCH_MASK)
#define | DCP_CH1STAT_CLR_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH1STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SETUP_MASK)
#define | DCP_CH1STAT_CLR_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH1STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PACKET_MASK)
#define | DCP_CH1STAT_CLR_ERROR_SRC_MASK (0x10U)
#define | DCP_CH1STAT_CLR_ERROR_SRC_SHIFT (4U)
#define | DCP_CH1STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SRC_MASK)
#define | DCP_CH1STAT_CLR_ERROR_DST_MASK (0x20U)
#define | DCP_CH1STAT_CLR_ERROR_DST_SHIFT (5U)
#define | DCP_CH1STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH1STAT_CLR_ERROR_DST_MASK)
#define | DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH1STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK)
#define | DCP_CH1STAT_CLR_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH1STAT_CLR_ERROR_CODE_SHIFT (16U)
#define | DCP_CH1STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH1STAT_CLR_ERROR_CODE_MASK)
#define | DCP_CH1STAT_CLR_TAG_MASK (0xFF000000U)
#define | DCP_CH1STAT_CLR_TAG_SHIFT (24U)
#define | DCP_CH1STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_TAG_SHIFT)) & DCP_CH1STAT_CLR_TAG_MASK)

## CH1STAT_TOG - DCP channel 1 status register

#define | DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH1STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK)
#define | DCP_CH1STAT_TOG_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH1STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_TOG_HASH_MISMATCH_MASK)
#define | DCP_CH1STAT_TOG_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH1STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SETUP_MASK)
#define | DCP_CH1STAT_TOG_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH1STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PACKET_MASK)
#define | DCP_CH1STAT_TOG_ERROR_SRC_MASK (0x10U)
#define | DCP_CH1STAT_TOG_ERROR_SRC_SHIFT (4U)
#define | DCP_CH1STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SRC_MASK)
#define | DCP_CH1STAT_TOG_ERROR_DST_MASK (0x20U)
#define | DCP_CH1STAT_TOG_ERROR_DST_SHIFT (5U)
#define | DCP_CH1STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH1STAT_TOG_ERROR_DST_MASK)
#define | DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH1STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK)
#define | DCP_CH1STAT_TOG_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH1STAT_TOG_ERROR_CODE_SHIFT (16U)
#define | DCP_CH1STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH1STAT_TOG_ERROR_CODE_MASK)
#define | DCP_CH1STAT_TOG_TAG_MASK (0xFF000000U)
#define | DCP_CH1STAT_TOG_TAG_SHIFT (24U)
#define | DCP_CH1STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_TAG_SHIFT)) & DCP_CH1STAT_TOG_TAG_MASK)

## CH1OPTS - DCP channel 1 options register

#define | DCP_CH1OPTS_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH1OPTS_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH1OPTS_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)
#define | DCP_CH1OPTS_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH1OPTS_RSVD_SHIFT (16U)
#define | DCP_CH1OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)

## CH1OPTS_SET - DCP channel 1 options register

#define | DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH1OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK)
#define | DCP_CH1OPTS_SET_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH1OPTS_SET_RSVD_SHIFT (16U)
#define | DCP_CH1OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RSVD_SHIFT)) & DCP_CH1OPTS_SET_RSVD_MASK)

## CH1OPTS_CLR - DCP channel 1 options register

#define | DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH1OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK)
#define | DCP_CH1OPTS_CLR_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH1OPTS_CLR_RSVD_SHIFT (16U)
#define | DCP_CH1OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RSVD_SHIFT)) & DCP_CH1OPTS_CLR_RSVD_MASK)

## CH1OPTS_TOG - DCP channel 1 options register

#define | DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH1OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK)
#define | DCP_CH1OPTS_TOG_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH1OPTS_TOG_RSVD_SHIFT (16U)
#define | DCP_CH1OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RSVD_SHIFT)) & DCP_CH1OPTS_TOG_RSVD_MASK)

## CH2CMDPTR - DCP channel 2 command pointer address register

#define | DCP_CH2CMDPTR_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_CH2CMDPTR_ADDR_SHIFT (0U)
#define | DCP_CH2CMDPTR_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)

## CH2SEMA - DCP channel 2 semaphore register

#define | DCP_CH2SEMA_INCREMENT_MASK (0xFFU)
#define | DCP_CH2SEMA_INCREMENT_SHIFT (0U)
#define | DCP_CH2SEMA_INCREMENT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)
#define | DCP_CH2SEMA_VALUE_MASK (0xFF0000U)
#define | DCP_CH2SEMA_VALUE_SHIFT (16U)
#define | DCP_CH2SEMA_VALUE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)

## CH2STAT - DCP channel 2 status register

#define | DCP_CH2STAT_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH2STAT_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH2STAT_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)
#define | DCP_CH2STAT_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH2STAT_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH2STAT_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)
#define | DCP_CH2STAT_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH2STAT_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH2STAT_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)
#define | DCP_CH2STAT_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH2STAT_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH2STAT_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)
#define | DCP_CH2STAT_ERROR_SRC_MASK (0x10U)
#define | DCP_CH2STAT_ERROR_SRC_SHIFT (4U)
#define | DCP_CH2STAT_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)
#define | DCP_CH2STAT_ERROR_DST_MASK (0x20U)
#define | DCP_CH2STAT_ERROR_DST_SHIFT (5U)
#define | DCP_CH2STAT_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)
#define | DCP_CH2STAT_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH2STAT_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)
#define | DCP_CH2STAT_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH2STAT_ERROR_CODE_SHIFT (16U)
#define | DCP_CH2STAT_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)
#define | DCP_CH2STAT_TAG_MASK (0xFF000000U)
#define | DCP_CH2STAT_TAG_SHIFT (24U)
#define | DCP_CH2STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)

## CH2STAT_SET - DCP channel 2 status register

#define | DCP_CH2STAT_SET_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH2STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_SET_RSVD_COMPLETE_MASK)
#define | DCP_CH2STAT_SET_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH2STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_SET_HASH_MISMATCH_MASK)
#define | DCP_CH2STAT_SET_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH2STAT_SET_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH2STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_SET_ERROR_SETUP_MASK)
#define | DCP_CH2STAT_SET_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH2STAT_SET_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH2STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_SET_ERROR_PACKET_MASK)
#define | DCP_CH2STAT_SET_ERROR_SRC_MASK (0x10U)
#define | DCP_CH2STAT_SET_ERROR_SRC_SHIFT (4U)
#define | DCP_CH2STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH2STAT_SET_ERROR_SRC_MASK)
#define | DCP_CH2STAT_SET_ERROR_DST_MASK (0x20U)
#define | DCP_CH2STAT_SET_ERROR_DST_SHIFT (5U)
#define | DCP_CH2STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_DST_SHIFT)) & DCP_CH2STAT_SET_ERROR_DST_MASK)
#define | DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH2STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK)
#define | DCP_CH2STAT_SET_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH2STAT_SET_ERROR_CODE_SHIFT (16U)
#define | DCP_CH2STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH2STAT_SET_ERROR_CODE_MASK)
#define | DCP_CH2STAT_SET_TAG_MASK (0xFF000000U)
#define | DCP_CH2STAT_SET_TAG_SHIFT (24U)
#define | DCP_CH2STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_TAG_SHIFT)) & DCP_CH2STAT_SET_TAG_MASK)

## CH2STAT_CLR - DCP channel 2 status register

#define | DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH2STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK)
#define | DCP_CH2STAT_CLR_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH2STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_CLR_HASH_MISMATCH_MASK)
#define | DCP_CH2STAT_CLR_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH2STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SETUP_MASK)
#define | DCP_CH2STAT_CLR_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH2STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PACKET_MASK)
#define | DCP_CH2STAT_CLR_ERROR_SRC_MASK (0x10U)
#define | DCP_CH2STAT_CLR_ERROR_SRC_SHIFT (4U)
#define | DCP_CH2STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SRC_MASK)
#define | DCP_CH2STAT_CLR_ERROR_DST_MASK (0x20U)
#define | DCP_CH2STAT_CLR_ERROR_DST_SHIFT (5U)
#define | DCP_CH2STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH2STAT_CLR_ERROR_DST_MASK)
#define | DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH2STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK)
#define | DCP_CH2STAT_CLR_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH2STAT_CLR_ERROR_CODE_SHIFT (16U)
#define | DCP_CH2STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH2STAT_CLR_ERROR_CODE_MASK)
#define | DCP_CH2STAT_CLR_TAG_MASK (0xFF000000U)
#define | DCP_CH2STAT_CLR_TAG_SHIFT (24U)
#define | DCP_CH2STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_TAG_SHIFT)) & DCP_CH2STAT_CLR_TAG_MASK)

## CH2STAT_TOG - DCP channel 2 status register

#define | DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH2STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK)
#define | DCP_CH2STAT_TOG_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH2STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_TOG_HASH_MISMATCH_MASK)
#define | DCP_CH2STAT_TOG_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH2STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SETUP_MASK)
#define | DCP_CH2STAT_TOG_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH2STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PACKET_MASK)
#define | DCP_CH2STAT_TOG_ERROR_SRC_MASK (0x10U)
#define | DCP_CH2STAT_TOG_ERROR_SRC_SHIFT (4U)
#define | DCP_CH2STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SRC_MASK)
#define | DCP_CH2STAT_TOG_ERROR_DST_MASK (0x20U)
#define | DCP_CH2STAT_TOG_ERROR_DST_SHIFT (5U)
#define | DCP_CH2STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH2STAT_TOG_ERROR_DST_MASK)
#define | DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH2STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK)
#define | DCP_CH2STAT_TOG_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH2STAT_TOG_ERROR_CODE_SHIFT (16U)
#define | DCP_CH2STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH2STAT_TOG_ERROR_CODE_MASK)
#define | DCP_CH2STAT_TOG_TAG_MASK (0xFF000000U)
#define | DCP_CH2STAT_TOG_TAG_SHIFT (24U)
#define | DCP_CH2STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_TAG_SHIFT)) & DCP_CH2STAT_TOG_TAG_MASK)

## CH2OPTS - DCP channel 2 options register

#define | DCP_CH2OPTS_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH2OPTS_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH2OPTS_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)
#define | DCP_CH2OPTS_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH2OPTS_RSVD_SHIFT (16U)
#define | DCP_CH2OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)

## CH2OPTS_SET - DCP channel 2 options register

#define | DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH2OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK)
#define | DCP_CH2OPTS_SET_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH2OPTS_SET_RSVD_SHIFT (16U)
#define | DCP_CH2OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RSVD_SHIFT)) & DCP_CH2OPTS_SET_RSVD_MASK)

## CH2OPTS_CLR - DCP channel 2 options register

#define | DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH2OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK)
#define | DCP_CH2OPTS_CLR_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH2OPTS_CLR_RSVD_SHIFT (16U)
#define | DCP_CH2OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RSVD_SHIFT)) & DCP_CH2OPTS_CLR_RSVD_MASK)

## CH2OPTS_TOG - DCP channel 2 options register

#define | DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH2OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK)
#define | DCP_CH2OPTS_TOG_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH2OPTS_TOG_RSVD_SHIFT (16U)
#define | DCP_CH2OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RSVD_SHIFT)) & DCP_CH2OPTS_TOG_RSVD_MASK)

## CH3CMDPTR - DCP channel 3 command pointer address register

#define | DCP_CH3CMDPTR_ADDR_MASK (0xFFFFFFFFU)
#define | DCP_CH3CMDPTR_ADDR_SHIFT (0U)
#define | DCP_CH3CMDPTR_ADDR(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)

## CH3SEMA - DCP channel 3 semaphore register

#define | DCP_CH3SEMA_INCREMENT_MASK (0xFFU)
#define | DCP_CH3SEMA_INCREMENT_SHIFT (0U)
#define | DCP_CH3SEMA_INCREMENT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)
#define | DCP_CH3SEMA_VALUE_MASK (0xFF0000U)
#define | DCP_CH3SEMA_VALUE_SHIFT (16U)
#define | DCP_CH3SEMA_VALUE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)

## CH3STAT - DCP channel 3 status register

#define | DCP_CH3STAT_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH3STAT_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH3STAT_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)
#define | DCP_CH3STAT_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH3STAT_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH3STAT_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)
#define | DCP_CH3STAT_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH3STAT_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH3STAT_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)
#define | DCP_CH3STAT_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH3STAT_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH3STAT_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)
#define | DCP_CH3STAT_ERROR_SRC_MASK (0x10U)
#define | DCP_CH3STAT_ERROR_SRC_SHIFT (4U)
#define | DCP_CH3STAT_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)
#define | DCP_CH3STAT_ERROR_DST_MASK (0x20U)
#define | DCP_CH3STAT_ERROR_DST_SHIFT (5U)
#define | DCP_CH3STAT_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)
#define | DCP_CH3STAT_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH3STAT_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)
#define | DCP_CH3STAT_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH3STAT_ERROR_CODE_SHIFT (16U)
#define | DCP_CH3STAT_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)
#define | DCP_CH3STAT_TAG_MASK (0xFF000000U)
#define | DCP_CH3STAT_TAG_SHIFT (24U)
#define | DCP_CH3STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)

## CH3STAT_SET - DCP channel 3 status register

#define | DCP_CH3STAT_SET_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH3STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_SET_RSVD_COMPLETE_MASK)
#define | DCP_CH3STAT_SET_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH3STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_SET_HASH_MISMATCH_MASK)
#define | DCP_CH3STAT_SET_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH3STAT_SET_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH3STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_SET_ERROR_SETUP_MASK)
#define | DCP_CH3STAT_SET_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH3STAT_SET_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH3STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_SET_ERROR_PACKET_MASK)
#define | DCP_CH3STAT_SET_ERROR_SRC_MASK (0x10U)
#define | DCP_CH3STAT_SET_ERROR_SRC_SHIFT (4U)
#define | DCP_CH3STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH3STAT_SET_ERROR_SRC_MASK)
#define | DCP_CH3STAT_SET_ERROR_DST_MASK (0x20U)
#define | DCP_CH3STAT_SET_ERROR_DST_SHIFT (5U)
#define | DCP_CH3STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_DST_SHIFT)) & DCP_CH3STAT_SET_ERROR_DST_MASK)
#define | DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH3STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK)
#define | DCP_CH3STAT_SET_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH3STAT_SET_ERROR_CODE_SHIFT (16U)
#define | DCP_CH3STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH3STAT_SET_ERROR_CODE_MASK)
#define | DCP_CH3STAT_SET_TAG_MASK (0xFF000000U)
#define | DCP_CH3STAT_SET_TAG_SHIFT (24U)
#define | DCP_CH3STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_TAG_SHIFT)) & DCP_CH3STAT_SET_TAG_MASK)

## CH3STAT_CLR - DCP channel 3 status register

#define | DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH3STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK)
#define | DCP_CH3STAT_CLR_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH3STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_CLR_HASH_MISMATCH_MASK)
#define | DCP_CH3STAT_CLR_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH3STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SETUP_MASK)
#define | DCP_CH3STAT_CLR_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH3STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PACKET_MASK)
#define | DCP_CH3STAT_CLR_ERROR_SRC_MASK (0x10U)
#define | DCP_CH3STAT_CLR_ERROR_SRC_SHIFT (4U)
#define | DCP_CH3STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SRC_MASK)
#define | DCP_CH3STAT_CLR_ERROR_DST_MASK (0x20U)
#define | DCP_CH3STAT_CLR_ERROR_DST_SHIFT (5U)
#define | DCP_CH3STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH3STAT_CLR_ERROR_DST_MASK)
#define | DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH3STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK)
#define | DCP_CH3STAT_CLR_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH3STAT_CLR_ERROR_CODE_SHIFT (16U)
#define | DCP_CH3STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH3STAT_CLR_ERROR_CODE_MASK)
#define | DCP_CH3STAT_CLR_TAG_MASK (0xFF000000U)
#define | DCP_CH3STAT_CLR_TAG_SHIFT (24U)
#define | DCP_CH3STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_TAG_SHIFT)) & DCP_CH3STAT_CLR_TAG_MASK)

## CH3STAT_TOG - DCP channel 3 status register

#define | DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK (0x1U)
#define | DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT (0U)
#define | DCP_CH3STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK)
#define | DCP_CH3STAT_TOG_HASH_MISMATCH_MASK (0x2U)
#define | DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT (1U)
#define | DCP_CH3STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_TOG_HASH_MISMATCH_MASK)
#define | DCP_CH3STAT_TOG_ERROR_SETUP_MASK (0x4U)
#define | DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT (2U)
#define | DCP_CH3STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SETUP_MASK)
#define | DCP_CH3STAT_TOG_ERROR_PACKET_MASK (0x8U)
#define | DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT (3U)
#define | DCP_CH3STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PACKET_MASK)
#define | DCP_CH3STAT_TOG_ERROR_SRC_MASK (0x10U)
#define | DCP_CH3STAT_TOG_ERROR_SRC_SHIFT (4U)
#define | DCP_CH3STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SRC_MASK)
#define | DCP_CH3STAT_TOG_ERROR_DST_MASK (0x20U)
#define | DCP_CH3STAT_TOG_ERROR_DST_SHIFT (5U)
#define | DCP_CH3STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH3STAT_TOG_ERROR_DST_MASK)
#define | DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)
#define | DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)
#define | DCP_CH3STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK)
#define | DCP_CH3STAT_TOG_ERROR_CODE_MASK (0xFF0000U)
#define | DCP_CH3STAT_TOG_ERROR_CODE_SHIFT (16U)
#define | DCP_CH3STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH3STAT_TOG_ERROR_CODE_MASK)
#define | DCP_CH3STAT_TOG_TAG_MASK (0xFF000000U)
#define | DCP_CH3STAT_TOG_TAG_SHIFT (24U)
#define | DCP_CH3STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_TAG_SHIFT)) & DCP_CH3STAT_TOG_TAG_MASK)

## CH3OPTS - DCP channel 3 options register

#define | DCP_CH3OPTS_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH3OPTS_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH3OPTS_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)
#define | DCP_CH3OPTS_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH3OPTS_RSVD_SHIFT (16U)
#define | DCP_CH3OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)

## CH3OPTS_SET - DCP channel 3 options register

#define | DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH3OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK)
#define | DCP_CH3OPTS_SET_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH3OPTS_SET_RSVD_SHIFT (16U)
#define | DCP_CH3OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RSVD_SHIFT)) & DCP_CH3OPTS_SET_RSVD_MASK)

## CH3OPTS_CLR - DCP channel 3 options register

#define | DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH3OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK)
#define | DCP_CH3OPTS_CLR_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH3OPTS_CLR_RSVD_SHIFT (16U)
#define | DCP_CH3OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RSVD_SHIFT)) & DCP_CH3OPTS_CLR_RSVD_MASK)

## CH3OPTS_TOG - DCP channel 3 options register

#define | DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)
#define | DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)
#define | DCP_CH3OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK)
#define | DCP_CH3OPTS_TOG_RSVD_MASK (0xFFFF0000U)
#define | DCP_CH3OPTS_TOG_RSVD_SHIFT (16U)
#define | DCP_CH3OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RSVD_SHIFT)) & DCP_CH3OPTS_TOG_RSVD_MASK)

## DBGSELECT - DCP debug select register

#define | DCP_DBGSELECT_INDEX_MASK (0xFFU)
#define | DCP_DBGSELECT_INDEX_SHIFT (0U)
#define | DCP_DBGSELECT_INDEX(x) (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)
#define | DCP_DBGSELECT_RSVD_MASK (0xFFFFFF00U)
#define | DCP_DBGSELECT_RSVD_SHIFT (8U)
#define | DCP_DBGSELECT_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)

## DBGDATA - DCP debug data register

#define | DCP_DBGDATA_DATA_MASK (0xFFFFFFFFU)
#define | DCP_DBGDATA_DATA_SHIFT (0U)
#define | DCP_DBGDATA_DATA(x) (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)

## PAGETABLE - DCP page table register

#define | DCP_PAGETABLE_ENABLE_MASK (0x1U)
#define | DCP_PAGETABLE_ENABLE_SHIFT (0U)
#define | DCP_PAGETABLE_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)
#define | DCP_PAGETABLE_FLUSH_MASK (0x2U)
#define | DCP_PAGETABLE_FLUSH_SHIFT (1U)
#define | DCP_PAGETABLE_FLUSH(x) (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)
#define | DCP_PAGETABLE_BASE_MASK (0xFFFFFFFCU)
#define | DCP_PAGETABLE_BASE_SHIFT (2U)
#define | DCP_PAGETABLE_BASE(x) (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)

## VERSION - DCP version register

#define | DCP_VERSION_STEP_MASK (0xFFFFU)
#define | DCP_VERSION_STEP_SHIFT (0U)
#define | DCP_VERSION_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)
#define | DCP_VERSION_MINOR_MASK (0xFF0000U)
#define | DCP_VERSION_MINOR_SHIFT (16U)
#define | DCP_VERSION_MINOR(x) (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)
#define | DCP_VERSION_MAJOR_MASK (0xFF000000U)
#define | DCP_VERSION_MAJOR_SHIFT (24U)
#define | DCP_VERSION_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ DCP_CAPABILITY0_DISABLE_DECRYPT

#define DCP_CAPABILITY0_DISABLE_DECRYPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT)) & DCP_CAPABILITY0_DISABLE_DECRYPT_MASK)

Definition at line 11993 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_DISABLE_DECRYPT_MASK

#define DCP_CAPABILITY0_DISABLE_DECRYPT_MASK (0x80000000U)

Definition at line 11991 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT

#define DCP_CAPABILITY0_DISABLE_DECRYPT_SHIFT (31U)

Definition at line 11992 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_DISABLE_UNIQUE_KEY

#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT)) & DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK)

Definition at line 11990 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK

#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_MASK (0x20000000U)

Definition at line 11988 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT

#define DCP_CAPABILITY0_DISABLE_UNIQUE_KEY_SHIFT (29U)

Definition at line 11989 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_CHANNELS

#define DCP_CAPABILITY0_NUM_CHANNELS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_CHANNELS_SHIFT)) & DCP_CAPABILITY0_NUM_CHANNELS_MASK)

Definition at line 11984 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_CHANNELS_MASK

#define DCP_CAPABILITY0_NUM_CHANNELS_MASK (0xF00U)

Definition at line 11982 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_CHANNELS_SHIFT

#define DCP_CAPABILITY0_NUM_CHANNELS_SHIFT (8U)

Definition at line 11983 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_KEYS

#define DCP_CAPABILITY0_NUM_KEYS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_NUM_KEYS_SHIFT)) & DCP_CAPABILITY0_NUM_KEYS_MASK)

Definition at line 11981 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_KEYS_MASK

#define DCP_CAPABILITY0_NUM_KEYS_MASK (0xFFU)

Definition at line 11979 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_NUM_KEYS_SHIFT

#define DCP_CAPABILITY0_NUM_KEYS_SHIFT (0U)

Definition at line 11980 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_RSVD

#define DCP_CAPABILITY0_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY0_RSVD_SHIFT)) & DCP_CAPABILITY0_RSVD_MASK)

Definition at line 11987 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_RSVD_MASK

#define DCP_CAPABILITY0_RSVD_MASK (0x1FFFF000U)

Definition at line 11985 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY0_RSVD_SHIFT

#define DCP_CAPABILITY0_RSVD_SHIFT (12U)

Definition at line 11986 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_CIPHER_ALGORITHMS

#define DCP_CAPABILITY1_CIPHER_ALGORITHMS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK)

CIPHER_ALGORITHMS 0b0000000000000001..AES128

Definition at line 12003 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK

#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_MASK (0xFFFFU)

Definition at line 11998 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT

#define DCP_CAPABILITY1_CIPHER_ALGORITHMS_SHIFT (0U)

Definition at line 11999 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_HASH_ALGORITHMS

#define DCP_CAPABILITY1_HASH_ALGORITHMS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT)) & DCP_CAPABILITY1_HASH_ALGORITHMS_MASK)

HASH_ALGORITHMS 0b0000000000000001..SHA1 0b0000000000000010..CRC32 0b0000000000000100..SHA256

Definition at line 12011 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_HASH_ALGORITHMS_MASK

#define DCP_CAPABILITY1_HASH_ALGORITHMS_MASK (0xFFFF0000U)

Definition at line 12004 of file MIMXRT1062.h.

## ◆ DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT

#define DCP_CAPABILITY1_HASH_ALGORITHMS_SHIFT (16U)

Definition at line 12005 of file MIMXRT1062.h.

## ◆ DCP_CH0CMDPTR_ADDR

#define DCP_CH0CMDPTR_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0CMDPTR_ADDR_SHIFT)) & DCP_CH0CMDPTR_ADDR_MASK)

Definition at line 12215 of file MIMXRT1062.h.

## ◆ DCP_CH0CMDPTR_ADDR_MASK

#define DCP_CH0CMDPTR_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12213 of file MIMXRT1062.h.

## ◆ DCP_CH0CMDPTR_ADDR_SHIFT

#define DCP_CH0CMDPTR_ADDR_SHIFT (0U)

Definition at line 12214 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RECOVERY_TIMER

#define DCP_CH0OPTS_CLR_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK)

Definition at line 12404 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK

#define DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12402 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT

#define DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12403 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RSVD

#define DCP_CH0OPTS_CLR_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RSVD_SHIFT)) & DCP_CH0OPTS_CLR_RSVD_MASK)

Definition at line 12407 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RSVD_MASK

#define DCP_CH0OPTS_CLR_RSVD_MASK (0xFFFF0000U)

Definition at line 12405 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_CLR_RSVD_SHIFT

#define DCP_CH0OPTS_CLR_RSVD_SHIFT (16U)

Definition at line 12406 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RECOVERY_TIMER

#define DCP_CH0OPTS_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_RECOVERY_TIMER_MASK)

Definition at line 12384 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RECOVERY_TIMER_MASK

#define DCP_CH0OPTS_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12382 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RECOVERY_TIMER_SHIFT

#define DCP_CH0OPTS_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12383 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RSVD

#define DCP_CH0OPTS_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK)

Definition at line 12387 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RSVD_MASK

#define DCP_CH0OPTS_RSVD_MASK (0xFFFF0000U)

Definition at line 12385 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_RSVD_SHIFT

#define DCP_CH0OPTS_RSVD_SHIFT (16U)

Definition at line 12386 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RECOVERY_TIMER

#define DCP_CH0OPTS_SET_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK)

Definition at line 12394 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK

#define DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12392 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT

#define DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12393 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RSVD

#define DCP_CH0OPTS_SET_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RSVD_SHIFT)) & DCP_CH0OPTS_SET_RSVD_MASK)

Definition at line 12397 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RSVD_MASK

#define DCP_CH0OPTS_SET_RSVD_MASK (0xFFFF0000U)

Definition at line 12395 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_SET_RSVD_SHIFT

#define DCP_CH0OPTS_SET_RSVD_SHIFT (16U)

Definition at line 12396 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RECOVERY_TIMER

#define DCP_CH0OPTS_TOG_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK)

Definition at line 12414 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK

#define DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12412 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT

#define DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12413 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RSVD

#define DCP_CH0OPTS_TOG_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RSVD_SHIFT)) & DCP_CH0OPTS_TOG_RSVD_MASK)

Definition at line 12417 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RSVD_MASK

#define DCP_CH0OPTS_TOG_RSVD_MASK (0xFFFF0000U)

Definition at line 12415 of file MIMXRT1062.h.

## ◆ DCP_CH0OPTS_TOG_RSVD_SHIFT

#define DCP_CH0OPTS_TOG_RSVD_SHIFT (16U)

Definition at line 12416 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_INCREMENT

#define DCP_CH0SEMA_INCREMENT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_INCREMENT_SHIFT)) & DCP_CH0SEMA_INCREMENT_MASK)

Definition at line 12222 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_INCREMENT_MASK

#define DCP_CH0SEMA_INCREMENT_MASK (0xFFU)

Definition at line 12220 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_INCREMENT_SHIFT

#define DCP_CH0SEMA_INCREMENT_SHIFT (0U)

Definition at line 12221 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_VALUE

#define DCP_CH0SEMA_VALUE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0SEMA_VALUE_SHIFT)) & DCP_CH0SEMA_VALUE_MASK)

Definition at line 12225 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_VALUE_MASK

#define DCP_CH0SEMA_VALUE_MASK (0xFF0000U)

Definition at line 12223 of file MIMXRT1062.h.

## ◆ DCP_CH0SEMA_VALUE_SHIFT

#define DCP_CH0SEMA_VALUE_SHIFT (16U)

Definition at line 12224 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_CODE

#define DCP_CH0STAT_CLR_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH0STAT_CLR_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error signalled because the next pointer is 0x00000000 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set 0b00000011..Error signalled because an error is reported reading/writing the context buffer 0b00000100..Error signalled because an error is reported reading/writing the payload 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash)

Definition at line 12336 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_CODE_MASK

#define DCP_CH0STAT_CLR_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12327 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_CODE_SHIFT

#define DCP_CH0STAT_CLR_ERROR_CODE_SHIFT (16U)

Definition at line 12328 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_DST

#define DCP_CH0STAT_CLR_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH0STAT_CLR_ERROR_DST_MASK)

Definition at line 12323 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_DST_MASK

#define DCP_CH0STAT_CLR_ERROR_DST_MASK (0x20U)

Definition at line 12321 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_DST_SHIFT

#define DCP_CH0STAT_CLR_ERROR_DST_SHIFT (5U)

Definition at line 12322 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PACKET

#define DCP_CH0STAT_CLR_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PACKET_MASK)

Definition at line 12317 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PACKET_MASK

#define DCP_CH0STAT_CLR_ERROR_PACKET_MASK (0x8U)

Definition at line 12315 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT

#define DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT (3U)

Definition at line 12316 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PAGEFAULT

#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK)

Definition at line 12326 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK

#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12324 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT

#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12325 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SETUP

#define DCP_CH0STAT_CLR_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SETUP_MASK)

Definition at line 12314 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SETUP_MASK

#define DCP_CH0STAT_CLR_ERROR_SETUP_MASK (0x4U)

Definition at line 12312 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT

#define DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT (2U)

Definition at line 12313 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SRC

#define DCP_CH0STAT_CLR_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SRC_MASK)

Definition at line 12320 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SRC_MASK

#define DCP_CH0STAT_CLR_ERROR_SRC_MASK (0x10U)

Definition at line 12318 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_ERROR_SRC_SHIFT

#define DCP_CH0STAT_CLR_ERROR_SRC_SHIFT (4U)

Definition at line 12319 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_HASH_MISMATCH

#define DCP_CH0STAT_CLR_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_CLR_HASH_MISMATCH_MASK)

Definition at line 12311 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_HASH_MISMATCH_MASK

#define DCP_CH0STAT_CLR_HASH_MISMATCH_MASK (0x2U)

Definition at line 12309 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT

#define DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT (1U)

Definition at line 12310 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_RSVD_COMPLETE

#define DCP_CH0STAT_CLR_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK)

Definition at line 12308 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK

#define DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12306 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT

#define DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12307 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_TAG

#define DCP_CH0STAT_CLR_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_TAG_SHIFT)) & DCP_CH0STAT_CLR_TAG_MASK)

Definition at line 12339 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_TAG_MASK

#define DCP_CH0STAT_CLR_TAG_MASK (0xFF000000U)

Definition at line 12337 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_CLR_TAG_SHIFT

#define DCP_CH0STAT_CLR_TAG_SHIFT (24U)

Definition at line 12338 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_CODE

#define DCP_CH0STAT_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_CODE_SHIFT)) & DCP_CH0STAT_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error signalled because the next pointer is 0x00000000 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set 0b00000011..Error signalled because an error is reported reading/writing the context buffer 0b00000100..Error signalled because an error is reported reading/writing the payload 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash)

Definition at line 12260 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_CODE_MASK

#define DCP_CH0STAT_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12251 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_CODE_SHIFT

#define DCP_CH0STAT_ERROR_CODE_SHIFT (16U)

Definition at line 12252 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_DST

#define DCP_CH0STAT_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_DST_SHIFT)) & DCP_CH0STAT_ERROR_DST_MASK)

Definition at line 12247 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_DST_MASK

#define DCP_CH0STAT_ERROR_DST_MASK (0x20U)

Definition at line 12245 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_DST_SHIFT

#define DCP_CH0STAT_ERROR_DST_SHIFT (5U)

Definition at line 12246 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PACKET

#define DCP_CH0STAT_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_ERROR_PACKET_MASK)

Definition at line 12241 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PACKET_MASK

#define DCP_CH0STAT_ERROR_PACKET_MASK (0x8U)

Definition at line 12239 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PACKET_SHIFT

#define DCP_CH0STAT_ERROR_PACKET_SHIFT (3U)

Definition at line 12240 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PAGEFAULT

#define DCP_CH0STAT_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_ERROR_PAGEFAULT_MASK)

Definition at line 12250 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PAGEFAULT_MASK

#define DCP_CH0STAT_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12248 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT

#define DCP_CH0STAT_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12249 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SETUP

#define DCP_CH0STAT_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_ERROR_SETUP_MASK)

Definition at line 12238 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SETUP_MASK

#define DCP_CH0STAT_ERROR_SETUP_MASK (0x4U)

Definition at line 12236 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SETUP_SHIFT

#define DCP_CH0STAT_ERROR_SETUP_SHIFT (2U)

Definition at line 12237 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SRC

#define DCP_CH0STAT_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_ERROR_SRC_SHIFT)) & DCP_CH0STAT_ERROR_SRC_MASK)

Definition at line 12244 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SRC_MASK

#define DCP_CH0STAT_ERROR_SRC_MASK (0x10U)

Definition at line 12242 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_ERROR_SRC_SHIFT

#define DCP_CH0STAT_ERROR_SRC_SHIFT (4U)

Definition at line 12243 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_HASH_MISMATCH

#define DCP_CH0STAT_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_HASH_MISMATCH_MASK)

Definition at line 12235 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_HASH_MISMATCH_MASK

#define DCP_CH0STAT_HASH_MISMATCH_MASK (0x2U)

Definition at line 12233 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_HASH_MISMATCH_SHIFT

#define DCP_CH0STAT_HASH_MISMATCH_SHIFT (1U)

Definition at line 12234 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_RSVD_COMPLETE

#define DCP_CH0STAT_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_RSVD_COMPLETE_MASK)

Definition at line 12232 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_RSVD_COMPLETE_MASK

#define DCP_CH0STAT_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12230 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_RSVD_COMPLETE_SHIFT

#define DCP_CH0STAT_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12231 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_CODE

#define DCP_CH0STAT_SET_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH0STAT_SET_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error signalled because the next pointer is 0x00000000 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set 0b00000011..Error signalled because an error is reported reading/writing the context buffer 0b00000100..Error signalled because an error is reported reading/writing the payload 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash)

Definition at line 12298 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_CODE_MASK

#define DCP_CH0STAT_SET_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12289 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_CODE_SHIFT

#define DCP_CH0STAT_SET_ERROR_CODE_SHIFT (16U)

Definition at line 12290 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_DST

#define DCP_CH0STAT_SET_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_DST_SHIFT)) & DCP_CH0STAT_SET_ERROR_DST_MASK)

Definition at line 12285 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_DST_MASK

#define DCP_CH0STAT_SET_ERROR_DST_MASK (0x20U)

Definition at line 12283 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_DST_SHIFT

#define DCP_CH0STAT_SET_ERROR_DST_SHIFT (5U)

Definition at line 12284 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PACKET

#define DCP_CH0STAT_SET_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_SET_ERROR_PACKET_MASK)

Definition at line 12279 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PACKET_MASK

#define DCP_CH0STAT_SET_ERROR_PACKET_MASK (0x8U)

Definition at line 12277 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PACKET_SHIFT

#define DCP_CH0STAT_SET_ERROR_PACKET_SHIFT (3U)

Definition at line 12278 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PAGEFAULT

#define DCP_CH0STAT_SET_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK)

Definition at line 12288 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK

#define DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12286 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT

#define DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12287 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SETUP

#define DCP_CH0STAT_SET_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_SET_ERROR_SETUP_MASK)

Definition at line 12276 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SETUP_MASK

#define DCP_CH0STAT_SET_ERROR_SETUP_MASK (0x4U)

Definition at line 12274 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SETUP_SHIFT

#define DCP_CH0STAT_SET_ERROR_SETUP_SHIFT (2U)

Definition at line 12275 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SRC

#define DCP_CH0STAT_SET_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH0STAT_SET_ERROR_SRC_MASK)

Definition at line 12282 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SRC_MASK

#define DCP_CH0STAT_SET_ERROR_SRC_MASK (0x10U)

Definition at line 12280 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_ERROR_SRC_SHIFT

#define DCP_CH0STAT_SET_ERROR_SRC_SHIFT (4U)

Definition at line 12281 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_HASH_MISMATCH

#define DCP_CH0STAT_SET_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_SET_HASH_MISMATCH_MASK)

Definition at line 12273 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_HASH_MISMATCH_MASK

#define DCP_CH0STAT_SET_HASH_MISMATCH_MASK (0x2U)

Definition at line 12271 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT

#define DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT (1U)

Definition at line 12272 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_RSVD_COMPLETE

#define DCP_CH0STAT_SET_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_SET_RSVD_COMPLETE_MASK)

Definition at line 12270 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_RSVD_COMPLETE_MASK

#define DCP_CH0STAT_SET_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12268 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT

#define DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12269 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_TAG

#define DCP_CH0STAT_SET_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_TAG_SHIFT)) & DCP_CH0STAT_SET_TAG_MASK)

Definition at line 12301 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_TAG_MASK

#define DCP_CH0STAT_SET_TAG_MASK (0xFF000000U)

Definition at line 12299 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_SET_TAG_SHIFT

#define DCP_CH0STAT_SET_TAG_SHIFT (24U)

Definition at line 12300 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TAG

#define DCP_CH0STAT_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK)

Definition at line 12263 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TAG_MASK

#define DCP_CH0STAT_TAG_MASK (0xFF000000U)

Definition at line 12261 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TAG_SHIFT

#define DCP_CH0STAT_TAG_SHIFT (24U)

Definition at line 12262 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_CODE

#define DCP_CH0STAT_TOG_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH0STAT_TOG_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error signalled because the next pointer is 0x00000000 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set 0b00000011..Error signalled because an error is reported reading/writing the context buffer 0b00000100..Error signalled because an error is reported reading/writing the payload 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash)

Definition at line 12374 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_CODE_MASK

#define DCP_CH0STAT_TOG_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12365 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_CODE_SHIFT

#define DCP_CH0STAT_TOG_ERROR_CODE_SHIFT (16U)

Definition at line 12366 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_DST

#define DCP_CH0STAT_TOG_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH0STAT_TOG_ERROR_DST_MASK)

Definition at line 12361 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_DST_MASK

#define DCP_CH0STAT_TOG_ERROR_DST_MASK (0x20U)

Definition at line 12359 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_DST_SHIFT

#define DCP_CH0STAT_TOG_ERROR_DST_SHIFT (5U)

Definition at line 12360 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PACKET

#define DCP_CH0STAT_TOG_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PACKET_MASK)

Definition at line 12355 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PACKET_MASK

#define DCP_CH0STAT_TOG_ERROR_PACKET_MASK (0x8U)

Definition at line 12353 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT

#define DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT (3U)

Definition at line 12354 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PAGEFAULT

#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK)

Definition at line 12364 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK

#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12362 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT

#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12363 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SETUP

#define DCP_CH0STAT_TOG_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SETUP_MASK)

Definition at line 12352 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SETUP_MASK

#define DCP_CH0STAT_TOG_ERROR_SETUP_MASK (0x4U)

Definition at line 12350 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT

#define DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT (2U)

Definition at line 12351 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SRC

#define DCP_CH0STAT_TOG_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SRC_MASK)

Definition at line 12358 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SRC_MASK

#define DCP_CH0STAT_TOG_ERROR_SRC_MASK (0x10U)

Definition at line 12356 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_ERROR_SRC_SHIFT

#define DCP_CH0STAT_TOG_ERROR_SRC_SHIFT (4U)

Definition at line 12357 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_HASH_MISMATCH

#define DCP_CH0STAT_TOG_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_TOG_HASH_MISMATCH_MASK)

Definition at line 12349 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_HASH_MISMATCH_MASK

#define DCP_CH0STAT_TOG_HASH_MISMATCH_MASK (0x2U)

Definition at line 12347 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT

#define DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT (1U)

Definition at line 12348 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_RSVD_COMPLETE

#define DCP_CH0STAT_TOG_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK)

Definition at line 12346 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK

#define DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12344 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT

#define DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12345 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_TAG

#define DCP_CH0STAT_TOG_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_TAG_SHIFT)) & DCP_CH0STAT_TOG_TAG_MASK)

Definition at line 12377 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_TAG_MASK

#define DCP_CH0STAT_TOG_TAG_MASK (0xFF000000U)

Definition at line 12375 of file MIMXRT1062.h.

## ◆ DCP_CH0STAT_TOG_TAG_SHIFT

#define DCP_CH0STAT_TOG_TAG_SHIFT (24U)

Definition at line 12376 of file MIMXRT1062.h.

## ◆ DCP_CH1CMDPTR_ADDR

#define DCP_CH1CMDPTR_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1CMDPTR_ADDR_SHIFT)) & DCP_CH1CMDPTR_ADDR_MASK)

Definition at line 12424 of file MIMXRT1062.h.

## ◆ DCP_CH1CMDPTR_ADDR_MASK

#define DCP_CH1CMDPTR_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12422 of file MIMXRT1062.h.

## ◆ DCP_CH1CMDPTR_ADDR_SHIFT

#define DCP_CH1CMDPTR_ADDR_SHIFT (0U)

Definition at line 12423 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RECOVERY_TIMER

#define DCP_CH1OPTS_CLR_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK)

Definition at line 12613 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK

#define DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12611 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT

#define DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12612 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RSVD

#define DCP_CH1OPTS_CLR_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RSVD_SHIFT)) & DCP_CH1OPTS_CLR_RSVD_MASK)

Definition at line 12616 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RSVD_MASK

#define DCP_CH1OPTS_CLR_RSVD_MASK (0xFFFF0000U)

Definition at line 12614 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_CLR_RSVD_SHIFT

#define DCP_CH1OPTS_CLR_RSVD_SHIFT (16U)

Definition at line 12615 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RECOVERY_TIMER

#define DCP_CH1OPTS_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_RECOVERY_TIMER_MASK)

Definition at line 12593 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RECOVERY_TIMER_MASK

#define DCP_CH1OPTS_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12591 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RECOVERY_TIMER_SHIFT

#define DCP_CH1OPTS_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12592 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RSVD

#define DCP_CH1OPTS_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK)

Definition at line 12596 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RSVD_MASK

#define DCP_CH1OPTS_RSVD_MASK (0xFFFF0000U)

Definition at line 12594 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_RSVD_SHIFT

#define DCP_CH1OPTS_RSVD_SHIFT (16U)

Definition at line 12595 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RECOVERY_TIMER

#define DCP_CH1OPTS_SET_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK)

Definition at line 12603 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK

#define DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12601 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT

#define DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12602 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RSVD

#define DCP_CH1OPTS_SET_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RSVD_SHIFT)) & DCP_CH1OPTS_SET_RSVD_MASK)

Definition at line 12606 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RSVD_MASK

#define DCP_CH1OPTS_SET_RSVD_MASK (0xFFFF0000U)

Definition at line 12604 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_SET_RSVD_SHIFT

#define DCP_CH1OPTS_SET_RSVD_SHIFT (16U)

Definition at line 12605 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RECOVERY_TIMER

#define DCP_CH1OPTS_TOG_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK)

Definition at line 12623 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK

#define DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12621 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT

#define DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12622 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RSVD

#define DCP_CH1OPTS_TOG_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RSVD_SHIFT)) & DCP_CH1OPTS_TOG_RSVD_MASK)

Definition at line 12626 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RSVD_MASK

#define DCP_CH1OPTS_TOG_RSVD_MASK (0xFFFF0000U)

Definition at line 12624 of file MIMXRT1062.h.

## ◆ DCP_CH1OPTS_TOG_RSVD_SHIFT

#define DCP_CH1OPTS_TOG_RSVD_SHIFT (16U)

Definition at line 12625 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_INCREMENT

#define DCP_CH1SEMA_INCREMENT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_INCREMENT_SHIFT)) & DCP_CH1SEMA_INCREMENT_MASK)

Definition at line 12431 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_INCREMENT_MASK

#define DCP_CH1SEMA_INCREMENT_MASK (0xFFU)

Definition at line 12429 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_INCREMENT_SHIFT

#define DCP_CH1SEMA_INCREMENT_SHIFT (0U)

Definition at line 12430 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_VALUE

#define DCP_CH1SEMA_VALUE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1SEMA_VALUE_SHIFT)) & DCP_CH1SEMA_VALUE_MASK)

Definition at line 12434 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_VALUE_MASK

#define DCP_CH1SEMA_VALUE_MASK (0xFF0000U)

Definition at line 12432 of file MIMXRT1062.h.

## ◆ DCP_CH1SEMA_VALUE_SHIFT

#define DCP_CH1SEMA_VALUE_SHIFT (16U)

Definition at line 12433 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_CODE

#define DCP_CH1STAT_CLR_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH1STAT_CLR_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported when reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12545 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_CODE_MASK

#define DCP_CH1STAT_CLR_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12536 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_CODE_SHIFT

#define DCP_CH1STAT_CLR_ERROR_CODE_SHIFT (16U)

Definition at line 12537 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_DST

#define DCP_CH1STAT_CLR_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH1STAT_CLR_ERROR_DST_MASK)

Definition at line 12532 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_DST_MASK

#define DCP_CH1STAT_CLR_ERROR_DST_MASK (0x20U)

Definition at line 12530 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_DST_SHIFT

#define DCP_CH1STAT_CLR_ERROR_DST_SHIFT (5U)

Definition at line 12531 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PACKET

#define DCP_CH1STAT_CLR_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PACKET_MASK)

Definition at line 12526 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PACKET_MASK

#define DCP_CH1STAT_CLR_ERROR_PACKET_MASK (0x8U)

Definition at line 12524 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT

#define DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT (3U)

Definition at line 12525 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PAGEFAULT

#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK)

Definition at line 12535 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK

#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12533 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT

#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12534 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SETUP

#define DCP_CH1STAT_CLR_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SETUP_MASK)

Definition at line 12523 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SETUP_MASK

#define DCP_CH1STAT_CLR_ERROR_SETUP_MASK (0x4U)

Definition at line 12521 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT

#define DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT (2U)

Definition at line 12522 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SRC

#define DCP_CH1STAT_CLR_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SRC_MASK)

Definition at line 12529 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SRC_MASK

#define DCP_CH1STAT_CLR_ERROR_SRC_MASK (0x10U)

Definition at line 12527 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_ERROR_SRC_SHIFT

#define DCP_CH1STAT_CLR_ERROR_SRC_SHIFT (4U)

Definition at line 12528 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_HASH_MISMATCH

#define DCP_CH1STAT_CLR_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_CLR_HASH_MISMATCH_MASK)

Definition at line 12520 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_HASH_MISMATCH_MASK

#define DCP_CH1STAT_CLR_HASH_MISMATCH_MASK (0x2U)

Definition at line 12518 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT

#define DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT (1U)

Definition at line 12519 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_RSVD_COMPLETE

#define DCP_CH1STAT_CLR_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK)

Definition at line 12517 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK

#define DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12515 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT

#define DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12516 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_TAG

#define DCP_CH1STAT_CLR_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_TAG_SHIFT)) & DCP_CH1STAT_CLR_TAG_MASK)

Definition at line 12548 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_TAG_MASK

#define DCP_CH1STAT_CLR_TAG_MASK (0xFF000000U)

Definition at line 12546 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_CLR_TAG_SHIFT

#define DCP_CH1STAT_CLR_TAG_SHIFT (24U)

Definition at line 12547 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_CODE

#define DCP_CH1STAT_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_CODE_SHIFT)) & DCP_CH1STAT_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported when reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12469 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_CODE_MASK

#define DCP_CH1STAT_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12460 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_CODE_SHIFT

#define DCP_CH1STAT_ERROR_CODE_SHIFT (16U)

Definition at line 12461 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_DST

#define DCP_CH1STAT_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_DST_SHIFT)) & DCP_CH1STAT_ERROR_DST_MASK)

Definition at line 12456 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_DST_MASK

#define DCP_CH1STAT_ERROR_DST_MASK (0x20U)

Definition at line 12454 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_DST_SHIFT

#define DCP_CH1STAT_ERROR_DST_SHIFT (5U)

Definition at line 12455 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PACKET

#define DCP_CH1STAT_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_ERROR_PACKET_MASK)

Definition at line 12450 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PACKET_MASK

#define DCP_CH1STAT_ERROR_PACKET_MASK (0x8U)

Definition at line 12448 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PACKET_SHIFT

#define DCP_CH1STAT_ERROR_PACKET_SHIFT (3U)

Definition at line 12449 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PAGEFAULT

#define DCP_CH1STAT_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_ERROR_PAGEFAULT_MASK)

Definition at line 12459 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PAGEFAULT_MASK

#define DCP_CH1STAT_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12457 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT

#define DCP_CH1STAT_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12458 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SETUP

#define DCP_CH1STAT_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_ERROR_SETUP_MASK)

Definition at line 12447 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SETUP_MASK

#define DCP_CH1STAT_ERROR_SETUP_MASK (0x4U)

Definition at line 12445 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SETUP_SHIFT

#define DCP_CH1STAT_ERROR_SETUP_SHIFT (2U)

Definition at line 12446 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SRC

#define DCP_CH1STAT_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_ERROR_SRC_SHIFT)) & DCP_CH1STAT_ERROR_SRC_MASK)

Definition at line 12453 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SRC_MASK

#define DCP_CH1STAT_ERROR_SRC_MASK (0x10U)

Definition at line 12451 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_ERROR_SRC_SHIFT

#define DCP_CH1STAT_ERROR_SRC_SHIFT (4U)

Definition at line 12452 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_HASH_MISMATCH

#define DCP_CH1STAT_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_HASH_MISMATCH_MASK)

Definition at line 12444 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_HASH_MISMATCH_MASK

#define DCP_CH1STAT_HASH_MISMATCH_MASK (0x2U)

Definition at line 12442 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_HASH_MISMATCH_SHIFT

#define DCP_CH1STAT_HASH_MISMATCH_SHIFT (1U)

Definition at line 12443 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_RSVD_COMPLETE

#define DCP_CH1STAT_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_RSVD_COMPLETE_MASK)

Definition at line 12441 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_RSVD_COMPLETE_MASK

#define DCP_CH1STAT_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12439 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_RSVD_COMPLETE_SHIFT

#define DCP_CH1STAT_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12440 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_CODE

#define DCP_CH1STAT_SET_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH1STAT_SET_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported when reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12507 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_CODE_MASK

#define DCP_CH1STAT_SET_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12498 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_CODE_SHIFT

#define DCP_CH1STAT_SET_ERROR_CODE_SHIFT (16U)

Definition at line 12499 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_DST

#define DCP_CH1STAT_SET_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_DST_SHIFT)) & DCP_CH1STAT_SET_ERROR_DST_MASK)

Definition at line 12494 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_DST_MASK

#define DCP_CH1STAT_SET_ERROR_DST_MASK (0x20U)

Definition at line 12492 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_DST_SHIFT

#define DCP_CH1STAT_SET_ERROR_DST_SHIFT (5U)

Definition at line 12493 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PACKET

#define DCP_CH1STAT_SET_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_SET_ERROR_PACKET_MASK)

Definition at line 12488 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PACKET_MASK

#define DCP_CH1STAT_SET_ERROR_PACKET_MASK (0x8U)

Definition at line 12486 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PACKET_SHIFT

#define DCP_CH1STAT_SET_ERROR_PACKET_SHIFT (3U)

Definition at line 12487 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PAGEFAULT

#define DCP_CH1STAT_SET_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK)

Definition at line 12497 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK

#define DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12495 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT

#define DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12496 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SETUP

#define DCP_CH1STAT_SET_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_SET_ERROR_SETUP_MASK)

Definition at line 12485 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SETUP_MASK

#define DCP_CH1STAT_SET_ERROR_SETUP_MASK (0x4U)

Definition at line 12483 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SETUP_SHIFT

#define DCP_CH1STAT_SET_ERROR_SETUP_SHIFT (2U)

Definition at line 12484 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SRC

#define DCP_CH1STAT_SET_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH1STAT_SET_ERROR_SRC_MASK)

Definition at line 12491 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SRC_MASK

#define DCP_CH1STAT_SET_ERROR_SRC_MASK (0x10U)

Definition at line 12489 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_ERROR_SRC_SHIFT

#define DCP_CH1STAT_SET_ERROR_SRC_SHIFT (4U)

Definition at line 12490 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_HASH_MISMATCH

#define DCP_CH1STAT_SET_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_SET_HASH_MISMATCH_MASK)

Definition at line 12482 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_HASH_MISMATCH_MASK

#define DCP_CH1STAT_SET_HASH_MISMATCH_MASK (0x2U)

Definition at line 12480 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT

#define DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT (1U)

Definition at line 12481 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_RSVD_COMPLETE

#define DCP_CH1STAT_SET_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_SET_RSVD_COMPLETE_MASK)

Definition at line 12479 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_RSVD_COMPLETE_MASK

#define DCP_CH1STAT_SET_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12477 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT

#define DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12478 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_TAG

#define DCP_CH1STAT_SET_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_TAG_SHIFT)) & DCP_CH1STAT_SET_TAG_MASK)

Definition at line 12510 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_TAG_MASK

#define DCP_CH1STAT_SET_TAG_MASK (0xFF000000U)

Definition at line 12508 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_SET_TAG_SHIFT

#define DCP_CH1STAT_SET_TAG_SHIFT (24U)

Definition at line 12509 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TAG

#define DCP_CH1STAT_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK)

Definition at line 12472 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TAG_MASK

#define DCP_CH1STAT_TAG_MASK (0xFF000000U)

Definition at line 12470 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TAG_SHIFT

#define DCP_CH1STAT_TAG_SHIFT (24U)

Definition at line 12471 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_CODE

#define DCP_CH1STAT_TOG_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH1STAT_TOG_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported when reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12583 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_CODE_MASK

#define DCP_CH1STAT_TOG_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12574 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_CODE_SHIFT

#define DCP_CH1STAT_TOG_ERROR_CODE_SHIFT (16U)

Definition at line 12575 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_DST

#define DCP_CH1STAT_TOG_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH1STAT_TOG_ERROR_DST_MASK)

Definition at line 12570 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_DST_MASK

#define DCP_CH1STAT_TOG_ERROR_DST_MASK (0x20U)

Definition at line 12568 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_DST_SHIFT

#define DCP_CH1STAT_TOG_ERROR_DST_SHIFT (5U)

Definition at line 12569 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PACKET

#define DCP_CH1STAT_TOG_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PACKET_MASK)

Definition at line 12564 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PACKET_MASK

#define DCP_CH1STAT_TOG_ERROR_PACKET_MASK (0x8U)

Definition at line 12562 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT

#define DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT (3U)

Definition at line 12563 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PAGEFAULT

#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK)

Definition at line 12573 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK

#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12571 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT

#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12572 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SETUP

#define DCP_CH1STAT_TOG_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SETUP_MASK)

Definition at line 12561 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SETUP_MASK

#define DCP_CH1STAT_TOG_ERROR_SETUP_MASK (0x4U)

Definition at line 12559 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT

#define DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT (2U)

Definition at line 12560 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SRC

#define DCP_CH1STAT_TOG_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SRC_MASK)

Definition at line 12567 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SRC_MASK

#define DCP_CH1STAT_TOG_ERROR_SRC_MASK (0x10U)

Definition at line 12565 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_ERROR_SRC_SHIFT

#define DCP_CH1STAT_TOG_ERROR_SRC_SHIFT (4U)

Definition at line 12566 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_HASH_MISMATCH

#define DCP_CH1STAT_TOG_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_TOG_HASH_MISMATCH_MASK)

Definition at line 12558 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_HASH_MISMATCH_MASK

#define DCP_CH1STAT_TOG_HASH_MISMATCH_MASK (0x2U)

Definition at line 12556 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT

#define DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT (1U)

Definition at line 12557 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_RSVD_COMPLETE

#define DCP_CH1STAT_TOG_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK)

Definition at line 12555 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK

#define DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12553 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT

#define DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12554 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_TAG

#define DCP_CH1STAT_TOG_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_TAG_SHIFT)) & DCP_CH1STAT_TOG_TAG_MASK)

Definition at line 12586 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_TAG_MASK

#define DCP_CH1STAT_TOG_TAG_MASK (0xFF000000U)

Definition at line 12584 of file MIMXRT1062.h.

## ◆ DCP_CH1STAT_TOG_TAG_SHIFT

#define DCP_CH1STAT_TOG_TAG_SHIFT (24U)

Definition at line 12585 of file MIMXRT1062.h.

## ◆ DCP_CH2CMDPTR_ADDR

#define DCP_CH2CMDPTR_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2CMDPTR_ADDR_SHIFT)) & DCP_CH2CMDPTR_ADDR_MASK)

Definition at line 12633 of file MIMXRT1062.h.

## ◆ DCP_CH2CMDPTR_ADDR_MASK

#define DCP_CH2CMDPTR_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12631 of file MIMXRT1062.h.

## ◆ DCP_CH2CMDPTR_ADDR_SHIFT

#define DCP_CH2CMDPTR_ADDR_SHIFT (0U)

Definition at line 12632 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RECOVERY_TIMER

#define DCP_CH2OPTS_CLR_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK)

Definition at line 12822 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK

#define DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12820 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT

#define DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12821 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RSVD

#define DCP_CH2OPTS_CLR_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RSVD_SHIFT)) & DCP_CH2OPTS_CLR_RSVD_MASK)

Definition at line 12825 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RSVD_MASK

#define DCP_CH2OPTS_CLR_RSVD_MASK (0xFFFF0000U)

Definition at line 12823 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_CLR_RSVD_SHIFT

#define DCP_CH2OPTS_CLR_RSVD_SHIFT (16U)

Definition at line 12824 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RECOVERY_TIMER

#define DCP_CH2OPTS_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_RECOVERY_TIMER_MASK)

Definition at line 12802 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RECOVERY_TIMER_MASK

#define DCP_CH2OPTS_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12800 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RECOVERY_TIMER_SHIFT

#define DCP_CH2OPTS_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12801 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RSVD

#define DCP_CH2OPTS_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK)

Definition at line 12805 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RSVD_MASK

#define DCP_CH2OPTS_RSVD_MASK (0xFFFF0000U)

Definition at line 12803 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_RSVD_SHIFT

#define DCP_CH2OPTS_RSVD_SHIFT (16U)

Definition at line 12804 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RECOVERY_TIMER

#define DCP_CH2OPTS_SET_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK)

Definition at line 12812 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK

#define DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12810 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT

#define DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12811 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RSVD

#define DCP_CH2OPTS_SET_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RSVD_SHIFT)) & DCP_CH2OPTS_SET_RSVD_MASK)

Definition at line 12815 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RSVD_MASK

#define DCP_CH2OPTS_SET_RSVD_MASK (0xFFFF0000U)

Definition at line 12813 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_SET_RSVD_SHIFT

#define DCP_CH2OPTS_SET_RSVD_SHIFT (16U)

Definition at line 12814 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RECOVERY_TIMER

#define DCP_CH2OPTS_TOG_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK)

Definition at line 12832 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK

#define DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 12830 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT

#define DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)

Definition at line 12831 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RSVD

#define DCP_CH2OPTS_TOG_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RSVD_SHIFT)) & DCP_CH2OPTS_TOG_RSVD_MASK)

Definition at line 12835 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RSVD_MASK

#define DCP_CH2OPTS_TOG_RSVD_MASK (0xFFFF0000U)

Definition at line 12833 of file MIMXRT1062.h.

## ◆ DCP_CH2OPTS_TOG_RSVD_SHIFT

#define DCP_CH2OPTS_TOG_RSVD_SHIFT (16U)

Definition at line 12834 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_INCREMENT

#define DCP_CH2SEMA_INCREMENT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_INCREMENT_SHIFT)) & DCP_CH2SEMA_INCREMENT_MASK)

Definition at line 12640 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_INCREMENT_MASK

#define DCP_CH2SEMA_INCREMENT_MASK (0xFFU)

Definition at line 12638 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_INCREMENT_SHIFT

#define DCP_CH2SEMA_INCREMENT_SHIFT (0U)

Definition at line 12639 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_VALUE

#define DCP_CH2SEMA_VALUE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2SEMA_VALUE_SHIFT)) & DCP_CH2SEMA_VALUE_MASK)

Definition at line 12643 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_VALUE_MASK

#define DCP_CH2SEMA_VALUE_MASK (0xFF0000U)

Definition at line 12641 of file MIMXRT1062.h.

## ◆ DCP_CH2SEMA_VALUE_SHIFT

#define DCP_CH2SEMA_VALUE_SHIFT (16U)

Definition at line 12642 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_CODE

#define DCP_CH2STAT_CLR_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH2STAT_CLR_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash).

Definition at line 12754 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_CODE_MASK

#define DCP_CH2STAT_CLR_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12745 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_CODE_SHIFT

#define DCP_CH2STAT_CLR_ERROR_CODE_SHIFT (16U)

Definition at line 12746 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_DST

#define DCP_CH2STAT_CLR_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH2STAT_CLR_ERROR_DST_MASK)

Definition at line 12741 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_DST_MASK

#define DCP_CH2STAT_CLR_ERROR_DST_MASK (0x20U)

Definition at line 12739 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_DST_SHIFT

#define DCP_CH2STAT_CLR_ERROR_DST_SHIFT (5U)

Definition at line 12740 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PACKET

#define DCP_CH2STAT_CLR_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PACKET_MASK)

Definition at line 12735 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PACKET_MASK

#define DCP_CH2STAT_CLR_ERROR_PACKET_MASK (0x8U)

Definition at line 12733 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT

#define DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT (3U)

Definition at line 12734 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PAGEFAULT

#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK)

Definition at line 12744 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK

#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12742 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT

#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12743 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SETUP

#define DCP_CH2STAT_CLR_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SETUP_MASK)

Definition at line 12732 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SETUP_MASK

#define DCP_CH2STAT_CLR_ERROR_SETUP_MASK (0x4U)

Definition at line 12730 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT

#define DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT (2U)

Definition at line 12731 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SRC

#define DCP_CH2STAT_CLR_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SRC_MASK)

Definition at line 12738 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SRC_MASK

#define DCP_CH2STAT_CLR_ERROR_SRC_MASK (0x10U)

Definition at line 12736 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_ERROR_SRC_SHIFT

#define DCP_CH2STAT_CLR_ERROR_SRC_SHIFT (4U)

Definition at line 12737 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_HASH_MISMATCH

#define DCP_CH2STAT_CLR_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_CLR_HASH_MISMATCH_MASK)

Definition at line 12729 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_HASH_MISMATCH_MASK

#define DCP_CH2STAT_CLR_HASH_MISMATCH_MASK (0x2U)

Definition at line 12727 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT

#define DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT (1U)

Definition at line 12728 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_RSVD_COMPLETE

#define DCP_CH2STAT_CLR_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK)

Definition at line 12726 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK

#define DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12724 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT

#define DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12725 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_TAG

#define DCP_CH2STAT_CLR_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_TAG_SHIFT)) & DCP_CH2STAT_CLR_TAG_MASK)

Definition at line 12757 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_TAG_MASK

#define DCP_CH2STAT_CLR_TAG_MASK (0xFF000000U)

Definition at line 12755 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_CLR_TAG_SHIFT

#define DCP_CH2STAT_CLR_TAG_SHIFT (24U)

Definition at line 12756 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_CODE

#define DCP_CH2STAT_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_CODE_SHIFT)) & DCP_CH2STAT_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash).

Definition at line 12678 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_CODE_MASK

#define DCP_CH2STAT_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12669 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_CODE_SHIFT

#define DCP_CH2STAT_ERROR_CODE_SHIFT (16U)

Definition at line 12670 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_DST

#define DCP_CH2STAT_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_DST_SHIFT)) & DCP_CH2STAT_ERROR_DST_MASK)

Definition at line 12665 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_DST_MASK

#define DCP_CH2STAT_ERROR_DST_MASK (0x20U)

Definition at line 12663 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_DST_SHIFT

#define DCP_CH2STAT_ERROR_DST_SHIFT (5U)

Definition at line 12664 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PACKET

#define DCP_CH2STAT_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_ERROR_PACKET_MASK)

Definition at line 12659 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PACKET_MASK

#define DCP_CH2STAT_ERROR_PACKET_MASK (0x8U)

Definition at line 12657 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PACKET_SHIFT

#define DCP_CH2STAT_ERROR_PACKET_SHIFT (3U)

Definition at line 12658 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PAGEFAULT

#define DCP_CH2STAT_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_ERROR_PAGEFAULT_MASK)

Definition at line 12668 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PAGEFAULT_MASK

#define DCP_CH2STAT_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12666 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT

#define DCP_CH2STAT_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12667 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SETUP

#define DCP_CH2STAT_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_ERROR_SETUP_MASK)

Definition at line 12656 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SETUP_MASK

#define DCP_CH2STAT_ERROR_SETUP_MASK (0x4U)

Definition at line 12654 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SETUP_SHIFT

#define DCP_CH2STAT_ERROR_SETUP_SHIFT (2U)

Definition at line 12655 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SRC

#define DCP_CH2STAT_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_ERROR_SRC_SHIFT)) & DCP_CH2STAT_ERROR_SRC_MASK)

Definition at line 12662 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SRC_MASK

#define DCP_CH2STAT_ERROR_SRC_MASK (0x10U)

Definition at line 12660 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_ERROR_SRC_SHIFT

#define DCP_CH2STAT_ERROR_SRC_SHIFT (4U)

Definition at line 12661 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_HASH_MISMATCH

#define DCP_CH2STAT_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_HASH_MISMATCH_MASK)

Definition at line 12653 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_HASH_MISMATCH_MASK

#define DCP_CH2STAT_HASH_MISMATCH_MASK (0x2U)

Definition at line 12651 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_HASH_MISMATCH_SHIFT

#define DCP_CH2STAT_HASH_MISMATCH_SHIFT (1U)

Definition at line 12652 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_RSVD_COMPLETE

#define DCP_CH2STAT_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_RSVD_COMPLETE_MASK)

Definition at line 12650 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_RSVD_COMPLETE_MASK

#define DCP_CH2STAT_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12648 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_RSVD_COMPLETE_SHIFT

#define DCP_CH2STAT_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12649 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_CODE

#define DCP_CH2STAT_SET_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH2STAT_SET_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash).

Definition at line 12716 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_CODE_MASK

#define DCP_CH2STAT_SET_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12707 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_CODE_SHIFT

#define DCP_CH2STAT_SET_ERROR_CODE_SHIFT (16U)

Definition at line 12708 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_DST

#define DCP_CH2STAT_SET_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_DST_SHIFT)) & DCP_CH2STAT_SET_ERROR_DST_MASK)

Definition at line 12703 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_DST_MASK

#define DCP_CH2STAT_SET_ERROR_DST_MASK (0x20U)

Definition at line 12701 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_DST_SHIFT

#define DCP_CH2STAT_SET_ERROR_DST_SHIFT (5U)

Definition at line 12702 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PACKET

#define DCP_CH2STAT_SET_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_SET_ERROR_PACKET_MASK)

Definition at line 12697 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PACKET_MASK

#define DCP_CH2STAT_SET_ERROR_PACKET_MASK (0x8U)

Definition at line 12695 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PACKET_SHIFT

#define DCP_CH2STAT_SET_ERROR_PACKET_SHIFT (3U)

Definition at line 12696 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PAGEFAULT

#define DCP_CH2STAT_SET_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK)

Definition at line 12706 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK

#define DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12704 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT

#define DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12705 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SETUP

#define DCP_CH2STAT_SET_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_SET_ERROR_SETUP_MASK)

Definition at line 12694 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SETUP_MASK

#define DCP_CH2STAT_SET_ERROR_SETUP_MASK (0x4U)

Definition at line 12692 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SETUP_SHIFT

#define DCP_CH2STAT_SET_ERROR_SETUP_SHIFT (2U)

Definition at line 12693 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SRC

#define DCP_CH2STAT_SET_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH2STAT_SET_ERROR_SRC_MASK)

Definition at line 12700 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SRC_MASK

#define DCP_CH2STAT_SET_ERROR_SRC_MASK (0x10U)

Definition at line 12698 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_ERROR_SRC_SHIFT

#define DCP_CH2STAT_SET_ERROR_SRC_SHIFT (4U)

Definition at line 12699 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_HASH_MISMATCH

#define DCP_CH2STAT_SET_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_SET_HASH_MISMATCH_MASK)

Definition at line 12691 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_HASH_MISMATCH_MASK

#define DCP_CH2STAT_SET_HASH_MISMATCH_MASK (0x2U)

Definition at line 12689 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT

#define DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT (1U)

Definition at line 12690 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_RSVD_COMPLETE

#define DCP_CH2STAT_SET_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_SET_RSVD_COMPLETE_MASK)

Definition at line 12688 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_RSVD_COMPLETE_MASK

#define DCP_CH2STAT_SET_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12686 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT

#define DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12687 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_TAG

#define DCP_CH2STAT_SET_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_TAG_SHIFT)) & DCP_CH2STAT_SET_TAG_MASK)

Definition at line 12719 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_TAG_MASK

#define DCP_CH2STAT_SET_TAG_MASK (0xFF000000U)

Definition at line 12717 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_SET_TAG_SHIFT

#define DCP_CH2STAT_SET_TAG_SHIFT (24U)

Definition at line 12718 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TAG

#define DCP_CH2STAT_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK)

Definition at line 12681 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TAG_MASK

#define DCP_CH2STAT_TAG_MASK (0xFF000000U)

Definition at line 12679 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TAG_SHIFT

#define DCP_CH2STAT_TAG_SHIFT (24U)

Definition at line 12680 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_CODE

#define DCP_CH2STAT_TOG_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH2STAT_TOG_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash).

Definition at line 12792 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_CODE_MASK

#define DCP_CH2STAT_TOG_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12783 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_CODE_SHIFT

#define DCP_CH2STAT_TOG_ERROR_CODE_SHIFT (16U)

Definition at line 12784 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_DST

#define DCP_CH2STAT_TOG_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH2STAT_TOG_ERROR_DST_MASK)

Definition at line 12779 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_DST_MASK

#define DCP_CH2STAT_TOG_ERROR_DST_MASK (0x20U)

Definition at line 12777 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_DST_SHIFT

#define DCP_CH2STAT_TOG_ERROR_DST_SHIFT (5U)

Definition at line 12778 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PACKET

#define DCP_CH2STAT_TOG_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PACKET_MASK)

Definition at line 12773 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PACKET_MASK

#define DCP_CH2STAT_TOG_ERROR_PACKET_MASK (0x8U)

Definition at line 12771 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT

#define DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT (3U)

Definition at line 12772 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PAGEFAULT

#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK)

Definition at line 12782 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK

#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12780 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT

#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12781 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SETUP

#define DCP_CH2STAT_TOG_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SETUP_MASK)

Definition at line 12770 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SETUP_MASK

#define DCP_CH2STAT_TOG_ERROR_SETUP_MASK (0x4U)

Definition at line 12768 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT

#define DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT (2U)

Definition at line 12769 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SRC

#define DCP_CH2STAT_TOG_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SRC_MASK)

Definition at line 12776 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SRC_MASK

#define DCP_CH2STAT_TOG_ERROR_SRC_MASK (0x10U)

Definition at line 12774 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_ERROR_SRC_SHIFT

#define DCP_CH2STAT_TOG_ERROR_SRC_SHIFT (4U)

Definition at line 12775 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_HASH_MISMATCH

#define DCP_CH2STAT_TOG_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_TOG_HASH_MISMATCH_MASK)

Definition at line 12767 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_HASH_MISMATCH_MASK

#define DCP_CH2STAT_TOG_HASH_MISMATCH_MASK (0x2U)

Definition at line 12765 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT

#define DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT (1U)

Definition at line 12766 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_RSVD_COMPLETE

#define DCP_CH2STAT_TOG_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK)

Definition at line 12764 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK

#define DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12762 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT

#define DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12763 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_TAG

#define DCP_CH2STAT_TOG_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_TAG_SHIFT)) & DCP_CH2STAT_TOG_TAG_MASK)

Definition at line 12795 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_TAG_MASK

#define DCP_CH2STAT_TOG_TAG_MASK (0xFF000000U)

Definition at line 12793 of file MIMXRT1062.h.

## ◆ DCP_CH2STAT_TOG_TAG_SHIFT

#define DCP_CH2STAT_TOG_TAG_SHIFT (24U)

Definition at line 12794 of file MIMXRT1062.h.

## ◆ DCP_CH3CMDPTR_ADDR

#define DCP_CH3CMDPTR_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3CMDPTR_ADDR_SHIFT)) & DCP_CH3CMDPTR_ADDR_MASK)

Definition at line 12842 of file MIMXRT1062.h.

## ◆ DCP_CH3CMDPTR_ADDR_MASK

#define DCP_CH3CMDPTR_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12840 of file MIMXRT1062.h.

## ◆ DCP_CH3CMDPTR_ADDR_SHIFT

#define DCP_CH3CMDPTR_ADDR_SHIFT (0U)

Definition at line 12841 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RECOVERY_TIMER

#define DCP_CH3OPTS_CLR_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK)

Definition at line 13031 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK

#define DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 13029 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT

#define DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT (0U)

Definition at line 13030 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RSVD

#define DCP_CH3OPTS_CLR_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RSVD_SHIFT)) & DCP_CH3OPTS_CLR_RSVD_MASK)

Definition at line 13034 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RSVD_MASK

#define DCP_CH3OPTS_CLR_RSVD_MASK (0xFFFF0000U)

Definition at line 13032 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_CLR_RSVD_SHIFT

#define DCP_CH3OPTS_CLR_RSVD_SHIFT (16U)

Definition at line 13033 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RECOVERY_TIMER

#define DCP_CH3OPTS_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_RECOVERY_TIMER_MASK)

Definition at line 13011 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RECOVERY_TIMER_MASK

#define DCP_CH3OPTS_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 13009 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RECOVERY_TIMER_SHIFT

#define DCP_CH3OPTS_RECOVERY_TIMER_SHIFT (0U)

Definition at line 13010 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RSVD

#define DCP_CH3OPTS_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK)

Definition at line 13014 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RSVD_MASK

#define DCP_CH3OPTS_RSVD_MASK (0xFFFF0000U)

Definition at line 13012 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_RSVD_SHIFT

#define DCP_CH3OPTS_RSVD_SHIFT (16U)

Definition at line 13013 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RECOVERY_TIMER

#define DCP_CH3OPTS_SET_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK)

Definition at line 13021 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK

#define DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 13019 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT

#define DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT (0U)

Definition at line 13020 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RSVD

#define DCP_CH3OPTS_SET_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RSVD_SHIFT)) & DCP_CH3OPTS_SET_RSVD_MASK)

Definition at line 13024 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RSVD_MASK

#define DCP_CH3OPTS_SET_RSVD_MASK (0xFFFF0000U)

Definition at line 13022 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_SET_RSVD_SHIFT

#define DCP_CH3OPTS_SET_RSVD_SHIFT (16U)

Definition at line 13023 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RECOVERY_TIMER

#define DCP_CH3OPTS_TOG_RECOVERY_TIMER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK)

Definition at line 13041 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK

#define DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU)

Definition at line 13039 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT

#define DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT (0U)

Definition at line 13040 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RSVD

#define DCP_CH3OPTS_TOG_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RSVD_SHIFT)) & DCP_CH3OPTS_TOG_RSVD_MASK)

Definition at line 13044 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RSVD_MASK

#define DCP_CH3OPTS_TOG_RSVD_MASK (0xFFFF0000U)

Definition at line 13042 of file MIMXRT1062.h.

## ◆ DCP_CH3OPTS_TOG_RSVD_SHIFT

#define DCP_CH3OPTS_TOG_RSVD_SHIFT (16U)

Definition at line 13043 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_INCREMENT

#define DCP_CH3SEMA_INCREMENT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_INCREMENT_SHIFT)) & DCP_CH3SEMA_INCREMENT_MASK)

Definition at line 12849 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_INCREMENT_MASK

#define DCP_CH3SEMA_INCREMENT_MASK (0xFFU)

Definition at line 12847 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_INCREMENT_SHIFT

#define DCP_CH3SEMA_INCREMENT_SHIFT (0U)

Definition at line 12848 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_VALUE

#define DCP_CH3SEMA_VALUE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3SEMA_VALUE_SHIFT)) & DCP_CH3SEMA_VALUE_MASK)

Definition at line 12852 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_VALUE_MASK

#define DCP_CH3SEMA_VALUE_MASK (0xFF0000U)

Definition at line 12850 of file MIMXRT1062.h.

## ◆ DCP_CH3SEMA_VALUE_SHIFT

#define DCP_CH3SEMA_VALUE_SHIFT (16U)

Definition at line 12851 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_CODE

#define DCP_CH3STAT_CLR_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH3STAT_CLR_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12963 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_CODE_MASK

#define DCP_CH3STAT_CLR_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12954 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_CODE_SHIFT

#define DCP_CH3STAT_CLR_ERROR_CODE_SHIFT (16U)

Definition at line 12955 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_DST

#define DCP_CH3STAT_CLR_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH3STAT_CLR_ERROR_DST_MASK)

Definition at line 12950 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_DST_MASK

#define DCP_CH3STAT_CLR_ERROR_DST_MASK (0x20U)

Definition at line 12948 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_DST_SHIFT

#define DCP_CH3STAT_CLR_ERROR_DST_SHIFT (5U)

Definition at line 12949 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PACKET

#define DCP_CH3STAT_CLR_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PACKET_MASK)

Definition at line 12944 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PACKET_MASK

#define DCP_CH3STAT_CLR_ERROR_PACKET_MASK (0x8U)

Definition at line 12942 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT

#define DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT (3U)

Definition at line 12943 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PAGEFAULT

#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK)

Definition at line 12953 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK

#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12951 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT

#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12952 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SETUP

#define DCP_CH3STAT_CLR_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SETUP_MASK)

Definition at line 12941 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SETUP_MASK

#define DCP_CH3STAT_CLR_ERROR_SETUP_MASK (0x4U)

Definition at line 12939 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT

#define DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT (2U)

Definition at line 12940 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SRC

#define DCP_CH3STAT_CLR_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SRC_MASK)

Definition at line 12947 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SRC_MASK

#define DCP_CH3STAT_CLR_ERROR_SRC_MASK (0x10U)

Definition at line 12945 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_ERROR_SRC_SHIFT

#define DCP_CH3STAT_CLR_ERROR_SRC_SHIFT (4U)

Definition at line 12946 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_HASH_MISMATCH

#define DCP_CH3STAT_CLR_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_CLR_HASH_MISMATCH_MASK)

Definition at line 12938 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_HASH_MISMATCH_MASK

#define DCP_CH3STAT_CLR_HASH_MISMATCH_MASK (0x2U)

Definition at line 12936 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT

#define DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT (1U)

Definition at line 12937 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_RSVD_COMPLETE

#define DCP_CH3STAT_CLR_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK)

Definition at line 12935 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK

#define DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12933 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT

#define DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12934 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_TAG

#define DCP_CH3STAT_CLR_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_TAG_SHIFT)) & DCP_CH3STAT_CLR_TAG_MASK)

Definition at line 12966 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_TAG_MASK

#define DCP_CH3STAT_CLR_TAG_MASK (0xFF000000U)

Definition at line 12964 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_CLR_TAG_SHIFT

#define DCP_CH3STAT_CLR_TAG_SHIFT (24U)

Definition at line 12965 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_CODE

#define DCP_CH3STAT_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_CODE_SHIFT)) & DCP_CH3STAT_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12887 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_CODE_MASK

#define DCP_CH3STAT_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12878 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_CODE_SHIFT

#define DCP_CH3STAT_ERROR_CODE_SHIFT (16U)

Definition at line 12879 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_DST

#define DCP_CH3STAT_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_DST_SHIFT)) & DCP_CH3STAT_ERROR_DST_MASK)

Definition at line 12874 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_DST_MASK

#define DCP_CH3STAT_ERROR_DST_MASK (0x20U)

Definition at line 12872 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_DST_SHIFT

#define DCP_CH3STAT_ERROR_DST_SHIFT (5U)

Definition at line 12873 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PACKET

#define DCP_CH3STAT_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_ERROR_PACKET_MASK)

Definition at line 12868 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PACKET_MASK

#define DCP_CH3STAT_ERROR_PACKET_MASK (0x8U)

Definition at line 12866 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PACKET_SHIFT

#define DCP_CH3STAT_ERROR_PACKET_SHIFT (3U)

Definition at line 12867 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PAGEFAULT

#define DCP_CH3STAT_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_ERROR_PAGEFAULT_MASK)

Definition at line 12877 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PAGEFAULT_MASK

#define DCP_CH3STAT_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12875 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT

#define DCP_CH3STAT_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12876 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SETUP

#define DCP_CH3STAT_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_ERROR_SETUP_MASK)

Definition at line 12865 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SETUP_MASK

#define DCP_CH3STAT_ERROR_SETUP_MASK (0x4U)

Definition at line 12863 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SETUP_SHIFT

#define DCP_CH3STAT_ERROR_SETUP_SHIFT (2U)

Definition at line 12864 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SRC

#define DCP_CH3STAT_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_ERROR_SRC_SHIFT)) & DCP_CH3STAT_ERROR_SRC_MASK)

Definition at line 12871 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SRC_MASK

#define DCP_CH3STAT_ERROR_SRC_MASK (0x10U)

Definition at line 12869 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_ERROR_SRC_SHIFT

#define DCP_CH3STAT_ERROR_SRC_SHIFT (4U)

Definition at line 12870 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_HASH_MISMATCH

#define DCP_CH3STAT_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_HASH_MISMATCH_MASK)

Definition at line 12862 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_HASH_MISMATCH_MASK

#define DCP_CH3STAT_HASH_MISMATCH_MASK (0x2U)

Definition at line 12860 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_HASH_MISMATCH_SHIFT

#define DCP_CH3STAT_HASH_MISMATCH_SHIFT (1U)

Definition at line 12861 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_RSVD_COMPLETE

#define DCP_CH3STAT_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_RSVD_COMPLETE_MASK)

Definition at line 12859 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_RSVD_COMPLETE_MASK

#define DCP_CH3STAT_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12857 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_RSVD_COMPLETE_SHIFT

#define DCP_CH3STAT_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12858 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_CODE

#define DCP_CH3STAT_SET_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH3STAT_SET_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 12925 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_CODE_MASK

#define DCP_CH3STAT_SET_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12916 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_CODE_SHIFT

#define DCP_CH3STAT_SET_ERROR_CODE_SHIFT (16U)

Definition at line 12917 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_DST

#define DCP_CH3STAT_SET_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_DST_SHIFT)) & DCP_CH3STAT_SET_ERROR_DST_MASK)

Definition at line 12912 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_DST_MASK

#define DCP_CH3STAT_SET_ERROR_DST_MASK (0x20U)

Definition at line 12910 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_DST_SHIFT

#define DCP_CH3STAT_SET_ERROR_DST_SHIFT (5U)

Definition at line 12911 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PACKET

#define DCP_CH3STAT_SET_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_SET_ERROR_PACKET_MASK)

Definition at line 12906 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PACKET_MASK

#define DCP_CH3STAT_SET_ERROR_PACKET_MASK (0x8U)

Definition at line 12904 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PACKET_SHIFT

#define DCP_CH3STAT_SET_ERROR_PACKET_SHIFT (3U)

Definition at line 12905 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PAGEFAULT

#define DCP_CH3STAT_SET_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK)

Definition at line 12915 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK

#define DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12913 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT

#define DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12914 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SETUP

#define DCP_CH3STAT_SET_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_SET_ERROR_SETUP_MASK)

Definition at line 12903 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SETUP_MASK

#define DCP_CH3STAT_SET_ERROR_SETUP_MASK (0x4U)

Definition at line 12901 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SETUP_SHIFT

#define DCP_CH3STAT_SET_ERROR_SETUP_SHIFT (2U)

Definition at line 12902 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SRC

#define DCP_CH3STAT_SET_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH3STAT_SET_ERROR_SRC_MASK)

Definition at line 12909 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SRC_MASK

#define DCP_CH3STAT_SET_ERROR_SRC_MASK (0x10U)

Definition at line 12907 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_ERROR_SRC_SHIFT

#define DCP_CH3STAT_SET_ERROR_SRC_SHIFT (4U)

Definition at line 12908 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_HASH_MISMATCH

#define DCP_CH3STAT_SET_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_SET_HASH_MISMATCH_MASK)

Definition at line 12900 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_HASH_MISMATCH_MASK

#define DCP_CH3STAT_SET_HASH_MISMATCH_MASK (0x2U)

Definition at line 12898 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT

#define DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT (1U)

Definition at line 12899 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_RSVD_COMPLETE

#define DCP_CH3STAT_SET_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_SET_RSVD_COMPLETE_MASK)

Definition at line 12897 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_RSVD_COMPLETE_MASK

#define DCP_CH3STAT_SET_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12895 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT

#define DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12896 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_TAG

#define DCP_CH3STAT_SET_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_TAG_SHIFT)) & DCP_CH3STAT_SET_TAG_MASK)

Definition at line 12928 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_TAG_MASK

#define DCP_CH3STAT_SET_TAG_MASK (0xFF000000U)

Definition at line 12926 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_SET_TAG_SHIFT

#define DCP_CH3STAT_SET_TAG_SHIFT (24U)

Definition at line 12927 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TAG

#define DCP_CH3STAT_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK)

Definition at line 12890 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TAG_MASK

#define DCP_CH3STAT_TAG_MASK (0xFF000000U)

Definition at line 12888 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TAG_SHIFT

#define DCP_CH3STAT_TAG_SHIFT (24U)

Definition at line 12889 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_CODE

#define DCP_CH3STAT_TOG_ERROR_CODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH3STAT_TOG_ERROR_CODE_MASK)

ERROR_CODE 0b00000001..Error is signalled because the next pointer is 0x00000000. 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. 0b00000100..Error is signalled because an error was reported while reading/writing the payload. 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash).

Definition at line 13001 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_CODE_MASK

#define DCP_CH3STAT_TOG_ERROR_CODE_MASK (0xFF0000U)

Definition at line 12992 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_CODE_SHIFT

#define DCP_CH3STAT_TOG_ERROR_CODE_SHIFT (16U)

Definition at line 12993 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_DST

#define DCP_CH3STAT_TOG_ERROR_DST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH3STAT_TOG_ERROR_DST_MASK)

Definition at line 12988 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_DST_MASK

#define DCP_CH3STAT_TOG_ERROR_DST_MASK (0x20U)

Definition at line 12986 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_DST_SHIFT

#define DCP_CH3STAT_TOG_ERROR_DST_SHIFT (5U)

Definition at line 12987 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PACKET

#define DCP_CH3STAT_TOG_ERROR_PACKET | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PACKET_MASK)

Definition at line 12982 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PACKET_MASK

#define DCP_CH3STAT_TOG_ERROR_PACKET_MASK (0x8U)

Definition at line 12980 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT

#define DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT (3U)

Definition at line 12981 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PAGEFAULT

#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK)

Definition at line 12991 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK

#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U)

Definition at line 12989 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT

#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U)

Definition at line 12990 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SETUP

#define DCP_CH3STAT_TOG_ERROR_SETUP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SETUP_MASK)

Definition at line 12979 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SETUP_MASK

#define DCP_CH3STAT_TOG_ERROR_SETUP_MASK (0x4U)

Definition at line 12977 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT

#define DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT (2U)

Definition at line 12978 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SRC

#define DCP_CH3STAT_TOG_ERROR_SRC | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SRC_MASK)

Definition at line 12985 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SRC_MASK

#define DCP_CH3STAT_TOG_ERROR_SRC_MASK (0x10U)

Definition at line 12983 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_ERROR_SRC_SHIFT

#define DCP_CH3STAT_TOG_ERROR_SRC_SHIFT (4U)

Definition at line 12984 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_HASH_MISMATCH

#define DCP_CH3STAT_TOG_HASH_MISMATCH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_TOG_HASH_MISMATCH_MASK)

Definition at line 12976 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_HASH_MISMATCH_MASK

#define DCP_CH3STAT_TOG_HASH_MISMATCH_MASK (0x2U)

Definition at line 12974 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT

#define DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT (1U)

Definition at line 12975 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_RSVD_COMPLETE

#define DCP_CH3STAT_TOG_RSVD_COMPLETE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK)

Definition at line 12973 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK

#define DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK (0x1U)

Definition at line 12971 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT

#define DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT (0U)

Definition at line 12972 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_TAG

#define DCP_CH3STAT_TOG_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_TAG_SHIFT)) & DCP_CH3STAT_TOG_TAG_MASK)

Definition at line 13004 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_TAG_MASK

#define DCP_CH3STAT_TOG_TAG_MASK (0xFF000000U)

Definition at line 13002 of file MIMXRT1062.h.

## ◆ DCP_CH3STAT_TOG_TAG_SHIFT

#define DCP_CH3STAT_TOG_TAG_SHIFT (24U)

Definition at line 13003 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CH0_IRQ_MERGED

#define DCP_CHANNELCTRL_CH0_IRQ_MERGED | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK)

Definition at line 11887 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK

#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_MASK (0x10000U)

Definition at line 11885 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT

#define DCP_CHANNELCTRL_CH0_IRQ_MERGED_SHIFT (16U)

Definition at line 11886 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED

#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK)

Definition at line 11943 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK

#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK (0x10000U)

Definition at line 11941 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT

#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT (16U)

Definition at line 11942 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL

#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK)

ENABLE_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11931 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK

#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK (0xFFU)

Definition at line 11923 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT (0U)

Definition at line 11924 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL

#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK)

HIGH_PRIORITY_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11940 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK

#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)

Definition at line 11932 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT (8U)

Definition at line 11933 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_RSVD

#define DCP_CHANNELCTRL_CLR_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_RSVD_SHIFT)) & DCP_CHANNELCTRL_CLR_RSVD_MASK)

Definition at line 11946 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_RSVD_MASK

#define DCP_CHANNELCTRL_CLR_RSVD_MASK (0xFFFE0000U)

Definition at line 11944 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_CLR_RSVD_SHIFT

#define DCP_CHANNELCTRL_CLR_RSVD_SHIFT (17U)

Definition at line 11945 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_ENABLE_CHANNEL

#define DCP_CHANNELCTRL_ENABLE_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK)

ENABLE_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11875 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK

#define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK (0xFFU)

Definition at line 11867 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_ENABLE_CHANNEL_SHIFT (0U)

Definition at line 11868 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL

#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK)

HIGH_PRIORITY_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11884 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK

#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)

Definition at line 11876 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_HIGH_PRIORITY_CHANNEL_SHIFT (8U)

Definition at line 11877 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_RSVD

#define DCP_CHANNELCTRL_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK)

Definition at line 11890 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_RSVD_MASK

#define DCP_CHANNELCTRL_RSVD_MASK (0xFFFE0000U)

Definition at line 11888 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_RSVD_SHIFT

#define DCP_CHANNELCTRL_RSVD_SHIFT (17U)

Definition at line 11889 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED

#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK)

Definition at line 11915 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK

#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK (0x10000U)

Definition at line 11913 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT

#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT (16U)

Definition at line 11914 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_ENABLE_CHANNEL

#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK)

ENABLE_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11903 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK

#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK (0xFFU)

Definition at line 11895 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT (0U)

Definition at line 11896 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL

#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK)

HIGH_PRIORITY_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11912 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK

#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)

Definition at line 11904 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT (8U)

Definition at line 11905 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_RSVD

#define DCP_CHANNELCTRL_SET_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_RSVD_SHIFT)) & DCP_CHANNELCTRL_SET_RSVD_MASK)

Definition at line 11918 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_RSVD_MASK

#define DCP_CHANNELCTRL_SET_RSVD_MASK (0xFFFE0000U)

Definition at line 11916 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_SET_RSVD_SHIFT

#define DCP_CHANNELCTRL_SET_RSVD_SHIFT (17U)

Definition at line 11917 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED

#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK)

Definition at line 11971 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK

#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK (0x10000U)

Definition at line 11969 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT

#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT (16U)

Definition at line 11970 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL

#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK)

ENABLE_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11959 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK

#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK (0xFFU)

Definition at line 11951 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT (0U)

Definition at line 11952 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL

#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK)

HIGH_PRIORITY_CHANNEL 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11968 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK

#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U)

Definition at line 11960 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT

#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT (8U)

Definition at line 11961 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_RSVD

#define DCP_CHANNELCTRL_TOG_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_RSVD_SHIFT)) & DCP_CHANNELCTRL_TOG_RSVD_MASK)

Definition at line 11974 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_RSVD_MASK

#define DCP_CHANNELCTRL_TOG_RSVD_MASK (0xFFFE0000U)

Definition at line 11972 of file MIMXRT1062.h.

## ◆ DCP_CHANNELCTRL_TOG_RSVD_SHIFT

#define DCP_CHANNELCTRL_TOG_RSVD_SHIFT (17U)

Definition at line 11973 of file MIMXRT1062.h.

## ◆ DCP_CONTEXT_ADDR

#define DCP_CONTEXT_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CONTEXT_ADDR_SHIFT)) & DCP_CONTEXT_ADDR_MASK)

Definition at line 12018 of file MIMXRT1062.h.

## ◆ DCP_CONTEXT_ADDR_MASK

#define DCP_CONTEXT_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12016 of file MIMXRT1062.h.

## ◆ DCP_CONTEXT_ADDR_SHIFT

#define DCP_CONTEXT_ADDR_SHIFT (0U)

Definition at line 12017 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CHANNEL_INTERRUPT_ENABLE

#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK)

CHANNEL_INTERRUPT_ENABLE 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11567 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)

Definition at line 11559 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)

Definition at line 11560 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLKGATE

#define DCP_CTRL_CLKGATE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLKGATE_SHIFT)) & DCP_CTRL_CLKGATE_MASK)

Definition at line 11596 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLKGATE_MASK

#define DCP_CTRL_CLKGATE_MASK (0x40000000U)

Definition at line 11594 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLKGATE_SHIFT

#define DCP_CTRL_CLKGATE_SHIFT (30U)

Definition at line 11595 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE

#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK)

CHANNEL_INTERRUPT_ENABLE 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11657 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)

Definition at line 11649 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)

Definition at line 11650 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CLKGATE

#define DCP_CTRL_CLR_CLKGATE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CLKGATE_SHIFT)) & DCP_CTRL_CLR_CLKGATE_MASK)

Definition at line 11686 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CLKGATE_MASK

#define DCP_CTRL_CLR_CLKGATE_MASK (0x40000000U)

Definition at line 11684 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_CLKGATE_SHIFT

#define DCP_CTRL_CLR_CLKGATE_SHIFT (30U)

Definition at line 11685 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING

#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK)

Definition at line 11666 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK

#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK (0x400000U)

Definition at line 11664 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT

#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT (22U)

Definition at line 11665 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING

#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK)

Definition at line 11663 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK

#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)

Definition at line 11661 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT

#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)

Definition at line 11662 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES

#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK)

Definition at line 11669 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK

#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK (0x800000U)

Definition at line 11667 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT

#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT (23U)

Definition at line 11668 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_CRYPTO

#define DCP_CTRL_CLR_PRESENT_CRYPTO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_CLR_PRESENT_CRYPTO_MASK)

PRESENT_CRYPTO 0b1..Present 0b0..Absent

Definition at line 11683 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_CRYPTO_MASK

#define DCP_CTRL_CLR_PRESENT_CRYPTO_MASK (0x20000000U)

Definition at line 11677 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT

#define DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT (29U)

Definition at line 11678 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_SHA

#define DCP_CTRL_CLR_PRESENT_SHA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_SHA_SHIFT)) & DCP_CTRL_CLR_PRESENT_SHA_MASK)

PRESENT_SHA 0b1..Present 0b0..Absent

Definition at line 11676 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_SHA_MASK

#define DCP_CTRL_CLR_PRESENT_SHA_MASK (0x10000000U)

Definition at line 11670 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_PRESENT_SHA_SHIFT

#define DCP_CTRL_CLR_PRESENT_SHA_SHIFT (28U)

Definition at line 11671 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE

#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK)

Definition at line 11660 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)

Definition at line 11658 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)

Definition at line 11659 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_SFTRST

#define DCP_CTRL_CLR_SFTRST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_SFTRST_SHIFT)) & DCP_CTRL_CLR_SFTRST_MASK)

Definition at line 11689 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_SFTRST_MASK

#define DCP_CTRL_CLR_SFTRST_MASK (0x80000000U)

Definition at line 11687 of file MIMXRT1062.h.

## ◆ DCP_CTRL_CLR_SFTRST_SHIFT

#define DCP_CTRL_CLR_SFTRST_SHIFT (31U)

Definition at line 11688 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_CACHING

#define DCP_CTRL_ENABLE_CONTEXT_CACHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK)

Definition at line 11576 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK

#define DCP_CTRL_ENABLE_CONTEXT_CACHING_MASK (0x400000U)

Definition at line 11574 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT

#define DCP_CTRL_ENABLE_CONTEXT_CACHING_SHIFT (22U)

Definition at line 11575 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_SWITCHING

#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK)

Definition at line 11573 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK

#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)

Definition at line 11571 of file MIMXRT1062.h.

## ◆ DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT

#define DCP_CTRL_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)

Definition at line 11572 of file MIMXRT1062.h.

## ◆ DCP_CTRL_GATHER_RESIDUAL_WRITES

#define DCP_CTRL_GATHER_RESIDUAL_WRITES | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK)

Definition at line 11579 of file MIMXRT1062.h.

## ◆ DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK

#define DCP_CTRL_GATHER_RESIDUAL_WRITES_MASK (0x800000U)

Definition at line 11577 of file MIMXRT1062.h.

## ◆ DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT

#define DCP_CTRL_GATHER_RESIDUAL_WRITES_SHIFT (23U)

Definition at line 11578 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_CRYPTO

#define DCP_CTRL_PRESENT_CRYPTO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_PRESENT_CRYPTO_MASK)

PRESENT_CRYPTO 0b1..Present 0b0..Absent

Definition at line 11593 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_CRYPTO_MASK

#define DCP_CTRL_PRESENT_CRYPTO_MASK (0x20000000U)

Definition at line 11587 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_CRYPTO_SHIFT

#define DCP_CTRL_PRESENT_CRYPTO_SHIFT (29U)

Definition at line 11588 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_SHA

#define DCP_CTRL_PRESENT_SHA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_PRESENT_SHA_SHIFT)) & DCP_CTRL_PRESENT_SHA_MASK)

PRESENT_SHA 0b1..Present 0b0..Absent

Definition at line 11586 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_SHA_MASK

#define DCP_CTRL_PRESENT_SHA_MASK (0x10000000U)

Definition at line 11580 of file MIMXRT1062.h.

## ◆ DCP_CTRL_PRESENT_SHA_SHIFT

#define DCP_CTRL_PRESENT_SHA_SHIFT (28U)

Definition at line 11581 of file MIMXRT1062.h.

## ◆ DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE

#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK)

Definition at line 11570 of file MIMXRT1062.h.

## ◆ DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)

Definition at line 11568 of file MIMXRT1062.h.

## ◆ DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)

Definition at line 11569 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE

#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK)

CHANNEL_INTERRUPT_ENABLE 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11612 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)

Definition at line 11604 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)

Definition at line 11605 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CLKGATE

#define DCP_CTRL_SET_CLKGATE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CLKGATE_SHIFT)) & DCP_CTRL_SET_CLKGATE_MASK)

Definition at line 11641 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CLKGATE_MASK

#define DCP_CTRL_SET_CLKGATE_MASK (0x40000000U)

Definition at line 11639 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_CLKGATE_SHIFT

#define DCP_CTRL_SET_CLKGATE_SHIFT (30U)

Definition at line 11640 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_CACHING

#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK)

Definition at line 11621 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK

#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK (0x400000U)

Definition at line 11619 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT

#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT (22U)

Definition at line 11620 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING

#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK)

Definition at line 11618 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK

#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)

Definition at line 11616 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT

#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)

Definition at line 11617 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_GATHER_RESIDUAL_WRITES

#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK)

Definition at line 11624 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK

#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK (0x800000U)

Definition at line 11622 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT

#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT (23U)

Definition at line 11623 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_CRYPTO

#define DCP_CTRL_SET_PRESENT_CRYPTO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_SET_PRESENT_CRYPTO_MASK)

PRESENT_CRYPTO 0b1..Present 0b0..Absent

Definition at line 11638 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_CRYPTO_MASK

#define DCP_CTRL_SET_PRESENT_CRYPTO_MASK (0x20000000U)

Definition at line 11632 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT

#define DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT (29U)

Definition at line 11633 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_SHA

#define DCP_CTRL_SET_PRESENT_SHA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_SHA_SHIFT)) & DCP_CTRL_SET_PRESENT_SHA_MASK)

PRESENT_SHA 0b1..Present 0b0..Absent

Definition at line 11631 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_SHA_MASK

#define DCP_CTRL_SET_PRESENT_SHA_MASK (0x10000000U)

Definition at line 11625 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_PRESENT_SHA_SHIFT

#define DCP_CTRL_SET_PRESENT_SHA_SHIFT (28U)

Definition at line 11626 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE

#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK)

Definition at line 11615 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)

Definition at line 11613 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)

Definition at line 11614 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_SFTRST

#define DCP_CTRL_SET_SFTRST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_SFTRST_SHIFT)) & DCP_CTRL_SET_SFTRST_MASK)

Definition at line 11644 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_SFTRST_MASK

#define DCP_CTRL_SET_SFTRST_MASK (0x80000000U)

Definition at line 11642 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SET_SFTRST_SHIFT

#define DCP_CTRL_SET_SFTRST_SHIFT (31U)

Definition at line 11643 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SFTRST

#define DCP_CTRL_SFTRST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK)

Definition at line 11599 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SFTRST_MASK

#define DCP_CTRL_SFTRST_MASK (0x80000000U)

Definition at line 11597 of file MIMXRT1062.h.

## ◆ DCP_CTRL_SFTRST_SHIFT

#define DCP_CTRL_SFTRST_SHIFT (31U)

Definition at line 11598 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE

#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK)

CHANNEL_INTERRUPT_ENABLE 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11702 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU)

Definition at line 11694 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U)

Definition at line 11695 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CLKGATE

#define DCP_CTRL_TOG_CLKGATE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CLKGATE_SHIFT)) & DCP_CTRL_TOG_CLKGATE_MASK)

Definition at line 11731 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CLKGATE_MASK

#define DCP_CTRL_TOG_CLKGATE_MASK (0x40000000U)

Definition at line 11729 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_CLKGATE_SHIFT

#define DCP_CTRL_TOG_CLKGATE_SHIFT (30U)

Definition at line 11730 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING

#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK)

Definition at line 11711 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK

#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK (0x400000U)

Definition at line 11709 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT

#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT (22U)

Definition at line 11710 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING

#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK)

Definition at line 11708 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK

#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U)

Definition at line 11706 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT

#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT (21U)

Definition at line 11707 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES

#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK)

Definition at line 11714 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK

#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK (0x800000U)

Definition at line 11712 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT

#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT (23U)

Definition at line 11713 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_CRYPTO

#define DCP_CTRL_TOG_PRESENT_CRYPTO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_TOG_PRESENT_CRYPTO_MASK)

PRESENT_CRYPTO 0b1..Present 0b0..Absent

Definition at line 11728 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_CRYPTO_MASK

#define DCP_CTRL_TOG_PRESENT_CRYPTO_MASK (0x20000000U)

Definition at line 11722 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT

#define DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT (29U)

Definition at line 11723 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_SHA

#define DCP_CTRL_TOG_PRESENT_SHA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_SHA_SHIFT)) & DCP_CTRL_TOG_PRESENT_SHA_MASK)

PRESENT_SHA 0b1..Present 0b0..Absent

Definition at line 11721 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_SHA_MASK

#define DCP_CTRL_TOG_PRESENT_SHA_MASK (0x10000000U)

Definition at line 11715 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_PRESENT_SHA_SHIFT

#define DCP_CTRL_TOG_PRESENT_SHA_SHIFT (28U)

Definition at line 11716 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE

#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK)

Definition at line 11705 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK

#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U)

Definition at line 11703 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT

#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U)

Definition at line 11704 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_SFTRST

#define DCP_CTRL_TOG_SFTRST | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_SFTRST_SHIFT)) & DCP_CTRL_TOG_SFTRST_MASK)

Definition at line 11734 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_SFTRST_MASK

#define DCP_CTRL_TOG_SFTRST_MASK (0x80000000U)

Definition at line 11732 of file MIMXRT1062.h.

## ◆ DCP_CTRL_TOG_SFTRST_SHIFT

#define DCP_CTRL_TOG_SFTRST_SHIFT (31U)

Definition at line 11733 of file MIMXRT1062.h.

## ◆ DCP_DBGDATA_DATA

#define DCP_DBGDATA_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_DBGDATA_DATA_SHIFT)) & DCP_DBGDATA_DATA_MASK)

Definition at line 13068 of file MIMXRT1062.h.

## ◆ DCP_DBGDATA_DATA_MASK

#define DCP_DBGDATA_DATA_MASK (0xFFFFFFFFU)

Definition at line 13066 of file MIMXRT1062.h.

## ◆ DCP_DBGDATA_DATA_SHIFT

#define DCP_DBGDATA_DATA_SHIFT (0U)

Definition at line 13067 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_INDEX

#define DCP_DBGSELECT_INDEX | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_INDEX_SHIFT)) & DCP_DBGSELECT_INDEX_MASK)

INDEX 0b00000001..CONTROL 0b00010000..OTPKEY0 0b00010001..OTPKEY1 0b00010010..OTPKEY2 0b00010011..OTPKEY3

Definition at line 13058 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_INDEX_MASK

#define DCP_DBGSELECT_INDEX_MASK (0xFFU)

Definition at line 13049 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_INDEX_SHIFT

#define DCP_DBGSELECT_INDEX_SHIFT (0U)

Definition at line 13050 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_RSVD

#define DCP_DBGSELECT_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_DBGSELECT_RSVD_SHIFT)) & DCP_DBGSELECT_RSVD_MASK)

Definition at line 13061 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_RSVD_MASK

#define DCP_DBGSELECT_RSVD_MASK (0xFFFFFF00U)

Definition at line 13059 of file MIMXRT1062.h.

## ◆ DCP_DBGSELECT_RSVD_SHIFT

#define DCP_DBGSELECT_RSVD_SHIFT (8U)

Definition at line 13060 of file MIMXRT1062.h.

## ◆ DCP_KEY_INDEX

#define DCP_KEY_INDEX | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEY_INDEX_SHIFT)) & DCP_KEY_INDEX_MASK)

Definition at line 12031 of file MIMXRT1062.h.

## ◆ DCP_KEY_INDEX_MASK

#define DCP_KEY_INDEX_MASK (0x30U)

Definition at line 12029 of file MIMXRT1062.h.

## ◆ DCP_KEY_INDEX_SHIFT

#define DCP_KEY_INDEX_SHIFT (4U)

Definition at line 12030 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD

#define DCP_KEY_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SHIFT)) & DCP_KEY_RSVD_MASK)

Definition at line 12037 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_INDEX

#define DCP_KEY_RSVD_INDEX | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_INDEX_SHIFT)) & DCP_KEY_RSVD_INDEX_MASK)

Definition at line 12034 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_INDEX_MASK

#define DCP_KEY_RSVD_INDEX_MASK (0xC0U)

Definition at line 12032 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_INDEX_SHIFT

#define DCP_KEY_RSVD_INDEX_SHIFT (6U)

Definition at line 12033 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_MASK

#define DCP_KEY_RSVD_MASK (0xFFFFFF00U)

Definition at line 12035 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_SHIFT

#define DCP_KEY_RSVD_SHIFT (8U)

Definition at line 12036 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_SUBWORD

#define DCP_KEY_RSVD_SUBWORD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEY_RSVD_SUBWORD_SHIFT)) & DCP_KEY_RSVD_SUBWORD_MASK)

Definition at line 12028 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_SUBWORD_MASK

#define DCP_KEY_RSVD_SUBWORD_MASK (0xCU)

Definition at line 12026 of file MIMXRT1062.h.

## ◆ DCP_KEY_RSVD_SUBWORD_SHIFT

#define DCP_KEY_RSVD_SUBWORD_SHIFT (2U)

Definition at line 12027 of file MIMXRT1062.h.

## ◆ DCP_KEY_SUBWORD

#define DCP_KEY_SUBWORD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEY_SUBWORD_SHIFT)) & DCP_KEY_SUBWORD_MASK)

Definition at line 12025 of file MIMXRT1062.h.

## ◆ DCP_KEY_SUBWORD_MASK

#define DCP_KEY_SUBWORD_MASK (0x3U)

Definition at line 12023 of file MIMXRT1062.h.

## ◆ DCP_KEY_SUBWORD_SHIFT

#define DCP_KEY_SUBWORD_SHIFT (0U)

Definition at line 12024 of file MIMXRT1062.h.

## ◆ DCP_KEYDATA_DATA

#define DCP_KEYDATA_DATA | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_KEYDATA_DATA_SHIFT)) & DCP_KEYDATA_DATA_MASK)

Definition at line 12044 of file MIMXRT1062.h.

## ◆ DCP_KEYDATA_DATA_MASK

#define DCP_KEYDATA_DATA_MASK (0xFFFFFFFFU)

Definition at line 12042 of file MIMXRT1062.h.

## ◆ DCP_KEYDATA_DATA_SHIFT

#define DCP_KEYDATA_DATA_SHIFT (0U)

Definition at line 12043 of file MIMXRT1062.h.

## ◆ DCP_PACKET0_ADDR

#define DCP_PACKET0_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET0_ADDR_SHIFT)) & DCP_PACKET0_ADDR_MASK)

Definition at line 12051 of file MIMXRT1062.h.

## ◆ DCP_PACKET0_ADDR_MASK

#define DCP_PACKET0_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12049 of file MIMXRT1062.h.

## ◆ DCP_PACKET0_ADDR_SHIFT

#define DCP_PACKET0_ADDR_SHIFT (0U)

Definition at line 12050 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN

#define DCP_PACKET1_CHAIN | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_SHIFT)) & DCP_PACKET1_CHAIN_MASK)

Definition at line 12064 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN_CONTIGUOUS

#define DCP_PACKET1_CHAIN_CONTIGUOUS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT)) & DCP_PACKET1_CHAIN_CONTIGUOUS_MASK)

Definition at line 12067 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN_CONTIGUOUS_MASK

#define DCP_PACKET1_CHAIN_CONTIGUOUS_MASK (0x8U)

Definition at line 12065 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT

#define DCP_PACKET1_CHAIN_CONTIGUOUS_SHIFT (3U)

Definition at line 12066 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN_MASK

#define DCP_PACKET1_CHAIN_MASK (0x4U)

Definition at line 12062 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHAIN_SHIFT

#define DCP_PACKET1_CHAIN_SHIFT (2U)

Definition at line 12063 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHECK_HASH

#define DCP_PACKET1_CHECK_HASH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CHECK_HASH_SHIFT)) & DCP_PACKET1_CHECK_HASH_MASK)

Definition at line 12104 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHECK_HASH_MASK

#define DCP_PACKET1_CHECK_HASH_MASK (0x4000U)

Definition at line 12102 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CHECK_HASH_SHIFT

#define DCP_PACKET1_CHECK_HASH_SHIFT (14U)

Definition at line 12103 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_ENCRYPT

#define DCP_PACKET1_CIPHER_ENCRYPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_ENCRYPT_SHIFT)) & DCP_PACKET1_CIPHER_ENCRYPT_MASK)

CIPHER_ENCRYPT 0b1..ENCRYPT 0b0..DECRYPT

Definition at line 12086 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_ENCRYPT_MASK

#define DCP_PACKET1_CIPHER_ENCRYPT_MASK (0x100U)

Definition at line 12080 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_ENCRYPT_SHIFT

#define DCP_PACKET1_CIPHER_ENCRYPT_SHIFT (8U)

Definition at line 12081 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_INIT

#define DCP_PACKET1_CIPHER_INIT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CIPHER_INIT_SHIFT)) & DCP_PACKET1_CIPHER_INIT_MASK)

Definition at line 12089 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_INIT_MASK

#define DCP_PACKET1_CIPHER_INIT_MASK (0x200U)

Definition at line 12087 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CIPHER_INIT_SHIFT

#define DCP_PACKET1_CIPHER_INIT_SHIFT (9U)

Definition at line 12088 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CONSTANT_FILL

#define DCP_PACKET1_CONSTANT_FILL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_CONSTANT_FILL_SHIFT)) & DCP_PACKET1_CONSTANT_FILL_MASK)

Definition at line 12114 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CONSTANT_FILL_MASK

#define DCP_PACKET1_CONSTANT_FILL_MASK (0x10000U)

Definition at line 12112 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_CONSTANT_FILL_SHIFT

#define DCP_PACKET1_CONSTANT_FILL_SHIFT (16U)

Definition at line 12113 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_DECR_SEMAPHORE

#define DCP_PACKET1_DECR_SEMAPHORE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_DECR_SEMAPHORE_SHIFT)) & DCP_PACKET1_DECR_SEMAPHORE_MASK)

Definition at line 12061 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_DECR_SEMAPHORE_MASK

#define DCP_PACKET1_DECR_SEMAPHORE_MASK (0x2U)

Definition at line 12059 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_DECR_SEMAPHORE_SHIFT

#define DCP_PACKET1_DECR_SEMAPHORE_SHIFT (1U)

Definition at line 12060 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_BLIT

#define DCP_PACKET1_ENABLE_BLIT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_BLIT_SHIFT)) & DCP_PACKET1_ENABLE_BLIT_MASK)

Definition at line 12079 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_BLIT_MASK

#define DCP_PACKET1_ENABLE_BLIT_MASK (0x80U)

Definition at line 12077 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_BLIT_SHIFT

#define DCP_PACKET1_ENABLE_BLIT_SHIFT (7U)

Definition at line 12078 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_CIPHER

#define DCP_PACKET1_ENABLE_CIPHER | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_CIPHER_SHIFT)) & DCP_PACKET1_ENABLE_CIPHER_MASK)

Definition at line 12073 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_CIPHER_MASK

#define DCP_PACKET1_ENABLE_CIPHER_MASK (0x20U)

Definition at line 12071 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_CIPHER_SHIFT

#define DCP_PACKET1_ENABLE_CIPHER_SHIFT (5U)

Definition at line 12072 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_HASH

#define DCP_PACKET1_ENABLE_HASH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_HASH_SHIFT)) & DCP_PACKET1_ENABLE_HASH_MASK)

Definition at line 12076 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_HASH_MASK

#define DCP_PACKET1_ENABLE_HASH_MASK (0x40U)

Definition at line 12074 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_HASH_SHIFT

#define DCP_PACKET1_ENABLE_HASH_SHIFT (6U)

Definition at line 12075 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_MEMCOPY

#define DCP_PACKET1_ENABLE_MEMCOPY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_ENABLE_MEMCOPY_SHIFT)) & DCP_PACKET1_ENABLE_MEMCOPY_MASK)

Definition at line 12070 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_MEMCOPY_MASK

#define DCP_PACKET1_ENABLE_MEMCOPY_MASK (0x10U)

Definition at line 12068 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_ENABLE_MEMCOPY_SHIFT

#define DCP_PACKET1_ENABLE_MEMCOPY_SHIFT (4U)

Definition at line 12069 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_INIT

#define DCP_PACKET1_HASH_INIT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_INIT_SHIFT)) & DCP_PACKET1_HASH_INIT_MASK)

Definition at line 12098 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_INIT_MASK

#define DCP_PACKET1_HASH_INIT_MASK (0x1000U)

Definition at line 12096 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_INIT_SHIFT

#define DCP_PACKET1_HASH_INIT_SHIFT (12U)

Definition at line 12097 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_OUTPUT

#define DCP_PACKET1_HASH_OUTPUT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_OUTPUT_SHIFT)) & DCP_PACKET1_HASH_OUTPUT_MASK)

HASH_OUTPUT 0b0..INPUT 0b1..OUTPUT

Definition at line 12111 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_OUTPUT_MASK

#define DCP_PACKET1_HASH_OUTPUT_MASK (0x8000U)

Definition at line 12105 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_OUTPUT_SHIFT

#define DCP_PACKET1_HASH_OUTPUT_SHIFT (15U)

Definition at line 12106 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_TERM

#define DCP_PACKET1_HASH_TERM | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_HASH_TERM_SHIFT)) & DCP_PACKET1_HASH_TERM_MASK)

Definition at line 12101 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_TERM_MASK

#define DCP_PACKET1_HASH_TERM_MASK (0x2000U)

Definition at line 12099 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_HASH_TERM_SHIFT

#define DCP_PACKET1_HASH_TERM_SHIFT (13U)

Definition at line 12100 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_BYTESWAP

#define DCP_PACKET1_INPUT_BYTESWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_INPUT_BYTESWAP_MASK)

Definition at line 12126 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_BYTESWAP_MASK

#define DCP_PACKET1_INPUT_BYTESWAP_MASK (0x100000U)

Definition at line 12124 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_BYTESWAP_SHIFT

#define DCP_PACKET1_INPUT_BYTESWAP_SHIFT (20U)

Definition at line 12125 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_WORDSWAP

#define DCP_PACKET1_INPUT_WORDSWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_INPUT_WORDSWAP_MASK)

Definition at line 12129 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_WORDSWAP_MASK

#define DCP_PACKET1_INPUT_WORDSWAP_MASK (0x200000U)

Definition at line 12127 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INPUT_WORDSWAP_SHIFT

#define DCP_PACKET1_INPUT_WORDSWAP_SHIFT (21U)

Definition at line 12128 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INTERRUPT

#define DCP_PACKET1_INTERRUPT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_INTERRUPT_SHIFT)) & DCP_PACKET1_INTERRUPT_MASK)

Definition at line 12058 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INTERRUPT_MASK

#define DCP_PACKET1_INTERRUPT_MASK (0x1U)

Definition at line 12056 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_INTERRUPT_SHIFT

#define DCP_PACKET1_INTERRUPT_SHIFT (0U)

Definition at line 12057 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_BYTESWAP

#define DCP_PACKET1_KEY_BYTESWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_BYTESWAP_SHIFT)) & DCP_PACKET1_KEY_BYTESWAP_MASK)

Definition at line 12120 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_BYTESWAP_MASK

#define DCP_PACKET1_KEY_BYTESWAP_MASK (0x40000U)

Definition at line 12118 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_BYTESWAP_SHIFT

#define DCP_PACKET1_KEY_BYTESWAP_SHIFT (18U)

Definition at line 12119 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_WORDSWAP

#define DCP_PACKET1_KEY_WORDSWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_KEY_WORDSWAP_SHIFT)) & DCP_PACKET1_KEY_WORDSWAP_MASK)

Definition at line 12123 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_WORDSWAP_MASK

#define DCP_PACKET1_KEY_WORDSWAP_MASK (0x80000U)

Definition at line 12121 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_KEY_WORDSWAP_SHIFT

#define DCP_PACKET1_KEY_WORDSWAP_SHIFT (19U)

Definition at line 12122 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OTP_KEY

#define DCP_PACKET1_OTP_KEY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OTP_KEY_SHIFT)) & DCP_PACKET1_OTP_KEY_MASK)

Definition at line 12092 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OTP_KEY_MASK

#define DCP_PACKET1_OTP_KEY_MASK (0x400U)

Definition at line 12090 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OTP_KEY_SHIFT

#define DCP_PACKET1_OTP_KEY_SHIFT (10U)

Definition at line 12091 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_BYTESWAP

#define DCP_PACKET1_OUTPUT_BYTESWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT)) & DCP_PACKET1_OUTPUT_BYTESWAP_MASK)

Definition at line 12132 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_BYTESWAP_MASK

#define DCP_PACKET1_OUTPUT_BYTESWAP_MASK (0x400000U)

Definition at line 12130 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT

#define DCP_PACKET1_OUTPUT_BYTESWAP_SHIFT (22U)

Definition at line 12131 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_WORDSWAP

#define DCP_PACKET1_OUTPUT_WORDSWAP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT)) & DCP_PACKET1_OUTPUT_WORDSWAP_MASK)

Definition at line 12135 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_WORDSWAP_MASK

#define DCP_PACKET1_OUTPUT_WORDSWAP_MASK (0x800000U)

Definition at line 12133 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT

#define DCP_PACKET1_OUTPUT_WORDSWAP_SHIFT (23U)

Definition at line 12134 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_PAYLOAD_KEY

#define DCP_PACKET1_PAYLOAD_KEY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_PAYLOAD_KEY_SHIFT)) & DCP_PACKET1_PAYLOAD_KEY_MASK)

Definition at line 12095 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_PAYLOAD_KEY_MASK

#define DCP_PACKET1_PAYLOAD_KEY_MASK (0x800U)

Definition at line 12093 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_PAYLOAD_KEY_SHIFT

#define DCP_PACKET1_PAYLOAD_KEY_SHIFT (11U)

Definition at line 12094 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TAG

#define DCP_PACKET1_TAG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TAG_SHIFT)) & DCP_PACKET1_TAG_MASK)

Definition at line 12138 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TAG_MASK

#define DCP_PACKET1_TAG_MASK (0xFF000000U)

Definition at line 12136 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TAG_SHIFT

#define DCP_PACKET1_TAG_SHIFT (24U)

Definition at line 12137 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TEST_SEMA_IRQ

#define DCP_PACKET1_TEST_SEMA_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET1_TEST_SEMA_IRQ_SHIFT)) & DCP_PACKET1_TEST_SEMA_IRQ_MASK)

Definition at line 12117 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TEST_SEMA_IRQ_MASK

#define DCP_PACKET1_TEST_SEMA_IRQ_MASK (0x20000U)

Definition at line 12115 of file MIMXRT1062.h.

## ◆ DCP_PACKET1_TEST_SEMA_IRQ_SHIFT

#define DCP_PACKET1_TEST_SEMA_IRQ_SHIFT (17U)

Definition at line 12116 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_CFG

#define DCP_PACKET2_CIPHER_CFG | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_CFG_SHIFT)) & DCP_PACKET2_CIPHER_CFG_MASK)

Definition at line 12180 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_CFG_MASK

#define DCP_PACKET2_CIPHER_CFG_MASK (0xFF000000U)

Definition at line 12178 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_CFG_SHIFT

#define DCP_PACKET2_CIPHER_CFG_SHIFT (24U)

Definition at line 12179 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_MODE

#define DCP_PACKET2_CIPHER_MODE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_MODE_SHIFT)) & DCP_PACKET2_CIPHER_MODE_MASK)

CIPHER_MODE 0b0000..ECB 0b0001..CBC

Definition at line 12155 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_MODE_MASK

#define DCP_PACKET2_CIPHER_MODE_MASK (0xF0U)

Definition at line 12149 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_MODE_SHIFT

#define DCP_PACKET2_CIPHER_MODE_SHIFT (4U)

Definition at line 12150 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_SELECT

#define DCP_PACKET2_CIPHER_SELECT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_CIPHER_SELECT_SHIFT)) & DCP_PACKET2_CIPHER_SELECT_MASK)

CIPHER_SELECT 0b0000..AES128

Definition at line 12148 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_SELECT_MASK

#define DCP_PACKET2_CIPHER_SELECT_MASK (0xFU)

Definition at line 12143 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_CIPHER_SELECT_SHIFT

#define DCP_PACKET2_CIPHER_SELECT_SHIFT (0U)

Definition at line 12144 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_HASH_SELECT

#define DCP_PACKET2_HASH_SELECT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_HASH_SELECT_SHIFT)) & DCP_PACKET2_HASH_SELECT_MASK)

HASH_SELECT 0b0000..SHA1 0b0001..CRC32 0b0010..SHA256

Definition at line 12174 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_HASH_SELECT_MASK

#define DCP_PACKET2_HASH_SELECT_MASK (0xF0000U)

Definition at line 12167 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_HASH_SELECT_SHIFT

#define DCP_PACKET2_HASH_SELECT_SHIFT (16U)

Definition at line 12168 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_KEY_SELECT

#define DCP_PACKET2_KEY_SELECT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_KEY_SELECT_SHIFT)) & DCP_PACKET2_KEY_SELECT_MASK)

KEY_SELECT 0b00000000..KEY0 0b00000001..KEY1 0b00000010..KEY2 0b00000011..KEY3 0b11111110..UNIQUE_KEY 0b11111111..OTP_KEY

Definition at line 12166 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_KEY_SELECT_MASK

#define DCP_PACKET2_KEY_SELECT_MASK (0xFF00U)

Definition at line 12156 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_KEY_SELECT_SHIFT

#define DCP_PACKET2_KEY_SELECT_SHIFT (8U)

Definition at line 12157 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_RSVD

#define DCP_PACKET2_RSVD | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET2_RSVD_SHIFT)) & DCP_PACKET2_RSVD_MASK)

Definition at line 12177 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_RSVD_MASK

#define DCP_PACKET2_RSVD_MASK (0xF00000U)

Definition at line 12175 of file MIMXRT1062.h.

## ◆ DCP_PACKET2_RSVD_SHIFT

#define DCP_PACKET2_RSVD_SHIFT (20U)

Definition at line 12176 of file MIMXRT1062.h.

## ◆ DCP_PACKET3_ADDR

#define DCP_PACKET3_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET3_ADDR_SHIFT)) & DCP_PACKET3_ADDR_MASK)

Definition at line 12187 of file MIMXRT1062.h.

## ◆ DCP_PACKET3_ADDR_MASK

#define DCP_PACKET3_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12185 of file MIMXRT1062.h.

## ◆ DCP_PACKET3_ADDR_SHIFT

#define DCP_PACKET3_ADDR_SHIFT (0U)

Definition at line 12186 of file MIMXRT1062.h.

## ◆ DCP_PACKET4_ADDR

#define DCP_PACKET4_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET4_ADDR_SHIFT)) & DCP_PACKET4_ADDR_MASK)

Definition at line 12194 of file MIMXRT1062.h.

## ◆ DCP_PACKET4_ADDR_MASK

#define DCP_PACKET4_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12192 of file MIMXRT1062.h.

## ◆ DCP_PACKET4_ADDR_SHIFT

#define DCP_PACKET4_ADDR_SHIFT (0U)

Definition at line 12193 of file MIMXRT1062.h.

## ◆ DCP_PACKET5_COUNT

#define DCP_PACKET5_COUNT | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET5_COUNT_SHIFT)) & DCP_PACKET5_COUNT_MASK)

Definition at line 12201 of file MIMXRT1062.h.

## ◆ DCP_PACKET5_COUNT_MASK

#define DCP_PACKET5_COUNT_MASK (0xFFFFFFFFU)

Definition at line 12199 of file MIMXRT1062.h.

## ◆ DCP_PACKET5_COUNT_SHIFT

#define DCP_PACKET5_COUNT_SHIFT (0U)

Definition at line 12200 of file MIMXRT1062.h.

## ◆ DCP_PACKET6_ADDR

#define DCP_PACKET6_ADDR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PACKET6_ADDR_SHIFT)) & DCP_PACKET6_ADDR_MASK)

Definition at line 12208 of file MIMXRT1062.h.

## ◆ DCP_PACKET6_ADDR_MASK

#define DCP_PACKET6_ADDR_MASK (0xFFFFFFFFU)

Definition at line 12206 of file MIMXRT1062.h.

## ◆ DCP_PACKET6_ADDR_SHIFT

#define DCP_PACKET6_ADDR_SHIFT (0U)

Definition at line 12207 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_BASE

#define DCP_PAGETABLE_BASE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_BASE_SHIFT)) & DCP_PAGETABLE_BASE_MASK)

Definition at line 13081 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_BASE_MASK

#define DCP_PAGETABLE_BASE_MASK (0xFFFFFFFCU)

Definition at line 13079 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_BASE_SHIFT

#define DCP_PAGETABLE_BASE_SHIFT (2U)

Definition at line 13080 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_ENABLE

#define DCP_PAGETABLE_ENABLE | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_ENABLE_SHIFT)) & DCP_PAGETABLE_ENABLE_MASK)

Definition at line 13075 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_ENABLE_MASK

#define DCP_PAGETABLE_ENABLE_MASK (0x1U)

Definition at line 13073 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_ENABLE_SHIFT

#define DCP_PAGETABLE_ENABLE_SHIFT (0U)

Definition at line 13074 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_FLUSH

#define DCP_PAGETABLE_FLUSH | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_PAGETABLE_FLUSH_SHIFT)) & DCP_PAGETABLE_FLUSH_MASK)

Definition at line 13078 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_FLUSH_MASK

#define DCP_PAGETABLE_FLUSH_MASK (0x2U)

Definition at line 13076 of file MIMXRT1062.h.

## ◆ DCP_PAGETABLE_FLUSH_SHIFT

#define DCP_PAGETABLE_FLUSH_SHIFT (1U)

Definition at line 13077 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_CUR_CHANNEL

#define DCP_STAT_CLR_CUR_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_CUR_CHANNEL_SHIFT)) & DCP_STAT_CLR_CUR_CHANNEL_MASK)

CUR_CHANNEL 0b0000..None 0b0001..CH0 0b0010..CH1 0b0011..CH2 0b0100..CH3

Definition at line 11827 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_CUR_CHANNEL_MASK

#define DCP_STAT_CLR_CUR_CHANNEL_MASK (0xF000000U)

Definition at line 11818 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_CUR_CHANNEL_SHIFT

#define DCP_STAT_CLR_CUR_CHANNEL_SHIFT (24U)

Definition at line 11819 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_IRQ

#define DCP_STAT_CLR_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_IRQ_SHIFT)) & DCP_STAT_CLR_IRQ_MASK)

Definition at line 11805 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_IRQ_MASK

#define DCP_STAT_CLR_IRQ_MASK (0xFU)

Definition at line 11803 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_IRQ_SHIFT

#define DCP_STAT_CLR_IRQ_SHIFT (0U)

Definition at line 11804 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_OTP_KEY_READY

#define DCP_STAT_CLR_OTP_KEY_READY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_OTP_KEY_READY_SHIFT)) & DCP_STAT_CLR_OTP_KEY_READY_MASK)

Definition at line 11830 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_OTP_KEY_READY_MASK

#define DCP_STAT_CLR_OTP_KEY_READY_MASK (0x10000000U)

Definition at line 11828 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_OTP_KEY_READY_SHIFT

#define DCP_STAT_CLR_OTP_KEY_READY_SHIFT (28U)

Definition at line 11829 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_READY_CHANNELS

#define DCP_STAT_CLR_READY_CHANNELS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_READY_CHANNELS_SHIFT)) & DCP_STAT_CLR_READY_CHANNELS_MASK)

READY_CHANNELS 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11817 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_READY_CHANNELS_MASK

#define DCP_STAT_CLR_READY_CHANNELS_MASK (0xFF0000U)

Definition at line 11809 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_READY_CHANNELS_SHIFT

#define DCP_STAT_CLR_READY_CHANNELS_SHIFT (16U)

Definition at line 11810 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_RSVD_IRQ

#define DCP_STAT_CLR_RSVD_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_RSVD_IRQ_SHIFT)) & DCP_STAT_CLR_RSVD_IRQ_MASK)

Definition at line 11808 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_RSVD_IRQ_MASK

#define DCP_STAT_CLR_RSVD_IRQ_MASK (0x100U)

Definition at line 11806 of file MIMXRT1062.h.

## ◆ DCP_STAT_CLR_RSVD_IRQ_SHIFT

#define DCP_STAT_CLR_RSVD_IRQ_SHIFT (8U)

Definition at line 11807 of file MIMXRT1062.h.

## ◆ DCP_STAT_CUR_CHANNEL

#define DCP_STAT_CUR_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CUR_CHANNEL_SHIFT)) & DCP_STAT_CUR_CHANNEL_MASK)

CUR_CHANNEL 0b0000..None 0b0001..CH0 0b0010..CH1 0b0011..CH2 0b0100..CH3

Definition at line 11763 of file MIMXRT1062.h.

## ◆ DCP_STAT_CUR_CHANNEL_MASK

#define DCP_STAT_CUR_CHANNEL_MASK (0xF000000U)

Definition at line 11754 of file MIMXRT1062.h.

## ◆ DCP_STAT_CUR_CHANNEL_SHIFT

#define DCP_STAT_CUR_CHANNEL_SHIFT (24U)

Definition at line 11755 of file MIMXRT1062.h.

## ◆ DCP_STAT_IRQ

#define DCP_STAT_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_IRQ_SHIFT)) & DCP_STAT_IRQ_MASK)

Definition at line 11741 of file MIMXRT1062.h.

## ◆ DCP_STAT_IRQ_MASK

#define DCP_STAT_IRQ_MASK (0xFU)

Definition at line 11739 of file MIMXRT1062.h.

## ◆ DCP_STAT_IRQ_SHIFT

#define DCP_STAT_IRQ_SHIFT (0U)

Definition at line 11740 of file MIMXRT1062.h.

## ◆ DCP_STAT_OTP_KEY_READY

#define DCP_STAT_OTP_KEY_READY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK)

Definition at line 11766 of file MIMXRT1062.h.

## ◆ DCP_STAT_OTP_KEY_READY_MASK

#define DCP_STAT_OTP_KEY_READY_MASK (0x10000000U)

Definition at line 11764 of file MIMXRT1062.h.

## ◆ DCP_STAT_OTP_KEY_READY_SHIFT

#define DCP_STAT_OTP_KEY_READY_SHIFT (28U)

Definition at line 11765 of file MIMXRT1062.h.

## ◆ DCP_STAT_READY_CHANNELS

#define DCP_STAT_READY_CHANNELS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_READY_CHANNELS_SHIFT)) & DCP_STAT_READY_CHANNELS_MASK)

READY_CHANNELS 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11753 of file MIMXRT1062.h.

## ◆ DCP_STAT_READY_CHANNELS_MASK

#define DCP_STAT_READY_CHANNELS_MASK (0xFF0000U)

Definition at line 11745 of file MIMXRT1062.h.

## ◆ DCP_STAT_READY_CHANNELS_SHIFT

#define DCP_STAT_READY_CHANNELS_SHIFT (16U)

Definition at line 11746 of file MIMXRT1062.h.

## ◆ DCP_STAT_RSVD_IRQ

#define DCP_STAT_RSVD_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_RSVD_IRQ_SHIFT)) & DCP_STAT_RSVD_IRQ_MASK)

Definition at line 11744 of file MIMXRT1062.h.

## ◆ DCP_STAT_RSVD_IRQ_MASK

#define DCP_STAT_RSVD_IRQ_MASK (0x100U)

Definition at line 11742 of file MIMXRT1062.h.

## ◆ DCP_STAT_RSVD_IRQ_SHIFT

#define DCP_STAT_RSVD_IRQ_SHIFT (8U)

Definition at line 11743 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_CUR_CHANNEL

#define DCP_STAT_SET_CUR_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_CUR_CHANNEL_SHIFT)) & DCP_STAT_SET_CUR_CHANNEL_MASK)

CUR_CHANNEL 0b0000..None 0b0001..CH0 0b0010..CH1 0b0011..CH2 0b0100..CH3

Definition at line 11795 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_CUR_CHANNEL_MASK

#define DCP_STAT_SET_CUR_CHANNEL_MASK (0xF000000U)

Definition at line 11786 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_CUR_CHANNEL_SHIFT

#define DCP_STAT_SET_CUR_CHANNEL_SHIFT (24U)

Definition at line 11787 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_IRQ

#define DCP_STAT_SET_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_IRQ_SHIFT)) & DCP_STAT_SET_IRQ_MASK)

Definition at line 11773 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_IRQ_MASK

#define DCP_STAT_SET_IRQ_MASK (0xFU)

Definition at line 11771 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_IRQ_SHIFT

#define DCP_STAT_SET_IRQ_SHIFT (0U)

Definition at line 11772 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_OTP_KEY_READY

#define DCP_STAT_SET_OTP_KEY_READY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_OTP_KEY_READY_SHIFT)) & DCP_STAT_SET_OTP_KEY_READY_MASK)

Definition at line 11798 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_OTP_KEY_READY_MASK

#define DCP_STAT_SET_OTP_KEY_READY_MASK (0x10000000U)

Definition at line 11796 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_OTP_KEY_READY_SHIFT

#define DCP_STAT_SET_OTP_KEY_READY_SHIFT (28U)

Definition at line 11797 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_READY_CHANNELS

#define DCP_STAT_SET_READY_CHANNELS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_READY_CHANNELS_SHIFT)) & DCP_STAT_SET_READY_CHANNELS_MASK)

READY_CHANNELS 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11785 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_READY_CHANNELS_MASK

#define DCP_STAT_SET_READY_CHANNELS_MASK (0xFF0000U)

Definition at line 11777 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_READY_CHANNELS_SHIFT

#define DCP_STAT_SET_READY_CHANNELS_SHIFT (16U)

Definition at line 11778 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_RSVD_IRQ

#define DCP_STAT_SET_RSVD_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_RSVD_IRQ_SHIFT)) & DCP_STAT_SET_RSVD_IRQ_MASK)

Definition at line 11776 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_RSVD_IRQ_MASK

#define DCP_STAT_SET_RSVD_IRQ_MASK (0x100U)

Definition at line 11774 of file MIMXRT1062.h.

## ◆ DCP_STAT_SET_RSVD_IRQ_SHIFT

#define DCP_STAT_SET_RSVD_IRQ_SHIFT (8U)

Definition at line 11775 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_CUR_CHANNEL

#define DCP_STAT_TOG_CUR_CHANNEL | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_CUR_CHANNEL_SHIFT)) & DCP_STAT_TOG_CUR_CHANNEL_MASK)

CUR_CHANNEL 0b0000..None 0b0001..CH0 0b0010..CH1 0b0011..CH2 0b0100..CH3

Definition at line 11859 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_CUR_CHANNEL_MASK

#define DCP_STAT_TOG_CUR_CHANNEL_MASK (0xF000000U)

Definition at line 11850 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_CUR_CHANNEL_SHIFT

#define DCP_STAT_TOG_CUR_CHANNEL_SHIFT (24U)

Definition at line 11851 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_IRQ

#define DCP_STAT_TOG_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_IRQ_SHIFT)) & DCP_STAT_TOG_IRQ_MASK)

Definition at line 11837 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_IRQ_MASK

#define DCP_STAT_TOG_IRQ_MASK (0xFU)

Definition at line 11835 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_IRQ_SHIFT

#define DCP_STAT_TOG_IRQ_SHIFT (0U)

Definition at line 11836 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_OTP_KEY_READY

#define DCP_STAT_TOG_OTP_KEY_READY | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_OTP_KEY_READY_SHIFT)) & DCP_STAT_TOG_OTP_KEY_READY_MASK)

Definition at line 11862 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_OTP_KEY_READY_MASK

#define DCP_STAT_TOG_OTP_KEY_READY_MASK (0x10000000U)

Definition at line 11860 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_OTP_KEY_READY_SHIFT

#define DCP_STAT_TOG_OTP_KEY_READY_SHIFT (28U)

Definition at line 11861 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_READY_CHANNELS

#define DCP_STAT_TOG_READY_CHANNELS | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_READY_CHANNELS_SHIFT)) & DCP_STAT_TOG_READY_CHANNELS_MASK)

READY_CHANNELS 0b00000001..CH0 0b00000010..CH1 0b00000100..CH2 0b00001000..CH3

Definition at line 11849 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_READY_CHANNELS_MASK

#define DCP_STAT_TOG_READY_CHANNELS_MASK (0xFF0000U)

Definition at line 11841 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_READY_CHANNELS_SHIFT

#define DCP_STAT_TOG_READY_CHANNELS_SHIFT (16U)

Definition at line 11842 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_RSVD_IRQ

#define DCP_STAT_TOG_RSVD_IRQ | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_RSVD_IRQ_SHIFT)) & DCP_STAT_TOG_RSVD_IRQ_MASK)

Definition at line 11840 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_RSVD_IRQ_MASK

#define DCP_STAT_TOG_RSVD_IRQ_MASK (0x100U)

Definition at line 11838 of file MIMXRT1062.h.

## ◆ DCP_STAT_TOG_RSVD_IRQ_SHIFT

#define DCP_STAT_TOG_RSVD_IRQ_SHIFT (8U)

Definition at line 11839 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MAJOR

#define DCP_VERSION_MAJOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MAJOR_SHIFT)) & DCP_VERSION_MAJOR_MASK)

Definition at line 13094 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MAJOR_MASK

#define DCP_VERSION_MAJOR_MASK (0xFF000000U)

Definition at line 13092 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MAJOR_SHIFT

#define DCP_VERSION_MAJOR_SHIFT (24U)

Definition at line 13093 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MINOR

#define DCP_VERSION_MINOR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_MINOR_SHIFT)) & DCP_VERSION_MINOR_MASK)

Definition at line 13091 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MINOR_MASK

#define DCP_VERSION_MINOR_MASK (0xFF0000U)

Definition at line 13089 of file MIMXRT1062.h.

## ◆ DCP_VERSION_MINOR_SHIFT

#define DCP_VERSION_MINOR_SHIFT (16U)

Definition at line 13090 of file MIMXRT1062.h.

## ◆ DCP_VERSION_STEP

#define DCP_VERSION_STEP | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << DCP_VERSION_STEP_SHIFT)) & DCP_VERSION_STEP_MASK)

Definition at line 13088 of file MIMXRT1062.h.

## ◆ DCP_VERSION_STEP_MASK

#define DCP_VERSION_STEP_MASK (0xFFFFU)

Definition at line 13086 of file MIMXRT1062.h.

## ◆ DCP_VERSION_STEP_SHIFT

#define DCP_VERSION_STEP_SHIFT (0U)

Definition at line 13087 of file MIMXRT1062.h.