Callisto4Bootloader: Core Debug Registers (CoreDebug)

Callisto4Bootloader

Modules | Data Structures
Core Debug Registers (CoreDebug)
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » Floating Point Unit (FPU)

Type definitions for the Core Debug Registers. More...

## Modules

| Core register bit field macros
| Macros for use with bit field definitions (xxx_Pos, xxx_Msk).

## Data Structures

struct | CoreDebug_Type
| Structure type to access the Core Debug Register (CoreDebug). More...
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESTART_ST_Pos 26U
#define | CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17U
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2U
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1U
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
#define | CoreDebug_DCRSR_REGWnR_Pos 16U
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0U
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
#define | CoreDebug_DEMCR_TRCENA_Pos 24U
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16U
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
#define | CoreDebug_DSCSR_CDS_Pos 16U
#define | CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)
#define | CoreDebug_DSCSR_SBRSEL_Pos 1U
#define | CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
#define | CoreDebug_DSCSR_SBRSELEN_Pos 0U
#define | CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESTART_ST_Pos 26U
#define | CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17U
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2U
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1U
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
#define | CoreDebug_DCRSR_REGWnR_Pos 16U
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0U
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
#define | CoreDebug_DEMCR_DWTENA_Pos 24U
#define | CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
#define | CoreDebug_DSCSR_CDS_Pos 16U
#define | CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)
#define | CoreDebug_DSCSR_SBRSEL_Pos 1U
#define | CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
#define | CoreDebug_DSCSR_SBRSELEN_Pos 0U
#define | CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESTART_ST_Pos 26U
#define | CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17U
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2U
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1U
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
#define | CoreDebug_DCRSR_REGWnR_Pos 16U
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0U
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
#define | CoreDebug_DEMCR_TRCENA_Pos 24U
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16U
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U
#define | CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U
#define | CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U
#define | CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U
#define | CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
#define | CoreDebug_DSCSR_CDS_Pos 16U
#define | CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)
#define | CoreDebug_DSCSR_SBRSEL_Pos 1U
#define | CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
#define | CoreDebug_DSCSR_SBRSELEN_Pos 0U
#define | CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
#define | CoreDebug_DHCSR_DBGKEY_Pos 16U
#define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
#define | CoreDebug_DHCSR_S_RESET_ST_Pos 25U
#define | CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
#define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U
#define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
#define | CoreDebug_DHCSR_S_LOCKUP_Pos 19U
#define | CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
#define | CoreDebug_DHCSR_S_SLEEP_Pos 18U
#define | CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
#define | CoreDebug_DHCSR_S_HALT_Pos 17U
#define | CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)
#define | CoreDebug_DHCSR_S_REGRDY_Pos 16U
#define | CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
#define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U
#define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
#define | CoreDebug_DHCSR_C_MASKINTS_Pos 3U
#define | CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
#define | CoreDebug_DHCSR_C_STEP_Pos 2U
#define | CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)
#define | CoreDebug_DHCSR_C_HALT_Pos 1U
#define | CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)
#define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0U
#define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
#define | CoreDebug_DCRSR_REGWnR_Pos 16U
#define | CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)
#define | CoreDebug_DCRSR_REGSEL_Pos 0U
#define | CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
#define | CoreDebug_DEMCR_TRCENA_Pos 24U
#define | CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)
#define | CoreDebug_DEMCR_MON_REQ_Pos 19U
#define | CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
#define | CoreDebug_DEMCR_MON_STEP_Pos 18U
#define | CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
#define | CoreDebug_DEMCR_MON_PEND_Pos 17U
#define | CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
#define | CoreDebug_DEMCR_MON_EN_Pos 16U
#define | CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)
#define | CoreDebug_DEMCR_VC_HARDERR_Pos 10U
#define | CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
#define | CoreDebug_DEMCR_VC_INTERR_Pos 9U
#define | CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
#define | CoreDebug_DEMCR_VC_BUSERR_Pos 8U
#define | CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
#define | CoreDebug_DEMCR_VC_STATERR_Pos 7U
#define | CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
#define | CoreDebug_DEMCR_VC_CHKERR_Pos 6U
#define | CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
#define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5U
#define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
#define | CoreDebug_DEMCR_VC_MMERR_Pos 4U
#define | CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
#define | CoreDebug_DEMCR_VC_CORERESET_Pos 0U
#define | CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

## Detailed Description

Type definitions for the Core Debug Registers.

## Macro Definition Documentation

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [1/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1059 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [2/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1824 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [3/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1981 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [1/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1058 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [2/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1823 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [3/3]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1980 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [1/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1053 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [2/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1818 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [3/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1975 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [1/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1052 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [2/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1817 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [3/3]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1974 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [1/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1062 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [2/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1827 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [3/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1984 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [1/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1061 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [2/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1826 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [3/3]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1983 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [1/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1056 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [2/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1821 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [3/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1978 of file core_armv81mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [1/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1055 of file core_armv8mbl.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [2/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1820 of file core_armv8mml.h.

## ◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [3/3]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1977 of file core_armv81mml.h.

## ◆ CoreDebug_DCRSR_REGSEL_Msk [1/4]

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1039 of file core_armv8mbl.h.

## ◆ CoreDebug_DCRSR_REGSEL_Msk [2/4]

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1687 of file core_cm7.h.

## ◆ CoreDebug_DCRSR_REGSEL_Msk [3/4]

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1774 of file core_armv8mml.h.

## ◆ CoreDebug_DCRSR_REGSEL_Msk [4/4]

#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1931 of file core_armv81mml.h.

## ◆ CoreDebug_DCRSR_REGSEL_Pos [1/4]

#define CoreDebug_DCRSR_REGSEL_Pos 0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1038 of file core_armv8mbl.h.

## ◆ CoreDebug_DCRSR_REGSEL_Pos [2/4]

#define CoreDebug_DCRSR_REGSEL_Pos 0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1686 of file core_cm7.h.

## ◆ CoreDebug_DCRSR_REGSEL_Pos [3/4]

#define CoreDebug_DCRSR_REGSEL_Pos 0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1773 of file core_armv8mml.h.

## ◆ CoreDebug_DCRSR_REGSEL_Pos [4/4]

#define CoreDebug_DCRSR_REGSEL_Pos 0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1930 of file core_armv81mml.h.

## ◆ CoreDebug_DCRSR_REGWnR_Msk [1/4]

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1036 of file core_armv8mbl.h.

## ◆ CoreDebug_DCRSR_REGWnR_Msk [2/4]

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1684 of file core_cm7.h.

## ◆ CoreDebug_DCRSR_REGWnR_Msk [3/4]

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1771 of file core_armv8mml.h.

## ◆ CoreDebug_DCRSR_REGWnR_Msk [4/4]

#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1928 of file core_armv81mml.h.

## ◆ CoreDebug_DCRSR_REGWnR_Pos [1/4]

#define CoreDebug_DCRSR_REGWnR_Pos 16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1035 of file core_armv8mbl.h.

## ◆ CoreDebug_DCRSR_REGWnR_Pos [2/4]

#define CoreDebug_DCRSR_REGWnR_Pos 16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1683 of file core_cm7.h.

## ◆ CoreDebug_DCRSR_REGWnR_Pos [3/4]

#define CoreDebug_DCRSR_REGWnR_Pos 16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1770 of file core_armv8mml.h.

## ◆ CoreDebug_DCRSR_REGWnR_Pos [4/4]

#define CoreDebug_DCRSR_REGWnR_Pos 16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1927 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_DWTENA_Msk

#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos)

CoreDebug DEMCR: DWTENA Mask

Definition at line 1043 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_DWTENA_Pos

#define CoreDebug_DEMCR_DWTENA_Pos 24U

CoreDebug DEMCR: DWTENA Position

Definition at line 1042 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_MON_EN_Msk [1/3]

#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1703 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_EN_Msk [2/3]

#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1790 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_EN_Msk [3/3]

#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1947 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_EN_Pos [1/3]

#define CoreDebug_DEMCR_MON_EN_Pos 16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1702 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_EN_Pos [2/3]

#define CoreDebug_DEMCR_MON_EN_Pos 16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1789 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_EN_Pos [3/3]

#define CoreDebug_DEMCR_MON_EN_Pos 16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1946 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Msk [1/3]

#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1700 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Msk [2/3]

#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1787 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Msk [3/3]

#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1944 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Pos [1/3]

#define CoreDebug_DEMCR_MON_PEND_Pos 17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1699 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Pos [2/3]

#define CoreDebug_DEMCR_MON_PEND_Pos 17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1786 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_PEND_Pos [3/3]

#define CoreDebug_DEMCR_MON_PEND_Pos 17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1943 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Msk [1/3]

#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1694 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Msk [2/3]

#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1781 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Msk [3/3]

#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1938 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Pos [1/3]

#define CoreDebug_DEMCR_MON_REQ_Pos 19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1693 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Pos [2/3]

#define CoreDebug_DEMCR_MON_REQ_Pos 19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1780 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_REQ_Pos [3/3]

#define CoreDebug_DEMCR_MON_REQ_Pos 19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1937 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Msk [1/3]

#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1697 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Msk [2/3]

#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1784 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Msk [3/3]

#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1941 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Pos [1/3]

#define CoreDebug_DEMCR_MON_STEP_Pos 18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1696 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Pos [2/3]

#define CoreDebug_DEMCR_MON_STEP_Pos 18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1783 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_MON_STEP_Pos [3/3]

#define CoreDebug_DEMCR_MON_STEP_Pos 18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1940 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_TRCENA_Msk [1/3]

#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1691 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_TRCENA_Msk [2/3]

#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1778 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_TRCENA_Msk [3/3]

#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1935 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_TRCENA_Pos [1/3]

#define CoreDebug_DEMCR_TRCENA_Pos 24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1690 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_TRCENA_Pos [2/3]

#define CoreDebug_DEMCR_TRCENA_Pos 24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1777 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_TRCENA_Pos [3/3]

#define CoreDebug_DEMCR_TRCENA_Pos 24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1934 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1712 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1799 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1956 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1711 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1798 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_BUSERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1955 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1718 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1805 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1962 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1717 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1804 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_CHKERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1961 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Msk [1/4]

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1049 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Msk [2/4]

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1727 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Msk [3/4]

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1814 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Msk [4/4]

#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1971 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Pos [1/4]

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1048 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Pos [2/4]

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1726 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Pos [3/4]

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1813 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_CORERESET_Pos [4/4]

#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1970 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Msk [1/4]

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1046 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Msk [2/4]

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1706 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Msk [3/4]

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1793 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Msk [4/4]

#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1950 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Pos [1/4]

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1045 of file core_armv8mbl.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Pos [2/4]

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1705 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Pos [3/4]

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1792 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_HARDERR_Pos [4/4]

#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1949 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1709 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1796 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1953 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_INTERR_Pos 9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1708 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_INTERR_Pos 9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1795 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_INTERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_INTERR_Pos 9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1952 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1724 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1811 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1968 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_MMERR_Pos 4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1723 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_MMERR_Pos 4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1810 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_MMERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_MMERR_Pos 4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1967 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1721 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1808 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1965 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1720 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1807 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1964 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Msk [1/3]

#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1715 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Msk [2/3]

#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1802 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Msk [3/3]

#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1959 of file core_armv81mml.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Pos [1/3]

#define CoreDebug_DEMCR_VC_STATERR_Pos 7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1714 of file core_cm7.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Pos [2/3]

#define CoreDebug_DEMCR_VC_STATERR_Pos 7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1801 of file core_armv8mml.h.

## ◆ CoreDebug_DEMCR_VC_STATERR_Pos [3/3]

#define CoreDebug_DEMCR_VC_STATERR_Pos 7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1958 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [1/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1032 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [2/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1680 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [3/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1767 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [4/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1924 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [1/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1031 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [2/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1679 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [3/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1766 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [4/4]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1923 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_HALT_Msk [1/4]

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1029 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_HALT_Msk [2/4]

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1677 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_HALT_Msk [3/4]

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1764 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_HALT_Msk [4/4]

#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1921 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_HALT_Pos [1/4]

#define CoreDebug_DHCSR_C_HALT_Pos 1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1028 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_HALT_Pos [2/4]

#define CoreDebug_DHCSR_C_HALT_Pos 1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1676 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_HALT_Pos [3/4]

#define CoreDebug_DHCSR_C_HALT_Pos 1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1763 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_HALT_Pos [4/4]

#define CoreDebug_DHCSR_C_HALT_Pos 1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1920 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Msk [1/4]

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1023 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Msk [2/4]

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1671 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Msk [3/4]

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1758 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Msk [4/4]

#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1915 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Pos [1/4]

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1022 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Pos [2/4]

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1670 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Pos [3/4]

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1757 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_MASKINTS_Pos [4/4]

#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1914 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [1/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1668 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [2/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1755 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [3/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1912 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [1/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1667 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [2/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1754 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [3/3]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1911 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_STEP_Msk [1/4]

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1026 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_STEP_Msk [2/4]

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1674 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_STEP_Msk [3/4]

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1761 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_STEP_Msk [4/4]

#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1918 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_C_STEP_Pos [1/4]

#define CoreDebug_DHCSR_C_STEP_Pos 2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1025 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_C_STEP_Pos [2/4]

#define CoreDebug_DHCSR_C_STEP_Pos 2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1673 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_C_STEP_Pos [3/4]

#define CoreDebug_DHCSR_C_STEP_Pos 2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1760 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_C_STEP_Pos [4/4]

#define CoreDebug_DHCSR_C_STEP_Pos 2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1917 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Msk [1/4]

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 999 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Msk [2/4]

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1647 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Msk [3/4]

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1731 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Msk [4/4]

#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1888 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Pos [1/4]

#define CoreDebug_DHCSR_DBGKEY_Pos 16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 998 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Pos [2/4]

#define CoreDebug_DHCSR_DBGKEY_Pos 16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1646 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Pos [3/4]

#define CoreDebug_DHCSR_DBGKEY_Pos 16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1730 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_DBGKEY_Pos [4/4]

#define CoreDebug_DHCSR_DBGKEY_Pos 16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1887 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_HALT_Msk [1/4]

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1017 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_HALT_Msk [2/4]

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1662 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_HALT_Msk [3/4]

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1749 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_HALT_Msk [4/4]

#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1906 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_HALT_Pos [1/4]

#define CoreDebug_DHCSR_S_HALT_Pos 17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1016 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_HALT_Pos [2/4]

#define CoreDebug_DHCSR_S_HALT_Pos 17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1661 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_HALT_Pos [3/4]

#define CoreDebug_DHCSR_S_HALT_Pos 17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1748 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_HALT_Pos [4/4]

#define CoreDebug_DHCSR_S_HALT_Pos 17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1905 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Msk [1/4]

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1011 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Msk [2/4]

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1656 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Msk [3/4]

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1743 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Msk [4/4]

#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1900 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Pos [1/4]

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1010 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Pos [2/4]

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1655 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Pos [3/4]

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1742 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_LOCKUP_Pos [4/4]

#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1899 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Msk [1/4]

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1020 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Msk [2/4]

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1665 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Msk [3/4]

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1752 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Msk [4/4]

#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1909 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Pos [1/4]

#define CoreDebug_DHCSR_S_REGRDY_Pos 16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1019 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Pos [2/4]

#define CoreDebug_DHCSR_S_REGRDY_Pos 16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1664 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Pos [3/4]

#define CoreDebug_DHCSR_S_REGRDY_Pos 16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1751 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_REGRDY_Pos [4/4]

#define CoreDebug_DHCSR_S_REGRDY_Pos 16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1908 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Msk [1/4]

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1005 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Msk [2/4]

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1650 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Msk [3/4]

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1737 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Msk [4/4]

#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1894 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Pos [1/4]

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1004 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Pos [2/4]

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1649 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Pos [3/4]

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1736 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RESET_ST_Pos [4/4]

#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1893 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [1/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1002 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [2/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1734 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [3/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1891 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [1/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1001 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [2/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1733 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [3/3]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1890 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [1/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1008 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [2/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1653 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [3/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1740 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [4/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1897 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [1/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1007 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [2/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1652 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [3/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1739 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [4/4]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1896 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Msk [1/4]

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1014 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Msk [2/4]

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1659 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Msk [3/4]

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1746 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Msk [4/4]

#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1903 of file core_armv81mml.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Pos [1/4]

#define CoreDebug_DHCSR_S_SLEEP_Pos 18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1013 of file core_armv8mbl.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Pos [2/4]

#define CoreDebug_DHCSR_S_SLEEP_Pos 18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1658 of file core_cm7.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Pos [3/4]

#define CoreDebug_DHCSR_S_SLEEP_Pos 18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1745 of file core_armv8mml.h.

## ◆ CoreDebug_DHCSR_S_SLEEP_Pos [4/4]

#define CoreDebug_DHCSR_S_SLEEP_Pos 18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1902 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_CDS_Msk [1/3]

#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1066 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_CDS_Msk [2/3]

#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1831 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_CDS_Msk [3/3]

#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1988 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_CDS_Pos [1/3]

#define CoreDebug_DSCSR_CDS_Pos 16U

CoreDebug DSCSR: CDS Position

Definition at line 1065 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_CDS_Pos [2/3]

#define CoreDebug_DSCSR_CDS_Pos 16U

CoreDebug DSCSR: CDS Position

Definition at line 1830 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_CDS_Pos [3/3]

#define CoreDebug_DSCSR_CDS_Pos 16U

CoreDebug DSCSR: CDS Position

Definition at line 1987 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Msk [1/3]

#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1069 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Msk [2/3]

#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1834 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Msk [3/3]

#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1991 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Pos [1/3]

#define CoreDebug_DSCSR_SBRSEL_Pos 1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1068 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Pos [2/3]

#define CoreDebug_DSCSR_SBRSEL_Pos 1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1833 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_SBRSEL_Pos [3/3]

#define CoreDebug_DSCSR_SBRSEL_Pos 1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1990 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Msk [1/3]

#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1072 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Msk [2/3]

#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1837 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Msk [3/3]

#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1994 of file core_armv81mml.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Pos [1/3]

#define CoreDebug_DSCSR_SBRSELEN_Pos 0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1071 of file core_armv8mbl.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Pos [2/3]

#define CoreDebug_DSCSR_SBRSELEN_Pos 0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1836 of file core_armv8mml.h.

## ◆ CoreDebug_DSCSR_SBRSELEN_Pos [3/3]

#define CoreDebug_DSCSR_SBRSELEN_Pos 0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1993 of file core_armv81mml.h.