Callisto4Bootloader: PGC Register Masks

Callisto4Bootloader

PGC Register Masks
Mapping Information » Edma_request » Iomuxc_pads » Device Peripheral Access Layer » PGC Peripheral Access Layer

## MEGA_CTRL - PGC Mega Control Register

#define | PGC_MEGA_CTRL_PCR_MASK (0x1U)
#define | PGC_MEGA_CTRL_PCR_SHIFT (0U)
#define | PGC_MEGA_CTRL_PCR(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)

## MEGA_PUPSCR - PGC Mega Power Up Sequence Control Register

#define | PGC_MEGA_PUPSCR_SW_MASK (0x3FU)
#define | PGC_MEGA_PUPSCR_SW_SHIFT (0U)
#define | PGC_MEGA_PUPSCR_SW(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)
#define | PGC_MEGA_PUPSCR_SW2ISO_MASK (0x3F00U)
#define | PGC_MEGA_PUPSCR_SW2ISO_SHIFT (8U)
#define | PGC_MEGA_PUPSCR_SW2ISO(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)

## MEGA_PDNSCR - PGC Mega Pull Down Sequence Control Register

#define | PGC_MEGA_PDNSCR_ISO_MASK (0x3FU)
#define | PGC_MEGA_PDNSCR_ISO_SHIFT (0U)
#define | PGC_MEGA_PDNSCR_ISO(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)
#define | PGC_MEGA_PDNSCR_ISO2SW_MASK (0x3F00U)
#define | PGC_MEGA_PDNSCR_ISO2SW_SHIFT (8U)
#define | PGC_MEGA_PDNSCR_ISO2SW(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)

## MEGA_SR - PGC Mega Power Gating Controller Status Register

#define | PGC_MEGA_SR_PSR_MASK (0x1U)
#define | PGC_MEGA_SR_PSR_SHIFT (0U)
#define | PGC_MEGA_SR_PSR(x) (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)

## CPU_CTRL - PGC CPU Control Register

#define | PGC_CPU_CTRL_PCR_MASK (0x1U)
#define | PGC_CPU_CTRL_PCR_SHIFT (0U)
#define | PGC_CPU_CTRL_PCR(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)

## CPU_PUPSCR - PGC CPU Power Up Sequence Control Register

#define | PGC_CPU_PUPSCR_SW_MASK (0x3FU)
#define | PGC_CPU_PUPSCR_SW_SHIFT (0U)
#define | PGC_CPU_PUPSCR_SW(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)
#define | PGC_CPU_PUPSCR_SW2ISO_MASK (0x3F00U)
#define | PGC_CPU_PUPSCR_SW2ISO_SHIFT (8U)
#define | PGC_CPU_PUPSCR_SW2ISO(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)

## CPU_PDNSCR - PGC CPU Pull Down Sequence Control Register

#define | PGC_CPU_PDNSCR_ISO_MASK (0x3FU)
#define | PGC_CPU_PDNSCR_ISO_SHIFT (0U)
#define | PGC_CPU_PDNSCR_ISO(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)
#define | PGC_CPU_PDNSCR_ISO2SW_MASK (0x3F00U)
#define | PGC_CPU_PDNSCR_ISO2SW_SHIFT (8U)
#define | PGC_CPU_PDNSCR_ISO2SW(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)

## CPU_SR - PGC CPU Power Gating Controller Status Register

#define | PGC_CPU_SR_PSR_MASK (0x1U)
#define | PGC_CPU_SR_PSR_SHIFT (0U)
#define | PGC_CPU_SR_PSR(x) (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)

## Detailed Description

## Macro Definition Documentation

## ◆ PGC_CPU_CTRL_PCR

#define PGC_CPU_CTRL_PCR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_CTRL_PCR_SHIFT)) & PGC_CPU_CTRL_PCR_MASK)

PCR 0b0..Do not switch off power even if pdn_req is asserted. 0b1..Switch off power when pdn_req is asserted.

Definition at line 30661 of file MIMXRT1062.h.

## ◆ PGC_CPU_CTRL_PCR_MASK

#define PGC_CPU_CTRL_PCR_MASK (0x1U)

Definition at line 30655 of file MIMXRT1062.h.

## ◆ PGC_CPU_CTRL_PCR_SHIFT

#define PGC_CPU_CTRL_PCR_SHIFT (0U)

Definition at line 30656 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO

#define PGC_CPU_PDNSCR_ISO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO_SHIFT)) & PGC_CPU_PDNSCR_ISO_MASK)

Definition at line 30678 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO2SW

#define PGC_CPU_PDNSCR_ISO2SW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PDNSCR_ISO2SW_SHIFT)) & PGC_CPU_PDNSCR_ISO2SW_MASK)

Definition at line 30681 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO2SW_MASK

#define PGC_CPU_PDNSCR_ISO2SW_MASK (0x3F00U)

Definition at line 30679 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO2SW_SHIFT

#define PGC_CPU_PDNSCR_ISO2SW_SHIFT (8U)

Definition at line 30680 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO_MASK

#define PGC_CPU_PDNSCR_ISO_MASK (0x3FU)

Definition at line 30676 of file MIMXRT1062.h.

## ◆ PGC_CPU_PDNSCR_ISO_SHIFT

#define PGC_CPU_PDNSCR_ISO_SHIFT (0U)

Definition at line 30677 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW

#define PGC_CPU_PUPSCR_SW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW_SHIFT)) & PGC_CPU_PUPSCR_SW_MASK)

Definition at line 30668 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW2ISO

#define PGC_CPU_PUPSCR_SW2ISO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_PUPSCR_SW2ISO_SHIFT)) & PGC_CPU_PUPSCR_SW2ISO_MASK)

Definition at line 30671 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW2ISO_MASK

#define PGC_CPU_PUPSCR_SW2ISO_MASK (0x3F00U)

Definition at line 30669 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW2ISO_SHIFT

#define PGC_CPU_PUPSCR_SW2ISO_SHIFT (8U)

Definition at line 30670 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW_MASK

#define PGC_CPU_PUPSCR_SW_MASK (0x3FU)

Definition at line 30666 of file MIMXRT1062.h.

## ◆ PGC_CPU_PUPSCR_SW_SHIFT

#define PGC_CPU_PUPSCR_SW_SHIFT (0U)

Definition at line 30667 of file MIMXRT1062.h.

## ◆ PGC_CPU_SR_PSR

#define PGC_CPU_SR_PSR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_CPU_SR_PSR_SHIFT)) & PGC_CPU_SR_PSR_MASK)

PSR 0b0..The target subsystem was not powered down for the previous power-down request. 0b1..The target subsystem was powered down for the previous power-down request.

Definition at line 30692 of file MIMXRT1062.h.

## ◆ PGC_CPU_SR_PSR_MASK

#define PGC_CPU_SR_PSR_MASK (0x1U)

Definition at line 30686 of file MIMXRT1062.h.

## ◆ PGC_CPU_SR_PSR_SHIFT

#define PGC_CPU_SR_PSR_SHIFT (0U)

Definition at line 30687 of file MIMXRT1062.h.

## ◆ PGC_MEGA_CTRL_PCR

#define PGC_MEGA_CTRL_PCR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_CTRL_PCR_SHIFT)) & PGC_MEGA_CTRL_PCR_MASK)

PCR 0b0..Do not switch off power even if pdn_req is asserted. 0b1..Switch off power when pdn_req is asserted.

Definition at line 30619 of file MIMXRT1062.h.

## ◆ PGC_MEGA_CTRL_PCR_MASK

#define PGC_MEGA_CTRL_PCR_MASK (0x1U)

Definition at line 30613 of file MIMXRT1062.h.

## ◆ PGC_MEGA_CTRL_PCR_SHIFT

#define PGC_MEGA_CTRL_PCR_SHIFT (0U)

Definition at line 30614 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO

#define PGC_MEGA_PDNSCR_ISO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO_SHIFT)) & PGC_MEGA_PDNSCR_ISO_MASK)

Definition at line 30636 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO2SW

#define PGC_MEGA_PDNSCR_ISO2SW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PDNSCR_ISO2SW_SHIFT)) & PGC_MEGA_PDNSCR_ISO2SW_MASK)

Definition at line 30639 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO2SW_MASK

#define PGC_MEGA_PDNSCR_ISO2SW_MASK (0x3F00U)

Definition at line 30637 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO2SW_SHIFT

#define PGC_MEGA_PDNSCR_ISO2SW_SHIFT (8U)

Definition at line 30638 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO_MASK

#define PGC_MEGA_PDNSCR_ISO_MASK (0x3FU)

Definition at line 30634 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PDNSCR_ISO_SHIFT

#define PGC_MEGA_PDNSCR_ISO_SHIFT (0U)

Definition at line 30635 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW

#define PGC_MEGA_PUPSCR_SW | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW_SHIFT)) & PGC_MEGA_PUPSCR_SW_MASK)

Definition at line 30626 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW2ISO

#define PGC_MEGA_PUPSCR_SW2ISO | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_PUPSCR_SW2ISO_SHIFT)) & PGC_MEGA_PUPSCR_SW2ISO_MASK)

Definition at line 30629 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW2ISO_MASK

#define PGC_MEGA_PUPSCR_SW2ISO_MASK (0x3F00U)

Definition at line 30627 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW2ISO_SHIFT

#define PGC_MEGA_PUPSCR_SW2ISO_SHIFT (8U)

Definition at line 30628 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW_MASK

#define PGC_MEGA_PUPSCR_SW_MASK (0x3FU)

Definition at line 30624 of file MIMXRT1062.h.

## ◆ PGC_MEGA_PUPSCR_SW_SHIFT

#define PGC_MEGA_PUPSCR_SW_SHIFT (0U)

Definition at line 30625 of file MIMXRT1062.h.

## ◆ PGC_MEGA_SR_PSR

#define PGC_MEGA_SR_PSR | ( |  | x | ) | (((uint32_t)(((uint32_t)(x)) << PGC_MEGA_SR_PSR_SHIFT)) & PGC_MEGA_SR_PSR_MASK)

PSR 0b0..The target subsystem was not powered down for the previous power-down request. 0b1..The target subsystem was powered down for the previous power-down request.

Definition at line 30650 of file MIMXRT1062.h.

## ◆ PGC_MEGA_SR_PSR_MASK

#define PGC_MEGA_SR_PSR_MASK (0x1U)

Definition at line 30644 of file MIMXRT1062.h.

## ◆ PGC_MEGA_SR_PSR_SHIFT

#define PGC_MEGA_SR_PSR_SHIFT (0U)

Definition at line 30645 of file MIMXRT1062.h.