RESet SYStem.RESet ;Getting Debug port fail hence reduce the clock to 100khz SYStem.JtagClock 100KHz ; use pessimistic values SYStem.Option EnReset OFF SYStem.Option TRST OFF ; Convey power up requests using CoreSight GPR ; based at EAPB:0x00070000 ; ; CPWRUPREQ[5] - A35 ; CPWRUPREQ[6] - M4_0 ; LOCAL &pwrReq IF ARM64() ( PRINT %ERROR "Please use ARM debugger!" ) ;SYStem.CPU None SYStem.CPU CortexM4 SYStem.Option DUALPORT ON SYStem.CONFIG DEBUGPORTTYPE SYStem.MemAccess DAP &pwrReq=(1<<6.) sys.down SYStem.CONFIG APBACCESSPORT 4. sys.mode prepare ;data.set EAPB:0x80070000 %LE %Long &pwrReq IF (&pwrReq!=0x0) ( IF (Data.Long(EAPB:0x80070004)&(&pwrReq))==0x0 ; Check CPWRUPACK[6] for Cortex-M4, CPWRUPACK[5] for Cortex-A35 ( Data.Set EAPB:0x80070000 %LE %Long Data.Long(EAPB:0x80070000)|&pwrReq ; CPWRUPREQ[6] = 1 for CM4 power request, CPWRUPREQ[5] = 1 for CA35 power request WAIT (Data.Long(EAPB:0x80070004)&(&pwrReq))!=0x0 1.s ; Wait for power request acknowledge IF (Data.Long(EAPB:0x80070004)&(&pwrReq))==0x0 ( PRINT %ERROR "CS-GPR: Power Request Timeout" ; ENDDO "FALSE()" ) ) ) ; Wait for power up to complete wait 1.s sys.down ;=================================================================================================== ;EndDO ~~~~/csgpr CPU=imx8-m4-0 ;=================================================================================================== ;DO ~~~~/coresight CPU=imx8-m4-0 IF ARM64() ( PRINT %ERROR "Please use ARM debugger!" ) SYStem.CPU CortexM4 SYStem.CONFIG AXIACCESSPORT 0. SYStem.CONFIG MEMORYACCESSPORT 2. SYStem.CONFIG AHBACCESSPORT 2. SYStem.CONFIG APBACCESSPORT 4. SYStem.CONFIG ETM Base E:0xE0041000 SYStem.CONFIG FUNNEL1 Base E:0xE0043000 SYStem.CONFIG FUNNEL2 Base APB:0x80020000 SYStem.CONFIG TPIU Base SYStem.CONFIG ETR Base APB:0x80040000 ; coresight interconnections SYStem.CONFIG FUNNEL1 ATBSource ETM 0 ITM 1 SYStem.CONFIG FUNNEL2 ATBSource FUNNEL1 1 SYStem.CONFIG ETR ATBSource FUNNEL2 ETM.TimeStampClock 8.MHz ;=================================================================================================== ;EndDO ~~~~/coresight CPU=imx8-m4-0 ; use pessimistic values SYStem.Option EnReset OFF SYStem.Option TRST OFF ;disable all trace components ETM.OFF Trace.DISable SYStem.Mode.Attach IF RUN() Break ; Configure LMEM Parity/ECC Control Register ; ; Note: ECC Multi-bit IRQ should be disabled ; prior to list/dump of locations that ; have not been written to avoid vectoring ; to the NMI ; ; 31:22 RESERVED ; 21 Enable Cache Parity IRQ ; 20 Enable Cache Parity Report ; 19:17 RESERVED ; 16 Enable RAM Parity Reporting ; 15:10 RESERVED ; 9 Enable RAM ECC 1-bit IRQ ; 8 Enable RAM ECC 1-bit Report ; 7:2 RESERVED ; 1 Enable RAM ECC Multi-bit IRQ ; 0 Enable RAM ECC Multi-bit data.set SD:0xE0080480 %LE %Long 0x00300001 ; Load elf file ;LOCAL &load_to ;LOCAL &elf_file ;LOCAL &load_params ;ENTRY &load_to &elf_file &load_params Data.Set A:0x88000000--0x88040000 %Quad 0 ;Data.Load.Elf &elf_file ;Data.Load.Elf "bin\sample_app_mcal.elf" Data.LOAD.Elf "~~~~/../../../../../_builds/&Variant/_bin/m4_ccu_app.elf" ;SYSTEM.OPTION.DISMODE THUMB ;r.s pc Reset_Handler symbol.spath.srd "~~~~/../../../../../" ; Use on-chip breakpoints Break.SELect PROGRAM ONCHIP Break.SELect READ ONCHIP Break.SELect WRITE ONCHIP Break.SELect ALPHA ONCHIP Break.SELect BETA ONCHIP Break.SELect CHARLY ONCHIP Break.SELect DELTA ONCHIP Break.SELect ECHO ONCHIP SYStem.Option EnReset OFF ;do not allow the jtag to reset the target SYS.m attach ; wait until reset is complete break.set Os_Entry_Task_10ms Register.RESet SYStem.Mode Go wait 2.s if run() Break WINPOS 0. 0. 75. 20. Data.List enddo ENDDO