============================================ DDR Stress Test (3.0.0) Build: Dec 14 2018, 14:13:14 NXP Semiconductors. ============================================ ============================================ Chip ID CHIP ID = i.MX6 UltraLite(0x64) Internal Revision = TO1.2 ============================================ ============================================ Boot Configuration SRC_SBMR1(0x020d8004) = 0x00000872 SRC_SBMR2(0x020d801c) = 0x01000041 ============================================ ARM Clock set to 528MHz ============================================ DDR configuration DDR type is DDR3 Data width: 16, bank num: 8 Row size: 15, col size: 10 Chip select CSD0 is used Density per chip select: 512MB ============================================ DDR Stress Test Iteration 1 Current Temperature: 43 ============================================ DDR Freq: 396 MHz t0.1: data is addr test t0: memcpy11 SSN test t1: memcpy8 SSN test t2: byte-wise SSN test t3: memcpy11 random pattern test t4: IRAM_to_DDRv2 test t5: IRAM_to_DDRv1 test t6: read noise walking ones and zeros test DDR Freq: 413 MHz t0.1: data is addr test t0: memcpy11 SSN test t1: memcpy8 SSN test t2: byte-wise SSN test t3: memcpy11 random pattern test t4: IRAM_to_DDRv2 test t5: IRAM_to_DDRv1 test t6: read noise walking ones and zeros test DDR Freq: 432 MHz t0.1: data is addr test t0: memcpy11 SSN test t1: memcpy8 SSN test t2: byte-wise SSN test t3: memcpy11 random pattern test t4: IRAM_to_DDRv2 test t5: IRAM_to_DDRv1 test t6: read noise walking ones and zeros test DDR Freq: 452 MHz t0.1: data is addr test t0: memcpy11 SSN test t1: memcpy8 SSN test t2: byte-wise SSN test t3: memcpy11 random pattern test t4: IRAM_to_DDRv2 test t5: IRAM_to_DDRv1 test t6: read noise walking ones and zeros test Success: DDR Stress test completed!!!