//The example is developed by XiangJun Rong //Development platform:CW10.2 and 56F84789 tower board //The SPI is set up in mster mode, interrupt or DMA mode // //The code use both interrupt and DMA mode //conclusion:connect GPIOC10(pin 22 of J502,MOSI), GPIOC9(pin20 of J502,SCK) //GPIOC7(pin16 of J502),/SS pin, user can see SPI signals. // // /* freescale sample code */ #include #include #include "derivative.h" /* include peripheral declarations */ void DMA_conpleteISR(void); void SPI_Init(void); void DMA_init(); void DMA1_interrupt_init(void); void enable_spi(void); void spi_isr(void); void delay(void); #define DMA_MODE 1 /* this macro attempt to enable watchdog module */ #if defined (COP_CTRL) #define EnableWatchdog \ COP_CTRL |= (0x2); #elif defined ( COPCTL ) #define EnableWatchdog \ COPCTL |= (0x2); #else #define EnableWatchdog \ printf(" no watchdog enable procedure\n"); #endif // #define EnableWatchdog /* this macro attempt to disable watchdog module */ #if defined (COP_CTRL) #define DisableWatchdog \ COP_CTRL &= ~(0x2); #elif defined ( COPCTL ) #define DisableWatchdog \ COPCTL &= ~(0x2); #else #define DisableWatchdog \ printf(" no watchdog disable procedure\n"); #endif // #define DisableWatchdog #define SIZE 16 unsigned int temp; // prototypes unsigned int array[SIZE]={ 0x3355,0x00FF,0x3355,0x00FF,0x3355,0x00FF,0x3355,0x00FF,0x3355,0x00FF,\ 0x3355,0x00FF,0x3355,0x00FF,0x3355,0x00FF }; int main(void) { DisableWatchdog; #if DMA_MODE DMA_init(); DMA1_interrupt_init(); SPI_Init(); INTC_IPR6=0x00; QSPI0_SPDSR|=0x4000; //enable SPI Transmitter DMA QSPI0_SPSCR&=0xFDFF; //clear the SPIRIE bit enable_spi(); #else SPI_Init(); enable_spi(); #endif asm(bfclr #$300,SR); QSPI0_SPDTR=0x3355; for(;;); return(0); } void SPI_Init(void) { //enable SPI0 pin as SPI mode //enable SPI clock SIM_PCE1|=0x0380; //enable all SPI SIM_PCE0=0x007F; //100 package DSC //pin50:GPIOC7/SS0/TXD0 //pin52:GPIOC8/MISO0/RXD0/XB_In9 //pin53:GPIOC9/SCK0/XB_IN4 //pin54:GPIOC10/MOSI0/XB_In5/MISO0 GPIOC_PER=0x0780; //configure GPIOC7~10 as SPI0 pins SIM_GPSCL&=0x3FFF; //clear C7 bit,/SS0 will be SS0 SIM_GPSCH&=0xFFC0; //clear C8/C8/C10 bits, C8 is MISO0,C9 is CLK0/C10 is MOSO0 //enable SPI clock //configure the SPI control reg //set the SPI in master mode, QSPI0_SPSCR=0x8340; //master,MSB,enable Receiver Full interrupt,disable SPI, set CPHA bit QSPI0_SPDSR=0x05CF; //in master mode, the /SS pin can be connected to /SS of slave SPI QSPI0_SPWAIT=0x3FF; INTC_IPR6=0xc0; //set SPI0_Receiver interrupt priority return; } //DMA do the transfer function from memory buffer to SPI transmitter reg void DMA_init() { //initialize the DMA0 //DMA0, 2, SPI0_RF Reciever Full, triggering source //DMA1, 2, SPI0_TE Transmit Empty,triggering source DMA_REQC=0x20000; //set SPI0_TE trigger DMA DMA_SAR1=(long)&array[0]<<1; DMA_DAR1=(long)FQSPI0_SPDTR<<1; DMA_DSR_BCR1=0x04; DMA_DCR1=0x70642000; } void enable_spi(void) { QSPI0_SPSCR|=0x20; return; } void DMA1_interrupt_init(void) { //setting the priority of DMA1 interrupt INTC_IPR3=0x0030; //enable DMA interrupt DMA_DCR1|=0x80000000; } #pragma interrupt saveall void DMA_conpleteISR(void) { //clear interrupt DMA_DSR_BCR1=0x01000000; DMA_DSR_BCR1|=0x4; asm(nop); } #pragma interrupt saveall void spi_isr(void) { //clear interrupt temp=QSPI0_SPDRR; delay(); QSPI0_SPDTR=0x3355; asm(nop); } void delay(void) { unsigned int i; for(i=0;i<1000;i++) { asm(nop); asm(nop); } }