/* Internal FLASH/LSM linker command file for MPC5643L */ /* */ /* 1MB Flash, 128KB SRAM */ /* */ /* Intended to be used for the stationary example project. */ /* This LCF should be used in lockstep projects. */ /* */ /* Note: we use "_p0" suffix on functions and section names to reference */ /* core_0 and "_p1" for functions and section names using the core_1. */ /* */ /* Rev 1.2 - fix FLASH ranges */ /* */ /* VERSION: 1.2 */ _1kB = 0x00000400; _2kB = 0x00000800; _4kB = 0x00001000; _8kB = 0x00002000; _16kB = 0x00004000; _32kB = 0x00008000; _64kB = 0x00010000; _128kB = 0x00020000; __sram_start__ = 0x40000000; MEMORY { /* FLASH: 0x00000000 - 0x000FFFFF */ /* Fixed location required for RCHW and program entry point. Note the 0x0 location is the first address where BAM searches for a valid RCHW. */ resetvector: org = 0x00000000, len = 0x00000100 init: org = 0x00000100, len = 0x00000C00 /* 2.75 kB */ internal_flash: org = 0x00000D00, len = 0x00003200 /* Ends at 16 KB */ stack: org = 0x40000000, len = 0x00000C00 /* 3 kB stack */ internal_ram: org = 0x40000C00, len = 0x00007400 /* 29 kB data */ download: org = 0x40008000, len = 0x0001C000 /* 80 kB for stage2 storage */ high_ram: org = 0x4001C000, len = 0x00004000 /* 16 Kb stage1 copy */ } SECTIONS { GROUP : { .bam LOAD(ADDR(resetvector)) : {} } = 0xFFFF > resetvector .fill_bam LOAD(_e_bam): { *(.fill_bam) . = ADDR(resetvector) + SIZEOF(resetvector); } = 0xFFFF > resetvector GROUP : { .init LOAD(ADDR(init)) : {} .version LOAD(_e_init) : { *(version) } .handlers (TEXT) LOAD(_e_version) ALIGN(0x100) : { __ivpr_base__ = .; *(.handlers) . = ALIGN (0x10); } .ppcstartup (TEXT) LOAD(_e_handlers) : { *(.ppcstartup) . = ALIGN (0x10); } .mmusetup (TEXT) LOAD(_e_ppcstartup) : { *(.mmusetup) . = ALIGN (0x10); } .vectors (TEXT) LOAD(_e_mmusetup) : { *(.vectors) . = ALIGN (0x10); } .asmutils (TEXT) LOAD(_e_vectors) : { *(.asmutils) . = ALIGN (0x10); } .flash_write (TEXT) LOAD(_e_asmutils) : { relocate_to_ram_start = .; *(.flash_write) . = ALIGN (0x10); relocate_to_ram_end = .; } .unused_init LOAD(_e_flash_write): { . = ADDR(init) + SIZEOF(init); } } = 0xFFFF > init GROUP : { .text (TEXT) : {} .rodata (CONST) : { *(.rdata) *(.rodata) } /* .fill_txt : { . = ADDR(internal_flash) + SIZEOF(internal_flash); } */ .ctors : {} .dtors : {} extab : {} extabindex : {} ROM_IMG_START = .; } = 0xFFFF > internal_flash GROUP : { .data : { __data_start__ = .; *(.data) } .sdata : { __sdata_start__ = .; *(.sdata) __sdata_end__ = .; __data_end__ = .; } .sbss : {} .sdata2 : {} .sbss2 : {} .bss : {} ROM_IMG_END = ROMADDR(.bss); } > internal_ram /* calculation of ROM data image size */ ROM_DATASIZE = ROM_IMG_END - ROM_IMG_START ; ROM_FIRST = ADDR(internal_flash); ROM_LAST = ADDR(internal_flash) + SIZEOF(internal_flash); ROM_CALC = ADDR(internal_flash) + SIZEOF(internal_flash) - ROM_DATASIZE; ROM_CALC1 = 0x3ec8; ROM_ZERO = 0x38; ROM_SIZE = SIZEOF(internal_flash); ROM_REMAINING = ROM_LAST - ROM_IMG_END; ROM_3 = (ROM_IMG_END + ADDR(internal_flash)); ROM_4 = (ADDR(internal_flash) + SIZEOF(internal_flash) - ROM_IMG_END); /* gap size needs to be adjusted to reflect ROM data image size */ .unused_internal_flash : { . = ROM_CALC - 0x1000; ROM_FILL = .; }= 0xFFFF > internal_flash } /* ROM_IMG_START 00002d98 __data_start__ 40000c00 __sdata_start__ 40000c34 __sdata_end__ 40000c34 __data_end__ 40000c34 ROM_IMG_END 00002dd0 ROM_DATASIZE 00000038 ROM_FIRST 00000d00 ROM_LAST 00003f00 ROM_CALC 00003ec8 ROM_CALC1 00003ec8 ROM_ZERO 00000038 ROM_SIZE 00003200 ROM_REMAINING 00001130 ROM_3 00003ad0 ROM_4 00001130 ROM_FILL 00005c98 */ FORCEACTIVE { _bootentrypoint, __boot_internal, _boot_address, CRC64, EntryPoint, BL_Size, BuildTime, link_table, Info, _version } /* fill_sections */ /* Freescale CodeWarrior compiler address designations */ __irq_stack_size__ = _1kB; __process_stack_size__ = _2kB; __stacks_total_size__ = __irq_stack_size__ + __process_stack_size__; __initial_stackpointer__= __sram_start__ + __stacks_total_size__; __END_FLASH = 0x100000; reset_entry = __boot_internal; stage2 = 0x00008000; __S2_HEADER = 0x00008000; __s2_vectors = 0x00008100; __APP_HEADER = 0x0001C000; __app_vectors = 0x0001C100; __APP_SIZE__ = 0x000e4000; __low_ram_start__ = __sram_start__; __low_ram_size__ = _128kB; __low_ram_end__ = __low_ram_start__ + __low_ram_size__ - _16kB; __high_ram_size__ = SIZEOF(high_ram); __high_ram_start__ = ADDR(high_ram); __high_ram_end__ = __high_ram_start__ + __high_ram_size__; __romdata_start__ = 0x00000000; __romdata_end__ = 0x00000000; __sdata2_start__ = 0x00000000; __sdata2_end__ = 0x00000000; /* hal = 0x00000038; crc64_table = 0x00000040; */ _stack_addr = ADDR(stack)+SIZEOF(stack); _stack_end = ADDR(stack); /* L2 SRAM Location (used for L2 SRAM initialization) */ /* In DPM mode the RAM is split at two distinct addresses. */ L2SRAM_LOCATION = ADDR(internal_ram); /* How many writes with stmw, 128 bytes each, are needed to cover the whole L2SRAM (used for L2 SRAM initialization) */ L2SRAM_CNT = 0x20000 / 128;