/* -----------------------------------------------------------------------------
  Filename:    drv_par.h
  Description: Toolversion: 02.03.25.01.90.05.57.01.00.00
               
               Serial Number: CBD1900557
               Customer Info: Ningbo Joyson Preh Car Connect Co., Ltd.
                              Package: CBD_Vector_SLP2
                              Micro: MPC5745B
                              Compiler: Gnu 9.2.0
               
               
               Generator Fwk   : GENy 
               Generator Module: GenTool_GenyDriverBase
               
               Configuration   : C:\Data\Users\huo_h1\Documents\NIO_FORCE_VBOX-SVN\30_DevelopLibrary\03_SW\90_Others\CANbedded\NIO_Geny_Force_BTA_CAN_Draft_0_1\NIO_Geny_For_CanMatrix\GENy.gny
               
               ECU: 
                       TargetSystem: Hw_Mpc5700Cpu
                       Compiler:     GNU
                       Derivates:    MPC5746C
               
               Channel "Channel0":
                       Databasefile: C:\Data\Users\huo_h1\Documents\NIO_FORCE_VBOX-SVN\30_DevelopLibrary\03_SW\90_Others\CANbedded\NIO_Geny_Force_BTA_CAN_Draft_0_1\NIO_Geny_For_CanMatrix\NIO_Force_BTA_CAN_draft_2020_9_22.dbc
                       Bussystem:    CAN
                       Manufacturer: Vector
                       Node:         SA

 ----------------------------------------------------------------------------- */
/* -----------------------------------------------------------------------------
  C O P Y R I G H T
 -------------------------------------------------------------------------------
  Copyright (c) 2001-2015 by Vector Informatik GmbH. All rights reserved.
 
  This software is copyright protected and proprietary to Vector Informatik 
  GmbH.
  
  Vector Informatik GmbH grants to you only those rights as set out in the 
  license conditions.
  
  All other rights remain with Vector Informatik GmbH.
 -------------------------------------------------------------------------------
 ----------------------------------------------------------------------------- */

#if !defined(__DRV_PAR_H__)
#define __DRV_PAR_H__

/* -----------------------------------------------------------------------------
    &&&~ Signal Structures
 ----------------------------------------------------------------------------- */

typedef struct _c_SA_01_msgTypeTag
{
  vbittype unused0 : 8;
  vbittype unused1 : 8;
  vbittype unused2 : 4;
  vbittype EmgcCallFlrSts_SA : 2;
  vbittype EmgcCallTrigd_SA : 2;
  vbittype unused3 : 8;
  vbittype unused4 : 8;
  vbittype unused5 : 8;
  vbittype unused6 : 8;
  vbittype unused7 : 8;
} _c_SA_01_msgType;
typedef struct _c_NM_SA_msgTypeTag
{
  vbittype ScrNodId_SA : 8;
  vbittype ResdBit2_SA : 1;
  vbittype PtlNetInfo_SA : 1;
  vbittype ResdBit1_SA : 1;
  vbittype ActvWakeup_SA : 1;
  vbittype NetMngtCoorrSleepRdy_SA : 1;
  vbittype NetMngtCoorn_SA : 2;
  vbittype RepMsgReq_SA : 1;
  vbittype UsrData0_SA : 8;
  vbittype UsrData1_SA : 8;
  vbittype UsrData2_SA : 8;
  vbittype UsrData3_SA : 8;
  vbittype UsrData4_SA : 8;
  vbittype UsrData5_SA : 8;
} _c_NM_SA_msgType;
typedef struct _c_NM_CGW_msgTypeTag
{
  vbittype ScrNodId_CGW : 8;
  vbittype ResdBit2_CGW : 1;
  vbittype PtlNetInfo_CGW : 1;
  vbittype ResdBit1_CGW : 1;
  vbittype ActvWakeup_CGW : 1;
  vbittype NetMngtCoorrSleepRdy_CGW : 1;
  vbittype NetMngtCoorn_CGW : 2;
  vbittype RepMsgReq_CGW : 1;
  vbittype UsrData0_CGW : 8;
  vbittype UsrData1_CGW : 8;
  vbittype UsrData2_CGW : 8;
  vbittype UsrData3_CGW : 8;
  vbittype UsrData4_CGW : 8;
  vbittype UsrData5_CGW : 8;
} _c_NM_CGW_msgType;
typedef struct _c_CGW_03_msgTypeTag
{
  vbittype CGW_03_CRC : 8;
  vbittype CGW_03_MsgCntr : 4;
  vbittype VehState_ASIL : 4;
  vbittype NBSMovReq : 2;
  vbittype VehMode : 4;
  vbittype ComfEna_ASIL : 2;
  vbittype NBSReq : 2;
  vbittype NBSSideDetectionReq : 2;
  vbittype unused0 : 4;
} _c_CGW_03_msgType;
typedef struct _c_SA_PCTOOL_RES_msgTypeTag
{
  vbittype SA_PCTOOL_Res_Byte_0 : 8;
  vbittype SA_PCTOOL_Res_Byte_1 : 8;
  vbittype SA_PCTOOL_Res_Byte_2 : 8;
  vbittype SA_PCTOOL_Res_Byte_3 : 8;
  vbittype SA_PCTOOL_Res_Byte_4 : 8;
  vbittype SA_PCTOOL_Res_Byte_5 : 8;
  vbittype SA_PCTOOL_Res_Byte_6 : 8;
  vbittype SA_PCTOOL_Res_Byte_7 : 8;
} _c_SA_PCTOOL_RES_msgType;
typedef struct _c_PCTOOL_REQ_msgTypeTag
{
  vbittype PCTOOL_Req_Byte_0 : 8;
  vbittype PCTOOL_Req_Byte_1 : 8;
  vbittype PCTOOL_Req_Byte_2 : 8;
  vbittype PCTOOL_Req_Byte_3 : 8;
  vbittype PCTOOL_Req_Byte_4 : 8;
  vbittype PCTOOL_Req_Byte_5 : 8;
  vbittype PCTOOL_Req_Byte_6 : 8;
  vbittype PCTOOL_Req_Byte_7 : 8;
} _c_PCTOOL_REQ_msgType;


/* -----------------------------------------------------------------------------
    &&&~ Signal value names
 ----------------------------------------------------------------------------- */



/* -----------------------------------------------------------------------------
    &&&~ Message Unions
 ----------------------------------------------------------------------------- */

typedef union _c_TxDynamicMsg0_bufTag
{
  vuint8 _c[8];
} _c_TxDynamicMsg0_buf;
typedef union _c_SA_01_bufTag
{
  vuint8 _c[8];
  _c_SA_01_msgType SA_01;
} _c_SA_01_buf;
typedef union _c_NM_SA_bufTag
{
  vuint8 _c[8];
  _c_NM_SA_msgType NM_SA;
} _c_NM_SA_buf;
typedef union _c_NM_CGW_bufTag
{
  vuint8 _c[8];
  _c_NM_CGW_msgType NM_CGW;
} _c_NM_CGW_buf;
typedef union _c_CGW_03_bufTag
{
  vuint8 _c[4];
  _c_CGW_03_msgType CGW_03;
} _c_CGW_03_buf;
typedef union _c_SA_PCTOOL_RES_bufTag
{
  vuint8 _c[8];
  _c_SA_PCTOOL_RES_msgType SA_PCTOOL_RES;
} _c_SA_PCTOOL_RES_buf;
typedef union _c_PCTOOL_REQ_bufTag
{
  vuint8 _c[8];
  _c_PCTOOL_REQ_msgType PCTOOL_REQ;
} _c_PCTOOL_REQ_buf;


/* -----------------------------------------------------------------------------
    &&&~ Message Buffers
 ----------------------------------------------------------------------------- */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_TxDynamicMsg0_buf V_MEMRAM2 TxDynamicMsg0;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_SA_01_buf V_MEMRAM2 SA_01;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_NM_SA_buf V_MEMRAM2 NM_SA;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_NM_CGW_buf V_MEMRAM2 NM_CGW;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_CGW_03_buf V_MEMRAM2 CGW_03;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_SA_PCTOOL_RES_buf V_MEMRAM2 SA_PCTOOL_RES;
/* RAM CATEGORY 2 END */

/* RAM CATEGORY 2 START */
V_MEMRAM0 extern  V_MEMRAM1 _c_PCTOOL_REQ_buf V_MEMRAM2 PCTOOL_REQ;
/* RAM CATEGORY 2 END */




/* begin Fileversion check */
#ifndef SKIP_MAGIC_NUMBER
#ifdef MAGIC_NUMBER
  #if MAGIC_NUMBER != 362388152
      #error "The magic number of the generated file <C:\Data\Users\huo_h1\Documents\NIO_FORCE_VBOX-SVN\30_DevelopLibrary\03_SW\90_Others\CANbedded\NIO_Geny_Force_BTA_CAN_Draft_0_1\NIO_Geny_For_CanMatrix\Generate Files\drv_par.h> is different. Please check time and date of generated files!"
  #endif
#else
  #define MAGIC_NUMBER 362388152
#endif  /* MAGIC_NUMBER */
#endif  /* SKIP_MAGIC_NUMBER */

/* end Fileversion check */

#endif /* __DRV_PAR_H__ */
