/* * Copyright (c) 2015 - 2016 , Freescale Semiconductor, Inc. * Copyright 2016-2018 NXP * All rights reserved. * * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ /* MODULE main */ /* Including needed modules to compile this module/procedure */ #include "Cpu.h" #include "pin_mux.h" #include "ethernet1.h" #include "phy_cfg.h" #include "dmaController1.h" #include "clockMan1.h" volatile int exit_code = 0; /* User includes (#include below this line is not maintained by Processor Expert) */ #include #include #include /* This example is setup to work by default with EVB. To use it with other boards please comment the following line */ #define EVB #ifdef EVB #define GPIO_PORT PTE #define PCC_CLOCK PCC_PORTE_CLOCK #define LED1_RED (1 << 21U) #define LED2_GREEN (1 << 22U) #define LED3_BLUE (1 << 23U) #else #define GPIO_PORT PTC #define PCC_CLOCK PCC_PORTC_CLOCK #define LED1_RED (1 << 0U) #define LED2_GREEN (1 << 1U) #define LED3_BLUE (1 << 2U) #endif #define PTB_PHY_INT (1 << 20U) #define PTC_BTN0 (1 << 12U) #define PTC_BTN1 (1 << 13U) #define PHY_CONFIG1 18U #define PHY_CONFIG1_FWDREM 0x0004U #define PHY_EXTENDED_CTRL_ADDR 17U #define PHY_EXTENDED_CTRL_CONFIG_EN 0x0004U #define PHY_COM_CONFIG 27U #define PHY_COM_CONFIG_WAKE 0x0040U // typedef struct { uint8_t destAddr[6]; uint8_t srcAddr[6]; uint16_t length; uint8_t payload[1500]; } mac_frame_t; uint8_t receivedframebits[1500]; enet_event_t eth_event; uint8_t eth_ring; void delay(volatile int cycles) { /* Delay function - do nothing for a number of cycles */ while(cycles--); } void copyBuff(uint8_t *dest, uint8_t *src, uint32_t len) { uint32_t i; for (i = 0; i < len; i++) { dest[i] = src[i]; } } void rx_callback(uint8_t instance, enet_event_t event, uint8_t ring) { (void)instance; if (event == ENET_RX_EVENT) { enet_buffer_t buff; status_t status; status = ENET_DRV_ReadFrame(INST_ETHERNET1, ring, &buff, NULL); if (status == STATUS_SUCCESS) { mac_frame_t *frame; frame = (mac_frame_t *) buff.data; /* You can process the payload here */ (void)frame->payload; for(int t = 0; t < 1500; t++) { receivedframebits[t] = frame->payload[t]; } /* We successfully received a frame -> turn on LED 2 */ PINS_DRV_ClearPins(GPIO_PORT, (1 << LED1_RED)); PINS_DRV_SetPins(GPIO_PORT, (1 << LED2_GREEN)); ENET_DRV_ProvideRxBuff(INST_ETHERNET1, ring, &buff); } } } // /* Port C IRQ handler */ void portc_Handler(void) { uint32_t flags; static bool loopback; static phy_role_t phyRole = PHY_ROLE_MASTER; uint32_t delay = 1000000U; do { /* wait some time to allow capturing pushing multiple buttons at once */ delay--; } while(delay != 0); flags = PINS_DRV_GetPortIntFlag(PORTC); if ((flags & (PTC_BTN1 | PTC_BTN0)) == (PTC_BTN1 | PTC_BTN0)) { /* both buttons pressed - change master/slave settings */ PHY_SetRole(0, phyRole); phyRole = (phyRole == PHY_ROLE_MASTER) ? (PHY_ROLE_SLAVE) : (PHY_ROLE_MASTER); } else { if ((flags & PTC_BTN1) != 0U) { PHY_Sleep(0); } if ((flags & PTC_BTN0) != 0U) { if (loopback) { PHY_SetLoopback(0, PHY_LOOPBACK_NONE); } else { PHY_SetLoopback(0, PHY_LOOPBACK_INTERNAL); } loopback = !loopback; } } /* Clear interrupt flag */ PINS_DRV_ClearPortIntFlagCmd(PORTC); } /* Link up callback */ void link_up(uint8_t phy) { if (phy == 0U) { PINS_DRV_ClearPins(GPIO_PORT, LED1_RED); PINS_DRV_SetPins(GPIO_PORT, LED2_GREEN); PINS_DRV_ClearPins(GPIO_PORT, LED3_BLUE); } } /* Link down callback */ void link_down(uint8_t phy) { if (phy == 0U) { PINS_DRV_SetPins(GPIO_PORT, LED1_RED); PINS_DRV_ClearPins(GPIO_PORT, LED2_GREEN); PINS_DRV_ClearPins(GPIO_PORT, LED3_BLUE); } } /*! \brief The main function for the project. \details The startup initialization sequence is the following: * - startup asm routine * - main() */ int main(void) { /* Write your local variable definition here */ /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/ #ifdef PEX_RTOS_INIT PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */ #endif /*** End of Processor Expert internal initialization. ***/ /* Initialize and configure clocks * - see clock manager component for details */ CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT); CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT); /* Output Buffer Enable for ENET MII clock in internal loopback mode */ SIM->MISCTRL0 |= SIM_MISCTRL0_RMII_CLK_OBE_MASK; /* Initialize pins * - See PinSettings component for more info */ PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr); /* Turn off LEDs */ PINS_DRV_ClearPins(GPIO_PORT, LED1_RED); PINS_DRV_ClearPins(GPIO_PORT, LED2_GREEN); PINS_DRV_ClearPins(GPIO_PORT, LED3_BLUE); /* Disable MPU */ MPU->CESR = 0x00815200; /* Initialize ENET instance */ ENET_DRV_Init(INST_ETHERNET1, ðernet1_State, ðernet1_InitConfig0, ethernet1_buffConfigArr0, ethernet1_MacAddr); ENET_DRV_EnableMDIO(INST_ETHERNET1, false); // run Vdd at 3.3V for TJA1101 // uint16_t regVal; // ENET_DRV_MDIORead(INST_ETHERNET1, 0, 17, ®Val, 65536); // regVal |= 0x4; // ENET_DRV_MDIOWrite(INST_ETHERNET1, 0, 17, regVal, 65536); // // regVal = 0; // ENET_DRV_MDIORead(INST_ETHERNET1, 0, 18, ®Val, 65536); // ENET_DRV_MDIOWrite(INST_ETHERNET1, 0, 18, 0xDA11, 65536); // regVal = 0; // ENET_DRV_MDIORead(INST_ETHERNET1, 0, 18, ®Val, 65536); // PINS_DRV_SetPins(GPIO_PORT, LED1_RED); PHY_FrameworkInit(phyConfig, phyDrivers); PHY_Init(0); /* make custom settings */ PHY_RMR(0, PHY_EXTENDED_CTRL_ADDR, PHY_EXTENDED_CTRL_CONFIG_EN, PHY_EXTENDED_CTRL_CONFIG_EN); PHY_RMR(0, PHY_CONFIG1, PHY_CONFIG1_FWDREM, PHY_CONFIG1_FWDREM); PHY_RMR(0, PHY_COM_CONFIG, PHY_COM_CONFIG_WAKE, PHY_COM_CONFIG_WAKE); /* ratio metric threshold on wake pin */ PHY_RMR(0, PHY_EXTENDED_CTRL_ADDR, 0, PHY_EXTENDED_CTRL_CONFIG_EN); INT_SYS_InstallHandler(PORTC_IRQn, portc_Handler, (isr_t *)0); INT_SYS_EnableIRQ(PORTC_IRQn); uint8_t j = 0; // while (1) { // PHY_MainFunction(0); // // static uint16_t extCtrl = 0; // PHY_Read(0, PHY_EXTENDED_CTRL_ADDR, &extCtrl); // if (extCtrl == 0xD000U) // { // /* sleep mode */ // PINS_DRV_ClearPins(GPIO_PORT, LED1_RED); // PINS_DRV_ClearPins(GPIO_PORT, LED2_GREEN); // PINS_DRV_SetPins(GPIO_PORT, LED3_BLUE); // } // // OSIF_TimeDelay(10); rx_callback(INST_ETHERNET1, eth_event, eth_ring); delay(70000); if(receivedframebits[j] != NULL) { PINS_DRV_SetPins(GPIO_PORT, LED3_BLUE); PINS_DRV_ClearPins(GPIO_PORT, LED2_GREEN); PINS_DRV_ClearPins(GPIO_PORT, LED1_RED); delay(70000); } if(j == 50) { j = 0; PINS_DRV_ClearPins(GPIO_PORT, LED1_RED); PINS_DRV_ClearPins(GPIO_PORT, LED3_BLUE); PINS_DRV_SetPins(GPIO_PORT, LED2_GREEN); } else { PINS_DRV_SetPins(GPIO_PORT, LED1_RED); PINS_DRV_ClearPins(GPIO_PORT, LED3_BLUE); PINS_DRV_ClearPins(GPIO_PORT, LED2_GREEN); j++; } } /*** Don't write any code pass this line, or it will be deleted during code generation. ***/ /*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/ #ifdef PEX_RTOS_START PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */ #endif /*** End of RTOS startup code. ***/ /*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/ for(;;) { if(exit_code != 0) { break; } } return exit_code; /*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/ } /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/ /* END main */ /*! ** @} */ /* ** ################################################################### ** ** This file was created by Processor Expert 10.1 [05.21] ** for the Freescale S32K series of microcontrollers. ** ** ################################################################### */