/*
 * Copyright 2018 NXP
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted provided that the following conditions are met:
 *
 * o Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * o Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * o Neither the name of the copyright holder nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/**
*
* \file nxp_sja1124_registers.h
*
* \author NXP
*
* \brief Register map for the SJA1124
*
*****************************************************************************/

#ifndef NXP_SJA1124_REGISTERS_H
#define NXP_SJA1124_REGISTERS_H

/******************************************************************************
* INCLUDES
*****************************************************************************/

/******************************************************************************
* DEFINES
*****************************************************************************/

/* register addresses */

/* register MODE */
#define SJA1124_MODE_ADDR       (0x00u)

/* register PLLCFG */
#define SJA1124_PLLCFG_ADDR     (0x01u)

/* register INT1EN */
#define SJA1124_INT1EN_ADDR     (0x02u)

/* register INT2EN */
#define SJA1124_INT2EN_ADDR     (0x03u)

/* register INT3EN */
#define SJA1124_INT3EN_ADDR     (0x04u)

/* register INT1 */
#define SJA1124_INT1_ADDR       (0x10u)

/* register INT2 */
#define SJA1124_INT2_ADDR       (0x11u)

/* register INT3 */
#define SJA1124_INT3_ADDR       (0x12u)

/* register STATUS */
#define SJA1124_STATUS_ADDR     (0x13u)

/* register LCOM1 */
#define SJA1124_LCOM1_ADDR      (0x20u)

/* register LCOM2 */
#define SJA1124_LCOM2_ADDR      (0x21u)

/* register LIN1CFG1 */
#define SJA1124_LIN1CFG1_ADDR   (0x30u)

/* register LIN1CFG2 */
#define SJA1124_LIN1CFG2_ADDR   (0x31u)

/* register LIN1ITC */
#define SJA1124_LIN1ITC_ADDR    (0x32u)

/* register LIN1GC */
#define SJA1124_LIN1GC_ADDR     (0x33u)

/* register LIN1RTC */
#define SJA1124_LIN1RTC_ADDR    (0x34u)

/* register LIN1FR */
#define SJA1124_LIN1FR_ADDR     (0x35u)

/* register LIN1BRM */
#define SJA1124_LIN1BRM_ADDR    (0x36u)

/* register LIN1BRL */
#define SJA1124_LIN1BRL_ADDR    (0x37u)

/* register LIN1IE */
#define SJA1124_LIN1IE_ADDR     (0x38u)

/* register LIN1C */
#define SJA1124_LIN1C_ADDR      (0x39u)

/* register LIN1BI */
#define SJA1124_LIN1BI_ADDR     (0x3Au)

/* register LIN1BC */
#define SJA1124_LIN1BC_ADDR     (0x3Bu)

/* register LIN1CF */
#define SJA1124_LIN1CF_ADDR     (0x3Cu)

/* register LIN1BD1 */
#define SJA1124_LIN1BD1_ADDR    (0x3Du)

/* register LIN1BD2 */
#define SJA1124_LIN1BD2_ADDR    (0x3Eu)

/* register LIN1BD3 */
#define SJA1124_LIN1BD3_ADDR    (0x3Fu)

/* register LIN1BD4 */
#define SJA1124_LIN1BD4_ADDR    (0x40u)

/* register LIN1BD5 */
#define SJA1124_LIN1BD5_ADDR    (0x41u)

/* register LIN1BD6 */
#define SJA1124_LIN1BD6_ADDR    (0x42u)

/* register LIN1BD7 */
#define SJA1124_LIN1BD7_ADDR    (0x43u)

/* register LIN1BD8 */
#define SJA1124_LIN1BD8_ADDR    (0x44u)

/* register LIN1STATE */
#define SJA1124_LIN1STATE_ADDR  (0x4Fu)

/* register LIN1ES */
#define SJA1124_LIN1ES_ADDR     (0x50u)

/* register LIN1S */
#define SJA1124_LIN1S_ADDR      (0x51u)

/* register LIN1CFS */
#define SJA1124_LIN1CFS_ADDR    (0x52u)

/* register LIN1BD1S */
#define SJA1124_LIN1BD1S_ADDR   (0x53u)

/* register LIN1BD2S */
#define SJA1124_LIN1BD2S_ADDR   (0x54u)

/* register LIN1BD3S */
#define SJA1124_LIN1BD3S_ADDR   (0x55u)

/* register LIN1BD4S */
#define SJA1124_LIN1BD4S_ADDR   (0x56u)

/* register LIN1BD5S */
#define SJA1124_LIN1BD5S_ADDR   (0x57u)

/* register LIN1BD6S */
#define SJA1124_LIN1BD6S_ADDR   (0x58u)

/* register LIN1BD7S */
#define SJA1124_LIN1BD7S_ADDR   (0x59u)

/* register LIN1BD8S */
#define SJA1124_LIN1BD8S_ADDR   (0x5Au)

/* register LIN2CFG1 */
#define SJA1124_LIN2CFG1_ADDR   (0x60u)

/* register LIN2CFG2 */
#define SJA1124_LIN2CFG2_ADDR   (0x61u)

/* register LIN2ITC */
#define SJA1124_LIN2ITC_ADDR    (0x62u)

/* register LIN2GC */
#define SJA1124_LIN2GC_ADDR     (0x63u)

/* register LIN2RTC */
#define SJA1124_LIN2RTC_ADDR    (0x64u)

/* register LIN2FR */
#define SJA1124_LIN2FR_ADDR     (0x65u)

/* register LIN2BRM */
#define SJA1124_LIN2BRM_ADDR    (0x66u)

/* register LIN2BRL */
#define SJA1124_LIN2BRL_ADDR    (0x67u)

/* register LIN2IE */
#define SJA1124_LIN2IE_ADDR     (0x68u)

/* register LIN2C */
#define SJA1124_LIN2C_ADDR      (0x69u)

/* register LIN2BI */
#define SJA1124_LIN2BI_ADDR     (0x6Au)

/* register LIN2BC */
#define SJA1124_LIN2BC_ADDR     (0x6Bu)

/* register LIN2CF */
#define SJA1124_LIN2CF_ADDR     (0x6Cu)

/* register LIN2BD1 */
#define SJA1124_LIN2BD1_ADDR    (0x6Du)

/* register LIN2BD2 */
#define SJA1124_LIN2BD2_ADDR    (0x6Eu)

/* register LIN2BD3 */
#define SJA1124_LIN2BD3_ADDR    (0x6Fu)

/* register LIN2BD4 */
#define SJA1124_LIN2BD4_ADDR    (0x70u)

/* register LIN2BD5 */
#define SJA1124_LIN2BD5_ADDR    (0x71u)

/* register LIN2BD6 */
#define SJA1124_LIN2BD6_ADDR    (0x72u)

/* register LIN2BD7 */
#define SJA1124_LIN2BD7_ADDR    (0x73u)

/* register LIN2BD8 */
#define SJA1124_LIN2BD8_ADDR    (0x74u)

/* register LIN2STATE */
#define SJA1124_LIN2STATE_ADDR  (0x7Fu)

/* register LIN2ES */
#define SJA1124_LIN2ES_ADDR     (0x80u)

/* register LIN2S */
#define SJA1124_LIN2S_ADDR      (0x81u)

/* register LIN2CFS */
#define SJA1124_LIN2CFS_ADDR    (0x82u)

/* register LIN2BD1S */
#define SJA1124_LIN2BD1S_ADDR   (0x83u)

/* register LIN2BD2S */
#define SJA1124_LIN2BD2S_ADDR   (0x84u)

/* register LIN2BD3S */
#define SJA1124_LIN2BD3S_ADDR   (0x85u)

/* register LIN2BD4S */
#define SJA1124_LIN2BD4S_ADDR   (0x86u)

/* register LIN2BD5S */
#define SJA1124_LIN2BD5S_ADDR   (0x87u)

/* register LIN2BD6S */
#define SJA1124_LIN2BD6S_ADDR   (0x88u)

/* register LIN2BD7S */
#define SJA1124_LIN2BD7S_ADDR   (0x89u)

/* register LIN2BD8S */
#define SJA1124_LIN2BD8S_ADDR   (0x8Au)

/* register LIN3CFG1 */
#define SJA1124_LIN3CFG1_ADDR   (0x90u)

/* register LIN3CFG2 */
#define SJA1124_LIN3CFG2_ADDR   (0x91u)

/* register LIN3ITC */
#define SJA1124_LIN3ITC_ADDR    (0x92u)

/* register LIN3GC */
#define SJA1124_LIN3GC_ADDR     (0x93u)

/* register LIN3RTC */
#define SJA1124_LIN3RTC_ADDR    (0x94u)

/* register LIN3FR */
#define SJA1124_LIN3FR_ADDR     (0x95u)

/* register LIN3BRM */
#define SJA1124_LIN3BRM_ADDR    (0x96u)

/* register LIN3BRL */
#define SJA1124_LIN3BRL_ADDR    (0x97u)

/* register LIN3IE */
#define SJA1124_LIN3IE_ADDR     (0x98u)

/* register LIN3C */
#define SJA1124_LIN3C_ADDR      (0x99u)

/* register LIN3BI */
#define SJA1124_LIN3BI_ADDR     (0x9Au)

/* register LIN3BC */
#define SJA1124_LIN3BC_ADDR     (0x9Bu)

/* register LIN3CF */
#define SJA1124_LIN3CF_ADDR     (0x9Cu)

/* register LIN3BD1 */
#define SJA1124_LIN3BD1_ADDR    (0x9Du)

/* register LIN3BD2 */
#define SJA1124_LIN3BD2_ADDR    (0x9Eu)

/* register LIN3BD3 */
#define SJA1124_LIN3BD3_ADDR    (0x9Fu)

/* register LIN3BD4 */
#define SJA1124_LIN3BD4_ADDR    (0xA0u)

/* register LIN3BD5 */
#define SJA1124_LIN3BD5_ADDR    (0xA1u)

/* register LIN3BD6 */
#define SJA1124_LIN3BD6_ADDR    (0xA2u)

/* register LIN3BD7 */
#define SJA1124_LIN3BD7_ADDR    (0xA3u)

/* register LIN3BD8 */
#define SJA1124_LIN3BD8_ADDR    (0xA4u)

/* register LIN3STATE */
#define SJA1124_LIN3STATE_ADDR  (0xAFu)

/* register LIN3ES */
#define SJA1124_LIN3ES_ADDR     (0xB0u)

/* register LIN3S */
#define SJA1124_LIN3S_ADDR      (0xB1u)

/* register LIN3CFS */
#define SJA1124_LIN3CFS_ADDR    (0xB2u)

/* register LIN3BD1S */
#define SJA1124_LIN3BD1S_ADDR   (0xB3u)

/* register LIN3BD2S */
#define SJA1124_LIN3BD2S_ADDR   (0xB4u)

/* register LIN3BD3S */
#define SJA1124_LIN3BD3S_ADDR   (0xB5u)

/* register LIN3BD4S */
#define SJA1124_LIN3BD4S_ADDR   (0xB6u)

/* register LIN3BD5S */
#define SJA1124_LIN3BD5S_ADDR   (0xB7u)

/* register LIN3BD6S */
#define SJA1124_LIN3BD6S_ADDR   (0xB8u)

/* register LIN3BD7S */
#define SJA1124_LIN3BD7S_ADDR   (0xB9u)

/* register LIN3BD8S */
#define SJA1124_LIN3BD8S_ADDR   (0xBAu)

/* register LIN4CFG1 */
#define SJA1124_LIN4CFG1_ADDR   (0xC0u)

/* register LIN4CFG2 */
#define SJA1124_LIN4CFG2_ADDR   (0xC1u)

/* register LIN4ITC */
#define SJA1124_LIN4ITC_ADDR    (0xC2u)

/* register LIN4GC */
#define SJA1124_LIN4GC_ADDR     (0xC3u)

/* register LIN4RTC */
#define SJA1124_LIN4RTC_ADDR    (0xC4u)

/* register LIN4FR */
#define SJA1124_LIN4FR_ADDR     (0xC5u)

/* register LIN4BRM */
#define SJA1124_LIN4BRM_ADDR    (0xC6u)

/* register LIN4BRL */
#define SJA1124_LIN4BRL_ADDR    (0xC7u)

/* register LIN4IE */
#define SJA1124_LIN4IE_ADDR     (0xC8u)

/* register LIN4C */
#define SJA1124_LIN4C_ADDR      (0xC9u)

/* register LIN4BI */
#define SJA1124_LIN4BI_ADDR     (0xCAu)

/* register LIN4BC */
#define SJA1124_LIN4BC_ADDR     (0xCBu)

/* register LIN4CF */
#define SJA1124_LIN4CF_ADDR     (0xCCu)

/* register LIN4BD1 */
#define SJA1124_LIN4BD1_ADDR    (0xCDu)

/* register LIN4BD2 */
#define SJA1124_LIN4BD2_ADDR    (0xCEu)

/* register LIN4BD3 */
#define SJA1124_LIN4BD3_ADDR    (0xCFu)

/* register LIN4BD4 */
#define SJA1124_LIN4BD4_ADDR    (0xD0u)

/* register LIN4BD5 */
#define SJA1124_LIN4BD5_ADDR    (0xD1u)

/* register LIN4BD6 */
#define SJA1124_LIN4BD6_ADDR    (0xD2u)

/* register LIN4BD7 */
#define SJA1124_LIN4BD7_ADDR    (0xD3u)

/* register LIN4BD8 */
#define SJA1124_LIN4BD8_ADDR    (0xD4u)

/* register LIN4STATE */
#define SJA1124_LIN4STATE_ADDR  (0xDFu)

/* register LIN4ES */
#define SJA1124_LIN4ES_ADDR     (0xE0u)

/* register LIN4S */
#define SJA1124_LIN4S_ADDR      (0xE1u)

/* register LIN4CFS */
#define SJA1124_LIN4CFS_ADDR    (0xE2u)

/* register LIN4BD1S */
#define SJA1124_LIN4BD1S_ADDR   (0xE3u)

/* register LIN4BD2S */
#define SJA1124_LIN4BD2S_ADDR   (0xE4u)

/* register LIN4BD3S */
#define SJA1124_LIN4BD3S_ADDR   (0xE5u)

/* register LIN4BD4S */
#define SJA1124_LIN4BD4S_ADDR   (0xE6u)

/* register LIN4BD5S */
#define SJA1124_LIN4BD5S_ADDR   (0xE7u)

/* register LIN4BD6S */
#define SJA1124_LIN4BD6S_ADDR   (0xE8u)

/* register LIN4BD7S */
#define SJA1124_LIN4BD7S_ADDR   (0xE9u)

/* register LIN4BD8S */
#define SJA1124_LIN4BD8S_ADDR   (0xEAu)

/* register MCFG */
#define SJA1124_MCFG_ADDR       (0xF0u)

/* register MMTPS */
#define SJA1124_MMTPS_ADDR      (0xF1u)

/* register MCFGCRC */
#define SJA1124_MCFGCRC_ADDR    (0xF2u)

/* register MTPCS */
#define SJA1124_MTPCS_ADDR      (0xFEu)

/* register ID */
#define SJA1124_ID_ADDR         (0xFFu)

/* variable masks */

/* register MODE */
#define SJA1124_MODE_RESET_SHIFT            (7)
#define SJA1124_MODE_RESET_MASK             (0x80u)
#define SJA1124_MODE_LOWPWRMODE_SHIFT       (0)
#define SJA1124_MODE_LOWPWRMODE_MASK        (0x01u)

/* register PLLCFG */
#define SJA1124_PLLCFG_PLLMULT_SHIFT        (0)
#define SJA1124_PLLCFG_PLLMULT_MASK         (0x0Fu)

/* register INT1EN */
#define SJA1124_INT1EN_L4WKUPIEN_SHIFT      (3)
#define SJA1124_INT1EN_L4WKUPIEN_MASK       (0x08u)
#define SJA1124_INT1EN_L3WKUPIEN_SHIFT      (2)
#define SJA1124_INT1EN_L3WKUPIEN_MASK       (0x04u)
#define SJA1124_INT1EN_L2WKUPIEN_SHIFT      (1)
#define SJA1124_INT1EN_L2WKUPIEN_MASK       (0x02u)
#define SJA1124_INT1EN_L1WKUPIEN_SHIFT      (0)
#define SJA1124_INT1EN_L1WKUPIEN_MASK       (0x01u)

/* register INT2EN */
#define SJA1124_INT2EN_OVERTMPWARNIEN_SHIFT (5)
#define SJA1124_INT2EN_OVERTMPWARNIEN_MASK  (0x20u)
#define SJA1124_INT2EN_PLLNOLOCKIEN_SHIFT   (4)
#define SJA1124_INT2EN_PLLNOLOCKIEN_MASK    (0x10u)
#define SJA1124_INT2EN_PLLINLOCKIEN_SHIFT   (3)
#define SJA1124_INT2EN_PLLINLOCKIEN_MASK    (0x08u)
#define SJA1124_INT2EN_PLLFRQFAILIEN_SHIFT  (2)
#define SJA1124_INT2EN_PLLFRQFAILIEN_MASK   (0x04u)
#define SJA1124_INT2EN_SPIERRIEN_SHIFT      (1)
#define SJA1124_INT2EN_SPIERRIEN_MASK       (0x02u)

/* register INT3EN */
#define SJA1124_INT3EN_L4CONTERRIEN_SHIFT   (7)
#define SJA1124_INT3EN_L4CONTERRIEN_MASK    (0x80u)
#define SJA1124_INT3EN_L3CONTERRIEN_SHIFT   (6)
#define SJA1124_INT3EN_L3CONTERRIEN_MASK    (0x40u)
#define SJA1124_INT3EN_L2CONTERRIEN_SHIFT   (5)
#define SJA1124_INT3EN_L2CONTERRIEN_MASK    (0x20u)
#define SJA1124_INT3EN_L1CONTERRIEN_SHIFT   (4)
#define SJA1124_INT3EN_L1CONTERRIEN_MASK    (0x10u)
#define SJA1124_INT3EN_L4CONTSTATIEN_SHIFT  (3)
#define SJA1124_INT3EN_L4CONTSTATIEN_MASK   (0x08u)
#define SJA1124_INT3EN_L3CONTSTATIEN_SHIFT  (2)
#define SJA1124_INT3EN_L3CONTSTATIEN_MASK   (0x04u)
#define SJA1124_INT3EN_L2CONTSTATIEN_SHIFT  (1)
#define SJA1124_INT3EN_L2CONTSTATIEN_MASK   (0x02u)
#define SJA1124_INT3EN_L1CONTSTATIEN_SHIFT  (0)
#define SJA1124_INT3EN_L1CONTSTATIEN_MASK   (0x01u)

/* register INT1 */
#define SJA1124_INT1_INITSTATINT_SHIFT      (7)
#define SJA1124_INT1_INITSTATINT_MASK       (0x80u)
#define SJA1124_INT1_L4WAKEUPINT_SHIFT      (3)
#define SJA1124_INT1_L4WAKEUPINT_MASK       (0x08u)
#define SJA1124_INT1_L3WAKEUPINT_SHIFT      (2)
#define SJA1124_INT1_L3WAKEUPINT_MASK       (0x04u)
#define SJA1124_INT1_L2WAKEUPINT_SHIFT      (1)
#define SJA1124_INT1_L2WAKEUPINT_MASK       (0x02u)
#define SJA1124_INT1_L1WAKEUPINT_SHIFT      (0)
#define SJA1124_INT1_L1WAKEUPINT_MASK       (0x01u)

/* register INT2 */
#define SJA1124_INT2_OVERTMPWARNINT_SHIFT   (5)
#define SJA1124_INT2_OVERTMPWARNINT_MASK    (0x20u)
#define SJA1124_INT2_PLLNOLOCKINT_SHIFT     (4)
#define SJA1124_INT2_PLLNOLOCKINT_MASK      (0x10u)
#define SJA1124_INT2_PLLINLOCKINT_SHIFT     (3)
#define SJA1124_INT2_PLLINLOCKINT_MASK      (0x08u)
#define SJA1124_INT2_PLLFRQFAILINT_SHIFT    (2)
#define SJA1124_INT2_PLLFRQFAILINT_MASK     (0x04u)
#define SJA1124_INT2_SPIERRINT_SHIFT        (1)
#define SJA1124_INT2_SPIERRINT_MASK         (0x02u)
#define SJA1124_INT2_LOWPWRREQFAILINT_SHIFT (0)
#define SJA1124_INT2_LOWPWRREQFAILINT_MASK  (0x01u)

/* register INT3 */
#define SJA1124_INT3_L4CONTERRINT_SHIFT     (7)
#define SJA1124_INT3_L4CONTERRINT_MASK      (0x80u)
#define SJA1124_INT3_L3CONTERRINT_SHIFT     (6)
#define SJA1124_INT3_L3CONTERRINT_MASK      (0x40u)
#define SJA1124_INT3_L2CONTERRINT_SHIFT     (5)
#define SJA1124_INT3_L2CONTERRINT_MASK      (0x20u)
#define SJA1124_INT3_L1CONTERRINT_SHIFT     (4)
#define SJA1124_INT3_L1CONTERRINT_MASK      (0x10u)
#define SJA1124_INT3_L4CONTSTATINT_SHIFT    (3)
#define SJA1124_INT3_L4CONTSTATINT_MASK     (0x08u)
#define SJA1124_INT3_L3CONTSTATINT_SHIFT    (2)
#define SJA1124_INT3_L3CONTSTATINT_MASK     (0x04u)
#define SJA1124_INT3_L2CONTSTATINT_SHIFT    (1)
#define SJA1124_INT3_L2CONTSTATINT_MASK     (0x02u)
#define SJA1124_INT3_L1CONTSTATINT_SHIFT    (0)
#define SJA1124_INT3_L1CONTSTATINT_MASK     (0x01u)

/* register STATUS */
#define SJA1124_STATUS_OVERTMPWARN_SHIFT    (5)
#define SJA1124_STATUS_OVERTMPWARN_MASK     (0x20u)
#define SJA1124_STATUS_PLLINLOCK_SHIFT      (3)
#define SJA1124_STATUS_PLLINLOCK_MASK       (0x08u)
#define SJA1124_STATUS_PLLINFRQFAIL_SHIFT   (2)
#define SJA1124_STATUS_PLLINFRQFAIL_MASK    (0x04u)

/* register LCOM1 */
#define SJA1124_LCOM1_L4HSMODE_SHIFT        (7)
#define SJA1124_LCOM1_L4HSMODE_MASK         (0x80u)
#define SJA1124_LCOM1_L3HSMODE_SHIFT        (6)
#define SJA1124_LCOM1_L3HSMODE_MASK         (0x40u)
#define SJA1124_LCOM1_L2HSMODE_SHIFT        (5)
#define SJA1124_LCOM1_L2HSMODE_MASK         (0x20u)
#define SJA1124_LCOM1_L1HSMODE_SHIFT        (4)
#define SJA1124_LCOM1_L1HSMODE_MASK         (0x10u)
#define SJA1124_LCOM1_L4TRANSFRAMEIN_SHIFT  (3)
#define SJA1124_LCOM1_L4TRANSFRAMEIN_MASK   (0x08u)
#define SJA1124_LCOM1_L3TRANSFRAMEIN_SHIFT  (2)
#define SJA1124_LCOM1_L3TRANSFRAMEIN_MASK   (0x04u)
#define SJA1124_LCOM1_L2TRANSFRAMEIN_SHIFT  (1)
#define SJA1124_LCOM1_L2TRANSFRAMEIN_MASK   (0x02u)
#define SJA1124_LCOM1_L1TRANSFRAMEIN_SHIFT  (0)
#define SJA1124_LCOM1_L1TRANSFRAMEIN_MASK   (0x01u)

/* register LCOM2 */
#define SJA1124_LCOM2_L4HEADTRANSREQ_SHIFT  (3)
#define SJA1124_LCOM2_L4HEADTRANSREQ_MASK   (0x08u)
#define SJA1124_LCOM2_L3HEADTRANSREQ_SHIFT  (2)
#define SJA1124_LCOM2_L3HEADTRANSREQ_MASK   (0x04u)
#define SJA1124_LCOM2_L2HEADTRANSREQ_SHIFT  (1)
#define SJA1124_LCOM2_L2HEADTRANSREQ_MASK   (0x02u)
#define SJA1124_LCOM2_L1HEADTRANSREQ_SHIFT  (0)
#define SJA1124_LCOM2_L1HEADTRANSREQ_MASK   (0x01u)

/* register LIN1CFG1 */
#define SJA1124_LIN1CFG1_CSCALCDIS_SHIFT    (7)
#define SJA1124_LIN1CFG1_CSCALCDIS_MASK     (0x80u)
#define SJA1124_LIN1CFG1_MASBREAKLEN_SHIFT  (3)
#define SJA1124_LIN1CFG1_MASBREAKLEN_MASK   (0x78u)
#define SJA1124_LIN1CFG1_SLEEP_SHIFT        (1)
#define SJA1124_LIN1CFG1_SLEEP_MASK         (0x02u)
#define SJA1124_LIN1CFG1_INIT_SHIFT         (0)
#define SJA1124_LIN1CFG1_INIT_MASK          (0x01u)

/* register LIN1CFG2 */
#define SJA1124_LIN1CFG2_TWOBITDELIM_SHIFT  (7)
#define SJA1124_LIN1CFG2_TWOBITDELIM_MASK   (0x80u)
#define SJA1124_LIN1CFG2_IDLEONBITERR_SHIFT (6)
#define SJA1124_LIN1CFG2_IDLEONBITERR_MASK  (0x40u)

/* register LIN1ITC */
#define SJA1124_LIN1ITC_IDLEONTIMEOUT_SHIFT (1)
#define SJA1124_LIN1ITC_IDLEONTIMEOUT_MASK  (0x02u)

/* register LIN1GC */
#define SJA1124_LIN1GC_STOPBITCONF_SHIFT    (1)
#define SJA1124_LIN1GC_STOPBITCONF_MASK     (0x02u)
#define SJA1124_LIN1GC_SOFTRESET_SHIFT      (0)
#define SJA1124_LIN1GC_SOFTRESET_MASK       (0x01u)

/* register LIN1RTC */
#define SJA1124_LIN1RTC_RESPTIMEOUT_SHIFT   (0)
#define SJA1124_LIN1RTC_RESPTIMEOUT_MASK    (0x0Fu)

/* register LIN1FR */
#define SJA1124_LIN1FR_FRACBAUDRATE_SHIFT   (0)
#define SJA1124_LIN1FR_FRACBAUDRATE_MASK    (0x0Fu)

/* register LIN1IE */
#define SJA1124_LIN1IE_STUCKZEROIEN_SHIFT   (7)
#define SJA1124_LIN1IE_STUCKZEROIEN_MASK    (0x80u)
#define SJA1124_LIN1IE_TIMEOUTIEN_SHIFT     (6)
#define SJA1124_LIN1IE_TIMEOUTIEN_MASK      (0x40u)
#define SJA1124_LIN1IE_BITERRIEN_SHIFT      (5)
#define SJA1124_LIN1IE_BITERRIEN_MASK       (0x20u)
#define SJA1124_LIN1IE_CSERRIEN_SHIFT       (4)
#define SJA1124_LIN1IE_CSERRIEN_MASK        (0x10u)
#define SJA1124_LIN1IE_DTRCVIEN_SHIFT       (2)
#define SJA1124_LIN1IE_DTRCVIEN_MASK        (0x04u)
#define SJA1124_LIN1IE_DTTRANSIEN_SHIFT     (1)
#define SJA1124_LIN1IE_DTTRANSIEN_MASK      (0x02u)
#define SJA1124_LIN1IE_FRAMEERRIEN_SHIFT    (0)
#define SJA1124_LIN1IE_FRAMEERRIEN_MASK     (0x01u)

/* register LIN1C */
#define SJA1124_LIN1C_WAKEUPREQ_SHIFT       (4)
#define SJA1124_LIN1C_WAKEUPREQ_MASK        (0x10u)
#define SJA1124_LIN1C_DTDISCARDREQ_SHIFT    (3)
#define SJA1124_LIN1C_DTDISCARDREQ_MASK     (0x08u)
#define SJA1124_LIN1C_ABORTREQ_SHIFT        (1)
#define SJA1124_LIN1C_ABORTREQ_MASK         (0x02u)
#define SJA1124_LIN1C_HEADERTRANSREQ_SHIFT  (0)
#define SJA1124_LIN1C_HEADERTRANSREQ_MASK   (0x01u)

/* register LIN1BI */
#define SJA1124_LIN1BI_IDENTIFIER_SHIFT     (0)
#define SJA1124_LIN1BI_IDENTIFIER_MASK      (0x3Fu)

/* register LIN1BC */
#define SJA1124_LIN1BC_DTFIELDLEN_SHIFT     (2)
#define SJA1124_LIN1BC_DTFIELDLEN_MASK      (0x1Cu)
#define SJA1124_LIN1BC_DIRECTION_SHIFT      (1)
#define SJA1124_LIN1BC_DIRECTION_MASK       (0x02u)
#define SJA1124_LIN1BC_CLASSICCS_SHIFT      (0)
#define SJA1124_LIN1BC_CLASSICCS_MASK       (0x01u)

/* register LIN1STATE */
#define SJA1124_LIN1STATE_RCVBUSY_SHIFT     (7)
#define SJA1124_LIN1STATE_RCVBUSY_MASK      (0x80u)
#define SJA1124_LIN1STATE_LINSTATE_SHIFT    (0)
#define SJA1124_LIN1STATE_LINSTATE_MASK     (0x0Fu)

/* register LIN1ES */
#define SJA1124_LIN1ES_STUCKZEROFLG_SHIFT   (7)
#define SJA1124_LIN1ES_STUCKZEROFLG_MASK    (0x80u)
#define SJA1124_LIN1ES_TIMEOUTERRFLG_SHIFT  (6)
#define SJA1124_LIN1ES_TIMEOUTERRFLG_MASK   (0x40u)
#define SJA1124_LIN1ES_BITERRFLG_SHIFT      (5)
#define SJA1124_LIN1ES_BITERRFLG_MASK       (0x20u)
#define SJA1124_LIN1ES_CSERRFLG_SHIFT       (4)
#define SJA1124_LIN1ES_CSERRFLG_MASK        (0x10u)
#define SJA1124_LIN1ES_FRAMEERRFLG_SHIFT    (0)
#define SJA1124_LIN1ES_FRAMEERRFLG_MASK     (0x01u)

/* register LIN1S */
#define SJA1124_LIN1S_RCVBUFFFULLFLG_SHIFT  (6)
#define SJA1124_LIN1S_RCVBUFFFULLFLG_MASK   (0x40u)
#define SJA1124_LIN1S_RCVCOMPFLG_SHIFT      (2)
#define SJA1124_LIN1S_RCVCOMPFLG_MASK       (0x04u)
#define SJA1124_LIN1S_TRANSCOMPFLG_SHIFT    (1)
#define SJA1124_LIN1S_TRANSCOMPFLG_MASK     (0x02u)

/* register LIN2CFG1 */
#define SJA1124_LIN2CFG1_CSCALCDIS_SHIFT    (7)
#define SJA1124_LIN2CFG1_CSCALCDIS_MASK     (0x80u)
#define SJA1124_LIN2CFG1_MASBREAKLEN_SHIFT  (3)
#define SJA1124_LIN2CFG1_MASBREAKLEN_MASK   (0x78u)
#define SJA1124_LIN2CFG1_SLEEP_SHIFT        (1)
#define SJA1124_LIN2CFG1_SLEEP_MASK         (0x02u)
#define SJA1124_LIN2CFG1_INIT_SHIFT         (0)
#define SJA1124_LIN2CFG1_INIT_MASK          (0x01u)

/* register LIN2CFG2 */
#define SJA1124_LIN2CFG2_TWOBITDELIM_SHIFT  (7)
#define SJA1124_LIN2CFG2_TWOBITDELIM_MASK   (0x80u)
#define SJA1124_LIN2CFG2_IDLEONBITERR_SHIFT (6)
#define SJA1124_LIN2CFG2_IDLEONBITERR_MASK  (0x40u)

/* register LIN2ITC */
#define SJA1124_LIN2ITC_IDLEONTIMEOUT_SHIFT (1)
#define SJA1124_LIN2ITC_IDLEONTIMEOUT_MASK  (0x02u)

/* register LIN2GC */
#define SJA1124_LIN2GC_STOPBITCONF_SHIFT    (1)
#define SJA1124_LIN2GC_STOPBITCONF_MASK     (0x02u)
#define SJA1124_LIN2GC_SOFTRESET_SHIFT      (0)
#define SJA1124_LIN2GC_SOFTRESET_MASK       (0x01u)

/* register LIN2RTC */
#define SJA1124_LIN2RTC_RESPTIMEOUT_SHIFT   (0)
#define SJA1124_LIN2RTC_RESPTIMEOUT_MASK    (0x0Fu)

/* register LIN2FR */
#define SJA1124_LIN2FR_FRACBAUDRATE_SHIFT   (0)
#define SJA1124_LIN2FR_FRACBAUDRATE_MASK    (0x0Fu)

/* register LIN2IE */
#define SJA1124_LIN2IE_STUCKZEROIEN_SHIFT   (7)
#define SJA1124_LIN2IE_STUCKZEROIEN_MASK    (0x80u)
#define SJA1124_LIN2IE_TIMEOUTIEN_SHIFT     (6)
#define SJA1124_LIN2IE_TIMEOUTIEN_MASK      (0x40u)
#define SJA1124_LIN2IE_BITERRIEN_SHIFT      (5)
#define SJA1124_LIN2IE_BITERRIEN_MASK       (0x20u)
#define SJA1124_LIN2IE_CSERRIEN_SHIFT       (4)
#define SJA1124_LIN2IE_CSERRIEN_MASK        (0x10u)
#define SJA1124_LIN2IE_DTRCVIEN_SHIFT       (2)
#define SJA1124_LIN2IE_DTRCVIEN_MASK        (0x04u)
#define SJA1124_LIN2IE_DTTRANSIEN_SHIFT     (1)
#define SJA1124_LIN2IE_DTTRANSIEN_MASK      (0x02u)
#define SJA1124_LIN2IE_FRAMEERRIEN_SHIFT    (0)
#define SJA1124_LIN2IE_FRAMEERRIEN_MASK     (0x01u)

/* register LIN2C */
#define SJA1124_LIN2C_WAKEUPREQ_SHIFT       (4)
#define SJA1124_LIN2C_WAKEUPREQ_MASK        (0x10u)
#define SJA1124_LIN2C_DTDISCARDREQ_SHIFT    (3)
#define SJA1124_LIN2C_DTDISCARDREQ_MASK     (0x08u)
#define SJA1124_LIN2C_ABORTREQ_SHIFT        (1)
#define SJA1124_LIN2C_ABORTREQ_MASK         (0x02u)
#define SJA1124_LIN2C_HEADERTRANSREQ_SHIFT  (0)
#define SJA1124_LIN2C_HEADERTRANSREQ_MASK   (0x01u)

/* register LIN2BI */
#define SJA1124_LIN2BI_IDENTIFIER_SHIFT     (0)
#define SJA1124_LIN2BI_IDENTIFIER_MASK      (0x3Fu)

/* register LIN2BC */
#define SJA1124_LIN2BC_DTFIELDLEN_SHIFT     (2)
#define SJA1124_LIN2BC_DTFIELDLEN_MASK      (0x1Cu)
#define SJA1124_LIN2BC_DIRECTION_SHIFT      (1)
#define SJA1124_LIN2BC_DIRECTION_MASK       (0x02u)
#define SJA1124_LIN2BC_CLASSICCS_SHIFT      (0)
#define SJA1124_LIN2BC_CLASSICCS_MASK       (0x01u)

/* register LIN2STATE */
#define SJA1124_LIN2STATE_RCVBUSY_SHIFT     (7)
#define SJA1124_LIN2STATE_RCVBUSY_MASK      (0x80u)
#define SJA1124_LIN2STATE_LINSTATE_SHIFT    (0)
#define SJA1124_LIN2STATE_LINSTATE_MASK     (0x0Fu)

/* register LIN2ES */
#define SJA1124_LIN2ES_STUCKZEROFLG_SHIFT   (7)
#define SJA1124_LIN2ES_STUCKZEROFLG_MASK    (0x80u)
#define SJA1124_LIN2ES_TIMEOUTERRFLG_SHIFT  (6)
#define SJA1124_LIN2ES_TIMEOUTERRFLG_MASK   (0x40u)
#define SJA1124_LIN2ES_BITERRFLG_SHIFT      (5)
#define SJA1124_LIN2ES_BITERRFLG_MASK       (0x20u)
#define SJA1124_LIN2ES_CSERRFLG_SHIFT       (4)
#define SJA1124_LIN2ES_CSERRFLG_MASK        (0x10u)
#define SJA1124_LIN2ES_FRAMEERRFLG_SHIFT    (0)
#define SJA1124_LIN2ES_FRAMEERRFLG_MASK     (0x01u)

/* register LIN2S */
#define SJA1124_LIN2S_RCVBUFFFULLFLG_SHIFT  (6)
#define SJA1124_LIN2S_RCVBUFFFULLFLG_MASK   (0x40u)
#define SJA1124_LIN2S_RCVCOMPFLG_SHIFT      (2)
#define SJA1124_LIN2S_RCVCOMPFLG_MASK       (0x04u)
#define SJA1124_LIN2S_TRANSCOMPFLG_SHIFT    (1)
#define SJA1124_LIN2S_TRANSCOMPFLG_MASK     (0x02u)

/* register LIN3CFG1 */
#define SJA1124_LIN3CFG1_CSCALCDIS_SHIFT    (7)
#define SJA1124_LIN3CFG1_CSCALCDIS_MASK     (0x80u)
#define SJA1124_LIN3CFG1_MASBREAKLEN_SHIFT  (3)
#define SJA1124_LIN3CFG1_MASBREAKLEN_MASK   (0x78u)
#define SJA1124_LIN3CFG1_SLEEP_SHIFT        (1)
#define SJA1124_LIN3CFG1_SLEEP_MASK         (0x02u)
#define SJA1124_LIN3CFG1_INIT_SHIFT         (0)
#define SJA1124_LIN3CFG1_INIT_MASK          (0x01u)

/* register LIN3CFG2 */
#define SJA1124_LIN3CFG2_TWOBITDELIM_SHIFT  (7)
#define SJA1124_LIN3CFG2_TWOBITDELIM_MASK   (0x80u)
#define SJA1124_LIN3CFG2_IDLEONBITERR_SHIFT (6)
#define SJA1124_LIN3CFG2_IDLEONBITERR_MASK  (0x40u)

/* register LIN3ITC */
#define SJA1124_LIN3ITC_IDLEONTIMEOUT_SHIFT (1)
#define SJA1124_LIN3ITC_IDLEONTIMEOUT_MASK  (0x02u)

/* register LIN3GC */
#define SJA1124_LIN3GC_STOPBITCONF_SHIFT    (1)
#define SJA1124_LIN3GC_STOPBITCONF_MASK     (0x02u)
#define SJA1124_LIN3GC_SOFTRESET_SHIFT      (0)
#define SJA1124_LIN3GC_SOFTRESET_MASK       (0x01u)

/* register LIN3RTC */
#define SJA1124_LIN3RTC_RESPTIMEOUT_SHIFT   (0)
#define SJA1124_LIN3RTC_RESPTIMEOUT_MASK    (0x0Fu)

/* register LIN3FR */
#define SJA1124_LIN3FR_FRACBAUDRATE_SHIFT   (0)
#define SJA1124_LIN3FR_FRACBAUDRATE_MASK    (0x0Fu)

/* register LIN3IE */
#define SJA1124_LIN3IE_STUCKZEROIEN_SHIFT   (7)
#define SJA1124_LIN3IE_STUCKZEROIEN_MASK    (0x80u)
#define SJA1124_LIN3IE_TIMEOUTIEN_SHIFT     (6)
#define SJA1124_LIN3IE_TIMEOUTIEN_MASK      (0x40u)
#define SJA1124_LIN3IE_BITERRIEN_SHIFT      (5)
#define SJA1124_LIN3IE_BITERRIEN_MASK       (0x20u)
#define SJA1124_LIN3IE_CSERRIEN_SHIFT       (4)
#define SJA1124_LIN3IE_CSERRIEN_MASK        (0x10u)
#define SJA1124_LIN3IE_DTRCVIEN_SHIFT       (2)
#define SJA1124_LIN3IE_DTRCVIEN_MASK        (0x04u)
#define SJA1124_LIN3IE_DTTRANSIEN_SHIFT     (1)
#define SJA1124_LIN3IE_DTTRANSIEN_MASK      (0x02u)
#define SJA1124_LIN3IE_FRAMEERRIEN_SHIFT    (0)
#define SJA1124_LIN3IE_FRAMEERRIEN_MASK     (0x01u)

/* register LIN3C */
#define SJA1124_LIN3C_WAKEUPREQ_SHIFT       (4)
#define SJA1124_LIN3C_WAKEUPREQ_MASK        (0x10u)
#define SJA1124_LIN3C_DTDISCARDREQ_SHIFT    (3)
#define SJA1124_LIN3C_DTDISCARDREQ_MASK     (0x08u)
#define SJA1124_LIN3C_ABORTREQ_SHIFT        (1)
#define SJA1124_LIN3C_ABORTREQ_MASK         (0x02u)
#define SJA1124_LIN3C_HEADERTRANSREQ_SHIFT  (0)
#define SJA1124_LIN3C_HEADERTRANSREQ_MASK   (0x01u)

/* register LIN3BI */
#define SJA1124_LIN3BI_IDENTIFIER_SHIFT     (0)
#define SJA1124_LIN3BI_IDENTIFIER_MASK      (0x3Fu)

/* register LIN3BC */
#define SJA1124_LIN3BC_DTFIELDLEN_SHIFT     (2)
#define SJA1124_LIN3BC_DTFIELDLEN_MASK      (0x1Cu)
#define SJA1124_LIN3BC_DIRECTION_SHIFT      (1)
#define SJA1124_LIN3BC_DIRECTION_MASK       (0x02u)
#define SJA1124_LIN3BC_CLASSICCS_SHIFT      (0)
#define SJA1124_LIN3BC_CLASSICCS_MASK       (0x01u)

/* register LIN3STATE */
#define SJA1124_LIN3STATE_RCVBUSY_SHIFT     (7)
#define SJA1124_LIN3STATE_RCVBUSY_MASK      (0x80u)
#define SJA1124_LIN3STATE_LINSTATE_SHIFT    (0)
#define SJA1124_LIN3STATE_LINSTATE_MASK     (0x0Fu)

/* register LIN3ES */
#define SJA1124_LIN3ES_STUCKZEROFLG_SHIFT   (7)
#define SJA1124_LIN3ES_STUCKZEROFLG_MASK    (0x80u)
#define SJA1124_LIN3ES_TIMEOUTERRFLG_SHIFT  (6)
#define SJA1124_LIN3ES_TIMEOUTERRFLG_MASK   (0x40u)
#define SJA1124_LIN3ES_BITERRFLG_SHIFT      (5)
#define SJA1124_LIN3ES_BITERRFLG_MASK       (0x20u)
#define SJA1124_LIN3ES_CSERRFLG_SHIFT       (4)
#define SJA1124_LIN3ES_CSERRFLG_MASK        (0x10u)
#define SJA1124_LIN3ES_FRAMEERRFLG_SHIFT    (0)
#define SJA1124_LIN3ES_FRAMEERRFLG_MASK     (0x01u)

/* register LIN3S */
#define SJA1124_LIN3S_RCVBUFFFULLFLG_SHIFT  (6)
#define SJA1124_LIN3S_RCVBUFFFULLFLG_MASK   (0x40u)
#define SJA1124_LIN3S_RCVCOMPFLG_SHIFT      (2)
#define SJA1124_LIN3S_RCVCOMPFLG_MASK       (0x04u)
#define SJA1124_LIN3S_TRANSCOMPFLG_SHIFT    (1)
#define SJA1124_LIN3S_TRANSCOMPFLG_MASK     (0x02u)

/* register LIN4CFG1 */
#define SJA1124_LIN4CFG1_CSCALCDIS_SHIFT    (7)
#define SJA1124_LIN4CFG1_CSCALCDIS_MASK     (0x80u)
#define SJA1124_LIN4CFG1_MASBREAKLEN_SHIFT  (3)
#define SJA1124_LIN4CFG1_MASBREAKLEN_MASK   (0x78u)
#define SJA1124_LIN4CFG1_SLEEP_SHIFT        (1)
#define SJA1124_LIN4CFG1_SLEEP_MASK         (0x02u)
#define SJA1124_LIN4CFG1_INIT_SHIFT         (0)
#define SJA1124_LIN4CFG1_INIT_MASK          (0x01u)

/* register LIN4CFG2 */
#define SJA1124_LIN4CFG2_TWOBITDELIM_SHIFT  (7)
#define SJA1124_LIN4CFG2_TWOBITDELIM_MASK   (0x80u)
#define SJA1124_LIN4CFG2_IDLEONBITERR_SHIFT (6)
#define SJA1124_LIN4CFG2_IDLEONBITERR_MASK  (0x40u)

/* register LIN4ITC */
#define SJA1124_LIN4ITC_IDLEONTIMEOUT_SHIFT (1)
#define SJA1124_LIN4ITC_IDLEONTIMEOUT_MASK  (0x02u)

/* register LIN4GC */
#define SJA1124_LIN4GC_STOPBITCONF_SHIFT    (1)
#define SJA1124_LIN4GC_STOPBITCONF_MASK     (0x02u)
#define SJA1124_LIN4GC_SOFTRESET_SHIFT      (0)
#define SJA1124_LIN4GC_SOFTRESET_MASK       (0x01u)

/* register LIN4RTC */
#define SJA1124_LIN4RTC_RESPTIMEOUT_SHIFT   (0)
#define SJA1124_LIN4RTC_RESPTIMEOUT_MASK    (0x0Fu)

/* register LIN4FR */
#define SJA1124_LIN4FR_FRACBAUDRATE_SHIFT   (0)
#define SJA1124_LIN4FR_FRACBAUDRATE_MASK    (0x0Fu)

/* register LIN4IE */
#define SJA1124_LIN4IE_STUCKZEROIEN_SHIFT   (7)
#define SJA1124_LIN4IE_STUCKZEROIEN_MASK    (0x80u)
#define SJA1124_LIN4IE_TIMEOUTIEN_SHIFT     (6)
#define SJA1124_LIN4IE_TIMEOUTIEN_MASK      (0x40u)
#define SJA1124_LIN4IE_BITERRIEN_SHIFT      (5)
#define SJA1124_LIN4IE_BITERRIEN_MASK       (0x20u)
#define SJA1124_LIN4IE_CSERRIEN_SHIFT       (4)
#define SJA1124_LIN4IE_CSERRIEN_MASK        (0x10u)
#define SJA1124_LIN4IE_DTRCVIEN_SHIFT       (2)
#define SJA1124_LIN4IE_DTRCVIEN_MASK        (0x04u)
#define SJA1124_LIN4IE_DTTRANSIEN_SHIFT     (1)
#define SJA1124_LIN4IE_DTTRANSIEN_MASK      (0x02u)
#define SJA1124_LIN4IE_FRAMEERRIEN_SHIFT    (0)
#define SJA1124_LIN4IE_FRAMEERRIEN_MASK     (0x01u)

/* register LIN4C */
#define SJA1124_LIN4C_WAKEUPREQ_SHIFT       (4)
#define SJA1124_LIN4C_WAKEUPREQ_MASK        (0x10u)
#define SJA1124_LIN4C_DTDISCARDREQ_SHIFT    (3)
#define SJA1124_LIN4C_DTDISCARDREQ_MASK     (0x08u)
#define SJA1124_LIN4C_ABORTREQ_SHIFT        (1)
#define SJA1124_LIN4C_ABORTREQ_MASK         (0x02u)
#define SJA1124_LIN4C_HEADERTRANSREQ_SHIFT  (0)
#define SJA1124_LIN4C_HEADERTRANSREQ_MASK   (0x01u)

/* register LIN4BI */
#define SJA1124_LIN4BI_IDENTIFIER_SHIFT     (0)
#define SJA1124_LIN4BI_IDENTIFIER_MASK      (0x3Fu)

/* register LIN4BC */
#define SJA1124_LIN4BC_DTFIELDLEN_SHIFT     (2)
#define SJA1124_LIN4BC_DTFIELDLEN_MASK      (0x1Cu)
#define SJA1124_LIN4BC_DIRECTION_SHIFT      (1)
#define SJA1124_LIN4BC_DIRECTION_MASK       (0x02u)
#define SJA1124_LIN4BC_CLASSICCS_SHIFT      (0)
#define SJA1124_LIN4BC_CLASSICCS_MASK       (0x01u)

/* register LIN4STATE */
#define SJA1124_LIN4STATE_RCVBUSY_SHIFT     (7)
#define SJA1124_LIN4STATE_RCVBUSY_MASK      (0x80u)
#define SJA1124_LIN4STATE_LINSTATE_SHIFT    (0)
#define SJA1124_LIN4STATE_LINSTATE_MASK     (0x0Fu)

/* register LIN4ES */
#define SJA1124_LIN4ES_STUCKZEROFLG_SHIFT   (7)
#define SJA1124_LIN4ES_STUCKZEROFLG_MASK    (0x80u)
#define SJA1124_LIN4ES_TIMEOUTERRFLG_SHIFT  (6)
#define SJA1124_LIN4ES_TIMEOUTERRFLG_MASK   (0x40u)
#define SJA1124_LIN4ES_BITERRFLG_SHIFT      (5)
#define SJA1124_LIN4ES_BITERRFLG_MASK       (0x20u)
#define SJA1124_LIN4ES_CSERRFLG_SHIFT       (4)
#define SJA1124_LIN4ES_CSERRFLG_MASK        (0x10u)
#define SJA1124_LIN4ES_FRAMEERRFLG_SHIFT    (0)
#define SJA1124_LIN4ES_FRAMEERRFLG_MASK     (0x01u)

/* register LIN4S */
#define SJA1124_LIN4S_RCVBUFFFULLFLG_SHIFT  (6)
#define SJA1124_LIN4S_RCVBUFFFULLFLG_MASK   (0x40u)
#define SJA1124_LIN4S_RCVCOMPFLG_SHIFT      (2)
#define SJA1124_LIN4S_RCVCOMPFLG_MASK       (0x04u)
#define SJA1124_LIN4S_TRANSCOMPFLG_SHIFT    (1)
#define SJA1124_LIN4S_TRANSCOMPFLG_MASK     (0x02u)

/* register MCFG */
#define SJA1124_MCFG_CHAN4TERMCONF_SHIFT    (6)
#define SJA1124_MCFG_CHAN4TERMCONF_MASK     (0xC0u)
#define SJA1124_MCFG_CHAN3TERMCONF_SHIFT    (4)
#define SJA1124_MCFG_CHAN3TERMCONF_MASK     (0x30u)
#define SJA1124_MCFG_CHAN2TERMCONF_SHIFT    (2)
#define SJA1124_MCFG_CHAN2TERMCONF_MASK     (0x0Cu)
#define SJA1124_MCFG_CHAN1TERMCONF_SHIFT    (0)
#define SJA1124_MCFG_CHAN1TERMCONF_MASK     (0x03u)

/* register MMTPS */
#define SJA1124_MMTPS_FACTRESTLOCK_SHIFT    (7)
#define SJA1124_MMTPS_FACTRESTLOCK_MASK     (0x80u)
#define SJA1124_MMTPS_FACTRESTSTAT_SHIFT    (6)
#define SJA1124_MMTPS_FACTRESTSTAT_MASK     (0x40u)
#define SJA1124_MMTPS_WRTCNTSTAT_SHIFT      (0)
#define SJA1124_MMTPS_WRTCNTSTAT_MASK       (0x3Fu)

/* register ID */
#define SJA1124_ID_IDENTIFICATION_SHIFT     (0)
#define SJA1124_ID_IDENTIFICATION_MASK      (0x3Fu)

#endif  /* NXP_SJA1124_REGISTERS_H */
