/*==================================================================================================
* Project : RTD AUTOSAR 4.7
* Platform : CORTEXM
* Peripheral : S32K3XX
* Dependencies : none
*
* Autosar Version : 4.7.0
* Autosar Revision : ASR_REL_4_7_REV_0000
* Autosar Conf.Variant :
* SW Version : 5.0.0
* Build Version : S32K3_RTD_5_0_0_D2408_ASR_REL_4_7_REV_0000_20241002
*
* Copyright 2020 - 2024 NXP
*
* NXP Confidential and Proprietary. This software is owned or controlled by NXP and may only be 
*   used strictly in accordance with the applicable license terms.  By expressly 
*   accepting such terms or by downloading, installing, activating and/or otherwise 
*   using the software, you are agreeing that you have read, and that you agree to 
*   comply with and are bound by, such license terms.  If you do not agree to be 
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

/**
*   @file main.c
*
*   @addtogroup main_module main module documentation
*   @{
*/

/* Including necessary configuration files. */
#include "Mcal.h"
#include "Siul2_Port_Ip.h"
#include "Siul2_Dio_Ip.h"
#include "Adc_Sar_Ip.h"
#include "Clock_Ip.h"
#include "IntCtrl_Ip.h"
#include "Bctu_Ip.h"

/* User includes */
uint8_t SW4_Button =0, SW5_Button =0;
uint8_t state =0;
uint16_t Countii =0;

#define ADC_BANDGAP         3932U /* Vbandgap ~ 1.2V on 14 bits resolution, 5V VrefH */
//#define ADC_BANDGAP         5980U /* Vbandgap ~ 1.2V on 14 bits resolution, 3.3V VrefH */
#define ADC_SAR_USED_CH                 34U /* Internal Bandgap Channel */
#define BCTU_USED_SINGLE_TRIG_IDX       0U
#define BCTU_USED_FIFO_IDX              0U
#define BCTU_FIFO_WATERMARK             9U
#define ADC_TOLERANCE(x,y)              (((x > y) ? (x - y) : (y - x)) > 200U) /* Check that the data is within tolerated range */

volatile int exit_code = 0;
volatile boolean notif_triggered = FALSE;
volatile uint16 data, ADC_data;
extern void Adc_Sar_0_Isr(void);
extern void Bctu_0_Isr(void);


void BctuWatermarkNotif(void)
{
    notif_triggered = TRUE;

	Siul2_Dio_Ip_WritePin (LED_B_PORT, LED_B_PIN, 1U);	//PTB8

    data = Bctu_Ip_GetFifoData(BCTUHWUNIT_0_INSTANCE, BCTU_USED_FIFO_IDX);

	Siul2_Dio_Ip_WritePin (LED_B_PORT, LED_B_PIN, 0U);
}

/*!
  \brief The main function for the project.
  \details The startup initialization sequence is the following:
 * - startup asm routine
 * - main()
*/
int main(void)
{
	StatusType status;
    uint8 Index;
    Clock_Ip_StatusType clockStatus;
    /* Write your code here */
	clockStatus = Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
    while (clockStatus != CLOCK_IP_SUCCESS)
    {
        clockStatus = Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
    }

	Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS_PortContainer_0_BOARD_InitPeripherals, g_pin_mux_InitConfigArr_PortContainer_0_BOARD_InitPeripherals);

    Bctu_Ip_Init(BCTUHWUNIT_0_INSTANCE, &BctuHwUnit_0);

    status = (StatusType) Adc_Sar_Ip_Init(ADCHWUNIT_0_INSTANCE, &AdcHwUnit_0);
    while (status != E_OK);

    IntCtrl_Ip_InstallHandler(BCTU_IRQn, Bctu_0_Isr, NULL_PTR);

    IntCtrl_Ip_EnableIrq(BCTU_IRQn);
    /* Call Calibration function multiple times, to mitigate instability of board source */
    for(Index = 0; Index <= 5; Index++)
    {
        status = (StatusType) Adc_Sar_Ip_DoCalibration(ADCHWUNIT_0_INSTANCE);
        if(status == E_OK)
        {
            break;
        }
    }

    /* Start a SW triggered conversion on BCTU using a single trigger */
    Bctu_Ip_SetGlobalTriggerEn(BCTUHWUNIT_0_INSTANCE, TRUE);
    Bctu_Ip_EnableNotifications(BCTUHWUNIT_0_INSTANCE, BCTU_IP_NOTIF_FIFO1);
    Bctu_Ip_SwTriggerConversion(BCTUHWUNIT_0_INSTANCE, BCTU_USED_SINGLE_TRIG_IDX);

    while(1){

    	Siul2_Dio_Ip_WritePin(LED_R_PORT, LED_R_PIN, 1); // PTB10
    	Siul2_Dio_Ip_WritePin(LED_R_PORT, LED_R_PIN, 0);

    	if(notif_triggered)
    	{
    	notif_triggered = FALSE;
	    Bctu_Ip_SwTriggerConversion(BCTUHWUNIT_0_INSTANCE, BCTU_USED_SINGLE_TRIG_IDX);
    	}
    }
}

/** @} */
