/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: VS_0
called_from_default_init: true
outputs:
- {id: AIPS_PLAT_CLK.outFreq, value: 60 MHz}
- {id: AIPS_SLOW_CLK.outFreq, value: 30 MHz}
- {id: CLKOUT_RUN_CLK.outFreq, value: 12 MHz}
- {id: CLKOUT_STANDBY_CLK.outFreq, value: 15 MHz}
- {id: CORE_CLK.outFreq, value: 120 MHz}
- {id: DCM0_CLK.outFreq, value: 30 MHz}
- {id: DCM_CLK.outFreq, value: 30 MHz}
- {id: DMAMUX0_CLK.outFreq, value: 120 MHz}
- {id: DMAMUX1_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD0_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD10_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD11_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD1_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD2_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD3_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD4_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD5_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD6_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD7_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD8_CLK.outFreq, value: 120 MHz}
- {id: EDMA0_TCD9_CLK.outFreq, value: 120 MHz}
- {id: EMIOS0_CLK.outFreq, value: 120 MHz}
- {id: EMIOS1_CLK.outFreq, value: 120 MHz}
- {id: ERM0_CLK.outFreq, value: 30 MHz}
- {id: FIRCOUT.outFreq, value: 48 MHz}
- {id: FLASH0_CLK.outFreq, value: 30 MHz}
- {id: FLEXCANA_CLK.outFreq, value: 30 MHz}
- {id: FLEXCANB_CLK.outFreq, value: 30 MHz}
- {id: FLEXIO0_CLK.outFreq, value: 120 MHz}
- {id: FXOSCOUT.outFreq, value: 16 MHz}
- {id: HSE_CLK.outFreq, value: 60 MHz}
- {id: INTM_CLK.outFreq, value: 60 MHz}
- {id: MSCM_CLK.outFreq, value: 60 MHz}
- {id: PLL_PHI0.outFreq, value: 120 MHz}
- {id: PLL_PHI1.outFreq, value: 48 MHz}
- {id: SCS_CLK.outFreq, value: 120 MHz}
- {id: SIRCOUT.outFreq, value: 32 kHz}
- {id: SIUL2_CLK.outFreq, value: 30 MHz}
- {id: STM0_CLK.outFreq, value: 16 MHz}
- {id: STMA_CLK.outFreq, value: 16 MHz}
- {id: TRACE_CLK.outFreq, value: 120 MHz}
- {id: TRGMUX0_CLK.outFreq, value: 30 MHz}
settings:
- {id: ClockDevErrorDetect, value: Enabled}
- {id: ClockDisableFlashWaitStatesConfig, value: Enabled}
- {id: ClockDisableRamWaitStatesConfig, value: Enabled}
- {id: ClockGetFrequencyAPI, value: Enabled}
- {id: CLK_GATE_ADC0_CLK, value: Disabled}
- {id: CLK_GATE_ADC1_CLK, value: Disabled}
- {id: CLK_GATE_BCTU0_CLK, value: Disabled}
- {id: CLK_GATE_CMP0_CLK, value: Disabled}
- {id: CLK_GATE_CMP1_CLK, value: Disabled}
- {id: CLK_GATE_CRC0_CLK, value: Disabled}
- {id: CLK_GATE_EIM0_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN0_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN1_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN2_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN3_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN4_CLK, value: Disabled}
- {id: CLK_GATE_FLEXCAN5_CLK, value: Disabled}
- {id: CLK_GATE_LCU0_CLK, value: Disabled}
- {id: CLK_GATE_LCU1_CLK, value: Disabled}
- {id: CLK_GATE_LPI2C0_CLK, value: Disabled}
- {id: CLK_GATE_LPI2C1_CLK, value: Disabled}
- {id: CLK_GATE_LPSPI0_CLK, value: Disabled}
- {id: CLK_GATE_LPSPI1_CLK, value: Disabled}
- {id: CLK_GATE_LPSPI2_CLK, value: Disabled}
- {id: CLK_GATE_LPSPI3_CLK, value: Disabled}
- {id: CLK_GATE_LPUART0_CLK, value: Disabled}
- {id: CLK_GATE_LPUART1_CLK, value: Disabled}
- {id: CLK_GATE_LPUART2_CLK, value: Disabled}
- {id: CLK_GATE_LPUART3_CLK, value: Disabled}
- {id: CLK_GATE_LPUART4_CLK, value: Disabled}
- {id: CLK_GATE_LPUART5_CLK, value: Disabled}
- {id: CLK_GATE_LPUART6_CLK, value: Disabled}
- {id: CLK_GATE_LPUART7_CLK, value: Disabled}
- {id: CLK_GATE_PIT0_CLK, value: Disabled}
- {id: CLK_GATE_PIT1_CLK, value: Disabled}
- {id: CLK_GATE_RTC0_CLK, value: Disabled}
- {id: CLK_GATE_STCU0_CLK, value: Disabled}
- {id: CLK_GATE_SWT0_CLK, value: Disabled}
- {id: CLK_GATE_TEMPSENSE_CLK, value: Disabled}
- {id: CLK_GATE_TSENSE0_CLK, value: Disabled}
- {id: CLK_GATE_WKPU0_CLK, value: Disabled}
- {id: CORE_MFD.scale, value: '120', locked: true}
- {id: CORE_PLLODIV_0_DE, value: Enabled}
- {id: CORE_PLLODIV_1_DE, value: Enabled}
- {id: CORE_PLL_PD, value: Power_up}
- {id: FIRCunderMcuControl, value: Disabled}
- {id: FXOSC_PM, value: Crystal_mode}
- {id: MC_CGM_MUX_0.sel, value: PHI0}
- {id: MC_CGM_MUX_0_DIV0.scale, value: '1', locked: true}
- {id: MC_CGM_MUX_0_DIV0_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV1.scale, value: '2', locked: true}
- {id: MC_CGM_MUX_0_DIV1_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV2.scale, value: '4', locked: true}
- {id: MC_CGM_MUX_0_DIV2_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV3.scale, value: '2', locked: true}
- {id: MC_CGM_MUX_0_DIV3_Trigger, value: Common}
- {id: MC_CGM_MUX_0_DIV4.scale, value: '4', locked: true}
- {id: MC_CGM_MUX_0_DIV4_Trigger, value: Common}
- {id: MC_CGM_MUX_6.sel, value: PHI0}
- {id: MC_CGM_MUX_6_DE0, value: Enabled}
- {id: MC_CGM_MUX_6_DIV0.scale, value: '10', locked: true}
- {id: MODULE_CLOCKS.MC_CGM_AUX11_MUX.sel, value: PHI0}
- {id: MODULE_CLOCKS.MC_CGM_AUX1_MUX.sel, value: FXOSC_CLK.FXOSCOUT}
- {id: MODULE_CLOCKS.MC_CGM_AUX3_DIV0.scale, value: '2', locked: true}
- {id: MODULE_CLOCKS.MC_CGM_AUX3_MUX.sel, value: MC_CGM_MUX_0_DIV1}
- {id: MODULE_CLOCKS.MC_CGM_AUX4_DIV0.scale, value: '2', locked: true}
- {id: MODULE_CLOCKS.MC_CGM_AUX4_MUX.sel, value: MC_CGM_MUX_0_DIV1}
- {id: MODULE_CLOCKS.MC_CGM_AUX5_MUX.sel, value: MC_CGM_MUX_0_DIV2}
- {id: PHI0.scale, value: '2', locked: true}
- {id: PHI1.scale, value: '5', locked: true}
- {id: PLL_PREDIV.scale, value: '2', locked: true}
- {id: POSTDIV.scale, value: '4', locked: true}
- {id: SIRCunderMcuControl, value: Disabled}
- {id: SXOSCunderMcuControl, value: Disabled}
sources:
- {id: FXOSC_CLK.FXOSC_CLK.outFreq, value: 16 MHz, enabled: true}
- {id: SXOSC_CLK.SXOSC_CLK.outFreq, value: 32.768 kHz, enabled: true}
 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
   
