/*==================================================================================================
*   Project              : RTD AUTOSAR 4.7
*   Platform             : CORTEXM
*   Peripheral           : S32K3XX
*   Dependencies         : none
*
*   Autosar Version      : 4.7.0
*   Autosar Revision     : ASR_REL_4_7_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 3.0.0
*   Build Version        : S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331
*
*   Copyright 2020 - 2023 NXP Semiconductors
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

/**
*   @file main.c
*
*   @addtogroup main_module main module documentation
*   @{
*/

/* Including necessary configuration files. */
//#include "Mcal.h"

#include "Clock_Ip.h"
#include "Siul2_Port_Ip.h"
#include "Siul2_Dio_Ip.h"
#include "FlexCAN_Ip.h"
#include "IntCtrl_Ip.h"

#define MSG_ID 20u

#define MSG_ID_RX 0x55
#define RX_MB_IDX 1U
#define TX_MB_IDX 0U

#define FXOSC_CLOCK_FREQ   16000000U

Flexcan_Ip_MsgBuffType rxData;
volatile int exit_code = 0;
/* User includes */
uint8 dummyData[8] = {1,2,3,4,5,6,7};
/*!
  \brief The main function for the project.
  \details The startup initialization sequence is the following:
 * - startup asm routine
 * - main()
*/
extern void CAN0_ORED_0_31_MB_IRQHandler(void);

void can_vFlexCan0_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
    uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState)
{
    (void)flexcanState;
    (void)instance;

    switch(eventType)
    {
        case FLEXCAN_EVENT_RX_COMPLETE:

        	(void)rxData.msgId;
        	(void)rxData.data;
            break;

        case FLEXCAN_EVENT_RXFIFO_COMPLETE:
        case FLEXCAN_EVENT_TX_COMPLETE:
        case FLEXCAN_EVENT_ENHANCED_RXFIFO_COMPLETE:
        case FLEXCAN_EVENT_ENHANCED_RXFIFO_WATERMARK:
        default:
            break;
    }
}

int main(void)
{
	/** Initializes MCU clock configuration */
	(void)Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);

	/** Initializes Pins and Port configuration */
	(void)Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);

	/** Initializes the configured interrupts */
	//(void)IntCtrl_Ip_Init(&IntCtrlConfig_0);

//    IntCtrl_Ip_EnableIrq(FlexCAN0_1_IRQn); //Dinesh
//    IntCtrl_Ip_InstallHandler(FlexCAN0_1_IRQn, CAN0_ORED_0_31_MB_IRQHandler, NULL_PTR); //Dinesh

	// Disable CAN Silent
	Siul2_Dio_Ip_WritePin(CAN_S_EXT_PORT, CAN_S_EXT_PIN, 0U);
	Siul2_Dio_Ip_WritePin(CAN_SIL_INT_PORT, CAN_SIL_INT_PIN, 0U);

    Flexcan_Ip_DataInfoType rx_info = {
            .msg_id_type = FLEXCAN_MSG_ID_STD,
            .data_length = 8u,
            .is_polling = TRUE,
            .is_remote = FALSE
    };


    FlexCAN_Ip_Init(INST_FLEXCAN_0, &FlexCAN_State0, &FlexCAN_Config0);

    /* enter the freeze mode */
  	FlexCAN_Ip_EnterFreezeMode(INST_FLEXCAN_0);

    FlexCAN_Ip_ConfigRxMb(INST_FLEXCAN_0, RX_MB_IDX, &rx_info, MSG_ID_RX);
    FlexCAN_Ip_Receive(INST_FLEXCAN_0, RX_MB_IDX, &rxData, TRUE);

	 /* Exit the freeze mode */
	 FlexCAN_Ip_ExitFreezeMode(INST_FLEXCAN_0);

    FlexCAN_Ip_SetStartMode(INST_FLEXCAN_0);

//    rx_info.is_polling = FALSE;
    rx_info.is_polling = TRUE; //Dinesh
    FlexCAN_Ip_Send(INST_FLEXCAN_0, TX_MB_IDX, &rx_info, MSG_ID, (uint8 *)&dummyData);
    // Polling
    while(FlexCAN_Ip_GetTransferStatus(INST_FLEXCAN_0, TX_MB_IDX) != FLEXCAN_STATUS_SUCCESS)
    {
    	FlexCAN_Ip_MainFunctionWrite(INST_FLEXCAN_0, TX_MB_IDX);
    }


    // Polling
/*
    while(FlexCAN_Ip_GetTransferStatus(INST_FLEXCAN_0, RX_MB_IDX) != FLEXCAN_STATUS_SUCCESS)
    {

    }
*/

    while (1) // like a task scheduled at a particular rate
    {
    	if (FlexCAN_Ip_GetTransferStatus(INST_FLEXCAN_0, TX_MB_IDX) == FLEXCAN_STATUS_SUCCESS)
    	{
    		FlexCAN_Ip_MainFunctionRead(INST_FLEXCAN_0, RX_MB_IDX);
    		FlexCAN_Ip_Receive(INST_FLEXCAN_0, RX_MB_IDX, &rxData, TRUE);
    	}
    }


    FlexCAN_Ip_SetStopMode(INST_FLEXCAN_0);
    FlexCAN_Ip_Deinit(INST_FLEXCAN_0);
    return 0;
}

/** @} */