/*==================================================================================================
*   Project              : RTD AUTOSAR 4.4
*   Platform             : CORTEXM
*   Peripheral           : 
*   Dependencies         : none
*
*   Autosar Version      : 4.4.0
*   Autosar Revision     : ASR_REL_4_4_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 1.0.0
*   Build Version        : S32K3_RTD_1_0_0_HF02_D2112_ASR_REL_4_4_REV_0000_20211222
*
*   (c) Copyright 2020 - 2021 NXP Semiconductors
*   All Rights Reserved.
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

#ifndef SYSTEM_IP_DEVICE_REGISTERS_H_
#define SYSTEM_IP_DEVICE_REGISTERS_H_

/**
*   @file
*
*   @addtogroup System_Ip
*   @{
*/

/*==================================================================================================
*                                        INCLUDE FILES
==================================================================================================*/
#include "StandardTypes.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define PLATFORM_SYSTEM_IP_DEVICE_REGISTERS_TYPES_VENDOR_ID                    43
#define PLATFORM_SYSTEM_IP_DEVICE_REGISTERS_SW_MAJOR_VERSION                   1
#define PLATFORM_SYSTEM_IP_DEVICE_REGISTERS_SW_MINOR_VERSION                   0
#define PLATFORM_SYSTEM_IP_DEVICE_REGISTERS_SW_PATCH_VERSION                   0



#if defined(S32G2XX)
    #include "S32G274A.h"
#elif defined(S32K3XX)
#ifdef S32K344
    #include "S32K344.h"
#endif
#ifdef S32K324
    #include "S32K324.h"
#endif 
#ifdef S32K314
    #include "S32K314.h"
#endif
#ifdef S32K312
    #include "S32K312.h"
#endif
    
    #define MCM_ISCR_FIDCE_SHIFT          MCM_CM7_ISCR_FIDCE_SHIFT
    #define MCM_ISCR_FIXCE_SHIFT          MCM_CM7_ISCR_FIXCE_SHIFT
    #define MCM_ISCR_FUFCE_SHIFT          MCM_CM7_ISCR_FUFCE_SHIFT
    #define MCM_ISCR_FOFCE_SHIFT          MCM_CM7_ISCR_FOFCE_SHIFT
    #define MCM_ISCR_FDZCE_SHIFT          MCM_CM7_ISCR_FDZCE_SHIFT
    #define MCM_ISCR_FIOCE_SHIFT          MCM_CM7_ISCR_FIOCE_SHIFT
    #define MCM_ISCR_WABE_SHIFT           MCM_CM7_ISCR_WABE_SHIFT 
    #define MCM_CPCR_CM7_AHBSPRI_MASK     MCM_CM7_CPCR_CM7_AHBSPRI_MASK
    #define MCM_ISCR_WABS_MASK            MCM_CM7_ISCR_WABS_MASK
    
/*     #define MCM MCM_0_CM7 */
    
    #define FPU_INPUT_DENORMAL_IRQ_SUPPORTED
    #define FPU_INEXACT_IRQ_SUPPORTED
    #define FPU_UNDERFLOW_IRQ_SUPPORTED
    #define FPU_OVERFLOW_IRQ_SUPPORTED
    #define FPU_DIVIDE_BY_ZERO_IRQ_SUPPORTED
    #define FPU_INVALID_OPERATION_IRQ_SUPPORTED
    #define TCM_WRITE_ABORT_IRQ_SUPPORTED
    
    #define MCM_HAS_WABS_SUPPORTED
    
    #define MCM_HAS_PLATFORM_REVISION
#else
    #error "Unknown platform!"
#endif


#endif /* SYSTEM_IP_DEVICE_REGISTERS_H_ */

/** @} */
