/*==================================================================================================
*   Project              : RTD AUTOSAR 4.7 
*   Platform             : CORTEXM
*   Peripheral           : SIUL2
*   Dependencies         : none
*
*   Autosar Version      : 4.7.0
*   Autosar Revision     : ASR_REL_4_7_REV_0000
*   Autosar Conf.Variant :
*   SW Version           : 4.0.0
*   Build Version        : S32K3_S32M27x_AUTOSAR_R21-11_RTD_4_0_0_D2311_ASR_REL_4_7_REV_0000_20231128
*
*   Copyright 2020 - 2023 NXP
*
*   NXP Confidential. This software is owned or controlled by NXP and may only be
*   used strictly in accordance with the applicable license terms. By expressly
*   accepting such terms or by downloading, installing, activating and/or otherwise
*   using the software, you are agreeing that you have read, and that you agree to
*   comply with and are bound by, such license terms. If you do not agree to be
*   bound by the applicable license terms, then you may not retain, install,
*   activate or otherwise use the software.
==================================================================================================*/

/**
*   @file      Tspc_Port_Ip_Cfg.h
*
*   @addtogroup Port_CFG
*   @{
*/

#ifdef __cplusplus
extern "C"{
#endif


/*==================================================================================================
                                         INCLUDE FILES
 1) system and project includes
 2) needed interfaces from external units
 3) internal and external interfaces from this unit
==================================================================================================*/
#include "Tspc_Port_Ip_Cfg.h"

/*==================================================================================================
*                              SOURCE FILE VERSION INFORMATION
==================================================================================================*/
#define TSPC_PORT_IP_VENDOR_ID_CFG_C                       43
#define TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_C        4
#define TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_C        7
#define TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_C     0
#define TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_C                4
#define TSPC_PORT_IP_SW_MINOR_VERSION_CFG_C                0
#define TSPC_PORT_IP_SW_PATCH_VERSION_CFG_C                0

/*==================================================================================================
*                                     FILE VERSION CHECKS
==================================================================================================*/
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same vendor */
#if (TSPC_PORT_IP_VENDOR_ID_CFG_C != TSPC_PORT_IP_VENDOR_ID_CFG_H)
    #error "Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h have different vendor ids"
#endif
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same Autosar version */
#if ((TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_C    != TSPC_PORT_IP_AR_RELEASE_MAJOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_C    != TSPC_PORT_IP_AR_RELEASE_MINOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_C != TSPC_PORT_IP_AR_RELEASE_REVISION_VERSION_CFG_H) \
    )
    #error "AutoSar Version Numbers of Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are different"
#endif
/* Check if Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are of the same Software version */
#if ((TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_C != TSPC_PORT_IP_SW_MAJOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_SW_MINOR_VERSION_CFG_C != TSPC_PORT_IP_SW_MINOR_VERSION_CFG_H) || \
    (TSPC_PORT_IP_SW_PATCH_VERSION_CFG_C != TSPC_PORT_IP_SW_PATCH_VERSION_CFG_H)    \
    )
    #error "Software Version Numbers of Tspc_Port_Ip_Cfg.c and Tspc_Port_Ip_Cfg.h are different"
#endif

/*==================================================================================================
                             LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
==================================================================================================*/

/*==================================================================================================
                                             LOCAL MACROS
==================================================================================================*/

/*==================================================================================================
                                            LOCAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
                                           LOCAL VARIABLES
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL CONSTANTS
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL VARIABLES
==================================================================================================*/

/* clang-format off */

/*
 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
PortContainer_0_BOARD_InitPeripherals:
- options: {callFromInitBoot: 'true', coreID: M7_0}
- pin_list:
  - {pin_num: '137', peripheral: SIUL2, signal: 'gpio, 0', pin_signal: PTA0, direction: INPUT/OUTPUT}
  - {pin_num: '72', peripheral: LPSPI2, signal: lpspi2_pcs0, pin_signal: PTB25, identifier: MCU_EC_SPI2_CS, direction: OUTPUT}
  - {pin_num: '80', peripheral: LPSPI2, signal: lpspi2_sck, pin_signal: PTB29, direction: OUTPUT}
  - {pin_num: '76', peripheral: LPSPI2, signal: lpspi2_sin, pin_signal: PTB28, direction: INPUT}
  - {pin_num: '75', peripheral: LPSPI2, signal: lpspi2_sout, pin_signal: PTB27, direction: OUTPUT}
  - {pin_num: '124', peripheral: SIUL2, signal: 'gpio, 2', pin_signal: PTA2, direction: OUTPUT}
  - {pin_num: '123', peripheral: SIUL2, signal: 'gpio, 3', pin_signal: PTA3, direction: INPUT}
  - {pin_num: '172', peripheral: ADC0, signal: adc0_p2, pin_signal: PTA8}
  - {pin_num: '171', peripheral: ADC0, signal: adc0_p7, pin_signal: PTA9}
  - {pin_num: '155', peripheral: ADC1, signal: adc1_p1, pin_signal: PTA13}
  - {pin_num: '145', peripheral: ADC1, signal: adc1_p7, pin_signal: PTA15}
  - {pin_num: '8', peripheral: ADC0, signal: adc0_p1, pin_signal: PTD0}
  - {pin_num: '162', peripheral: ADC1, signal: adc1_p3, pin_signal: PTE1}
  - {pin_num: '147', peripheral: ADC1, signal: adc1_p5, pin_signal: PTE2}
  - {pin_num: '10', peripheral: ADC0, signal: adc0_p5, pin_signal: PTE10}
  - {pin_num: '9', peripheral: ADC0, signal: adc0_p6, pin_signal: PTE11}
  - {pin_num: '4', peripheral: ADC0, signal: adc0_p4, pin_signal: PTE16}
  - {pin_num: '117', peripheral: eMIOS_0, signal: emios_0_ch_0_x, pin_signal: PTB12, direction: OUTPUT}
  - {pin_num: '116', peripheral: eMIOS_0, signal: emios_0_ch_1_g, pin_signal: PTB13, direction: OUTPUT}
  - {pin_num: '114', peripheral: eMIOS_0, signal: emios_0_ch_2_g, pin_signal: PTB14, direction: OUTPUT}
  - {pin_num: '113', peripheral: eMIOS_0, signal: emios_0_ch_3_g, pin_signal: PTB15, direction: OUTPUT}
  - {pin_num: '111', peripheral: eMIOS_1, signal: emios_1_ch_17_y, pin_signal: PTD20, direction: OUTPUT}
  - {pin_num: '115', peripheral: eMIOS_1, signal: emios_1_ch_18_y, pin_signal: PTD21, direction: OUTPUT}
  - {pin_num: '118', peripheral: eMIOS_1, signal: emios_1_ch_19_y, pin_signal: PTD22, direction: OUTPUT}
  - {pin_num: '122', peripheral: eMIOS_1, signal: emios_1_ch_20_y, pin_signal: PTD23, direction: OUTPUT}
  - {pin_num: '125', peripheral: eMIOS_1, signal: emios_1_ch_21_y, pin_signal: PTD24, direction: OUTPUT}
  - {pin_num: '131', peripheral: eMIOS_1, signal: emios_1_ch_23_x, pin_signal: PTD26, direction: OUTPUT}
  - {pin_num: '31', peripheral: LPUART2, signal: lpuart2_rx, pin_signal: PTD17, identifier: PTD17_LPUART_2_RX}
  - {pin_num: '29', peripheral: LPUART2, signal: lpuart2_tx, pin_signal: PTE12, direction: OUTPUT}
  - {pin_num: '98', peripheral: LPI2C0, signal: lpi2c0_scl, pin_signal: PTC8, direction: INPUT/OUTPUT}
  - {pin_num: '97', peripheral: LPI2C0, signal: lpi2c0_sda, pin_signal: PTC9, direction: INPUT/OUTPUT}
  - {pin_num: '88', peripheral: FXIO, signal: fxio_d17, pin_signal: PTC24, direction: INPUT/OUTPUT}
  - {pin_num: '89', peripheral: FXIO, signal: fxio_d18, pin_signal: PTC25, direction: INPUT/OUTPUT}
  - {pin_num: '13', peripheral: FXIO, signal: fxio_d6, pin_signal: PTE4, direction: INPUT/OUTPUT}
  - {pin_num: '12', peripheral: FXIO, signal: fxio_d7, pin_signal: PTE5, direction: INPUT/OUTPUT}
  - {pin_num: '159', peripheral: SYSTEM, signal: clkout_standby, pin_signal: PTA12, identifier: '', InitValue: state_1}
 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
 */
/* clang-format on */

/* No registers that support TSPC were configured*/

/*==================================================================================================
                                      LOCAL FUNCTION PROTOTYPES
==================================================================================================*/

/*==================================================================================================
                                           LOCAL FUNCTIONS
==================================================================================================*/

/*==================================================================================================
                                           GLOBAL FUNCTIONS
==================================================================================================*/


#ifdef __cplusplus
}
#endif

/** @} */
