<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="S32K312" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_15 http://mcuxpresso.nxp.com/XSD/mex_configuration_15.xsd" uuid="cb0a0571-31b0-4026-b225-2a0da4ce6ac1" version="15" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_15" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
   <common>
      <processor>S32K312</processor>
      <package>S32K312_172HDQFP</package>
      <mcu_data>PlatformSDK_S32K3</mcu_data>
      <cores selected="M7_0">
         <core name="Cortex-M7" id="M7_0" description=""/>
      </cores>
      <description></description>
   </common>
   <preferences>
      <validate_boot_init_only>true</validate_boot_init_only>
      <generate_extended_information>false</generate_extended_information>
      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
      <update_include_paths>true</update_include_paths>
      <generate_registers_defines>false</generate_registers_defines>
      <enable_code_preview>true</enable_code_preview>
   </preferences>
   <tools>
      <pins name="Pins" version="15.0" enabled="true" update_project_code="true">
         <generated_project_files>
            <file path="board/Siul2_Port_Ip_Cfg.c" update_enabled="true"/>
            <file path="board/Siul2_Port_Ip_Cfg.h" update_enabled="true"/>
            <file path="board/Tspc_Port_Ip_Cfg.c" update_enabled="true"/>
            <file path="board/Tspc_Port_Ip_Cfg.h" update_enabled="true"/>
         </generated_project_files>
         <pins_profile>
            <processor_version>0.0.0</processor_version>
            <pin_labels>
               <pin_label pin_num="72" pin_signal="PTB25" label="MCU_EC_SPI2_CS" identifier="MCU_EC_SPI2_Sin;MCU_EC_SPI2_CS"/>
               <pin_label pin_num="80" pin_signal="PTB29" label="MCU_EC_SPI2_Clk" identifier="MCU_EC_SPI2_Clk"/>
               <pin_label pin_num="76" pin_signal="PTB28" label="MCU_EC_SPI2_Sin" identifier="MCU_EC_SPI2_Sin"/>
               <pin_label pin_num="75" pin_signal="PTB27" label="MCU_EC_SPI2_Sout" identifier="MCU_EC_SPI2_Sout"/>
               <pin_label pin_num="124" pin_signal="PTA2" label="GPIO[2]" identifier="GPIO_2"/>
               <pin_label pin_num="123" pin_signal="PTA3" label="GPIO[3]" identifier="GPIO_3"/>
               <pin_label pin_num="172" pin_signal="PTA8" label="ADC0_P2" identifier="ADC0_P2"/>
               <pin_label pin_num="171" pin_signal="PTA9" label="ADC0_P7" identifier="ADC0_P7"/>
               <pin_label pin_num="155" pin_signal="PTA13" label="ADC1_P1" identifier="ADC1_P1"/>
               <pin_label pin_num="145" pin_signal="PTA15" label="ADC1_P7" identifier="ADC1_P7"/>
               <pin_label pin_num="8" pin_signal="PTD0" label="ADC0_P1" identifier="ADC0_P1"/>
               <pin_label pin_num="162" pin_signal="PTE1" label="ADC1_P3" identifier="ADC1_P3"/>
               <pin_label pin_num="147" pin_signal="PTE2" label="ADC1_P5" identifier="ADC1_P5"/>
               <pin_label pin_num="10" pin_signal="PTE10" label="ADC0_P5" identifier="ADC0_P5"/>
               <pin_label pin_num="9" pin_signal="PTE11" label="ADC0_P6" identifier="ADC0_P6"/>
               <pin_label pin_num="4" pin_signal="PTE16" label="ADC0_P4" identifier="ADC0_P4"/>
               <pin_label pin_num="117" pin_signal="PTB12" label="eMIOS_0_CH[0]_X" identifier="eMIOS_0_CH0_X"/>
               <pin_label pin_num="116" pin_signal="PTB13" label="eMIOS_0_CH[1]_G" identifier="eMIOS_0_CH1_X"/>
               <pin_label pin_num="114" pin_signal="PTB14" label="eMIOS_0_CH[2]_G" identifier="eMIOS_0_CH2_G"/>
               <pin_label pin_num="113" pin_signal="PTB15" label="eMIOS_0_CH[3]_G" identifier="eMIOS_0_CH3_G"/>
               <pin_label pin_num="111" pin_signal="PTD20" label="eMIOS_1_CH[17]_Y" identifier="eMIOS_1_CH17_Y"/>
               <pin_label pin_num="115" pin_signal="PTD21" label="eMIOS_1_CH[18]_Y" identifier="eMIOS_1_CH18_Y"/>
               <pin_label pin_num="118" pin_signal="PTD22" label="eMIOS_1_CH[19]_Y" identifier="eMIOS_1_CH19_Y"/>
               <pin_label pin_num="122" pin_signal="PTD23" label="eMIOS_1_CH[20]_Y" identifier="eMIOS_1_CH20_Y"/>
               <pin_label pin_num="125" pin_signal="PTD24" label="eMIOS_1_CH[21]_Y" identifier="eMIOS_1_CH21_Y"/>
               <pin_label pin_num="131" pin_signal="PTD26" label="eMIOS_1_CH[23]_X" identifier="eMIOS_1_CH23_X"/>
               <pin_label pin_num="29" pin_signal="PTE12" label="LPUART_2_TX" identifier="PTE12_LPUART_2_TX"/>
               <pin_label pin_num="31" pin_signal="PTD17" label="LPUART_2_RX" identifier="PTE12_LPUART_2_RX;PTD17_LPUART_2_RX"/>
               <pin_label pin_num="159" pin_signal="PTA12" label="Ext_WDG" identifier="Ext_WDG"/>
            </pin_labels>
         </pins_profile>
         <functions_list>
            <function name="PortContainer_0_BOARD_InitPeripherals">
               <description>Configures pin routing and optionally pin electrical features.</description>
               <options>
                  <callFromInitBoot>true</callFromInitBoot>
                  <coreID>M7_0</coreID>
               </options>
               <dependencies>
                  <dependency resourceType="SWComponent" resourceId="platform.driver.pins" description="Pins initialization requires the PINS Driver in the project." problem_level="2" source="Pins:PortContainer_0_BOARD_InitPeripherals">
                     <feature name="enabled" evaluation="equal" configuration="M7_0">
                        <data>true</data>
                     </feature>
                  </dependency>
               </dependencies>
               <pins>
                  <pin peripheral="SIUL2" signal="gpio, 0" pin_num="137" pin_signal="PTA0">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPSPI2" signal="lpspi2_pcs0" pin_num="72" pin_signal="PTB25">
                     <pin_features>
                        <pin_feature name="identifier" value="MCU_EC_SPI2_CS"/>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPSPI2" signal="lpspi2_sck" pin_num="80" pin_signal="PTB29">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPSPI2" signal="lpspi2_sin" pin_num="76" pin_signal="PTB28">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPSPI2" signal="lpspi2_sout" pin_num="75" pin_signal="PTB27">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="SIUL2" signal="gpio, 2" pin_num="124" pin_signal="PTA2">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="SIUL2" signal="gpio, 3" pin_num="123" pin_signal="PTA3">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="ADC0" signal="adc0_p2" pin_num="172" pin_signal="PTA8"/>
                  <pin peripheral="ADC0" signal="adc0_p7" pin_num="171" pin_signal="PTA9"/>
                  <pin peripheral="ADC1" signal="adc1_p1" pin_num="155" pin_signal="PTA13"/>
                  <pin peripheral="ADC1" signal="adc1_p7" pin_num="145" pin_signal="PTA15"/>
                  <pin peripheral="ADC0" signal="adc0_p1" pin_num="8" pin_signal="PTD0"/>
                  <pin peripheral="ADC1" signal="adc1_p3" pin_num="162" pin_signal="PTE1"/>
                  <pin peripheral="ADC1" signal="adc1_p5" pin_num="147" pin_signal="PTE2"/>
                  <pin peripheral="ADC0" signal="adc0_p5" pin_num="10" pin_signal="PTE10"/>
                  <pin peripheral="ADC0" signal="adc0_p6" pin_num="9" pin_signal="PTE11"/>
                  <pin peripheral="ADC0" signal="adc0_p4" pin_num="4" pin_signal="PTE16"/>
                  <pin peripheral="eMIOS_0" signal="emios_0_ch_0_x" pin_num="117" pin_signal="PTB12">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_0" signal="emios_0_ch_1_g" pin_num="116" pin_signal="PTB13">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_0" signal="emios_0_ch_2_g" pin_num="114" pin_signal="PTB14">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_0" signal="emios_0_ch_3_g" pin_num="113" pin_signal="PTB15">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_17_y" pin_num="111" pin_signal="PTD20">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_18_y" pin_num="115" pin_signal="PTD21">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_19_y" pin_num="118" pin_signal="PTD22">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_20_y" pin_num="122" pin_signal="PTD23">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_21_y" pin_num="125" pin_signal="PTD24">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="eMIOS_1" signal="emios_1_ch_23_x" pin_num="131" pin_signal="PTD26">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPUART2" signal="lpuart2_rx" pin_num="31" pin_signal="PTD17">
                     <pin_features>
                        <pin_feature name="identifier" value="PTD17_LPUART_2_RX"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPUART2" signal="lpuart2_tx" pin_num="29" pin_signal="PTE12">
                     <pin_features>
                        <pin_feature name="direction" value="OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPI2C0" signal="lpi2c0_scl" pin_num="98" pin_signal="PTC8">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="LPI2C0" signal="lpi2c0_sda" pin_num="97" pin_signal="PTC9">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="FXIO" signal="fxio_d17" pin_num="88" pin_signal="PTC24">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="FXIO" signal="fxio_d18" pin_num="89" pin_signal="PTC25">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="FXIO" signal="fxio_d6" pin_num="13" pin_signal="PTE4">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="FXIO" signal="fxio_d7" pin_num="12" pin_signal="PTE5">
                     <pin_features>
                        <pin_feature name="direction" value="INPUT/OUTPUT"/>
                     </pin_features>
                  </pin>
                  <pin peripheral="SYSTEM" signal="clkout_standby" pin_num="159" pin_signal="PTA12">
                     <pin_features>
                        <pin_feature name="identifier" value=""/>
                        <pin_feature name="InitValue" value="state_1"/>
                     </pin_features>
                  </pin>
               </pins>
            </function>
         </functions_list>
      </pins>
      <clocks name="Clocks" version="13.0" enabled="true" update_project_code="true">
         <generated_project_files>
            <file path="generate/include/Clock_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Clock_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/src/Clock_Ip_Cfg.c" update_enabled="true"/>
         </generated_project_files>
         <clocks_profile>
            <processor_version>0.0.0</processor_version>
         </clocks_profile>
         <clock_configurations>
            <clock_configuration name="ClockConfig0" id_prefix="" prefix_user_defined="false">
               <description></description>
               <options/>
               <dependencies>
                  <dependency resourceType="PinSignal" resourceId="FXOSC_CLK.EXTAL" description="&apos;External pin&apos; (Pins tool id: FXOSC_CLK.EXTAL, Clocks tool id: FXOSC_CLK.EXTAL) needs to be routed" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                     <feature name="direction" evaluation="">
                        <data>INPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="FXOSC_CLK.EXTAL" description="&apos;External pin&apos; (Pins tool id: FXOSC_CLK.EXTAL, Clocks tool id: FXOSC_CLK.EXTAL) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="direction" evaluation="">
                        <data>INPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="FXOSC_CLK.XTAL" description="&apos;External pin&apos; (Pins tool id: FXOSC_CLK.XTAL, Clocks tool id: FXOSC_CLK.XTAL) needs to be routed" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                     <feature name="direction" evaluation="">
                        <data>OUTPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="FXOSC_CLK.XTAL" description="&apos;External pin&apos; (Pins tool id: FXOSC_CLK.XTAL, Clocks tool id: FXOSC_CLK.XTAL) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="direction" evaluation="">
                        <data>OUTPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="SXOSC_CLK.EXTAL" description="&apos;External pin&apos; (Pins tool id: SXOSC_CLK.EXTAL, Clocks tool id: SXOSC_CLK.EXTAL) needs to be routed" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                     <feature name="direction" evaluation="">
                        <data>INPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="SXOSC_CLK.EXTAL" description="&apos;External pin&apos; (Pins tool id: SXOSC_CLK.EXTAL, Clocks tool id: SXOSC_CLK.EXTAL) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="direction" evaluation="">
                        <data>INPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="SXOSC_CLK.XTAL" description="&apos;External pin&apos; (Pins tool id: SXOSC_CLK.XTAL, Clocks tool id: SXOSC_CLK.XTAL) needs to be routed" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                     <feature name="direction" evaluation="">
                        <data>OUTPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PinSignal" resourceId="SXOSC_CLK.XTAL" description="&apos;External pin&apos; (Pins tool id: SXOSC_CLK.XTAL, Clocks tool id: SXOSC_CLK.XTAL) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:ClockConfig0">
                     <feature name="direction" evaluation="">
                        <data>OUTPUT</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.driver.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:ClockConfig0">
                     <feature name="enabled" evaluation="equal" configuration="M7_0">
                        <data>true</data>
                     </feature>
                  </dependency>
               </dependencies>
               <clock_sources>
                  <clock_source id="FXOSC_CLK.FXOSC_CLK.outFreq" value="16 MHz" locked="false" enabled="true"/>
                  <clock_source id="SXOSC_CLK.SXOSC_CLK.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
               </clock_sources>
               <clock_outputs>
                  <clock_output id="ADC0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="ADC1_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="AIPS_PLAT_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="AIPS_SLOW_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="BCTU0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="CLKOUT_RUN_CLK.outFreq" value="8 MHz" locked="false" accuracy=""/>
                  <clock_output id="CLKOUT_STANDBY_CLK.outFreq" value="4 kHz" locked="false" accuracy=""/>
                  <clock_output id="CMP0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="CMP1_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="CORE_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="CRC0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="DCM0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="DCM_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="DMAMUX0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="DMAMUX1_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD10_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD11_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD1_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD2_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD3_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD4_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD5_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD6_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD7_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD8_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD9_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EIM0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="EMIOS0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="EMIOS1_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="ERM0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="FIRCOUT.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLASH0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN2_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN3_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN4_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN5_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCANA_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCANB_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXIO0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="FXOSCOUT.outFreq" value="16 MHz" locked="false" accuracy=""/>
                  <clock_output id="HSE_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="INTM_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="LCU0_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="LCU1_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPI2C0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPI2C1_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI1_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI2_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI3_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART1_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART2_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART3_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART4_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART5_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART6_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART7_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="MSCM_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="PIT0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="PIT1_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="PLL_PHI0.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="PLL_PHI1.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="RTC0_CLK.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
                  <clock_output id="RTC_CLK.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
                  <clock_output id="SCS_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="SIRCOUT.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="SIUL2_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="STCU0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="STM0_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="STMA_CLK.outFreq" value="60 MHz" locked="false" accuracy=""/>
                  <clock_output id="SWT0_CLK.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="SXOSCOUT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
                  <clock_output id="TEMPSENSE_CLK.outFreq" value="120 MHz" locked="false" accuracy=""/>
                  <clock_output id="TRACE_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="TRGMUX0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="TSENSE0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
                  <clock_output id="WKPU0_CLK.outFreq" value="30 MHz" locked="false" accuracy=""/>
               </clock_outputs>
               <clock_settings>
                  <setting id="CORE_MFD.scale" value="120" locked="true"/>
                  <setting id="CORE_PLLODIV_0_DE" value="Enabled" locked="false"/>
                  <setting id="CORE_PLLODIV_1_DE" value="Enabled" locked="false"/>
                  <setting id="CORE_PLL_PD" value="Power_up" locked="false"/>
                  <setting id="FXOSC_PM" value="Crystal_mode" locked="false"/>
                  <setting id="FircStandbyConfig" value="Enabled" locked="false"/>
                  <setting id="MC_CGM_MUX_0.sel" value="PHI0" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV0.scale" value="1" locked="true"/>
                  <setting id="MC_CGM_MUX_0_DIV0_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV1.scale" value="2" locked="true"/>
                  <setting id="MC_CGM_MUX_0_DIV1_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV2.scale" value="4" locked="true"/>
                  <setting id="MC_CGM_MUX_0_DIV2_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV3.scale" value="2" locked="true"/>
                  <setting id="MC_CGM_MUX_0_DIV3_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV4.scale" value="4" locked="true"/>
                  <setting id="MC_CGM_MUX_0_DIV4_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_6.sel" value="N/A" locked="false"/>
                  <setting id="MC_CGM_MUX_6_DE0" value="Enabled" locked="false"/>
                  <setting id="MC_CGM_MUX_6_DIV0.scale" value="2" locked="true"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX1_MUX.sel" value="MC_CGM_MUX_0_DIV1" locked="false"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX3_DIV0.scale" value="2" locked="true"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX4_DIV0.scale" value="2" locked="true"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX5_DIV0.scale" value="8" locked="true"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX5_MUX.sel" value="SIRC_CLK" locked="false"/>
                  <setting id="PHI0.scale" value="2" locked="true"/>
                  <setting id="PHI1.scale" value="5" locked="true"/>
                  <setting id="PLL_PREDIV.scale" value="2" locked="true"/>
                  <setting id="POSTDIV.scale" value="4" locked="true"/>
                  <setting id="SXOSC_PM" value="Crystal_mode" locked="false"/>
                  <setting id="SircStandbyConfig" value="Enabled" locked="false"/>
               </clock_settings>
               <called_from_default_init>true</called_from_default_init>
            </clock_configuration>
            <clock_configuration name="ClocksFunc_STANDBY" id_prefix="" prefix_user_defined="false">
               <description></description>
               <options/>
               <dependencies>
                  <dependency resourceType="SWComponent" resourceId="platform.driver.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:ClocksFunc_STANDBY">
                     <feature name="enabled" evaluation="equal" configuration="M7_0">
                        <data>true</data>
                     </feature>
                  </dependency>
               </dependencies>
               <clock_sources/>
               <clock_outputs>
                  <clock_output id="ADC0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="ADC1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="AIPS_PLAT_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="AIPS_SLOW_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="BCTU0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="CLKOUT_STANDBY_CLK.outFreq" value="4 kHz" locked="false" accuracy=""/>
                  <clock_output id="CMP0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="CMP1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="CORE_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="CRC0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="DCM0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="DCM_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="DMAMUX0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="DMAMUX1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD10_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD11_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD2_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD3_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD4_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD5_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD6_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD7_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD8_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EDMA0_TCD9_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EIM0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EMIOS0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="EMIOS1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="ERM0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FIRCOUT.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLASH0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN2_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN3_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN4_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCAN5_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCANA_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXCANB_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXIO0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="HSE_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="INTM_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="LCU0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="LCU1_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPI2C0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPI2C1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI2_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPSPI3_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART2_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART3_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART4_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART5_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART6_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="LPUART7_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="MSCM_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="PIT0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="PIT1_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="SCS_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="SIRCOUT.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="SIUL2_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="STCU0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="STM0_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="STMA_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="SWT0_CLK.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="TEMPSENSE_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="TRACE_CLK.outFreq" value="48 MHz" locked="false" accuracy=""/>
                  <clock_output id="TRGMUX0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="TSENSE0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="WKPU0_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
               </clock_outputs>
               <clock_settings>
                  <setting id="FircStandbyConfig" value="Enabled" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV0_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV1_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV2_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV3_Trigger" value="Common" locked="false"/>
                  <setting id="MC_CGM_MUX_0_DIV4_Trigger" value="Common" locked="false"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX5_DIV0.scale" value="8" locked="true"/>
                  <setting id="MODULE_CLOCKS.MC_CGM_AUX5_MUX.sel" value="SIRC_CLK" locked="false"/>
                  <setting id="SircStandbyConfig" value="Enabled" locked="false"/>
               </clock_settings>
               <called_from_default_init>false</called_from_default_init>
            </clock_configuration>
         </clock_configurations>
      </clocks>
      <ddr name="DDR" version="1.0" enabled="false" update_project_code="true">
         <generated_project_files/>
         <components/>
      </ddr>
      <dcd name="DCD" version="1.0" enabled="false" update_project_code="true" isSelfTest="false">
         <generated_project_files/>
         <dcdx_profile>
            <processor_version>N/A</processor_version>
         </dcdx_profile>
         <dcdx_configurations/>
      </dcd>
      <ivt name="IVT" version="1.0" enabled="false" update_project_code="true">
         <generated_project_files/>
         <ivt_profile>
            <processor_version>N/A</processor_version>
         </ivt_profile>
      </ivt>
      <quadspi name="QuadSPI" version="1.0" enabled="false" update_project_code="true">
         <generated_project_files/>
         <quadspi_profile>
            <processor_version>N/A</processor_version>
         </quadspi_profile>
      </quadspi>
      <efuse name="eFUSE" version="1.0" enabled="false" update_project_code="true">
         <efuse_profile>
            <processor_version>N/A</processor_version>
         </efuse_profile>
      </efuse>
      <gtm name="GTM" version="1.0" enabled="false" update_project_code="true">
         <generated_project_files/>
         <gtm_profile>
            <processor_version>N/A</processor_version>
         </gtm_profile>
      </gtm>
      <periphs name="Peripherals" version="14.0" enabled="true" update_project_code="true">
         <dependencies>
            <dependency resourceType="SWComponent" resourceId="platform.driver.osif" description="工具链/IDE工程中未找到osif。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.osif" description="工具链/IDE工程不支持osif版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_port" description="工具链/IDE工程中未找到siul2_port。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_port" description="工具链/IDE工程不支持siul2_port版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpspi" description="工具链/IDE工程中未找到Lpspi。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpspi" description="工具链/IDE工程不支持Lpspi版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.dma" description="工具链/IDE工程中未找到dma。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.dma" description="工具链/IDE工程不支持dma版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.Rm" description="工具链/IDE工程中未找到Rm。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.Rm" description="工具链/IDE工程不支持Rm版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.IntCtrl_Ip" description="工具链/IDE工程中未找到IntCtrl_Ip。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.IntCtrl_Ip" description="工具链/IDE工程不支持IntCtrl_Ip版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.adc_sar" description="工具链/IDE工程中未找到adc_sar。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.adc_sar" description="工具链/IDE工程不支持adc_sar版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_dio" description="工具链/IDE工程中未找到siul2_dio。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_dio" description="工具链/IDE工程不支持siul2_dio版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_icu" description="工具链/IDE工程中未找到Siul2_Icu。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.siul2_icu" description="工具链/IDE工程不支持Siul2_Icu版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_gpt" description="工具链/IDE工程中未找到Emios_Gpt。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_gpt" description="工具链/IDE工程不支持Emios_Gpt版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_mcl" description="工具链/IDE工程中未找到emios_mcl。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_mcl" description="工具链/IDE工程不支持emios_mcl版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_pwm" description="工具链/IDE工程中未找到emios_pwm。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.emios_pwm" description="工具链/IDE工程不支持emios_pwm版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.os.freertos" description="工具链/IDE工程中未找到freertos。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.os.freertos" description="工具链/IDE工程不支持freertos版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.power" description="工具链/IDE工程中未找到Power。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.power" description="工具链/IDE工程不支持Power版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpuart_uart" description="工具链/IDE工程中未找到Lpuart_Uart。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpuart_uart" description="工具链/IDE工程不支持Lpuart_Uart版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.stm" description="工具链/IDE工程中未找到Stm。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.stm" description="工具链/IDE工程不支持Stm版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.flexio_mcl" description="工具链/IDE工程中未找到flexio_mcl。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.flexio_mcl" description="工具链/IDE工程不支持flexio_mcl版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.flexio_i2c" description="工具链/IDE工程中未找到Flexio_I2c。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.flexio_i2c" description="工具链/IDE工程不支持Flexio_I2c版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpi2c" description="工具链/IDE工程中未找到Lpi2c。工程不会被编译！" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data type="Boolean">true</data>
               </feature>
            </dependency>
            <dependency resourceType="SWComponent" resourceId="platform.driver.lpi2c" description="工具链/IDE工程不支持Lpi2c版本。所需值: ${required_value}, 实际值: ${actual_value}. 工程可能没有被正确编译。" problem_level="1" source="Peripherals">
               <feature name="version" evaluation="equivalent">
                  <data type="Version">1.0.0</data>
               </feature>
            </dependency>
            <dependency resourceType="Tool" resourceId="Clocks" description="外围设备工具需要 Clocks 工具，但它已被禁用。" problem_level="2" source="Peripherals">
               <feature name="enabled" evaluation="equal">
                  <data>true</data>
               </feature>
            </dependency>
         </dependencies>
         <generated_project_files>
            <file path="generate/include/Adc_Sar_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Adc_Sar_Ip_CfgDefines.h" update_enabled="true"/>
            <file path="generate/include/Adc_Sar_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Axbs_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Axbs_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Axbs_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/CDD_Rm_Cfg.h" update_enabled="true"/>
            <file path="generate/include/CDD_Rm_Ipw_Cfg.h" update_enabled="true"/>
            <file path="generate/include/CDD_Rm_Ipw_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/CDD_Rm_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Dma_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Dma_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Dma_Ip_Cfg_DeviceRegistersV3.h" update_enabled="true"/>
            <file path="generate/include/Dma_Ip_Cfg_Devices.h" update_enabled="true"/>
            <file path="generate/include/Dma_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Dma_Mux_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Dma_Mux_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Dma_Mux_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Gpt_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Gpt_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Emios_Gpt_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Mcl_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Mcl_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Emios_Mcl_Ip_Cfg_DeviceRegisters.h" update_enabled="true"/>
            <file path="generate/include/Emios_Mcl_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Pwm_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Emios_Pwm_Ip_CfgDefines.h" update_enabled="true"/>
            <file path="generate/include/Emios_Pwm_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Flexio_I2c_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Flexio_I2c_Ip_CfgDefines.h" update_enabled="true"/>
            <file path="generate/include/Flexio_I2c_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Flexio_Mcl_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Flexio_Mcl_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Flexio_Mcl_Ip_Cfg_DeviceRegisters.h" update_enabled="true"/>
            <file path="generate/include/Flexio_Mcl_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/FreeRTOSConfig.h" update_enabled="true"/>
            <file path="generate/include/IntCtrl_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/IntCtrl_Ip_CfgDefines.h" update_enabled="true"/>
            <file path="generate/include/Lpi2c_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Lpi2c_Ip_CfgDefines.h" update_enabled="true"/>
            <file path="generate/include/Lpi2c_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Lpspi_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Lpspi_Ip_Sa_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Lpuart_Uart_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Lpuart_Uart_Ip_Defines.h" update_enabled="true"/>
            <file path="generate/include/Lpuart_Uart_Ip_Sa_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Mscm_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Mscm_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Mscm_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/OsIf_ArchCfg.h" update_enabled="true"/>
            <file path="generate/include/OsIf_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Pflash_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Pflash_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Pflash_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Power_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Power_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Power_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Sema42_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Siul2_Dio_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Siul2_Icu_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Siul2_Icu_Ip_Defines.h" update_enabled="true"/>
            <file path="generate/include/Siul2_Icu_Ip_SA_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Siul2_Port_Ip_Defines.h" update_enabled="true"/>
            <file path="generate/include/Soc_Ips.h" update_enabled="true"/>
            <file path="generate/include/Stm_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Stm_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Stm_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Virt_Wrapper_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Virt_Wrapper_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Virt_Wrapper_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Xbic_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Xbic_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Xbic_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/Xrdc_Ip_Cfg.h" update_enabled="true"/>
            <file path="generate/include/Xrdc_Ip_Cfg_Defines.h" update_enabled="true"/>
            <file path="generate/include/Xrdc_Ip_PBcfg.h" update_enabled="true"/>
            <file path="generate/include/modules.h" update_enabled="true"/>
            <file path="generate/src/Adc_Sar_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Axbs_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/CDD_Rm_Cfg.c" update_enabled="true"/>
            <file path="generate/src/CDD_Rm_Ipw_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/CDD_Rm_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Dma_Ip_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Dma_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Dma_Mux_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Emios_Gpt_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Emios_Mcl_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Emios_Pwm_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Flexio_I2c_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Flexio_Mcl_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/IntCtrl_Ip_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Lpi2c_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Lpspi_Ip_Sa_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Lpuart_Uart_Ip_Sa_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Mscm_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/OsIf_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Pflash_Ip_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Pflash_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Power_Ip_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Power_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Siul2_Icu_Ip_SA_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Stm_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Virt_Wrapper_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Xbic_Ip_PBcfg.c" update_enabled="true"/>
            <file path="generate/src/Xrdc_Ip_Cfg.c" update_enabled="true"/>
            <file path="generate/src/Xrdc_Ip_PBcfg.c" update_enabled="true"/>
         </generated_project_files>
         <peripherals_profile>
            <processor_version>0.0.0</processor_version>
         </peripherals_profile>
         <functional_groups>
            <functional_group name="BOARD_InitPeripherals" uuid="343d8c09-29ab-44df-a8a2-0e35bf16a60f" called_from_default_init="true" id_prefix="" core="M7_0">
               <description></description>
               <options/>
               <dependencies/>
               <instances>
                  <instance name="BaseNXP" uuid="a62e3129-c7ba-41d9-97d3-6cb575e7e56b" type="BaseNXP" type_id="Base" mode="general" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="BaseNXP">
                        <setting name="Name" value="BaseNXP"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="OsIfGeneral">
                           <setting name="Name" value="OsIfGeneral"/>
                           <setting name="OsIfMulticoreSupport" value="false"/>
                           <setting name="OsIfEnableUserModeSupport" value="false"/>
                           <setting name="OsIfDevErrorDetect" value="true"/>
                           <setting name="OsIfUseSystemTimer" value="false"/>
                           <setting name="OsIfUseCustomTimer" value="false"/>
                           <setting name="OsIfInstanceId" value="255"/>
                           <struct name="OsIfOperatingSystemType">
                              <setting name="Name" value="OsIfOperatingSystemType"/>
                              <setting name="Choice" value="OsIfBaremetalType"/>
                              <struct name="OsIfBaremetalType" quick_selection="Default">
                                 <setting name="Name" value="OsIfOperatingSystemType"/>
                              </struct>
                           </struct>
                           <array name="OsIfEcucPartitionRef"/>
                           <array name="OsIfCounterConfig"/>
                        </struct>
                        <struct name="CommonPublishedInformation" quick_selection="Default">
                           <setting name="Name" value="CommonPublishedInformation"/>
                           <setting name="ModuleId" value="0"/>
                           <setting name="VendorId" value="43"/>
                           <array name="VendorApiInfix"/>
                           <setting name="ArReleaseMajorVersion" value="4"/>
                           <setting name="ArReleaseMinorVersion" value="4"/>
                           <setting name="ArReleaseRevisionVersion" value="0"/>
                           <setting name="SwMajorVersion" value="4"/>
                           <setting name="SwMinorVersion" value="0"/>
                           <setting name="SwPatchVersion" value="0"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Siul2_Port" uuid="16480d47-54a9-4096-9930-a993ccf616b6" type="Siul2_Port" type_id="Siul2_Port" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Siul2_Port" quick_selection="Siul2PortDefault">
                        <setting name="Name" value="Siul2_Port"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="PortGeneral">
                           <setting name="Name" value="PortGeneral"/>
                           <setting name="SIUL2PortIPDevErrorDetect" value="true"/>
                           <setting name="PortEnableUserModeSupport" value="false"/>
                        </struct>
                        <struct name="PortConfigSet">
                           <setting name="Name" value="PortConfigSet"/>
                           <array name="PortContainer">
                              <struct name="0">
                                 <setting name="Name" value="PortContainer_0"/>
                                 <array name="PortPin">
                                    <struct name="0">
                                       <setting name="Name" value="PortPin_0"/>
                                       <setting name="PortPinPue" value="false"/>
                                       <setting name="PortPinPus" value="false"/>
                                       <setting name="PortPinSafeMode" value="false"/>
                                       <setting name="PortPinDse" value="false"/>
                                       <setting name="PortPinWithReadBack" value="false"/>
                                       <setting name="PortPinPke" value="false"/>
                                       <setting name="PortPinIfe" value="false"/>
                                       <setting name="PortPinDirectionChangeable" value="true"/>
                                       <setting name="PortPinModeChangeable" value="true"/>
                                       <setting name="PortPinInvertControl" value="false"/>
                                       <setting name="PortPinSiul2Instance" value="SIUL2_0"/>
                                       <setting name="PortPinId" value="1"/>
                                       <setting name="PortPinPcr" value="0"/>
                                       <setting name="PortPinInitialMode" value="PORT_GPIO_MODE"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Lpspi" uuid="6b0bc0ab-80a1-48da-8051-5dcb0bf0af50" type="Lpspi" type_id="Lpspi" mode="lpspi" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Lpspi">
                        <setting name="Name" value="Lpspi"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="SpiDriver">
                           <setting name="Name" value="SpiDriver"/>
                           <array name="SpiExternalDevice">
                              <struct name="0">
                                 <setting name="Name" value="SpiExternalDevice_0"/>
                                 <setting name="SpiBaudrate" value="5000000"/>
                                 <setting name="SpiUseBaudrateConfig" value="false"/>
                                 <setting name="SpiCsIdentifier" value="PCS0"/>
                                 <setting name="SpiCsPolarity" value="LOW"/>
                                 <setting name="SpiDataShiftEdge" value="LEADING"/>
                                 <setting name="SpiHwUnit" value="CSIB0"/>
                                 <setting name="SpiShiftClockIdleLevel" value="LOW"/>
                                 <setting name="SpiDataWidth" value="8"/>
                                 <setting name="SpiDefaultData" value="255"/>
                                 <setting name="SpiTransferStart" value="MSB"/>
                                 <setting name="SpiByteSwapTransfer" value="false"/>
                                 <setting name="SpiTimeClk2Cs" value="0.000001"/>
                                 <setting name="SpiTimeCs2Clk" value="0.000001"/>
                                 <setting name="SpiTimeCs2Cs" value="0.0000064"/>
                                 <setting name="SpiDeviceHalfDuplexSupport" value="false"/>
                                 <setting name="SpiTransferWidth" value="TRANSFER_1_BIT"/>
                                 <setting name="SpiHalfDuplexPinSelect" value="HALF_DUPLEX_SIN"/>
                                 <setting name="SpiCsBehavior" value="CS_KEEP_ASSERTED"/>
                                 <setting name="SpiDeviceDmaRepeatedTransferSupport" value="false"/>
                                 <array name="SpiDmaRepeatedTransferNotification"/>
                                 <setting name="SpiHostRequest" value="DISABLE"/>
                              </struct>
                           </array>
                           <array name="SpiBaudrateConfig"/>
                        </struct>
                        <struct name="SpiGeneral">
                           <setting name="Name" value="SpiGeneral"/>
                           <setting name="SpiEnableUserModeSupport" value="false"/>
                           <setting name="SpiEnableDmaFastTransferSupport" value="false"/>
                           <setting name="SpiHalfDuplexModeSupport" value="false"/>
                           <setting name="SpiHREQSupport" value="false"/>
                           <setting name="LpspiIpDevErrorDetect" value="true"/>
                           <setting name="SpiGlobalDmaEnable" value="true"/>
                           <setting name="SpiEnableLargeFrameSize" value="true"/>
                           <setting name="SpiDmaRepeatedTransferEnable" value="false"/>
                           <setting name="SpiTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                           <setting name="SpiTransmitTimeout" value="50000"/>
                           <array name="SpiPhyUnit">
                              <struct name="0">
                                 <setting name="Name" value="SpiPhyUnit_0"/>
                                 <setting name="SpiPhyUnitMapping" value="LPSPI_2"/>
                                 <setting name="SpiPinConfiguration" value="0"/>
                                 <setting name="SpiSamplePoint" value="0"/>
                                 <setting name="SpiPhyUnitClockFunctionalGroupRef" value="ClockConfig0"/>
                                 <setting name="SpiPhyUnitMode" value="SPI_MASTER"/>
                                 <setting name="SpiPhyUnitAsyncUseDma" value="true"/>
                                 <array name="SpiPhyTxDmaChannel">
                                    <setting name="0" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                 </array>
                                 <array name="SpiPhyRxDmaChannel">
                                    <setting name="0" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_RX"/>
                                 </array>
                                 <array name="SpiMaxDmaFastTransfer"/>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Dma_Ip" uuid="a6793345-4ea6-4268-b5c8-253fe65f0175" type="Dma_Ip" type_id="Dma_Ip" mode="general" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Dma_Ip">
                        <setting name="Name" value="Dma"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="MclGeneral">
                           <setting name="Name" value="MclGeneral"/>
                           <setting name="MclEnableUserModeSupport" value="false"/>
                           <struct name="MclDma">
                              <setting name="Name" value="MclDma"/>
                              <setting name="MclEnableDma" value="true"/>
                              <setting name="MclEnableDmaDevErrorDetect" value="false"/>
                           </struct>
                        </struct>
                        <struct name="MclConfig">
                           <setting name="Name" value="MclConfig"/>
                           <array name="dmaLogicInstance_ConfigType">
                              <struct name="0">
                                 <setting name="Name" value="dmaLogicInstance_ConfigType_0"/>
                                 <setting name="dmaLogicInstance_IdName" value="DMA_LOGIC_INST_0"/>
                                 <setting name="dmaLogicInstance_hwId" value="DMA_IP_HW_INST_0"/>
                                 <setting name="dmaLogicInstance_enDebug" value="false"/>
                                 <setting name="dmaLogicInstance_enRoundRobin" value="false"/>
                                 <setting name="dmaLogicInstance_enHaltAfterError" value="false"/>
                                 <setting name="dmaLogicInstance_enChLinking" value="false"/>
                                 <setting name="dmaLogicInstance_enGlMasterIdReplication" value="false"/>
                              </struct>
                           </array>
                           <array name="dmaLogicChannel_Type">
                              <struct name="0">
                                 <setting name="Name" value="dmaLogicChannel_SPI2_TX"/>
                                 <setting name="dmaLogicChannel_LogicName" value="DMA_LOGIC_CH_0"/>
                                 <setting name="dmaLogicChannel_HwInstId" value="DMA_IP_HW_INST_0"/>
                                 <setting name="dmaLogicChannel_HwChId" value="DMA_IP_HW_CH_0"/>
                                 <setting name="dmaLogicChannel_InterruptCallback" value="Lpspi_Ip_LPSPI_2_IrqTxDmaHandler"/>
                                 <setting name="dmaLogicChannel_ErrorInterruptCallback" value="NULL_PTR"/>
                                 <setting name="dmaLogicChannel_EnableGlobalConfig" value="true"/>
                                 <setting name="dmaLogicChannel_EnableTransferConfig" value="false"/>
                                 <setting name="dmaLogicChannel_EnableScatterGather" value="false"/>
                                 <struct name="dmaLogicChannel_ConfigType">
                                    <setting name="Name" value="dmaLogicChannel_ConfigType"/>
                                    <struct name="dmaLogicChannel_GlobalConfigType">
                                       <setting name="Name" value="dmaLogicChannel_GlobalConfigType"/>
                                       <struct name="dmaLogicChannelConfig_GlobalControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalControlType"/>
                                          <setting name="dmaGlobalControl_enMasterIdReplication" value="false"/>
                                          <setting name="dmaGlobalControl_enBufferedWrites" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalRequestType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalRequestType"/>
                                          <setting name="dmaGlobalRequest_enDmaRequest" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalInterruptType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalInterruptType"/>
                                          <setting name="dmaGlobalInterrupt_enDmaErrorInterrupt" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalPriorityType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalPriorityType"/>
                                          <setting name="dmaGlobalPriority_GroupPriority" value="DMA_IP_GROUP_PRIO0"/>
                                          <setting name="dmaGlobalPriority_LevelPriority" value="DMA_IP_LEVEL_PRIO0"/>
                                          <setting name="dmaGlobalPriority_enPreemption" value="false"/>
                                          <setting name="dmaGlobalPriority_disPreempt" value="false"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_TransferConfigType">
                                       <setting name="Name" value="dmaLogicChannel_TransferConfigType"/>
                                       <struct name="dmaLogicChannelConfig_TransferControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferControlType"/>
                                          <setting name="dmaLogicChannelConfig_enDmaMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDmaHalfMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_disDmaAutoHwReq" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enEndOfPacketSignal" value="false"/>
                                          <setting name="dmaLogicChannelConfig_bandwidthControl" value="DMA_IP_BWC_ENGINE_NO_STALL"/>
                                          <setting name="dmaLogicChannelConfig_DestinationStoreAddressType" value=""/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferSourceType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferSourceType"/>
                                          <setting name="dmaLogicChannelConfig_SourceSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_SourceLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_SourceModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferDestinationType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferDestinationType"/>
                                          <setting name="dmaLogicChannelConfig_DestinationSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_DestinationLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_DestinationModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMinorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMinorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enSourceOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDestinationOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_OffsetValueType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_enMinorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MinorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_Type_0"/>
                                          <setting name="dmaLogicChannelConfig_MinorLoopSizeType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMajorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMajorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enMajorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MajorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_Type_0"/>
                                          <setting name="dmaLogicChannelConfig_MajorLoopCountType" value="0"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_ScatterGatherConfigType">
                                       <setting name="Name" value="dmaLogicChannel_ScatterGatherConfigType"/>
                                       <array name="dmaLogicChannelConfig_ScatterGatherArrayType"/>
                                    </struct>
                                 </struct>
                              </struct>
                              <struct name="1">
                                 <setting name="Name" value="dmaLogicChannel_SPI2_RX"/>
                                 <setting name="dmaLogicChannel_LogicName" value="DMA_LOGIC_CH_1"/>
                                 <setting name="dmaLogicChannel_HwInstId" value="DMA_IP_HW_INST_0"/>
                                 <setting name="dmaLogicChannel_HwChId" value="DMA_IP_HW_CH_1"/>
                                 <setting name="dmaLogicChannel_InterruptCallback" value="Lpspi_Ip_LPSPI_2_IrqRxDmaHandler"/>
                                 <setting name="dmaLogicChannel_ErrorInterruptCallback" value="NULL_PTR"/>
                                 <setting name="dmaLogicChannel_EnableGlobalConfig" value="true"/>
                                 <setting name="dmaLogicChannel_EnableTransferConfig" value="false"/>
                                 <setting name="dmaLogicChannel_EnableScatterGather" value="false"/>
                                 <struct name="dmaLogicChannel_ConfigType">
                                    <setting name="Name" value="dmaLogicChannel_ConfigType"/>
                                    <struct name="dmaLogicChannel_GlobalConfigType">
                                       <setting name="Name" value="dmaLogicChannel_GlobalConfigType"/>
                                       <struct name="dmaLogicChannelConfig_GlobalControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalControlType"/>
                                          <setting name="dmaGlobalControl_enMasterIdReplication" value="false"/>
                                          <setting name="dmaGlobalControl_enBufferedWrites" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalRequestType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalRequestType"/>
                                          <setting name="dmaGlobalRequest_enDmaRequest" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalInterruptType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalInterruptType"/>
                                          <setting name="dmaGlobalInterrupt_enDmaErrorInterrupt" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalPriorityType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalPriorityType"/>
                                          <setting name="dmaGlobalPriority_GroupPriority" value="DMA_IP_GROUP_PRIO0"/>
                                          <setting name="dmaGlobalPriority_LevelPriority" value="DMA_IP_LEVEL_PRIO0"/>
                                          <setting name="dmaGlobalPriority_enPreemption" value="false"/>
                                          <setting name="dmaGlobalPriority_disPreempt" value="false"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_TransferConfigType">
                                       <setting name="Name" value="dmaLogicChannel_TransferConfigType"/>
                                       <struct name="dmaLogicChannelConfig_TransferControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferControlType"/>
                                          <setting name="dmaLogicChannelConfig_enDmaMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDmaHalfMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_disDmaAutoHwReq" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enEndOfPacketSignal" value="false"/>
                                          <setting name="dmaLogicChannelConfig_bandwidthControl" value="DMA_IP_BWC_ENGINE_NO_STALL"/>
                                          <setting name="dmaLogicChannelConfig_DestinationStoreAddressType" value=""/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferSourceType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferSourceType"/>
                                          <setting name="dmaLogicChannelConfig_SourceSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_SourceLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_SourceModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferDestinationType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferDestinationType"/>
                                          <setting name="dmaLogicChannelConfig_DestinationSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_DestinationLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_DestinationModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMinorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMinorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enSourceOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDestinationOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_OffsetValueType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_enMinorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MinorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MinorLoopSizeType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMajorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMajorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enMajorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MajorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MajorLoopCountType" value="0"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_ScatterGatherConfigType">
                                       <setting name="Name" value="dmaLogicChannel_ScatterGatherConfigType"/>
                                       <array name="dmaLogicChannelConfig_ScatterGatherArrayType"/>
                                    </struct>
                                 </struct>
                              </struct>
                              <struct name="2">
                                 <setting name="Name" value="dmaLogicChannel_UART2_TX"/>
                                 <setting name="dmaLogicChannel_LogicName" value="DMA_LOGIC_CH_2"/>
                                 <setting name="dmaLogicChannel_HwInstId" value="DMA_IP_HW_INST_0"/>
                                 <setting name="dmaLogicChannel_HwChId" value="DMA_IP_HW_CH_6"/>
                                 <setting name="dmaLogicChannel_InterruptCallback" value="Lpuart_2_Uart_Ip_DmaTxCompleteCallback"/>
                                 <setting name="dmaLogicChannel_ErrorInterruptCallback" value="NULL_PTR"/>
                                 <setting name="dmaLogicChannel_EnableGlobalConfig" value="true"/>
                                 <setting name="dmaLogicChannel_EnableTransferConfig" value="false"/>
                                 <setting name="dmaLogicChannel_EnableScatterGather" value="false"/>
                                 <struct name="dmaLogicChannel_ConfigType">
                                    <setting name="Name" value="dmaLogicChannel_ConfigType"/>
                                    <struct name="dmaLogicChannel_GlobalConfigType">
                                       <setting name="Name" value="dmaLogicChannel_GlobalConfigType"/>
                                       <struct name="dmaLogicChannelConfig_GlobalControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalControlType"/>
                                          <setting name="dmaGlobalControl_enMasterIdReplication" value="false"/>
                                          <setting name="dmaGlobalControl_enBufferedWrites" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalRequestType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalRequestType"/>
                                          <setting name="dmaGlobalRequest_enDmaRequest" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalInterruptType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalInterruptType"/>
                                          <setting name="dmaGlobalInterrupt_enDmaErrorInterrupt" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalPriorityType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalPriorityType"/>
                                          <setting name="dmaGlobalPriority_GroupPriority" value="DMA_IP_GROUP_PRIO0"/>
                                          <setting name="dmaGlobalPriority_LevelPriority" value="DMA_IP_LEVEL_PRIO0"/>
                                          <setting name="dmaGlobalPriority_enPreemption" value="false"/>
                                          <setting name="dmaGlobalPriority_disPreempt" value="false"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_TransferConfigType">
                                       <setting name="Name" value="dmaLogicChannel_TransferConfigType"/>
                                       <struct name="dmaLogicChannelConfig_TransferControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferControlType"/>
                                          <setting name="dmaLogicChannelConfig_enDmaMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDmaHalfMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_disDmaAutoHwReq" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enEndOfPacketSignal" value="false"/>
                                          <setting name="dmaLogicChannelConfig_bandwidthControl" value="DMA_IP_BWC_ENGINE_NO_STALL"/>
                                          <setting name="dmaLogicChannelConfig_DestinationStoreAddressType" value=""/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferSourceType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferSourceType"/>
                                          <setting name="dmaLogicChannelConfig_SourceSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_SourceLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_SourceModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferDestinationType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferDestinationType"/>
                                          <setting name="dmaLogicChannelConfig_DestinationSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_DestinationLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_DestinationModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMinorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMinorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enSourceOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDestinationOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_OffsetValueType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_enMinorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MinorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MinorLoopSizeType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMajorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMajorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enMajorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MajorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MajorLoopCountType" value="0"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_ScatterGatherConfigType">
                                       <setting name="Name" value="dmaLogicChannel_ScatterGatherConfigType"/>
                                       <array name="dmaLogicChannelConfig_ScatterGatherArrayType"/>
                                    </struct>
                                 </struct>
                              </struct>
                              <struct name="3">
                                 <setting name="Name" value="dmaLogicChannel_UART2_RX"/>
                                 <setting name="dmaLogicChannel_LogicName" value="DMA_LOGIC_CH_3"/>
                                 <setting name="dmaLogicChannel_HwInstId" value="DMA_IP_HW_INST_0"/>
                                 <setting name="dmaLogicChannel_HwChId" value="DMA_IP_HW_CH_7"/>
                                 <setting name="dmaLogicChannel_InterruptCallback" value="Lpuart_2_Uart_Ip_DmaRxCompleteCallback"/>
                                 <setting name="dmaLogicChannel_ErrorInterruptCallback" value="NULL_PTR"/>
                                 <setting name="dmaLogicChannel_EnableGlobalConfig" value="true"/>
                                 <setting name="dmaLogicChannel_EnableTransferConfig" value="false"/>
                                 <setting name="dmaLogicChannel_EnableScatterGather" value="false"/>
                                 <struct name="dmaLogicChannel_ConfigType">
                                    <setting name="Name" value="dmaLogicChannel_ConfigType"/>
                                    <struct name="dmaLogicChannel_GlobalConfigType">
                                       <setting name="Name" value="dmaLogicChannel_GlobalConfigType"/>
                                       <struct name="dmaLogicChannelConfig_GlobalControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalControlType"/>
                                          <setting name="dmaGlobalControl_enMasterIdReplication" value="false"/>
                                          <setting name="dmaGlobalControl_enBufferedWrites" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalRequestType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalRequestType"/>
                                          <setting name="dmaGlobalRequest_enDmaRequest" value="true"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalInterruptType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalInterruptType"/>
                                          <setting name="dmaGlobalInterrupt_enDmaErrorInterrupt" value="false"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_GlobalPriorityType">
                                          <setting name="Name" value="dmaLogicChannelConfig_GlobalPriorityType"/>
                                          <setting name="dmaGlobalPriority_GroupPriority" value="DMA_IP_GROUP_PRIO0"/>
                                          <setting name="dmaGlobalPriority_LevelPriority" value="DMA_IP_LEVEL_PRIO0"/>
                                          <setting name="dmaGlobalPriority_enPreemption" value="false"/>
                                          <setting name="dmaGlobalPriority_disPreempt" value="false"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_TransferConfigType">
                                       <setting name="Name" value="dmaLogicChannel_TransferConfigType"/>
                                       <struct name="dmaLogicChannelConfig_TransferControlType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferControlType"/>
                                          <setting name="dmaLogicChannelConfig_enDmaMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDmaHalfMajorInterrupt" value="false"/>
                                          <setting name="dmaLogicChannelConfig_disDmaAutoHwReq" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enEndOfPacketSignal" value="false"/>
                                          <setting name="dmaLogicChannelConfig_bandwidthControl" value="DMA_IP_BWC_ENGINE_NO_STALL"/>
                                          <setting name="dmaLogicChannelConfig_DestinationStoreAddressType" value=""/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferSourceType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferSourceType"/>
                                          <setting name="dmaLogicChannelConfig_SourceSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_SourceLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_SourceModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferDestinationType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferDestinationType"/>
                                          <setting name="dmaLogicChannelConfig_DestinationSignedOffsetType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_DestinationLastAddressAdjustmentType" value="0"/>
                                          <setting name="dmaTransferConfig_TransferSizeType" value="DMA_IP_TRANSFER_SIZE_1_BYTE"/>
                                          <setting name="dmaLogicChannelConfig_DestinationModuloType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMinorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMinorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enSourceOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_enDestinationOffset" value="false"/>
                                          <setting name="dmaLogicChannelConfig_OffsetValueType" value="0"/>
                                          <setting name="dmaLogicChannelConfig_enMinorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MinorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MinorLoopSizeType" value="0"/>
                                       </struct>
                                       <struct name="dmaLogicChannelConfig_TransferMajorLoopType">
                                          <setting name="Name" value="dmaLogicChannelConfig_TransferMajorLoopType"/>
                                          <setting name="dmaLogicChannelConfig_enMajorLoopLinkCh" value="false"/>
                                          <setting name="dynamic_dmaLogicChannelConfig_MajorLoopLinkChValueType" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                          <setting name="dmaLogicChannelConfig_MajorLoopCountType" value="0"/>
                                       </struct>
                                    </struct>
                                    <struct name="dmaLogicChannel_ScatterGatherConfigType">
                                       <setting name="Name" value="dmaLogicChannel_ScatterGatherConfigType"/>
                                       <array name="dmaLogicChannelConfig_ScatterGatherArrayType"/>
                                    </struct>
                                 </struct>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Rm" uuid="9a4ca054-706a-4904-8f9c-45b8ef87c6b0" type="Rm" type_id="Rm" mode="AUTOSAR" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Rm">
                        <setting name="Name" value="Rm"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="RmGeneral">
                           <setting name="Name" value="RmGeneral"/>
                           <setting name="Rm_VersionInfoApi" value="false"/>
                           <setting name="RmDevErrorDetect" value="false"/>
                           <setting name="RmEnableUserModeSupport" value="false"/>
                           <setting name="RmEnableXRDCSupport" value="false"/>
                           <setting name="RmEnableSema42Support" value="false"/>
                           <setting name="RmPflashConfigurable" value="false"/>
                           <setting name="RmCrossbarConfigurable" value="false"/>
                           <setting name="RmXbicConfigurable" value="false"/>
                           <setting name="RmVirtWrapperConfigurable" value="false"/>
                           <setting name="RmEnableDmaMuxSupport" value="true"/>
                           <setting name="RmEnableMscmSupport" value="false"/>
                        </struct>
                        <struct name="RmConfigSet">
                           <setting name="Name" value="RmConfigSet"/>
                           <struct name="Xrdc_Configuration">
                              <setting name="Name" value="Xrdc_Configuration"/>
                              <setting name="XrdcDevErrorDetect" value="false"/>
                              <setting name="XrdcRegistersLock" value="false"/>
                              <setting name="XrdcCRLockBit" value="false"/>
                              <setting name="XrdcPIDRegisterLock" value="XRDC_PID_UNLOCKED"/>
                           </struct>
                           <array name="Rm_XRDC_Domain_Assignment">
                              <struct name="0">
                                 <setting name="Name" value="Rm_XRDC_Domain_Assignment_0"/>
                                 <setting name="DomainID" value="XRDC_DOMAIN0"/>
                                 <array name="Domain_Master_Assignment">
                                    <struct name="0">
                                       <setting name="Name" value="Domain_Master_Assignment_0"/>
                                       <setting name="XrdcMasterInstance" value="Xrdc_0_CM7_0"/>
                                       <setting name="XrdcPIDEnable" value="XRDC_MDA_PID_DISABLE"/>
                                       <setting name="XrdcMasterPID" value="0"/>
                                       <setting name="XrdcMasterPIDMask" value="0"/>
                                       <setting name="XrdcDIDBDisable" value="false"/>
                                       <setting name="XrdcMDADFMTLockBit" value="false"/>
                                       <setting name="XrdcMasterMode" value="XRDC_SECURE"/>
                                       <setting name="XrdcMasterPriviledgeMode" value="XRDC_USER_MODE"/>
                                    </struct>
                                 </array>
                                 <array name="Domain_Peripheral_Assignment">
                                    <struct name="0">
                                       <setting name="Name" value="Domain_Peripheral_Assignment_0"/>
                                       <setting name="Domain_Peripheral_Assignment" value="/Rm/Rm/RmConfigSet/Rm_XRDC_Peripheral_Config_0"/>
                                       <setting name="Secure_Access_Policy" value="XRDC_FULL_ACCESS"/>
                                       <setting name="Non_Secure_Access_Policy" value="XRDC_FULL_ACCESS"/>
                                    </struct>
                                 </array>
                                 <array name="Domain_Memory_Assignment">
                                    <struct name="0">
                                       <setting name="Name" value="Domain_Memory_Assignment_0"/>
                                       <setting name="Domain_Memory_Assignment" value="/Rm/Rm/RmConfigSet/Rm_XRDC_Memory_Config_0"/>
                                       <setting name="Secure_Access_Policy" value="XRDC_FULL_ACCESS"/>
                                       <setting name="Non_Secure_Access_Policy" value="XRDC_FULL_ACCESS"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                           <array name="Rm_XRDC_Memory_Config">
                              <struct name="0">
                                 <setting name="Name" value="Rm_XRDC_Memory_Config_0"/>
                                 <setting name="XrdcMrcInstance" value="Xrdc_0_PFLASH_0"/>
                                 <setting name="XrdcStartAddress" value="0x0"/>
                                 <setting name="XrdcEndAddress" value="0xFFFFFFFF"/>
                                 <setting name="XrdcSema4Enable" value="false"/>
                                 <setting name="XrdcSema42LogicChannel" value=""/>
                                 <setting name="XrdcMRGDLockBit" value="false"/>
                              </struct>
                           </array>
                           <array name="Rm_XRDC_Peripheral_Config">
                              <struct name="0">
                                 <setting name="Name" value="Rm_XRDC_Peripheral_Config_0"/>
                                 <setting name="XrdcPeripheralSlot" value="Xrdc_0_TRGMUX"/>
                                 <setting name="XrdcSema4Enable" value="false"/>
                                 <setting name="XrdcSema42LogicChannel" value=""/>
                                 <setting name="XrdcPDACLockBit" value="false"/>
                              </struct>
                           </array>
                           <struct name="Sema42_ModuleConfig">
                              <setting name="Name" value="Sema42_ModuleConfig"/>
                              <setting name="Sema42DevErrorDetect" value="false"/>
                              <array name="Sema42LogicChannelConfiguration"/>
                           </struct>
                           <struct name="Pflash_Configuration">
                              <setting name="Name" value="Pflash_Configuration"/>
                              <setting name="PflashDevErrorDetect" value="false"/>
                              <array name="PflashMasterProtection"/>
                           </struct>
                           <struct name="Crossbar_Configuration">
                              <setting name="Name" value="Crossbar_Configuration"/>
                              <setting name="CrossbarDevErrorDetect" value="false"/>
                              <array name="RmCrossbarInstance">
                                 <struct name="0">
                                    <setting name="Name" value="RmCrossbarInstance_0"/>
                                    <setting name="RmCrossbarHwInstance" value="AXBS_0"/>
                                    <array name="RmCrossbarHwSlavePort">
                                       <struct name="0">
                                          <setting name="Name" value="RmCrossbarHwSlavePort_0"/>
                                          <setting name="RmSlavePortNumber" value="0"/>
                                          <setting name="RmCrossbarPrioMaster0" value="0"/>
                                          <setting name="RmCrossbarPrioMaster1" value="1"/>
                                          <setting name="RmCrossbarPrioMaster2" value="2"/>
                                          <setting name="RmCrossbarPrioMaster3" value="3"/>
                                          <setting name="RmCrossbarPrioMaster4" value="4"/>
                                          <setting name="RmCrossbarPrioMaster5" value="5"/>
                                          <setting name="RmCrossbarPrioMaster6" value="6"/>
                                          <setting name="RmCrossbarPrioMaster7" value="7"/>
                                          <setting name="RmCrossbarEnableLock" value="false"/>
                                          <setting name="RmCrossbarHaltLowPrio" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM0" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM1" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM2" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM3" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM4" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM5" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM6" value="false"/>
                                          <setting name="RmCrossbarEnablePrioElevM7" value="false"/>
                                          <setting name="RmCrossbarEnableFixedPrio" value="false"/>
                                          <setting name="RmCrossbarParkingControl" value="ParkField"/>
                                          <setting name="RmCrossbarParkField" value="0"/>
                                       </struct>
                                    </array>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="Xbic_Configuration">
                              <setting name="Name" value="Xbic_Configuration"/>
                              <setting name="XbicDevErrorDetect" value="false"/>
                              <array name="XbicCheckingControl"/>
                           </struct>
                           <struct name="Virt_Wrapper_Configuration">
                              <setting name="Name" value="Virt_Wrapper_Configuration"/>
                              <setting name="VirtWrapperDevErrorDetect" value="false"/>
                              <array name="Mscr_Config_List">
                                 <struct name="0">
                                    <setting name="Name" value="Mscr_Config_List_0"/>
                                    <setting name="MscrName" value="PTA0"/>
                                    <setting name="MscrNumber" value="0"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_0"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="Mscr_Config_List_1"/>
                                    <setting name="MscrName" value="PTA1"/>
                                    <setting name="MscrNumber" value="1"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_1"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="Mscr_Config_List_2"/>
                                    <setting name="MscrName" value="PTA2"/>
                                    <setting name="MscrNumber" value="2"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_2"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="Mscr_Config_List_3"/>
                                    <setting name="MscrName" value="PTA3"/>
                                    <setting name="MscrNumber" value="3"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_3"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="Mscr_Config_List_4"/>
                                    <setting name="MscrName" value="PTA4"/>
                                    <setting name="MscrNumber" value="4"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_4"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="Mscr_Config_List_5"/>
                                    <setting name="MscrName" value="PTA5"/>
                                    <setting name="MscrNumber" value="5"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_5"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="6">
                                    <setting name="Name" value="Mscr_Config_List_6"/>
                                    <setting name="MscrName" value="PTA6"/>
                                    <setting name="MscrNumber" value="6"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_6"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="7">
                                    <setting name="Name" value="Mscr_Config_List_7"/>
                                    <setting name="MscrName" value="PTA7"/>
                                    <setting name="MscrNumber" value="7"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_7"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="8">
                                    <setting name="Name" value="Mscr_Config_List_8"/>
                                    <setting name="MscrName" value="PTA8"/>
                                    <setting name="MscrNumber" value="8"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_8"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="9">
                                    <setting name="Name" value="Mscr_Config_List_9"/>
                                    <setting name="MscrName" value="PTA9"/>
                                    <setting name="MscrNumber" value="9"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_9"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="10">
                                    <setting name="Name" value="Mscr_Config_List_10"/>
                                    <setting name="MscrName" value="PTA10"/>
                                    <setting name="MscrNumber" value="10"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_10"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="11">
                                    <setting name="Name" value="Mscr_Config_List_11"/>
                                    <setting name="MscrName" value="PTA11"/>
                                    <setting name="MscrNumber" value="11"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_11"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="12">
                                    <setting name="Name" value="Mscr_Config_List_12"/>
                                    <setting name="MscrName" value="PTA12"/>
                                    <setting name="MscrNumber" value="12"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_12"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="13">
                                    <setting name="Name" value="Mscr_Config_List_13"/>
                                    <setting name="MscrName" value="PTA13"/>
                                    <setting name="MscrNumber" value="13"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_13"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="14">
                                    <setting name="Name" value="Mscr_Config_List_14"/>
                                    <setting name="MscrName" value="PTA14"/>
                                    <setting name="MscrNumber" value="14"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_14"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="15">
                                    <setting name="Name" value="Mscr_Config_List_15"/>
                                    <setting name="MscrName" value="PTA15"/>
                                    <setting name="MscrNumber" value="15"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_15"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="16">
                                    <setting name="Name" value="Mscr_Config_List_16"/>
                                    <setting name="MscrName" value="PTA16"/>
                                    <setting name="MscrNumber" value="16"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_16"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="17">
                                    <setting name="Name" value="Mscr_Config_List_17"/>
                                    <setting name="MscrName" value="PTA17"/>
                                    <setting name="MscrNumber" value="17"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_17"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="18">
                                    <setting name="Name" value="Mscr_Config_List_18"/>
                                    <setting name="MscrName" value="PTA18"/>
                                    <setting name="MscrNumber" value="18"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_18"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="19">
                                    <setting name="Name" value="Mscr_Config_List_19"/>
                                    <setting name="MscrName" value="PTA19"/>
                                    <setting name="MscrNumber" value="19"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_19"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="20">
                                    <setting name="Name" value="Mscr_Config_List_20"/>
                                    <setting name="MscrName" value="PTA20"/>
                                    <setting name="MscrNumber" value="20"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_20"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="21">
                                    <setting name="Name" value="Mscr_Config_List_21"/>
                                    <setting name="MscrName" value="PTA21"/>
                                    <setting name="MscrNumber" value="21"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_21"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="22">
                                    <setting name="Name" value="Mscr_Config_List_22"/>
                                    <setting name="MscrName" value="PTA24"/>
                                    <setting name="MscrNumber" value="24"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_24"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="23">
                                    <setting name="Name" value="Mscr_Config_List_23"/>
                                    <setting name="MscrName" value="PTA25"/>
                                    <setting name="MscrNumber" value="25"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_25"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="24">
                                    <setting name="Name" value="Mscr_Config_List_24"/>
                                    <setting name="MscrName" value="PTA27"/>
                                    <setting name="MscrNumber" value="27"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_27"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="25">
                                    <setting name="Name" value="Mscr_Config_List_25"/>
                                    <setting name="MscrName" value="PTA28"/>
                                    <setting name="MscrNumber" value="28"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_28"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="26">
                                    <setting name="Name" value="Mscr_Config_List_26"/>
                                    <setting name="MscrName" value="PTA29"/>
                                    <setting name="MscrNumber" value="29"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_29"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="27">
                                    <setting name="Name" value="Mscr_Config_List_27"/>
                                    <setting name="MscrName" value="PTA30"/>
                                    <setting name="MscrNumber" value="30"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_30"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="28">
                                    <setting name="Name" value="Mscr_Config_List_28"/>
                                    <setting name="MscrName" value="PTA31"/>
                                    <setting name="MscrNumber" value="31"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_31"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="29">
                                    <setting name="Name" value="Mscr_Config_List_29"/>
                                    <setting name="MscrName" value="PTB0"/>
                                    <setting name="MscrNumber" value="32"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_32"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="30">
                                    <setting name="Name" value="Mscr_Config_List_30"/>
                                    <setting name="MscrName" value="PTB1"/>
                                    <setting name="MscrNumber" value="33"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_33"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="31">
                                    <setting name="Name" value="Mscr_Config_List_31"/>
                                    <setting name="MscrName" value="PTB2"/>
                                    <setting name="MscrNumber" value="34"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_34"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="32">
                                    <setting name="Name" value="Mscr_Config_List_32"/>
                                    <setting name="MscrName" value="PTB3"/>
                                    <setting name="MscrNumber" value="35"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_35"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="33">
                                    <setting name="Name" value="Mscr_Config_List_33"/>
                                    <setting name="MscrName" value="PTB4"/>
                                    <setting name="MscrNumber" value="36"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_36"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="34">
                                    <setting name="Name" value="Mscr_Config_List_34"/>
                                    <setting name="MscrName" value="PTB5"/>
                                    <setting name="MscrNumber" value="37"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_37"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="35">
                                    <setting name="Name" value="Mscr_Config_List_35"/>
                                    <setting name="MscrName" value="PTB8"/>
                                    <setting name="MscrNumber" value="40"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_40"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="36">
                                    <setting name="Name" value="Mscr_Config_List_36"/>
                                    <setting name="MscrName" value="PTB9"/>
                                    <setting name="MscrNumber" value="41"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_41"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="37">
                                    <setting name="Name" value="Mscr_Config_List_37"/>
                                    <setting name="MscrName" value="PTB10"/>
                                    <setting name="MscrNumber" value="42"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_42"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="38">
                                    <setting name="Name" value="Mscr_Config_List_38"/>
                                    <setting name="MscrName" value="PTB11"/>
                                    <setting name="MscrNumber" value="43"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_43"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="39">
                                    <setting name="Name" value="Mscr_Config_List_39"/>
                                    <setting name="MscrName" value="PTB12"/>
                                    <setting name="MscrNumber" value="44"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_44"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="40">
                                    <setting name="Name" value="Mscr_Config_List_40"/>
                                    <setting name="MscrName" value="PTB13"/>
                                    <setting name="MscrNumber" value="45"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_45"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="41">
                                    <setting name="Name" value="Mscr_Config_List_41"/>
                                    <setting name="MscrName" value="PTB14"/>
                                    <setting name="MscrNumber" value="46"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_46"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="42">
                                    <setting name="Name" value="Mscr_Config_List_42"/>
                                    <setting name="MscrName" value="PTB15"/>
                                    <setting name="MscrNumber" value="47"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_47"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="43">
                                    <setting name="Name" value="Mscr_Config_List_43"/>
                                    <setting name="MscrName" value="PTB16"/>
                                    <setting name="MscrNumber" value="48"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_48"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="44">
                                    <setting name="Name" value="Mscr_Config_List_44"/>
                                    <setting name="MscrName" value="PTB17"/>
                                    <setting name="MscrNumber" value="49"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_49"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="45">
                                    <setting name="Name" value="Mscr_Config_List_45"/>
                                    <setting name="MscrName" value="PTB18"/>
                                    <setting name="MscrNumber" value="50"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_50"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="46">
                                    <setting name="Name" value="Mscr_Config_List_46"/>
                                    <setting name="MscrName" value="PTB19"/>
                                    <setting name="MscrNumber" value="51"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_51"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="47">
                                    <setting name="Name" value="Mscr_Config_List_47"/>
                                    <setting name="MscrName" value="PTB20"/>
                                    <setting name="MscrNumber" value="52"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_52"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="48">
                                    <setting name="Name" value="Mscr_Config_List_48"/>
                                    <setting name="MscrName" value="PTB21"/>
                                    <setting name="MscrNumber" value="53"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_53"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="49">
                                    <setting name="Name" value="Mscr_Config_List_49"/>
                                    <setting name="MscrName" value="PTB22"/>
                                    <setting name="MscrNumber" value="54"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_54"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="50">
                                    <setting name="Name" value="Mscr_Config_List_50"/>
                                    <setting name="MscrName" value="PTB23"/>
                                    <setting name="MscrNumber" value="55"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_55"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="51">
                                    <setting name="Name" value="Mscr_Config_List_51"/>
                                    <setting name="MscrName" value="PTB24"/>
                                    <setting name="MscrNumber" value="56"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_56"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="52">
                                    <setting name="Name" value="Mscr_Config_List_52"/>
                                    <setting name="MscrName" value="PTB25"/>
                                    <setting name="MscrNumber" value="57"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_57"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="53">
                                    <setting name="Name" value="Mscr_Config_List_53"/>
                                    <setting name="MscrName" value="PTB26"/>
                                    <setting name="MscrNumber" value="58"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_58"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="54">
                                    <setting name="Name" value="Mscr_Config_List_54"/>
                                    <setting name="MscrName" value="PTB27"/>
                                    <setting name="MscrNumber" value="59"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_59"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="55">
                                    <setting name="Name" value="Mscr_Config_List_55"/>
                                    <setting name="MscrName" value="PTB28"/>
                                    <setting name="MscrNumber" value="60"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_60"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="56">
                                    <setting name="Name" value="Mscr_Config_List_56"/>
                                    <setting name="MscrName" value="PTB29"/>
                                    <setting name="MscrNumber" value="61"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_61"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="57">
                                    <setting name="Name" value="Mscr_Config_List_57"/>
                                    <setting name="MscrName" value="PTB30"/>
                                    <setting name="MscrNumber" value="62"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_62"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="58">
                                    <setting name="Name" value="Mscr_Config_List_58"/>
                                    <setting name="MscrName" value="PTC0"/>
                                    <setting name="MscrNumber" value="64"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_64"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="59">
                                    <setting name="Name" value="Mscr_Config_List_59"/>
                                    <setting name="MscrName" value="PTC1"/>
                                    <setting name="MscrNumber" value="65"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_65"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="60">
                                    <setting name="Name" value="Mscr_Config_List_60"/>
                                    <setting name="MscrName" value="PTC2"/>
                                    <setting name="MscrNumber" value="66"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_66"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="61">
                                    <setting name="Name" value="Mscr_Config_List_61"/>
                                    <setting name="MscrName" value="PTC3"/>
                                    <setting name="MscrNumber" value="67"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_67"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="62">
                                    <setting name="Name" value="Mscr_Config_List_62"/>
                                    <setting name="MscrName" value="PTC4"/>
                                    <setting name="MscrNumber" value="68"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_68"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="63">
                                    <setting name="Name" value="Mscr_Config_List_63"/>
                                    <setting name="MscrName" value="PTC5"/>
                                    <setting name="MscrNumber" value="69"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_69"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="64">
                                    <setting name="Name" value="Mscr_Config_List_64"/>
                                    <setting name="MscrName" value="PTC6"/>
                                    <setting name="MscrNumber" value="70"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_70"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="65">
                                    <setting name="Name" value="Mscr_Config_List_65"/>
                                    <setting name="MscrName" value="PTC7"/>
                                    <setting name="MscrNumber" value="71"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_71"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="66">
                                    <setting name="Name" value="Mscr_Config_List_66"/>
                                    <setting name="MscrName" value="PTC8"/>
                                    <setting name="MscrNumber" value="72"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_72"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="67">
                                    <setting name="Name" value="Mscr_Config_List_67"/>
                                    <setting name="MscrName" value="PTC9"/>
                                    <setting name="MscrNumber" value="73"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_73"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="68">
                                    <setting name="Name" value="Mscr_Config_List_68"/>
                                    <setting name="MscrName" value="PTC10"/>
                                    <setting name="MscrNumber" value="74"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_74"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="69">
                                    <setting name="Name" value="Mscr_Config_List_69"/>
                                    <setting name="MscrName" value="PTC11"/>
                                    <setting name="MscrNumber" value="75"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_75"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="70">
                                    <setting name="Name" value="Mscr_Config_List_70"/>
                                    <setting name="MscrName" value="PTC12"/>
                                    <setting name="MscrNumber" value="76"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_76"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="71">
                                    <setting name="Name" value="Mscr_Config_List_71"/>
                                    <setting name="MscrName" value="PTC13"/>
                                    <setting name="MscrNumber" value="77"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_77"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="72">
                                    <setting name="Name" value="Mscr_Config_List_72"/>
                                    <setting name="MscrName" value="PTC14"/>
                                    <setting name="MscrNumber" value="78"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_78"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="73">
                                    <setting name="Name" value="Mscr_Config_List_73"/>
                                    <setting name="MscrName" value="PTC15"/>
                                    <setting name="MscrNumber" value="79"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_79"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="74">
                                    <setting name="Name" value="Mscr_Config_List_74"/>
                                    <setting name="MscrName" value="PTC16"/>
                                    <setting name="MscrNumber" value="80"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_80"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="75">
                                    <setting name="Name" value="Mscr_Config_List_75"/>
                                    <setting name="MscrName" value="PTC17"/>
                                    <setting name="MscrNumber" value="81"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_81"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="76">
                                    <setting name="Name" value="Mscr_Config_List_76"/>
                                    <setting name="MscrName" value="PTC18"/>
                                    <setting name="MscrNumber" value="82"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_82"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="77">
                                    <setting name="Name" value="Mscr_Config_List_77"/>
                                    <setting name="MscrName" value="PTC19"/>
                                    <setting name="MscrNumber" value="83"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_83"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="78">
                                    <setting name="Name" value="Mscr_Config_List_78"/>
                                    <setting name="MscrName" value="PTC20"/>
                                    <setting name="MscrNumber" value="84"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_84"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="79">
                                    <setting name="Name" value="Mscr_Config_List_79"/>
                                    <setting name="MscrName" value="PTC21"/>
                                    <setting name="MscrNumber" value="85"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_85"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="80">
                                    <setting name="Name" value="Mscr_Config_List_80"/>
                                    <setting name="MscrName" value="PTC23"/>
                                    <setting name="MscrNumber" value="87"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_87"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="81">
                                    <setting name="Name" value="Mscr_Config_List_81"/>
                                    <setting name="MscrName" value="PTC24"/>
                                    <setting name="MscrNumber" value="88"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_88"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="82">
                                    <setting name="Name" value="Mscr_Config_List_82"/>
                                    <setting name="MscrName" value="PTC25"/>
                                    <setting name="MscrNumber" value="89"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_89"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="83">
                                    <setting name="Name" value="Mscr_Config_List_83"/>
                                    <setting name="MscrName" value="PTC26"/>
                                    <setting name="MscrNumber" value="90"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_90"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="84">
                                    <setting name="Name" value="Mscr_Config_List_84"/>
                                    <setting name="MscrName" value="PTC27"/>
                                    <setting name="MscrNumber" value="91"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_91"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="85">
                                    <setting name="Name" value="Mscr_Config_List_85"/>
                                    <setting name="MscrName" value="PTC28"/>
                                    <setting name="MscrNumber" value="92"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_92"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="86">
                                    <setting name="Name" value="Mscr_Config_List_86"/>
                                    <setting name="MscrName" value="PTC29"/>
                                    <setting name="MscrNumber" value="93"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_93"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="87">
                                    <setting name="Name" value="Mscr_Config_List_87"/>
                                    <setting name="MscrName" value="PTC30"/>
                                    <setting name="MscrNumber" value="94"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_94"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="88">
                                    <setting name="Name" value="Mscr_Config_List_88"/>
                                    <setting name="MscrName" value="PTC31"/>
                                    <setting name="MscrNumber" value="95"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_95"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="89">
                                    <setting name="Name" value="Mscr_Config_List_89"/>
                                    <setting name="MscrName" value="PTD0"/>
                                    <setting name="MscrNumber" value="96"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_96"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="90">
                                    <setting name="Name" value="Mscr_Config_List_90"/>
                                    <setting name="MscrName" value="PTD1"/>
                                    <setting name="MscrNumber" value="97"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_97"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="91">
                                    <setting name="Name" value="Mscr_Config_List_91"/>
                                    <setting name="MscrName" value="PTD2"/>
                                    <setting name="MscrNumber" value="98"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_98"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="92">
                                    <setting name="Name" value="Mscr_Config_List_92"/>
                                    <setting name="MscrName" value="PTD3"/>
                                    <setting name="MscrNumber" value="99"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_99"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="93">
                                    <setting name="Name" value="Mscr_Config_List_93"/>
                                    <setting name="MscrName" value="PTD4"/>
                                    <setting name="MscrNumber" value="100"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_100"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="94">
                                    <setting name="Name" value="Mscr_Config_List_94"/>
                                    <setting name="MscrName" value="PTD5"/>
                                    <setting name="MscrNumber" value="101"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_101"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="95">
                                    <setting name="Name" value="Mscr_Config_List_95"/>
                                    <setting name="MscrName" value="PTD6"/>
                                    <setting name="MscrNumber" value="102"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_102"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="96">
                                    <setting name="Name" value="Mscr_Config_List_96"/>
                                    <setting name="MscrName" value="PTD7"/>
                                    <setting name="MscrNumber" value="103"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_103"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="97">
                                    <setting name="Name" value="Mscr_Config_List_97"/>
                                    <setting name="MscrName" value="PTD8"/>
                                    <setting name="MscrNumber" value="104"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_104"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="98">
                                    <setting name="Name" value="Mscr_Config_List_98"/>
                                    <setting name="MscrName" value="PTD9"/>
                                    <setting name="MscrNumber" value="105"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_105"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="99">
                                    <setting name="Name" value="Mscr_Config_List_99"/>
                                    <setting name="MscrName" value="PTD10"/>
                                    <setting name="MscrNumber" value="106"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_106"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="100">
                                    <setting name="Name" value="Mscr_Config_List_100"/>
                                    <setting name="MscrName" value="PTD11"/>
                                    <setting name="MscrNumber" value="107"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_107"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="101">
                                    <setting name="Name" value="Mscr_Config_List_101"/>
                                    <setting name="MscrName" value="PTD12"/>
                                    <setting name="MscrNumber" value="108"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_108"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="102">
                                    <setting name="Name" value="Mscr_Config_List_102"/>
                                    <setting name="MscrName" value="PTD13"/>
                                    <setting name="MscrNumber" value="109"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_109"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="103">
                                    <setting name="Name" value="Mscr_Config_List_103"/>
                                    <setting name="MscrName" value="PTD14"/>
                                    <setting name="MscrNumber" value="110"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_110"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="104">
                                    <setting name="Name" value="Mscr_Config_List_104"/>
                                    <setting name="MscrName" value="PTD15"/>
                                    <setting name="MscrNumber" value="111"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_111"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="105">
                                    <setting name="Name" value="Mscr_Config_List_105"/>
                                    <setting name="MscrName" value="PTD16"/>
                                    <setting name="MscrNumber" value="112"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_112"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="106">
                                    <setting name="Name" value="Mscr_Config_List_106"/>
                                    <setting name="MscrName" value="PTD17"/>
                                    <setting name="MscrNumber" value="113"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_113"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="107">
                                    <setting name="Name" value="Mscr_Config_List_107"/>
                                    <setting name="MscrName" value="PTD18"/>
                                    <setting name="MscrNumber" value="114"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_114"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="108">
                                    <setting name="Name" value="Mscr_Config_List_108"/>
                                    <setting name="MscrName" value="PTD20"/>
                                    <setting name="MscrNumber" value="116"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_116"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="109">
                                    <setting name="Name" value="Mscr_Config_List_109"/>
                                    <setting name="MscrName" value="PTD21"/>
                                    <setting name="MscrNumber" value="117"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_117"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="110">
                                    <setting name="Name" value="Mscr_Config_List_110"/>
                                    <setting name="MscrName" value="PTD22"/>
                                    <setting name="MscrNumber" value="118"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_118"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="111">
                                    <setting name="Name" value="Mscr_Config_List_111"/>
                                    <setting name="MscrName" value="PTD23"/>
                                    <setting name="MscrNumber" value="119"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_119"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="112">
                                    <setting name="Name" value="Mscr_Config_List_112"/>
                                    <setting name="MscrName" value="PTD24"/>
                                    <setting name="MscrNumber" value="120"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_120"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="113">
                                    <setting name="Name" value="Mscr_Config_List_113"/>
                                    <setting name="MscrName" value="PTD26"/>
                                    <setting name="MscrNumber" value="122"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_122"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="114">
                                    <setting name="Name" value="Mscr_Config_List_114"/>
                                    <setting name="MscrName" value="PTD27"/>
                                    <setting name="MscrNumber" value="123"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_123"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="115">
                                    <setting name="Name" value="Mscr_Config_List_115"/>
                                    <setting name="MscrName" value="PTD28"/>
                                    <setting name="MscrNumber" value="124"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_124"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="116">
                                    <setting name="Name" value="Mscr_Config_List_116"/>
                                    <setting name="MscrName" value="PTD29"/>
                                    <setting name="MscrNumber" value="125"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_125"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="117">
                                    <setting name="Name" value="Mscr_Config_List_117"/>
                                    <setting name="MscrName" value="PTD30"/>
                                    <setting name="MscrNumber" value="126"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_126"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="118">
                                    <setting name="Name" value="Mscr_Config_List_118"/>
                                    <setting name="MscrName" value="PTD31"/>
                                    <setting name="MscrNumber" value="127"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_127"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="119">
                                    <setting name="Name" value="Mscr_Config_List_119"/>
                                    <setting name="MscrName" value="PTE0"/>
                                    <setting name="MscrNumber" value="128"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_128"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="120">
                                    <setting name="Name" value="Mscr_Config_List_120"/>
                                    <setting name="MscrName" value="PTE1"/>
                                    <setting name="MscrNumber" value="129"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_129"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="121">
                                    <setting name="Name" value="Mscr_Config_List_121"/>
                                    <setting name="MscrName" value="PTE2"/>
                                    <setting name="MscrNumber" value="130"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_130"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="122">
                                    <setting name="Name" value="Mscr_Config_List_122"/>
                                    <setting name="MscrName" value="PTE3"/>
                                    <setting name="MscrNumber" value="131"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_131"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="123">
                                    <setting name="Name" value="Mscr_Config_List_123"/>
                                    <setting name="MscrName" value="PTE4"/>
                                    <setting name="MscrNumber" value="132"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_132"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="124">
                                    <setting name="Name" value="Mscr_Config_List_124"/>
                                    <setting name="MscrName" value="PTE5"/>
                                    <setting name="MscrNumber" value="133"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_133"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="125">
                                    <setting name="Name" value="Mscr_Config_List_125"/>
                                    <setting name="MscrName" value="PTE6"/>
                                    <setting name="MscrNumber" value="134"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_134"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="126">
                                    <setting name="Name" value="Mscr_Config_List_126"/>
                                    <setting name="MscrName" value="PTE7"/>
                                    <setting name="MscrNumber" value="135"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_135"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="127">
                                    <setting name="Name" value="Mscr_Config_List_127"/>
                                    <setting name="MscrName" value="PTE8"/>
                                    <setting name="MscrNumber" value="136"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_136"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="128">
                                    <setting name="Name" value="Mscr_Config_List_128"/>
                                    <setting name="MscrName" value="PTE9"/>
                                    <setting name="MscrNumber" value="137"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_137"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="129">
                                    <setting name="Name" value="Mscr_Config_List_129"/>
                                    <setting name="MscrName" value="PTE10"/>
                                    <setting name="MscrNumber" value="138"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_138"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="130">
                                    <setting name="Name" value="Mscr_Config_List_130"/>
                                    <setting name="MscrName" value="PTE11"/>
                                    <setting name="MscrNumber" value="139"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_139"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="131">
                                    <setting name="Name" value="Mscr_Config_List_131"/>
                                    <setting name="MscrName" value="PTE12"/>
                                    <setting name="MscrNumber" value="140"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_140"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="132">
                                    <setting name="Name" value="Mscr_Config_List_132"/>
                                    <setting name="MscrName" value="PTE13"/>
                                    <setting name="MscrNumber" value="141"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_141"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="133">
                                    <setting name="Name" value="Mscr_Config_List_133"/>
                                    <setting name="MscrName" value="PTE14"/>
                                    <setting name="MscrNumber" value="142"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_142"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="134">
                                    <setting name="Name" value="Mscr_Config_List_134"/>
                                    <setting name="MscrName" value="PTE15"/>
                                    <setting name="MscrNumber" value="143"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_143"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="135">
                                    <setting name="Name" value="Mscr_Config_List_135"/>
                                    <setting name="MscrName" value="PTE16"/>
                                    <setting name="MscrNumber" value="144"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_144"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="136">
                                    <setting name="Name" value="Mscr_Config_List_136"/>
                                    <setting name="MscrName" value="PTE17"/>
                                    <setting name="MscrNumber" value="145"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_145"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="137">
                                    <setting name="Name" value="Mscr_Config_List_137"/>
                                    <setting name="MscrName" value="PTE18"/>
                                    <setting name="MscrNumber" value="146"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_146"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="138">
                                    <setting name="Name" value="Mscr_Config_List_138"/>
                                    <setting name="MscrName" value="PTE19"/>
                                    <setting name="MscrNumber" value="147"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_147"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="139">
                                    <setting name="Name" value="Mscr_Config_List_139"/>
                                    <setting name="MscrName" value="PTE21"/>
                                    <setting name="MscrNumber" value="149"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_149"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="140">
                                    <setting name="Name" value="Mscr_Config_List_140"/>
                                    <setting name="MscrName" value="PTE22"/>
                                    <setting name="MscrNumber" value="150"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_150"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="141">
                                    <setting name="Name" value="Mscr_Config_List_141"/>
                                    <setting name="MscrName" value="PTE23"/>
                                    <setting name="MscrNumber" value="151"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_151"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="142">
                                    <setting name="Name" value="Mscr_Config_List_142"/>
                                    <setting name="MscrName" value="PTE24"/>
                                    <setting name="MscrNumber" value="152"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_152"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="143">
                                    <setting name="Name" value="Mscr_Config_List_143"/>
                                    <setting name="MscrName" value="PTE25"/>
                                    <setting name="MscrNumber" value="153"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_153"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="144">
                                    <setting name="Name" value="Mscr_Config_List_144"/>
                                    <setting name="MscrName" value="PTE26"/>
                                    <setting name="MscrNumber" value="154"/>
                                    <setting name="MscrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="MscrPinMux" value="GPIO_154"/>
                                    <setting name="MscrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                              </array>
                              <array name="Imcr_Config_List">
                                 <struct name="0">
                                    <setting name="Name" value="Imcr_Config_List0"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR528"/>
                                    <setting name="ImcrNumber" value="16"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_0"/>
                                    <setting name="ImcrPad" value="PTA0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="Imcr_Config_List1"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR577"/>
                                    <setting name="ImcrNumber" value="65"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_17_Y"/>
                                    <setting name="ImcrPad" value="PTD1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="Imcr_Config_List2"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR592"/>
                                    <setting name="ImcrNumber" value="80"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_0_X"/>
                                    <setting name="ImcrPad" value="PTA18"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="Imcr_Config_List3"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR666"/>
                                    <setting name="ImcrNumber" value="154"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D2"/>
                                    <setting name="ImcrPad" value="PTE15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="Imcr_Config_List4"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR740"/>
                                    <setting name="ImcrNumber" value="228"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS7"/>
                                    <setting name="ImcrPad" value="PTA0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="Imcr_Config_List5"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR872"/>
                                    <setting name="ImcrNumber" value="360"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART0_CTS"/>
                                    <setting name="ImcrPad" value="PTA0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="6">
                                    <setting name="Name" value="Imcr_Config_List6"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR529"/>
                                    <setting name="ImcrNumber" value="17"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_1"/>
                                    <setting name="ImcrPad" value="PTA1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="7">
                                    <setting name="Name" value="Imcr_Config_List7"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR569"/>
                                    <setting name="ImcrNumber" value="57"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_9_H"/>
                                    <setting name="ImcrPad" value="PTA1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="8">
                                    <setting name="Name" value="Imcr_Config_List8"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR667"/>
                                    <setting name="ImcrNumber" value="155"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D3"/>
                                    <setting name="ImcrPad" value="PTA1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="9">
                                    <setting name="Name" value="Imcr_Config_List9"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR739"/>
                                    <setting name="ImcrNumber" value="227"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS6"/>
                                    <setting name="ImcrPad" value="PTA1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="10">
                                    <setting name="Name" value="Imcr_Config_List10"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR530"/>
                                    <setting name="ImcrNumber" value="18"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_2"/>
                                    <setting name="ImcrPad" value="PTA2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="11">
                                    <setting name="Name" value="Imcr_Config_List11"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR611"/>
                                    <setting name="ImcrNumber" value="99"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_19_Y"/>
                                    <setting name="ImcrPad" value="PTD22"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="12">
                                    <setting name="Name" value="Imcr_Config_List12"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR660"/>
                                    <setting name="ImcrNumber" value="148"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FCCU_ERR_IN0"/>
                                    <setting name="ImcrPad" value="PTA2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="13">
                                    <setting name="Name" value="Imcr_Config_List13"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR668"/>
                                    <setting name="ImcrNumber" value="156"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D4"/>
                                    <setting name="ImcrPad" value="PTD2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="14">
                                    <setting name="Name" value="Imcr_Config_List14"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR699"/>
                                    <setting name="ImcrNumber" value="187"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART0_RX"/>
                                    <setting name="ImcrPad" value="PTA2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="15">
                                    <setting name="Name" value="Imcr_Config_List15"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR751"/>
                                    <setting name="ImcrNumber" value="239"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_SIN"/>
                                    <setting name="ImcrPad" value="PTB15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="16">
                                    <setting name="Name" value="Imcr_Config_List16"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR531"/>
                                    <setting name="ImcrNumber" value="19"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_3"/>
                                    <setting name="ImcrPad" value="PTA3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="17">
                                    <setting name="Name" value="Imcr_Config_List17"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR612"/>
                                    <setting name="ImcrNumber" value="100"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_20_Y"/>
                                    <setting name="ImcrPad" value="PTD23"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="18">
                                    <setting name="Name" value="Imcr_Config_List18"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR661"/>
                                    <setting name="ImcrNumber" value="149"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FCCU_ERR_IN1"/>
                                    <setting name="ImcrPad" value="PTA3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="19">
                                    <setting name="Name" value="Imcr_Config_List19"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR669"/>
                                    <setting name="ImcrNumber" value="157"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D5"/>
                                    <setting name="ImcrPad" value="PTE11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="20">
                                    <setting name="Name" value="Imcr_Config_List20"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR750"/>
                                    <setting name="ImcrNumber" value="238"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_SCK"/>
                                    <setting name="ImcrPad" value="PTA3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="21">
                                    <setting name="Name" value="Imcr_Config_List21"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR875"/>
                                    <setting name="ImcrNumber" value="363"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART0_TX"/>
                                    <setting name="ImcrPad" value="PTA3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="22">
                                    <setting name="Name" value="Imcr_Config_List22"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR532"/>
                                    <setting name="ImcrNumber" value="20"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_4"/>
                                    <setting name="ImcrPad" value="PTA4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="23">
                                    <setting name="Name" value="Imcr_Config_List23"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR670"/>
                                    <setting name="ImcrNumber" value="158"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D6"/>
                                    <setting name="ImcrPad" value="PTE4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="24">
                                    <setting name="Name" value="Imcr_Config_List24"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR698"/>
                                    <setting name="ImcrNumber" value="186"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="JTAG_TMS_SWD_DIO"/>
                                    <setting name="ImcrPad" value="PTA4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="25">
                                    <setting name="Name" value="Imcr_Config_List25"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR533"/>
                                    <setting name="ImcrNumber" value="21"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_5"/>
                                    <setting name="ImcrPad" value="PTA5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="26">
                                    <setting name="Name" value="Imcr_Config_List26"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR512"/>
                                    <setting name="ImcrNumber" value="0"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN0_RX"/>
                                    <setting name="ImcrPad" value="PTC2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="27">
                                    <setting name="Name" value="Imcr_Config_List27"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR534"/>
                                    <setting name="ImcrNumber" value="22"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_6"/>
                                    <setting name="ImcrPad" value="PTA6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="28">
                                    <setting name="Name" value="Imcr_Config_List28"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR605"/>
                                    <setting name="ImcrNumber" value="93"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_13_H"/>
                                    <setting name="ImcrPad" value="PTA6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="29">
                                    <setting name="Name" value="Imcr_Config_List29"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR683"/>
                                    <setting name="ImcrNumber" value="171"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D19"/>
                                    <setting name="ImcrPad" value="PTA17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="30">
                                    <setting name="Name" value="Imcr_Config_List30"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR702"/>
                                    <setting name="ImcrNumber" value="190"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART3_RX"/>
                                    <setting name="ImcrPad" value="PTE15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="31">
                                    <setting name="Name" value="Imcr_Config_List31"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR745"/>
                                    <setting name="ImcrNumber" value="233"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS1"/>
                                    <setting name="ImcrPad" value="PTA6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="32">
                                    <setting name="Name" value="Imcr_Config_List32"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR761"/>
                                    <setting name="ImcrNumber" value="249"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_PCS1"/>
                                    <setting name="ImcrPad" value="PTE8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="33">
                                    <setting name="Name" value="Imcr_Config_List33"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR873"/>
                                    <setting name="ImcrNumber" value="361"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART1_CTS"/>
                                    <setting name="ImcrPad" value="PTE2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="34">
                                    <setting name="Name" value="Imcr_Config_List34"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR535"/>
                                    <setting name="ImcrNumber" value="23"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_7"/>
                                    <setting name="ImcrPad" value="PTA7"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="35">
                                    <setting name="Name" value="Imcr_Config_List35"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR603"/>
                                    <setting name="ImcrNumber" value="91"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_11_H"/>
                                    <setting name="ImcrPad" value="PTA7"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="36">
                                    <setting name="Name" value="Imcr_Config_List36"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR673"/>
                                    <setting name="ImcrNumber" value="161"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D9"/>
                                    <setting name="ImcrPad" value="PTD17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="37">
                                    <setting name="Name" value="Imcr_Config_List37"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR734"/>
                                    <setting name="ImcrNumber" value="222"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS1"/>
                                    <setting name="ImcrPad" value="PTB5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="38">
                                    <setting name="Name" value="Imcr_Config_List38"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR878"/>
                                    <setting name="ImcrNumber" value="366"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART3_TX"/>
                                    <setting name="ImcrPad" value="PTA7"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="39">
                                    <setting name="Name" value="Imcr_Config_List39"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR544"/>
                                    <setting name="ImcrNumber" value="32"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_16"/>
                                    <setting name="ImcrPad" value="PTA8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="40">
                                    <setting name="Name" value="Imcr_Config_List40"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR604"/>
                                    <setting name="ImcrNumber" value="92"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_12_H"/>
                                    <setting name="ImcrPad" value="PTC30"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="41">
                                    <setting name="Name" value="Imcr_Config_List41"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR701"/>
                                    <setting name="ImcrNumber" value="189"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART2_RX"/>
                                    <setting name="ImcrPad" value="PTD6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="42">
                                    <setting name="Name" value="Imcr_Config_List42"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR759"/>
                                    <setting name="ImcrNumber" value="247"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_SOUT"/>
                                    <setting name="ImcrPad" value="PTA8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="43">
                                    <setting name="Name" value="Imcr_Config_List43"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR545"/>
                                    <setting name="ImcrNumber" value="33"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_17"/>
                                    <setting name="ImcrPad" value="PTA9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="44">
                                    <setting name="Name" value="Imcr_Config_List44"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR671"/>
                                    <setting name="ImcrNumber" value="159"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D7"/>
                                    <setting name="ImcrPad" value="PTE5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="45">
                                    <setting name="Name" value="Imcr_Config_List45"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR753"/>
                                    <setting name="ImcrNumber" value="241"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_PCS0"/>
                                    <setting name="ImcrPad" value="PTA9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="46">
                                    <setting name="Name" value="Imcr_Config_List46"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR760"/>
                                    <setting name="ImcrNumber" value="248"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_PCS0"/>
                                    <setting name="ImcrPad" value="PTD17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="47">
                                    <setting name="Name" value="Imcr_Config_List47"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR877"/>
                                    <setting name="ImcrNumber" value="365"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART2_TX"/>
                                    <setting name="ImcrPad" value="PTA9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="48">
                                    <setting name="Name" value="Imcr_Config_List48"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR546"/>
                                    <setting name="ImcrNumber" value="34"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_18"/>
                                    <setting name="ImcrPad" value="PTA10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="49">
                                    <setting name="Name" value="Imcr_Config_List49"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR572"/>
                                    <setting name="ImcrNumber" value="60"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_12_H"/>
                                    <setting name="ImcrPad" value="PTD8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="50">
                                    <setting name="Name" value="Imcr_Config_List50"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR664"/>
                                    <setting name="ImcrNumber" value="152"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D0"/>
                                    <setting name="ImcrPad" value="PTD0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="51">
                                    <setting name="Name" value="Imcr_Config_List51"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR547"/>
                                    <setting name="ImcrNumber" value="35"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_19"/>
                                    <setting name="ImcrPad" value="PTA11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="52">
                                    <setting name="Name" value="Imcr_Config_List52"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR573"/>
                                    <setting name="ImcrNumber" value="61"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_13_H"/>
                                    <setting name="ImcrPad" value="PTA11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="53">
                                    <setting name="Name" value="Imcr_Config_List53"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR593"/>
                                    <setting name="ImcrNumber" value="81"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_1_H"/>
                                    <setting name="ImcrPad" value="PTA19"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="54">
                                    <setting name="Name" value="Imcr_Config_List54"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR665"/>
                                    <setting name="ImcrNumber" value="153"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D1"/>
                                    <setting name="ImcrPad" value="PTD1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="55">
                                    <setting name="Name" value="Imcr_Config_List55"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR744"/>
                                    <setting name="ImcrNumber" value="232"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS0"/>
                                    <setting name="ImcrPad" value="PTD3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="56">
                                    <setting name="Name" value="Imcr_Config_List56"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR513"/>
                                    <setting name="ImcrNumber" value="1"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN1_RX"/>
                                    <setting name="ImcrPad" value="PTC9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="57">
                                    <setting name="Name" value="Imcr_Config_List57"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR548"/>
                                    <setting name="ImcrNumber" value="36"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_20"/>
                                    <setting name="ImcrPad" value="PTA12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="58">
                                    <setting name="Name" value="Imcr_Config_List58"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR574"/>
                                    <setting name="ImcrNumber" value="62"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_14_H"/>
                                    <setting name="ImcrPad" value="PTA12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="59">
                                    <setting name="Name" value="Imcr_Config_List59"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR594"/>
                                    <setting name="ImcrNumber" value="82"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_2_H"/>
                                    <setting name="ImcrPad" value="PTC12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="60">
                                    <setting name="Name" value="Imcr_Config_List60"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR749"/>
                                    <setting name="ImcrNumber" value="237"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS5"/>
                                    <setting name="ImcrPad" value="PTA12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="61">
                                    <setting name="Name" value="Imcr_Config_List61"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR549"/>
                                    <setting name="ImcrNumber" value="37"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_21"/>
                                    <setting name="ImcrPad" value="PTA13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="62">
                                    <setting name="Name" value="Imcr_Config_List62"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR575"/>
                                    <setting name="ImcrNumber" value="63"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_15_H"/>
                                    <setting name="ImcrPad" value="PTC1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="63">
                                    <setting name="Name" value="Imcr_Config_List63"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR595"/>
                                    <setting name="ImcrNumber" value="83"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_3_H"/>
                                    <setting name="ImcrPad" value="PTA21"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="64">
                                    <setting name="Name" value="Imcr_Config_List64"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR672"/>
                                    <setting name="ImcrNumber" value="160"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D8"/>
                                    <setting name="ImcrPad" value="PTE12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="65">
                                    <setting name="Name" value="Imcr_Config_List65"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR748"/>
                                    <setting name="ImcrNumber" value="236"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS4"/>
                                    <setting name="ImcrPad" value="PTA13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="66">
                                    <setting name="Name" value="Imcr_Config_List66"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR550"/>
                                    <setting name="ImcrNumber" value="38"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_22"/>
                                    <setting name="ImcrPad" value="PTA14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="67">
                                    <setting name="Name" value="Imcr_Config_List67"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR596"/>
                                    <setting name="ImcrNumber" value="84"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_4_H"/>
                                    <setting name="ImcrPad" value="PTC27"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="68">
                                    <setting name="Name" value="Imcr_Config_List68"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR678"/>
                                    <setting name="ImcrNumber" value="166"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D14"/>
                                    <setting name="ImcrPad" value="PTC17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="69">
                                    <setting name="Name" value="Imcr_Config_List69"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR747"/>
                                    <setting name="ImcrNumber" value="235"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS3"/>
                                    <setting name="ImcrPad" value="PTB17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="70">
                                    <setting name="Name" value="Imcr_Config_List70"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR551"/>
                                    <setting name="ImcrNumber" value="39"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_23"/>
                                    <setting name="ImcrPad" value="PTA15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="71">
                                    <setting name="Name" value="Imcr_Config_List71"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR570"/>
                                    <setting name="ImcrNumber" value="58"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_10_H"/>
                                    <setting name="ImcrPad" value="PTC14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="72">
                                    <setting name="Name" value="Imcr_Config_List72"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR695"/>
                                    <setting name="ImcrNumber" value="183"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D31"/>
                                    <setting name="ImcrPad" value="PTA15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="73">
                                    <setting name="Name" value="Imcr_Config_List73"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR705"/>
                                    <setting name="ImcrNumber" value="193"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART6_RX"/>
                                    <setting name="ImcrPad" value="PTD8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="74">
                                    <setting name="Name" value="Imcr_Config_List74"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR736"/>
                                    <setting name="ImcrNumber" value="224"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS3"/>
                                    <setting name="ImcrPad" value="PTA15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="75">
                                    <setting name="Name" value="Imcr_Config_List75"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR756"/>
                                    <setting name="ImcrNumber" value="244"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_PCS3"/>
                                    <setting name="ImcrPad" value="PTA15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="76">
                                    <setting name="Name" value="Imcr_Config_List76"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR571"/>
                                    <setting name="ImcrNumber" value="59"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_11_H"/>
                                    <setting name="ImcrPad" value="PTC15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="77">
                                    <setting name="Name" value="Imcr_Config_List77"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR694"/>
                                    <setting name="ImcrNumber" value="182"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D30"/>
                                    <setting name="ImcrPad" value="PTA16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="78">
                                    <setting name="Name" value="Imcr_Config_List78"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR737"/>
                                    <setting name="ImcrNumber" value="225"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS4"/>
                                    <setting name="ImcrPad" value="PTA16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="79">
                                    <setting name="Name" value="Imcr_Config_List79"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR746"/>
                                    <setting name="ImcrNumber" value="234"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_PCS2"/>
                                    <setting name="ImcrPad" value="PTD20"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="80">
                                    <setting name="Name" value="Imcr_Config_List80"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR881"/>
                                    <setting name="ImcrNumber" value="369"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART6_TX"/>
                                    <setting name="ImcrPad" value="PTA16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="81">
                                    <setting name="Name" value="Imcr_Config_List81"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR566"/>
                                    <setting name="ImcrNumber" value="54"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_6_G"/>
                                    <setting name="ImcrPad" value="PTE8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="82">
                                    <setting name="Name" value="Imcr_Config_List82"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR766"/>
                                    <setting name="ImcrNumber" value="254"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_SOUT"/>
                                    <setting name="ImcrPad" value="PTD0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="83">
                                    <setting name="Name" value="Imcr_Config_List83"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR879"/>
                                    <setting name="ImcrNumber" value="367"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART4_TX"/>
                                    <setting name="ImcrPad" value="PTA17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="84">
                                    <setting name="Name" value="Imcr_Config_List84"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR608"/>
                                    <setting name="ImcrNumber" value="96"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_16_X"/>
                                    <setting name="ImcrPad" value="PTA18"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="85">
                                    <setting name="Name" value="Imcr_Config_List85"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR752"/>
                                    <setting name="ImcrNumber" value="240"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI1_SOUT"/>
                                    <setting name="ImcrPad" value="PTD2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="86">
                                    <setting name="Name" value="Imcr_Config_List86"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR868"/>
                                    <setting name="ImcrNumber" value="356"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN12"/>
                                    <setting name="ImcrPad" value="PTA18"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="87">
                                    <setting name="Name" value="Imcr_Config_List87"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR876"/>
                                    <setting name="ImcrNumber" value="364"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART1_TX"/>
                                    <setting name="ImcrPad" value="PTC7"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="88">
                                    <setting name="Name" value="Imcr_Config_List88"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR700"/>
                                    <setting name="ImcrNumber" value="188"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART1_RX"/>
                                    <setting name="ImcrPad" value="PTC6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="89">
                                    <setting name="Name" value="Imcr_Config_List89"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR869"/>
                                    <setting name="ImcrNumber" value="357"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN13"/>
                                    <setting name="ImcrPad" value="PTA19"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="90">
                                    <setting name="Name" value="Imcr_Config_List90"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR870"/>
                                    <setting name="ImcrNumber" value="358"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN14"/>
                                    <setting name="ImcrPad" value="PTA20"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="91">
                                    <setting name="Name" value="Imcr_Config_List91"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR755"/>
                                    <setting name="ImcrNumber" value="243"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_PCS2"/>
                                    <setting name="ImcrPad" value="PTA21"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="92">
                                    <setting name="Name" value="Imcr_Config_List92"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR871"/>
                                    <setting name="ImcrNumber" value="359"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN15"/>
                                    <setting name="ImcrPad" value="PTA21"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="93">
                                    <setting name="Name" value="Imcr_Config_List93"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR599"/>
                                    <setting name="ImcrNumber" value="87"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_7_H"/>
                                    <setting name="ImcrPad" value="PTA24"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="94">
                                    <setting name="Name" value="Imcr_Config_List94"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR600"/>
                                    <setting name="ImcrNumber" value="88"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_8_X"/>
                                    <setting name="ImcrPad" value="PTC9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="95">
                                    <setting name="Name" value="Imcr_Config_List95"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR602"/>
                                    <setting name="ImcrNumber" value="90"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_10_H"/>
                                    <setting name="ImcrPad" value="PTC29"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="96">
                                    <setting name="Name" value="Imcr_Config_List96"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR743"/>
                                    <setting name="ImcrNumber" value="231"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_SOUT"/>
                                    <setting name="ImcrPad" value="PTE2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="97">
                                    <setting name="Name" value="Imcr_Config_List97"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR606"/>
                                    <setting name="ImcrNumber" value="94"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_14_H"/>
                                    <setting name="ImcrPad" value="PTC31"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="98">
                                    <setting name="Name" value="Imcr_Config_List98"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR536"/>
                                    <setting name="ImcrNumber" value="24"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_8"/>
                                    <setting name="ImcrPad" value="PTB0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="99">
                                    <setting name="Name" value="Imcr_Config_List99"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR563"/>
                                    <setting name="ImcrNumber" value="51"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_3_G"/>
                                    <setting name="ImcrPad" value="PTB15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="100">
                                    <setting name="Name" value="Imcr_Config_List100"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR598"/>
                                    <setting name="ImcrNumber" value="86"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_6_H"/>
                                    <setting name="ImcrPad" value="PTB0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="101">
                                    <setting name="Name" value="Imcr_Config_List101"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR727"/>
                                    <setting name="ImcrNumber" value="215"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C0_SDAS"/>
                                    <setting name="ImcrPad" value="PTB0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="102">
                                    <setting name="Name" value="Imcr_Config_List102"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR733"/>
                                    <setting name="ImcrNumber" value="221"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS0"/>
                                    <setting name="ImcrPad" value="PTB0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="103">
                                    <setting name="Name" value="Imcr_Config_List103"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR537"/>
                                    <setting name="ImcrNumber" value="25"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_9"/>
                                    <setting name="ImcrPad" value="PTB1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="104">
                                    <setting name="Name" value="Imcr_Config_List104"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR567"/>
                                    <setting name="ImcrNumber" value="55"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_7_G"/>
                                    <setting name="ImcrPad" value="PTE9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="105">
                                    <setting name="Name" value="Imcr_Config_List105"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR597"/>
                                    <setting name="ImcrNumber" value="85"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_5_H"/>
                                    <setting name="ImcrPad" value="PTB1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="106">
                                    <setting name="Name" value="Imcr_Config_List106"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR725"/>
                                    <setting name="ImcrNumber" value="213"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C0_SCLS"/>
                                    <setting name="ImcrPad" value="PTB1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="107">
                                    <setting name="Name" value="Imcr_Config_List107"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR855"/>
                                    <setting name="ImcrNumber" value="343"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="HSE_TAMPER_EXTIN0"/>
                                    <setting name="ImcrPad" value="PTB1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="108">
                                    <setting name="Name" value="Imcr_Config_List108"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR516"/>
                                    <setting name="ImcrNumber" value="4"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN4_RX"/>
                                    <setting name="ImcrPad" value="PTE14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="109">
                                    <setting name="Name" value="Imcr_Config_List109"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR538"/>
                                    <setting name="ImcrNumber" value="26"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_10"/>
                                    <setting name="ImcrPad" value="PTB2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="110">
                                    <setting name="Name" value="Imcr_Config_List110"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR568"/>
                                    <setting name="ImcrNumber" value="56"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_8_X"/>
                                    <setting name="ImcrPad" value="PTB2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="111">
                                    <setting name="Name" value="Imcr_Config_List111"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR682"/>
                                    <setting name="ImcrNumber" value="170"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D18"/>
                                    <setting name="ImcrPad" value="PTB2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="112">
                                    <setting name="Name" value="Imcr_Config_List112"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR758"/>
                                    <setting name="ImcrNumber" value="246"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_SIN"/>
                                    <setting name="ImcrPad" value="PTE16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="113">
                                    <setting name="Name" value="Imcr_Config_List113"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR859"/>
                                    <setting name="ImcrNumber" value="347"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN3"/>
                                    <setting name="ImcrPad" value="PTB2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="114">
                                    <setting name="Name" value="Imcr_Config_List114"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR539"/>
                                    <setting name="ImcrNumber" value="27"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_11"/>
                                    <setting name="ImcrPad" value="PTB3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="115">
                                    <setting name="Name" value="Imcr_Config_List115"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR681"/>
                                    <setting name="ImcrNumber" value="169"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D17"/>
                                    <setting name="ImcrPad" value="PTB3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="116">
                                    <setting name="Name" value="Imcr_Config_List116"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR858"/>
                                    <setting name="ImcrNumber" value="346"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN2"/>
                                    <setting name="ImcrPad" value="PTB3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="117">
                                    <setting name="Name" value="Imcr_Config_List117"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR540"/>
                                    <setting name="ImcrNumber" value="28"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_12"/>
                                    <setting name="ImcrPad" value="PTB4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="118">
                                    <setting name="Name" value="Imcr_Config_List118"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR564"/>
                                    <setting name="ImcrNumber" value="52"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_4_G"/>
                                    <setting name="ImcrPad" value="PTB4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="119">
                                    <setting name="Name" value="Imcr_Config_List119"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR857"/>
                                    <setting name="ImcrNumber" value="345"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN1"/>
                                    <setting name="ImcrPad" value="PTB4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="120">
                                    <setting name="Name" value="Imcr_Config_List120"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR541"/>
                                    <setting name="ImcrNumber" value="29"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_13"/>
                                    <setting name="ImcrPad" value="PTB5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="121">
                                    <setting name="Name" value="Imcr_Config_List121"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR565"/>
                                    <setting name="ImcrNumber" value="53"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_5_G"/>
                                    <setting name="ImcrPad" value="PTB5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="122">
                                    <setting name="Name" value="Imcr_Config_List122"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR856"/>
                                    <setting name="ImcrNumber" value="344"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN0"/>
                                    <setting name="ImcrPad" value="PTB5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="123">
                                    <setting name="Name" value="Imcr_Config_List123"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR542"/>
                                    <setting name="ImcrNumber" value="30"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_14"/>
                                    <setting name="ImcrPad" value="PTB8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="124">
                                    <setting name="Name" value="Imcr_Config_List124"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR607"/>
                                    <setting name="ImcrNumber" value="95"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_15_H"/>
                                    <setting name="ImcrPad" value="PTD18"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="125">
                                    <setting name="Name" value="Imcr_Config_List125"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR693"/>
                                    <setting name="ImcrNumber" value="181"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D29"/>
                                    <setting name="ImcrPad" value="PTB8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="126">
                                    <setting name="Name" value="Imcr_Config_List126"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR738"/>
                                    <setting name="ImcrNumber" value="226"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS5"/>
                                    <setting name="ImcrPad" value="PTB8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="127">
                                    <setting name="Name" value="Imcr_Config_List127"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR543"/>
                                    <setting name="ImcrNumber" value="31"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_15"/>
                                    <setting name="ImcrPad" value="PTB9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="128">
                                    <setting name="Name" value="Imcr_Config_List128"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR692"/>
                                    <setting name="ImcrNumber" value="180"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D28"/>
                                    <setting name="ImcrPad" value="PTB9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="129">
                                    <setting name="Name" value="Imcr_Config_List129"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR552"/>
                                    <setting name="ImcrNumber" value="40"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_24"/>
                                    <setting name="ImcrPad" value="PTB10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="130">
                                    <setting name="Name" value="Imcr_Config_List130"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR609"/>
                                    <setting name="ImcrNumber" value="97"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_17_Y"/>
                                    <setting name="ImcrPad" value="PTD20"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="131">
                                    <setting name="Name" value="Imcr_Config_List131"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR691"/>
                                    <setting name="ImcrNumber" value="179"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D27"/>
                                    <setting name="ImcrPad" value="PTB10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="132">
                                    <setting name="Name" value="Imcr_Config_List132"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR553"/>
                                    <setting name="ImcrNumber" value="41"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_25"/>
                                    <setting name="ImcrPad" value="PTB11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="133">
                                    <setting name="Name" value="Imcr_Config_List133"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR610"/>
                                    <setting name="ImcrNumber" value="98"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_18_Y"/>
                                    <setting name="ImcrPad" value="PTD21"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="134">
                                    <setting name="Name" value="Imcr_Config_List134"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR690"/>
                                    <setting name="ImcrNumber" value="178"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D26"/>
                                    <setting name="ImcrPad" value="PTB11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="135">
                                    <setting name="Name" value="Imcr_Config_List135"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR723"/>
                                    <setting name="ImcrNumber" value="211"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C0_HREQ"/>
                                    <setting name="ImcrPad" value="PTB11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="136">
                                    <setting name="Name" value="Imcr_Config_List136"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR554"/>
                                    <setting name="ImcrNumber" value="42"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_26"/>
                                    <setting name="ImcrPad" value="PTB12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="137">
                                    <setting name="Name" value="Imcr_Config_List137"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR560"/>
                                    <setting name="ImcrNumber" value="48"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_0_X"/>
                                    <setting name="ImcrPad" value="PTB12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="138">
                                    <setting name="Name" value="Imcr_Config_List138"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR689"/>
                                    <setting name="ImcrNumber" value="177"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D25"/>
                                    <setting name="ImcrPad" value="PTB12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="139">
                                    <setting name="Name" value="Imcr_Config_List139"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR763"/>
                                    <setting name="ImcrNumber" value="251"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_PCS3"/>
                                    <setting name="ImcrPad" value="PTB12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="140">
                                    <setting name="Name" value="Imcr_Config_List140"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR555"/>
                                    <setting name="ImcrNumber" value="43"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_27"/>
                                    <setting name="ImcrPad" value="PTB13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="141">
                                    <setting name="Name" value="Imcr_Config_List141"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR561"/>
                                    <setting name="ImcrNumber" value="49"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_1_G"/>
                                    <setting name="ImcrPad" value="PTC1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="142">
                                    <setting name="Name" value="Imcr_Config_List142"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR688"/>
                                    <setting name="ImcrNumber" value="176"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D24"/>
                                    <setting name="ImcrPad" value="PTB13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="143">
                                    <setting name="Name" value="Imcr_Config_List143"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR762"/>
                                    <setting name="ImcrNumber" value="250"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_PCS2"/>
                                    <setting name="ImcrPad" value="PTB13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="144">
                                    <setting name="Name" value="Imcr_Config_List144"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR556"/>
                                    <setting name="ImcrNumber" value="44"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_28"/>
                                    <setting name="ImcrPad" value="PTB14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="145">
                                    <setting name="Name" value="Imcr_Config_List145"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR562"/>
                                    <setting name="ImcrNumber" value="50"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_2_G"/>
                                    <setting name="ImcrPad" value="PTD0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="146">
                                    <setting name="Name" value="Imcr_Config_List146"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR687"/>
                                    <setting name="ImcrNumber" value="175"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D23"/>
                                    <setting name="ImcrPad" value="PTB14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="147">
                                    <setting name="Name" value="Imcr_Config_List147"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR706"/>
                                    <setting name="ImcrNumber" value="194"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART7_RX"/>
                                    <setting name="ImcrPad" value="PTB14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="148">
                                    <setting name="Name" value="Imcr_Config_List148"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR557"/>
                                    <setting name="ImcrNumber" value="45"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_29"/>
                                    <setting name="ImcrPad" value="PTB15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="149">
                                    <setting name="Name" value="Imcr_Config_List149"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR686"/>
                                    <setting name="ImcrNumber" value="174"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D22"/>
                                    <setting name="ImcrPad" value="PTB15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="150">
                                    <setting name="Name" value="Imcr_Config_List150"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR882"/>
                                    <setting name="ImcrNumber" value="370"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART7_TX"/>
                                    <setting name="ImcrPad" value="PTB15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="151">
                                    <setting name="Name" value="Imcr_Config_List151"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR558"/>
                                    <setting name="ImcrNumber" value="46"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_30"/>
                                    <setting name="ImcrPad" value="PTB16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="152">
                                    <setting name="Name" value="Imcr_Config_List152"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR685"/>
                                    <setting name="ImcrNumber" value="173"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D21"/>
                                    <setting name="ImcrPad" value="PTB16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="153">
                                    <setting name="Name" value="Imcr_Config_List153"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR559"/>
                                    <setting name="ImcrNumber" value="47"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="EIRQ_31"/>
                                    <setting name="ImcrPad" value="PTB17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="154">
                                    <setting name="Name" value="Imcr_Config_List154"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR684"/>
                                    <setting name="ImcrNumber" value="172"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D20"/>
                                    <setting name="ImcrPad" value="PTB17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="155">
                                    <setting name="Name" value="Imcr_Config_List155"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR703"/>
                                    <setting name="ImcrNumber" value="191"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART4_RX"/>
                                    <setting name="ImcrPad" value="PTE10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="156">
                                    <setting name="Name" value="Imcr_Config_List156"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR679"/>
                                    <setting name="ImcrNumber" value="167"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D15"/>
                                    <setting name="ImcrPad" value="PTC16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="157">
                                    <setting name="Name" value="Imcr_Config_List157"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR613"/>
                                    <setting name="ImcrNumber" value="101"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_21_Y"/>
                                    <setting name="ImcrPad" value="PTD24"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="158">
                                    <setting name="Name" value="Imcr_Config_List158"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR614"/>
                                    <setting name="ImcrNumber" value="102"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_22_X"/>
                                    <setting name="ImcrPad" value="PTB26"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="159">
                                    <setting name="Name" value="Imcr_Config_List159"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR615"/>
                                    <setting name="ImcrNumber" value="103"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_23_X"/>
                                    <setting name="ImcrPad" value="PTD26"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="160">
                                    <setting name="Name" value="Imcr_Config_List160"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR880"/>
                                    <setting name="ImcrNumber" value="368"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART5_TX"/>
                                    <setting name="ImcrPad" value="PTD1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="161">
                                    <setting name="Name" value="Imcr_Config_List161"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR704"/>
                                    <setting name="ImcrNumber" value="192"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART5_RX"/>
                                    <setting name="ImcrPad" value="PTE3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="162">
                                    <setting name="Name" value="Imcr_Config_List162"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR674"/>
                                    <setting name="ImcrNumber" value="162"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D10"/>
                                    <setting name="ImcrPad" value="PTD15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="163">
                                    <setting name="Name" value="Imcr_Config_List163"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR757"/>
                                    <setting name="ImcrNumber" value="245"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_SCK"/>
                                    <setting name="ImcrPad" value="PTE15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="164">
                                    <setting name="Name" value="Imcr_Config_List164"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR675"/>
                                    <setting name="ImcrNumber" value="163"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D11"/>
                                    <setting name="ImcrPad" value="PTE9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="165">
                                    <setting name="Name" value="Imcr_Config_List165"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR515"/>
                                    <setting name="ImcrNumber" value="3"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN3_RX"/>
                                    <setting name="ImcrPad" value="PTD15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="166">
                                    <setting name="Name" value="Imcr_Config_List166"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR735"/>
                                    <setting name="ImcrNumber" value="223"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_PCS2"/>
                                    <setting name="ImcrPad" value="PTE6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="167">
                                    <setting name="Name" value="Imcr_Config_List167"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR696"/>
                                    <setting name="ImcrNumber" value="184"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="JTAG_TCK_SWD_CLK"/>
                                    <setting name="ImcrPad" value="PTC4"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="168">
                                    <setting name="Name" value="Imcr_Config_List168"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR576"/>
                                    <setting name="ImcrNumber" value="64"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_16_X"/>
                                    <setting name="ImcrPad" value="PTD0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="169">
                                    <setting name="Name" value="Imcr_Config_List169"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR697"/>
                                    <setting name="ImcrNumber" value="185"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="JTAG_TDI"/>
                                    <setting name="ImcrPad" value="PTC5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="170">
                                    <setting name="Name" value="Imcr_Config_List170"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR728"/>
                                    <setting name="ImcrNumber" value="216"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C1_HREQ"/>
                                    <setting name="ImcrPad" value="PTD12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="171">
                                    <setting name="Name" value="Imcr_Config_List171"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR514"/>
                                    <setting name="ImcrNumber" value="2"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN2_RX"/>
                                    <setting name="ImcrPad" value="PTC16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="172">
                                    <setting name="Name" value="Imcr_Config_List172"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR731"/>
                                    <setting name="ImcrNumber" value="219"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C1_SDA"/>
                                    <setting name="ImcrPad" value="PTD8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="173">
                                    <setting name="Name" value="Imcr_Config_List173"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR729"/>
                                    <setting name="ImcrNumber" value="217"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C1_SCL"/>
                                    <setting name="ImcrPad" value="PTC7"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="174">
                                    <setting name="Name" value="Imcr_Config_List174"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR601"/>
                                    <setting name="ImcrNumber" value="89"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_1_CH_9_H"/>
                                    <setting name="ImcrPad" value="PTC8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="175">
                                    <setting name="Name" value="Imcr_Config_List175"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR676"/>
                                    <setting name="ImcrNumber" value="164"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D12"/>
                                    <setting name="ImcrPad" value="PTE8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="176">
                                    <setting name="Name" value="Imcr_Config_List176"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR724"/>
                                    <setting name="ImcrNumber" value="212"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C0_SCL"/>
                                    <setting name="ImcrPad" value="PTC8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="177">
                                    <setting name="Name" value="Imcr_Config_List177"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR741"/>
                                    <setting name="ImcrNumber" value="229"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_SCK"/>
                                    <setting name="ImcrPad" value="PTC8"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="178">
                                    <setting name="Name" value="Imcr_Config_List178"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR677"/>
                                    <setting name="ImcrNumber" value="165"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D13"/>
                                    <setting name="ImcrPad" value="PTD6"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="179">
                                    <setting name="Name" value="Imcr_Config_List179"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR726"/>
                                    <setting name="ImcrNumber" value="214"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C0_SDA"/>
                                    <setting name="ImcrPad" value="PTC9"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="180">
                                    <setting name="Name" value="Imcr_Config_List180"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR742"/>
                                    <setting name="ImcrNumber" value="230"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI0_SIN"/>
                                    <setting name="ImcrPad" value="PTE0"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="181">
                                    <setting name="Name" value="Imcr_Config_List181"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR754"/>
                                    <setting name="ImcrNumber" value="242"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI2_PCS1"/>
                                    <setting name="ImcrPad" value="PTE10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="182">
                                    <setting name="Name" value="Imcr_Config_List182"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR867"/>
                                    <setting name="ImcrNumber" value="355"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN11"/>
                                    <setting name="ImcrPad" value="PTC10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="183">
                                    <setting name="Name" value="Imcr_Config_List183"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR517"/>
                                    <setting name="ImcrNumber" value="5"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="CAN5_RX"/>
                                    <setting name="ImcrPad" value="PTD17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="184">
                                    <setting name="Name" value="Imcr_Config_List184"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR866"/>
                                    <setting name="ImcrNumber" value="354"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN10"/>
                                    <setting name="ImcrPad" value="PTC11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="185">
                                    <setting name="Name" value="Imcr_Config_List185"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR582"/>
                                    <setting name="ImcrNumber" value="70"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_22_X"/>
                                    <setting name="ImcrPad" value="PTE15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="186">
                                    <setting name="Name" value="Imcr_Config_List186"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR583"/>
                                    <setting name="ImcrNumber" value="71"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_23_X"/>
                                    <setting name="ImcrPad" value="PTC13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="187">
                                    <setting name="Name" value="Imcr_Config_List187"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR680"/>
                                    <setting name="ImcrNumber" value="168"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="FXIO_D16"/>
                                    <setting name="ImcrPad" value="PTC14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="188">
                                    <setting name="Name" value="Imcr_Config_List188"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR865"/>
                                    <setting name="ImcrNumber" value="353"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN9"/>
                                    <setting name="ImcrPad" value="PTC14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="189">
                                    <setting name="Name" value="Imcr_Config_List189"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR864"/>
                                    <setting name="ImcrNumber" value="352"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN8"/>
                                    <setting name="ImcrPad" value="PTC15"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="190">
                                    <setting name="Name" value="Imcr_Config_List190"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR732"/>
                                    <setting name="ImcrNumber" value="220"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C1_SDAS"/>
                                    <setting name="ImcrPad" value="PTC16"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="191">
                                    <setting name="Name" value="Imcr_Config_List191"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR765"/>
                                    <setting name="ImcrNumber" value="253"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_SIN"/>
                                    <setting name="ImcrPad" value="PTE10"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="192">
                                    <setting name="Name" value="Imcr_Config_List192"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR730"/>
                                    <setting name="ImcrNumber" value="218"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPI2C1_SCLS"/>
                                    <setting name="ImcrPad" value="PTC17"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="193">
                                    <setting name="Name" value="Imcr_Config_List193"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR764"/>
                                    <setting name="ImcrNumber" value="252"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPSPI3_SCK"/>
                                    <setting name="ImcrPad" value="PTD1"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="194">
                                    <setting name="Name" value="Imcr_Config_List194"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR861"/>
                                    <setting name="ImcrNumber" value="349"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN5"/>
                                    <setting name="ImcrPad" value="PTD2"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="195">
                                    <setting name="Name" value="Imcr_Config_List195"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR860"/>
                                    <setting name="ImcrNumber" value="348"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN4"/>
                                    <setting name="ImcrPad" value="PTD3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="196">
                                    <setting name="Name" value="Imcr_Config_List196"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR579"/>
                                    <setting name="ImcrNumber" value="67"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_19_Y"/>
                                    <setting name="ImcrPad" value="PTE5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="197">
                                    <setting name="Name" value="Imcr_Config_List197"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR863"/>
                                    <setting name="ImcrNumber" value="351"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN7"/>
                                    <setting name="ImcrPad" value="PTD5"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="198">
                                    <setting name="Name" value="Imcr_Config_List198"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR874"/>
                                    <setting name="ImcrNumber" value="362"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="LPUART2_CTS"/>
                                    <setting name="ImcrPad" value="PTD11"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="199">
                                    <setting name="Name" value="Imcr_Config_List199"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR578"/>
                                    <setting name="ImcrNumber" value="66"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_18_Y"/>
                                    <setting name="ImcrPad" value="PTD12"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="200">
                                    <setting name="Name" value="Imcr_Config_List200"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR580"/>
                                    <setting name="ImcrNumber" value="68"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_20_Y"/>
                                    <setting name="ImcrPad" value="PTD13"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="201">
                                    <setting name="Name" value="Imcr_Config_List201"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR581"/>
                                    <setting name="ImcrNumber" value="69"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="eMIOS_0_CH_21_Y"/>
                                    <setting name="ImcrPad" value="PTD14"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="202">
                                    <setting name="Name" value="Imcr_Config_List202"/>
                                    <setting name="ImcrName" value="SIUL2_0_IMCR862"/>
                                    <setting name="ImcrNumber" value="350"/>
                                    <setting name="ImcrSiul2Instance" value="SIUL2_0"/>
                                    <setting name="ImcrInput" value="TRGMUX_IN6"/>
                                    <setting name="ImcrPad" value="PTE3"/>
                                    <setting name="ImcrMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                              </array>
                              <array name="Other_Config_List">
                                 <struct name="0">
                                    <setting name="Name" value="Other_Config_List0"/>
                                    <setting name="OtherName" value="Siul2_0_IntCtrl"/>
                                    <setting name="OtherNumber" value="0"/>
                                    <setting name="OthersSiul2Instance" value="SIUL2_0"/>
                                    <setting name="OtherInput" value="InterruptRegisters"/>
                                    <setting name="OtherMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="Other_Config_List1"/>
                                    <setting name="OtherName" value="Siul2_0_RegGCR"/>
                                    <setting name="OtherNumber" value="15"/>
                                    <setting name="OthersSiul2Instance" value="SIUL2_0"/>
                                    <setting name="OtherInput" value="GcrRegisters"/>
                                    <setting name="OtherMirror" value="VIRTWRAPPER_PDAC0"/>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="Dma_Mux_Configuration">
                              <setting name="Name" value="Dma_Mux_Configuration"/>
                              <setting name="Dma_Mux_DevErrorDetect" value="true"/>
                              <array name="Dma_Mux_Module_Config">
                                 <struct name="0">
                                    <setting name="Name" value="Dma_Mux_Module_Config_0"/>
                                    <setting name="Dma_Mux_HwInstance" value="DMA_INSTANCE_0"/>
                                    <setting name="Dma_Mux_HwChannel" value="DMA_CHANNEL_0"/>
                                    <setting name="Dma_Mux_Enable_Trigger" value="false"/>
                                    <setting name="Dma_Mux_Source0" value="DMA_MUX_0_LPSPI_2_TX_REQUEST"/>
                                    <setting name="Dma_Mux_Source1" value="DMA_MUX_1_REQ_DISABLED"/>
                                    <setting name="Dma_Mux_Source2" value="NOT_USED"/>
                                    <setting name="Dma_Mux_Source3" value="NOT_USED"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="Dma_Mux_Module_Config_1"/>
                                    <setting name="Dma_Mux_HwInstance" value="DMA_INSTANCE_0"/>
                                    <setting name="Dma_Mux_HwChannel" value="DMA_CHANNEL_1"/>
                                    <setting name="Dma_Mux_Enable_Trigger" value="false"/>
                                    <setting name="Dma_Mux_Source0" value="DMA_MUX_0_LPSPI_2_RX_REQUEST"/>
                                    <setting name="Dma_Mux_Source1" value="DMA_MUX_1_REQ_DISABLED"/>
                                    <setting name="Dma_Mux_Source2" value="NOT_USED"/>
                                    <setting name="Dma_Mux_Source3" value="NOT_USED"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="Dma_Mux_Module_Config_2"/>
                                    <setting name="Dma_Mux_HwInstance" value="DMA_INSTANCE_0"/>
                                    <setting name="Dma_Mux_HwChannel" value="DMA_CHANNEL_6"/>
                                    <setting name="Dma_Mux_Enable_Trigger" value="false"/>
                                    <setting name="Dma_Mux_Source0" value="DMA_MUX_0_REQ_DISABLED"/>
                                    <setting name="Dma_Mux_Source1" value="DMA_MUX_1_LPUART_2_TRANSMIT"/>
                                    <setting name="Dma_Mux_Source2" value="NOT_USED"/>
                                    <setting name="Dma_Mux_Source3" value="NOT_USED"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="Dma_Mux_Module_Config_3"/>
                                    <setting name="Dma_Mux_HwInstance" value="DMA_INSTANCE_0"/>
                                    <setting name="Dma_Mux_HwChannel" value="DMA_CHANNEL_7"/>
                                    <setting name="Dma_Mux_Enable_Trigger" value="false"/>
                                    <setting name="Dma_Mux_Source0" value="DMA_MUX_0_REQ_DISABLED"/>
                                    <setting name="Dma_Mux_Source1" value="DMA_MUX_1_LPUART_2_RECEIVE"/>
                                    <setting name="Dma_Mux_Source2" value="NOT_USED"/>
                                    <setting name="Dma_Mux_Source3" value="NOT_USED"/>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="Mscm_Configuration">
                              <setting name="Name" value="Mscm_Configuration"/>
                              <setting name="MscmDevErrorDetect" value="false"/>
                              <array name="MscmConfig">
                                 <struct name="0">
                                    <setting name="Name" value="MscmConfig_0"/>
                                    <setting name="IsrName" value="MSCM_DMA_TCD_0"/>
                                    <setting name="IsrTargetCore0" value="true"/>
                                    <setting name="IsrTargetCore1" value="true"/>
                                    <setting name="IsrTargetCore2" value="true"/>
                                    <setting name="IsrTargetCore3" value="true"/>
                                 </struct>
                              </array>
                           </struct>
                        </struct>
                        <struct name="CommonPublishedInformation">
                           <setting name="Name" value="CommonPublishedInformation"/>
                           <setting name="ArReleaseMajorVersion" value="4"/>
                           <setting name="ArReleaseMinorVersion" value="7"/>
                           <setting name="ArReleaseRevisionVersion" value="0"/>
                           <setting name="ModuleId" value="255"/>
                           <setting name="SwMajorVersion" value="4"/>
                           <setting name="SwMinorVersion" value="0"/>
                           <setting name="SwPatchVersion" value="0"/>
                           <array name="VendorApiInfix"/>
                           <setting name="VendorId" value="43"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="IntCtrl_Ip" uuid="b37888cb-674e-4255-8a4e-c2225d031266" type="IntCtrl_Ip" type_id="IntCtrl_Ip" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="IntCtrl_Ip">
                        <setting name="Name" value="IntCtrl_Ip"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="IntCtrlConfigGeneral">
                           <setting name="Name" value="IntCtrlConfigGeneral"/>
                           <setting name="IntCtrlDevErrorDetect" value="true"/>
                           <setting name="PlatformEnableUserModeSupport" value="false"/>
                        </struct>
                        <array name="IntCtrlConfig">
                           <struct name="0">
                              <setting name="Name" value="IntCtrlConfig_0"/>
                              <array name="PlatformIsrConfig">
                                 <struct name="0">
                                    <setting name="Name" value="PlatformIsrConfig_0"/>
                                    <setting name="IsrName" value="DMATCD0_IRQn"/>
                                    <setting name="IsrEnabled" value="true"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="Dma0_Ch0_IRQHandler"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="PlatformIsrConfig_1"/>
                                    <setting name="IsrName" value="DMATCD1_IRQn"/>
                                    <setting name="IsrEnabled" value="true"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="Dma0_Ch1_IRQHandler"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="PlatformIsrConfig_6"/>
                                    <setting name="IsrName" value="DMATCD6_IRQn"/>
                                    <setting name="IsrEnabled" value="false"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="Dma0_Ch6_IRQHandler"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="PlatformIsrConfig_7"/>
                                    <setting name="IsrName" value="DMATCD7_IRQn"/>
                                    <setting name="IsrEnabled" value="false"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="Dma0_Ch7_IRQHandler"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="PlatformIsrConfig_14"/>
                                    <setting name="IsrName" value="LPUART2_IRQn"/>
                                    <setting name="IsrEnabled" value="true"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="LPUART_UART_IP_2_IRQHandler"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="PlatformIsrConfig_5"/>
                                    <setting name="IsrName" value="LPI2C0_IRQn"/>
                                    <setting name="IsrEnabled" value="true"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="LPI2C0_Master_Slave_IRQHandler"/>
                                 </struct>
                                 <struct name="6">
                                    <setting name="Name" value="PlatformIsrConfig_6"/>
                                    <setting name="IsrName" value="FLEXIO_IRQn"/>
                                    <setting name="IsrEnabled" value="true"/>
                                    <setting name="IsrPriority" value="0"/>
                                    <setting name="IsrHandler" value="MCL_FLEXIO_ISR"/>
                                 </struct>
                              </array>
                           </struct>
                        </array>
                     </config_set>
                  </instance>
                  <instance name="Adc_Sar_Ip" uuid="1b695adb-7fcd-4e5b-ac15-1d70dfcf92b0" type="Adc_Sar_Ip" type_id="Adc_Sar_Ip" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Adc_Sar_Ip">
                        <setting name="Name" value="Adc_Sar_Ip"/>
                        <struct name="AdcSarGeneral">
                           <setting name="Name" value="AdcSarGeneral"/>
                           <setting name="AdcSarTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                           <setting name="AdcSarTimeoutVal" value="100000"/>
                           <setting name="AdcSarIpDevErrorDetect" value="false"/>
                           <setting name="AdcSarEnableUserModeSupport" value="false"/>
                           <setting name="AdcSarEnableWatchdogApi" value="false"/>
                           <setting name="AdcSarEnableSelfTestApi" value="false"/>
                           <setting name="AdcSarEnableEoC" value="false"/>
                           <setting name="AdcSarEnableTempsenseApi" value="false"/>
                           <setting name="AdcSarTempSenseVsupply" value="53"/>
                        </struct>
                        <array name="AdcHwUnit">
                           <struct name="0">
                              <setting name="Name" value="AdcHwUnit_0"/>
                              <setting name="AdcHwUnitId" value="ADC0"/>
                              <setting name="AdcHwUnitConvMode" value="ADC_SAR_IP_CONV_MODE_ONESHOT"/>
                              <setting name="AdcPrescale" value="1"/>
                              <setting name="AdcCalibrationPrescale" value="1"/>
                              <setting name="AdcHighSpeedEnable" value="false"/>
                              <setting name="AdcPowerDownDelay" value="0"/>
                              <setting name="AdcMuxDelay" value="0"/>
                              <setting name="AdcAutoClockOff" value="false"/>
                              <setting name="AdcBypassSampling" value="false"/>
                              <setting name="AdcHwUnitOverwriteEn" value="false"/>
                              <setting name="AdcPresamplingInternalSignal0" value="VREFL"/>
                              <setting name="AdcPresamplingInternalSignal1" value="VREFL"/>
                              <setting name="AdcPresamplingInternalSignal2" value="VREFL"/>
                              <setting name="AdcHwUnitCtuMode" value="ADC_SAR_IP_CTU_MODE_DISABLED"/>
                              <setting name="AdcHwUnitExtInjTrg" value="ADC_SAR_IP_EXT_TRIG_EDGE_DISABLED"/>
                              <setting name="AdcHwUnitExtNrmTrg" value="ADC_SAR_IP_EXT_TRIG_EDGE_DISABLED"/>
                              <setting name="AdcHwUnitPrimaryExtNrmTrg" value="true"/>
                              <setting name="AdcHwUnitAuxiliaryExtNrmTrg" value="false"/>
                              <setting name="AdcHwUnitUsrOffset" value="0"/>
                              <setting name="AdcHwUnitUsrGain" value="0"/>
                              <setting name="AdcHwUnitResolution" value="RESOLUTION_14"/>
                              <setting name="AdcHwUnitBypassResolution" value="false"/>
                              <setting name="AdcHwUnitDmaEnable" value="false"/>
                              <setting name="AdcHwUnitDmaClearSource" value="DMA_REQ_CLEAR_ON_ACK"/>
                              <setting name="AdcHwUnitNotifChainN" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifChainJ" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifCtu" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifEOC" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifWdg" value="NULL_PTR"/>
                              <setting name="AdcHwUnitDataAlign" value="ADC_SAR_IP_DATA_ALIGNED_RIGHT"/>
                              <setting name="AdcSarHwUnitVref" value="53"/>
                              <array name="AdcSelfTestThresholdConfiguration">
                                 <struct name="0">
                                    <setting name="Name" value="AdcSelfTestThresholdConfiguration_0"/>
                                    <setting name="AdcSTAW0RSelfTestHighThresholdValue" value="0x3669"/>
                                    <setting name="AdcSTAW0RSelfTestLowThresholdValue" value="0x1A80"/>
                                    <setting name="AdcSTAW1RSelfTestLowThresholdValue" value="0"/>
                                    <setting name="AdcSTAW2RSelfTestLowThresholdValue" value="0"/>
                                    <setting name="AdcSTAW4RSelfTestHighThresholdValue" value="0"/>
                                    <setting name="AdcSTAW5RSelfTestHighThresholdValue" value="0"/>
                                 </struct>
                              </array>
                              <setting name="AdcHardwareAverageEnable" value="false"/>
                              <setting name="AdcHardwareAverageSelect" value="SAMPLES_4"/>
                              <setting name="AdcSamplingDurationNormal0" value="22"/>
                              <setting name="AdcSamplingDurationNormal1" value="22"/>
                              <setting name="AdcSamplingDurationNormal2" value="22"/>
                              <array name="AdcChannel">
                                 <struct name="0">
                                    <setting name="Name" value="AdcChannel_0"/>
                                    <setting name="AdcChannelName" value="P1_ChanNum1"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="true"/>
                                    <array name="AdcThresholdRegister">
                                       <setting name="0" value="/Adc_Sar_Ip/Adc_Sar_Ip/AdcHwUnit_0/AdcThresholdControl_0"/>
                                    </array>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="AdcChannel_1"/>
                                    <setting name="AdcChannelName" value="P2_ChanNum2"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="AdcChannel_2"/>
                                    <setting name="AdcChannelName" value="P4_ChanNum4"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="AdcChannel_3"/>
                                    <setting name="AdcChannelName" value="P5_ChanNum5"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="AdcChannel_4"/>
                                    <setting name="AdcChannelName" value="P6_ChanNum6"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="AdcChannel_5"/>
                                    <setting name="AdcChannelName" value="P7_ChanNum7"/>
                                    <setting name="NormalChnEn" value="true"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                              </array>
                              <array name="AdcThresholdControl">
                                 <struct name="0">
                                    <setting name="Name" value="AdcThresholdControl_0"/>
                                    <setting name="AdcThresholdControlRegister" value="ADC_THRESHOLD_REG_0"/>
                                    <setting name="AdcHighThreshold" value="4095"/>
                                    <setting name="AdcLowThreshold" value="0"/>
                                    <setting name="WdgLowThrEn" value="true"/>
                                    <setting name="WdgHighThrEn" value="true"/>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="AdcHwUnit_1"/>
                              <setting name="AdcHwUnitId" value="ADC1"/>
                              <setting name="AdcHwUnitConvMode" value="ADC_SAR_IP_CONV_MODE_ONESHOT"/>
                              <setting name="AdcPrescale" value="1"/>
                              <setting name="AdcCalibrationPrescale" value="1"/>
                              <setting name="AdcHighSpeedEnable" value="false"/>
                              <setting name="AdcPowerDownDelay" value="0"/>
                              <setting name="AdcMuxDelay" value="0"/>
                              <setting name="AdcAutoClockOff" value="false"/>
                              <setting name="AdcBypassSampling" value="false"/>
                              <setting name="AdcHwUnitOverwriteEn" value="false"/>
                              <setting name="AdcPresamplingInternalSignal0" value="VREFL"/>
                              <setting name="AdcPresamplingInternalSignal1" value="VREFL"/>
                              <setting name="AdcPresamplingInternalSignal2" value="VREFL"/>
                              <setting name="AdcHwUnitCtuMode" value="ADC_SAR_IP_CTU_MODE_DISABLED"/>
                              <setting name="AdcHwUnitExtInjTrg" value="ADC_SAR_IP_EXT_TRIG_EDGE_DISABLED"/>
                              <setting name="AdcHwUnitExtNrmTrg" value="ADC_SAR_IP_EXT_TRIG_EDGE_DISABLED"/>
                              <setting name="AdcHwUnitPrimaryExtNrmTrg" value="true"/>
                              <setting name="AdcHwUnitAuxiliaryExtNrmTrg" value="false"/>
                              <setting name="AdcHwUnitUsrOffset" value="0"/>
                              <setting name="AdcHwUnitUsrGain" value="0"/>
                              <setting name="AdcHwUnitResolution" value="RESOLUTION_14"/>
                              <setting name="AdcHwUnitBypassResolution" value="false"/>
                              <setting name="AdcHwUnitDmaEnable" value="false"/>
                              <setting name="AdcHwUnitDmaClearSource" value="DMA_REQ_CLEAR_ON_ACK"/>
                              <setting name="AdcHwUnitNotifChainN" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifChainJ" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifCtu" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifEOC" value="NULL_PTR"/>
                              <setting name="AdcHwUnitNotifWdg" value="NULL_PTR"/>
                              <setting name="AdcHwUnitDataAlign" value="ADC_SAR_IP_DATA_ALIGNED_RIGHT"/>
                              <setting name="AdcSarHwUnitVref" value="53"/>
                              <array name="AdcSelfTestThresholdConfiguration">
                                 <struct name="0">
                                    <setting name="Name" value="AdcSelfTestThresholdConfiguration_0"/>
                                    <setting name="AdcSTAW0RSelfTestHighThresholdValue" value="0x3669"/>
                                    <setting name="AdcSTAW0RSelfTestLowThresholdValue" value="0x1A80"/>
                                    <setting name="AdcSTAW1RSelfTestLowThresholdValue" value="0"/>
                                    <setting name="AdcSTAW2RSelfTestLowThresholdValue" value="0"/>
                                    <setting name="AdcSTAW4RSelfTestHighThresholdValue" value="0"/>
                                    <setting name="AdcSTAW5RSelfTestHighThresholdValue" value="0"/>
                                 </struct>
                              </array>
                              <setting name="AdcHardwareAverageEnable" value="false"/>
                              <setting name="AdcHardwareAverageSelect" value="SAMPLES_4"/>
                              <setting name="AdcSamplingDurationNormal0" value="22"/>
                              <setting name="AdcSamplingDurationNormal1" value="22"/>
                              <setting name="AdcSamplingDurationNormal2" value="22"/>
                              <array name="AdcChannel">
                                 <struct name="0">
                                    <setting name="Name" value="AdcChannel_0"/>
                                    <setting name="AdcChannelName" value="P1_ChanNum1"/>
                                    <setting name="NormalChnEn" value="false"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="AdcChannel_1"/>
                                    <setting name="AdcChannelName" value="P3_ChanNum3"/>
                                    <setting name="NormalChnEn" value="false"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="AdcChannel_2"/>
                                    <setting name="AdcChannelName" value="P5_ChanNum5"/>
                                    <setting name="NormalChnEn" value="false"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="AdcChannel_3"/>
                                    <setting name="AdcChannelName" value="P7_ChanNum7"/>
                                    <setting name="NormalChnEn" value="false"/>
                                    <setting name="InjectedChnEn" value="false"/>
                                    <setting name="AdcEnablePresampling" value="false"/>
                                    <setting name="AdcEnableThresholds" value="false"/>
                                    <array name="AdcThresholdRegister"/>
                                    <setting name="WdgEn" value="false"/>
                                    <setting name="EOCEn" value="false"/>
                                    <setting name="DmaEn" value="false"/>
                                 </struct>
                              </array>
                              <array name="AdcThresholdControl">
                                 <struct name="0">
                                    <setting name="Name" value="AdcThresholdControl_1"/>
                                    <setting name="AdcThresholdControlRegister" value="ADC_THRESHOLD_REG_0"/>
                                    <setting name="AdcHighThreshold" value="4095"/>
                                    <setting name="AdcLowThreshold" value="0"/>
                                    <setting name="WdgLowThrEn" value="false"/>
                                    <setting name="WdgHighThrEn" value="false"/>
                                 </struct>
                              </array>
                           </struct>
                        </array>
                     </config_set>
                  </instance>
                  <instance name="Siul2_Dio" uuid="8ec0b9ea-5a0b-4abf-aad4-20ec5fe076d9" type="Siul2_Dio" type_id="Siul2_Dio" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Siul2_Dio">
                        <setting name="Name" value="Siul2_Dio"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="DioGeneral">
                           <setting name="Name" value="DioGeneral"/>
                           <setting name="SIUL2DioIPDevErrorDetect" value="true"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Siul2_Icu" uuid="f43e20ff-1818-4867-b214-bd8e5ba7b5a7" type="Siul2_Icu" type_id="Siul2_Icu" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Siul2_Icu">
                        <setting name="Name" value="Siul2_Icu"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="IcuConfigSet">
                           <setting name="Name" value="Siul2ConfigSet"/>
                           <setting name="IcuMaxChannel" value="1"/>
                           <array name="IcuChannel">
                              <struct name="0">
                                 <setting name="Name" value="IcuChannel_0"/>
                                 <setting name="IcuChannelId" value="0"/>
                                 <setting name="IcuChannelRef" value="/Siul2_Icu/Siul2_Icu/Siul2ConfigSet/IcuSiul2_0/IcuSiul2Channels_0"/>
                                 <setting name="IcuDefaultStartEdge" value="ICU_RISING_EDGE"/>
                                 <setting name="IcuMeasurementMode" value="ICU_MODE_SIGNAL_EDGE_DETECT"/>
                                 <setting name="IcuOverflowNotification" value="NULL_PTR"/>
                                 <array name="IcuSignalEdgeDetection">
                                    <struct name="0">
                                       <setting name="Name" value="IcuSignalEdgeDetection"/>
                                       <array name="IcuSignalNotification"/>
                                    </struct>
                                 </array>
                                 <array name="IcuSignalMeasurement"/>
                                 <array name="IcuTimestampMeasurement"/>
                              </struct>
                           </array>
                           <array name="IcuSiul2">
                              <struct name="0">
                                 <setting name="Name" value="IcuSiul2_0"/>
                                 <setting name="IcuSiul2Instance" value="0"/>
                                 <setting name="IcuEXT_ISR_InterruptFilterClockPrescaler" value="0"/>
                                 <setting name="IcuEXT_ISR_AlternateInterruptFilterClockPrescaler" value="0"/>
                                 <array name="IcuSiul2Channels">
                                    <struct name="0">
                                       <setting name="Name" value="IcuSiul2Channels_0"/>
                                       <setting name="IcuSiul2Channel" value="3"/>
                                       <setting name="Icu_EXT_ISR_IFERDigitalFilter" value="true"/>
                                       <setting name="Icu_EXT_ISR_IFMCDigitalFilter" value="0"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                           <array name="IcuHwInterruptConfigList">
                              <struct name="0">
                                 <setting name="Name" value="IcuHwInterruptConfigList_0"/>
                                 <setting name="IcuIsrHwId" value="SIUL2_0_IRQ_CH_3"/>
                                 <setting name="IcuIsrEnable" value="true"/>
                              </struct>
                           </array>
                        </struct>
                        <struct name="IcuGeneral">
                           <setting name="Name" value="Siul2IcuGeneral"/>
                           <setting name="IcuDevErrorDetect" value="false"/>
                           <setting name="IcuEnableUserModeSupport" value="false"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Emios_Gpt" uuid="84287689-2590-417f-ae95-757d26b23f66" type="Emios_Gpt" type_id="Emios_Gpt" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Emios_Gpt">
                        <setting name="Name" value="Emios_Gpt"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="GptChannelConfigSet">
                           <setting name="Name" value="GptChannelConfigSet"/>
                           <array name="GptEmios">
                              <struct name="0">
                                 <setting name="Name" value="Emios0"/>
                                 <setting name="GptEmiosModule" value="EMIOS_0"/>
                                 <array name="GptEmiosChannels">
                                    <struct name="0">
                                       <setting name="Name" value="EmiosChannel_0"/>
                                       <setting name="GptEmiosChannel" value="CH_3"/>
                                       <setting name="GptEmiosPrescaler" value="1"/>
                                       <setting name="GptEmiosAlternatePrescaler" value="1"/>
                                       <setting name="EmiosFreezeEnable" value="false"/>
                                       <setting name="EmiosNotification" value="NULL_PTR"/>
                                       <setting name="EmiosChannelMode" value="EMIOS_GPT_IP_CH_MODE_CONTINUOUS"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                        </struct>
                        <array name="GptHwConfiguration">
                           <struct name="0">
                              <setting name="Name" value="GptHwConfiguration_0"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_0"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="GptHwConfiguration_1"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_1"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="2">
                              <setting name="Name" value="GptHwConfiguration_2"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_2"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="3">
                              <setting name="Name" value="GptHwConfiguration_3"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_3"/>
                              <setting name="GptIsrEnable" value="true"/>
                              <setting name="GptChannelIsUsed" value="true"/>
                           </struct>
                           <struct name="4">
                              <setting name="Name" value="GptHwConfiguration_4"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_4"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="5">
                              <setting name="Name" value="GptHwConfiguration_5"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_5"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="6">
                              <setting name="Name" value="GptHwConfiguration_6"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_6"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="7">
                              <setting name="Name" value="GptHwConfiguration_7"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_7"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="8">
                              <setting name="Name" value="GptHwConfiguration_8"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_8"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="9">
                              <setting name="Name" value="GptHwConfiguration_9"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_16"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="10">
                              <setting name="Name" value="GptHwConfiguration_10"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_22"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="11">
                              <setting name="Name" value="GptHwConfiguration_11"/>
                              <setting name="GptIsrHwId" value="EMIOS_0_CH_23"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="12">
                              <setting name="Name" value="GptHwConfiguration_12"/>
                              <setting name="GptIsrHwId" value="EMIOS_1_CH_0"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="13">
                              <setting name="Name" value="GptHwConfiguration_13"/>
                              <setting name="GptIsrHwId" value="EMIOS_1_CH_8"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="14">
                              <setting name="Name" value="GptHwConfiguration_14"/>
                              <setting name="GptIsrHwId" value="EMIOS_1_CH_16"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="15">
                              <setting name="Name" value="GptHwConfiguration_15"/>
                              <setting name="GptIsrHwId" value="EMIOS_1_CH_22"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="16">
                              <setting name="Name" value="GptHwConfiguration_16"/>
                              <setting name="GptIsrHwId" value="EMIOS_1_CH_23"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                        </array>
                        <struct name="GptAutosarExt">
                           <setting name="Name" value="GptAutosarExt"/>
                           <setting name="GptEnableDualClockMode" value="false"/>
                           <setting name="GptChangeNextTimeoutValueApi" value="false"/>
                           <setting name="GptEnableUserModeSupport" value="false"/>
                           <setting name="ChainModeApi" value="false"/>
                           <setting name="GptStandbyWakeupSupport" value="false"/>
                           <setting name="GptEnableTriggers" value="false"/>
                        </struct>
                        <struct name="GptDriverConfiguration">
                           <setting name="Name" value="GptDriverConfiguration"/>
                           <setting name="GptDevErrorDetect" value="false"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Emios_Mcl_Ip" uuid="ba771be6-9f97-4f12-a25d-28223b358ec6" type="Emios_Mcl_Ip" type_id="Emios_Mcl_Ip" mode="emios_mcl" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Emios_Mcl_Ip">
                        <setting name="Name" value="EmiosMcl"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="MclGeneral">
                           <setting name="Name" value="MclGeneral"/>
                           <setting name="MclEnableDevErrorDetect" value="true"/>
                           <struct name="MclEmiosCommon">
                              <setting name="Name" value="MclEmiosCommon"/>
                              <setting name="MclEnableEmiosCommon" value="true"/>
                           </struct>
                        </struct>
                        <array name="EmiosCommon">
                           <struct name="0">
                              <setting name="Name" value="EmiosCommon_0"/>
                              <setting name="EmiosMclInstances" value="EMIOS_0"/>
                              <setting name="EmiosMclEnableFreezState" value="true"/>
                              <setting name="EmiosMclEnableGlobalTimeBase" value="true"/>
                              <setting name="EmiosMclClkDivVal" value="1"/>
                              <array name="EmiosMclMasterBus">
                                 <struct name="0">
                                    <setting name="Name" value="EMIOS_0_MasteBus0"/>
                                    <setting name="EmiosMclMasterBusNumber" value="EMIOS_CH_8"/>
                                    <setting name="EmiosMclMasterBusModeType" value="MC_UP_COUNTER_START"/>
                                    <setting name="EmiosMclDefaultPeriod" value="6316"/>
                                    <setting name="EmiosMclFirstOffsetValue" value="0"/>
                                    <setting name="EmiosMclMasterBusPrescaler" value="DIV_1"/>
                                    <setting name="EmiosMclMasterBusAltPrescaler" value="DIV_1"/>
                                    <setting name="EmiosMclChannelAllowDebugMode" value="true"/>
                                    <setting name="EmiosMclPwmExclusiveAccess" value="true"/>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="EmiosCommon_1"/>
                              <setting name="EmiosMclInstances" value="EMIOS_1"/>
                              <setting name="EmiosMclEnableFreezState" value="true"/>
                              <setting name="EmiosMclEnableGlobalTimeBase" value="true"/>
                              <setting name="EmiosMclClkDivVal" value="1"/>
                              <array name="EmiosMclMasterBus">
                                 <struct name="0">
                                    <setting name="Name" value="EMIOS_1_MasteBus0"/>
                                    <setting name="EmiosMclMasterBusNumber" value="EMIOS_CH_16"/>
                                    <setting name="EmiosMclMasterBusModeType" value="MCB_UP_COUNTER"/>
                                    <setting name="EmiosMclDefaultPeriod" value="6316"/>
                                    <setting name="EmiosMclFirstOffsetValue" value="0"/>
                                    <setting name="EmiosMclMasterBusPrescaler" value="DIV_1"/>
                                    <setting name="EmiosMclMasterBusAltPrescaler" value="DIV_1"/>
                                    <setting name="EmiosMclChannelAllowDebugMode" value="true"/>
                                    <setting name="EmiosMclPwmExclusiveAccess" value="true"/>
                                 </struct>
                              </array>
                           </struct>
                        </array>
                     </config_set>
                  </instance>
                  <instance name="Emios_Pwm" uuid="e4247537-e260-4f11-a8d7-b609d96954a6" type="Emios_Pwm" type_id="Emios_Pwm" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Emios_Pwm">
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="PwmGeneral">
                           <setting name="Name" value="PwmGeneral"/>
                           <setting name="PwmDevErrorDetect" value="false"/>
                        </struct>
                        <array name="PwmEmios">
                           <struct name="0">
                              <setting name="Name" value="PwmEmios_0"/>
                              <setting name="PwmHwInstance" value="Emios_0"/>
                              <array name="PwmEmiosChannels">
                                 <struct name="0">
                                    <setting name="Name" value="PwmEmiosChannels_0"/>
                                    <setting name="EmiosChId" value="CH_0"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWFMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_INTERNAL"/>
                                    <array name="PwmEmiosBusRef"/>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="PwmEmiosChannels_1"/>
                                    <setting name="EmiosChId" value="CH_1"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWFMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_INTERNAL"/>
                                    <array name="PwmEmiosBusRef"/>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="PwmEmiosChannels_2"/>
                                    <setting name="EmiosChId" value="CH_2"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWFMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_INTERNAL"/>
                                    <array name="PwmEmiosBusRef"/>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="PwmEmiosChannels_3"/>
                                    <setting name="EmiosChId" value="CH_3"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWFMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_INTERNAL"/>
                                    <array name="PwmEmiosBusRef"/>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="PwmEmios_1"/>
                              <setting name="PwmHwInstance" value="Emios_1"/>
                              <array name="PwmEmiosChannels">
                                 <struct name="0">
                                    <setting name="Name" value="PwmEmiosChannels_0"/>
                                    <setting name="EmiosChId" value="CH_17"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_BCDE"/>
                                    <array name="PwmEmiosBusRef">
                                       <setting name="0" value="/Emios_Mcl_Ip/EmiosMcl/EmiosCommon_1/EMIOS_1_MasteBus0"/>
                                    </array>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="PwmEmiosChannels_1"/>
                                    <setting name="EmiosChId" value="CH_18"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_BCDE"/>
                                    <array name="PwmEmiosBusRef">
                                       <setting name="0" value="/Emios_Mcl_Ip/EmiosMcl/EmiosCommon_1/EMIOS_1_MasteBus0"/>
                                    </array>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="PwmEmiosChannels_2"/>
                                    <setting name="EmiosChId" value="CH_19"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_BCDE"/>
                                    <array name="PwmEmiosBusRef">
                                       <setting name="0" value="/Emios_Mcl_Ip/EmiosMcl/EmiosCommon_1/EMIOS_1_MasteBus0"/>
                                    </array>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="PwmEmiosChannels_3"/>
                                    <setting name="EmiosChId" value="CH_20"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_BCDE"/>
                                    <array name="PwmEmiosBusRef">
                                       <setting name="0" value="/Emios_Mcl_Ip/EmiosMcl/EmiosCommon_1/EMIOS_1_MasteBus0"/>
                                    </array>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="PwmEmiosChannels_4"/>
                                    <setting name="EmiosChId" value="CH_21"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_BCDE"/>
                                    <array name="PwmEmiosBusRef">
                                       <setting name="0" value="/Emios_Mcl_Ip/EmiosMcl/EmiosCommon_1/EMIOS_1_MasteBus0"/>
                                    </array>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="PwmEmiosChannels_5"/>
                                    <setting name="EmiosChId" value="CH_23"/>
                                    <setting name="EmiosChMode" value="EMIOS_PWM_IP_MODE_OPWFMB"/>
                                    <setting name="EmiosChFlagGeneration" value="Trailing_Edge"/>
                                    <setting name="EmiosChCounterBus" value="EMIOS_PWM_IP_BUS_INTERNAL"/>
                                    <array name="PwmEmiosBusRef"/>
                                    <setting name="EmiosChFreeze" value="false"/>
                                    <setting name="EmiosChOutputDisable" value="EMIOS_PWM_IP_OUTPUT_DISABLE_NONE"/>
                                    <setting name="EmiosChPrescaler" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerAlternate" value="EMIOS_PWM_IP_CLOCK_DIV_2"/>
                                    <setting name="EmiosChPrescalerSource" value="EMIOS_PWM_IP_PS_SRC_MODULE_CLOCK"/>
                                    <setting name="EmiosChPolarity" value="EMIOS_PWM_IP_ACTIVE_HIGH"/>
                                    <setting name="EmiosChInterrupt" value="EMIOS_PWM_IP_NOTIFICATION_DISABLED"/>
                                    <struct name="EmiosChIrqCallback">
                                       <setting name="Name" value="EmiosChIrqCallback"/>
                                       <setting name="EmiosChIrqFunctionCallback" value="NULL_PTR"/>
                                       <setting name="EmiosChIrqParameterCallback" value="NULL_PTR"/>
                                    </struct>
                                    <setting name="EmiosChDutyCycle" value="3158"/>
                                    <setting name="EmiosChPeriod" value="6316"/>
                                    <setting name="EmiosChPhaseShift" value="0"/>
                                    <setting name="EmiosChTrigger" value="0"/>
                                    <setting name="EmiosChDeadtime" value="0"/>
                                 </struct>
                              </array>
                           </struct>
                        </array>
                        <setting name="Name" value="Emios_Pwm"/>
                     </config_set>
                  </instance>
                  <instance name="freertos" uuid="9389cf02-964c-4048-b12e-1d1e52ad47dd" type="freertos" type_id="freertos" mode="general" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="freertos_driver">
                        <struct name="general_tab">
                           <struct name="configCPU_CLOCK_HZ">
                              <setting name="configCPU_CLOCK_MODE" value="default_clock"/>
                              <setting name="configUSER_CLOCK_VALUE" value="120000000"/>
                           </struct>
                           <setting name="configTICK_RATE_HZ" value="1000"/>
                           <setting name="configMAX_PRIORITIES" value="14"/>
                           <setting name="configMINIMAL_STACK_SIZE" value="90"/>
                           <setting name="configMAX_TASK_NAME_LEN" value="32"/>
                           <setting name="configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY" value="1"/>
                           <setting name="configUSE_16_BIT_TICKS" value="false"/>
                           <setting name="configIDLE_SHOULD_YIELD" value="true"/>
                           <setting name="configUSE_PREEMPTION" value="true"/>
                           <setting name="configNUM_THREAD_LOCAL_STORAGE_POINTERS" value="0"/>
                           <setting name="configUSE_PORT_OPTIMISED_TASK_SELECTION" value="false"/>
                           <setting name="configUSE_TASK_NOTIFICATIONS" value="true"/>
                           <setting name="configUSE_TIME_SLICING" value="true"/>
                           <setting name="configUSE_NEWLIB_REENTRANT" value="false"/>
                           <setting name="configENABLE_BACKWARD_COMPATIBILITY" value="true"/>
                           <setting name="configUSE_POSIX_ERRNO" value="false"/>
                           <setting name="configUSE_APPLICATION_TASK_TAG" value="false"/>
                           <setting name="configRECORD_STACK_HIGH_ADDRESS" value="false"/>
                           <setting name="configMESSAGE_BUFFER_LENGTH_TYPE" value=""/>
                           <struct name="configASSERT_id">
                              <setting name="boolConfigASSERT" value="true"/>
                              <setting name="configASSERT" value="if((x)==0) { taskDISABLE_INTERRUPTS(); for( ;; ); }"/>
                           </struct>
                        </struct>
                        <struct name="memory_tab">
                           <setting name="configSUPPORT_STATIC_ALLOCATION" value="false"/>
                           <setting name="configSUPPORT_DYNAMIC_ALLOCATION" value="true"/>
                           <setting name="memory_scheme_id" value="heap1"/>
                           <setting name="configTOTAL_HEAP_SIZE" value="32768"/>
                           <setting name="configAPPLICATION_ALLOCATED_HEAP" value="false"/>
                        </struct>
                        <struct name="hook_tab">
                           <setting name="configUSE_IDLE_HOOK" value="false"/>
                           <setting name="configUSE_TICK_HOOK" value="false"/>
                           <setting name="configUSE_MALLOC_FAILED_HOOK" value="false"/>
                           <setting name="configCHECK_FOR_STACK_OVERFLOW" value="0"/>
                           <setting name="configUSE_DAEMON_TASK_STARTUP_HOOK" value="false"/>
                        </struct>
                        <struct name="rttsgrd_tab">
                           <struct name="configGENERATE_RUN_TIME_STATS_id">
                              <setting name="configGENERATE_RUN_TIME_STATS" value="false"/>
                              <setting name="portCONFIGURE_TIMER_FOR_RUN_TIME_STATS" value=""/>
                              <setting name="portGET_RUN_TIME_COUNTER_VALUE" value="xTaskGetTickCount()"/>
                           </struct>
                           <setting name="configUSE_TRACE_FACILITY" value="true"/>
                           <setting name="configUSE_STATS_FORMATTING_FUNCTIONS" value="true"/>
                        </struct>
                        <struct name="co_routines_tab">
                           <setting name="configUSE_CO_ROUTINES" value="false"/>
                           <setting name="configMAX_CO_ROUTINE_PRIORITIES" value="2"/>
                        </struct>
                        <struct name="sandm_tab">
                           <setting name="configUSE_MUTEXES" value="true"/>
                           <setting name="configUSE_RECURSIVE_MUTEXES" value="true"/>
                           <setting name="configUSE_COUNTING_SEMAPHORES" value="true"/>
                        </struct>
                        <struct name="st_tab">
                           <setting name="configUSE_TIMERS" value="true"/>
                           <setting name="configTIMER_TASK_PRIORITY" value="2"/>
                           <setting name="configTIMER_QUEUE_LENGTH" value="10"/>
                           <setting name="configTIMER_TASK_STACK_DEPTH" value="180"/>
                        </struct>
                        <struct name="tidlem_tab">
                           <setting name="configUSE_TICKLESS_IDLE" value="false"/>
                           <setting name="configEXPECTED_IDLE_TIME_BEFORE_SLEEP" value="2"/>
                           <setting name="configPRE_SLEEP_PROCESSING" value=""/>
                           <setting name="configPOST_SLEEP_PROCESSING" value=""/>
                        </struct>
                        <struct name="queue_tab">
                           <setting name="configQUEUE_REGISTRY_SIZE" value="2"/>
                           <setting name="configUSE_QUEUE_SETS" value="false"/>
                        </struct>
                        <struct name="api_tab">
                           <setting name="INCLUDE_vTaskPrioritySet" value="true"/>
                           <setting name="INCLUDE_uxTaskPriorityGet" value="true"/>
                           <setting name="INCLUDE_vTaskDelete" value="true"/>
                           <setting name="INCLUDE_vTaskSuspend" value="true"/>
                           <setting name="INCLUDE_vTaskDelayUntil" value="true"/>
                           <setting name="INCLUDE_vTaskDelay" value="true"/>
                           <setting name="INCLUDE_xTaskGetSchedulerState" value="true"/>
                           <setting name="INCLUDE_xTaskGetCurrentTaskHandle" value="true"/>
                           <setting name="INCLUDE_uxTaskGetStackHighWaterMark" value="true"/>
                           <setting name="INCLUDE_uxTaskGetStackHighWaterMark2" value="false"/>
                           <setting name="INCLUDE_xTaskGetIdleTaskHandle" value="false"/>
                           <setting name="INCLUDE_eTaskGetState" value="true"/>
                           <setting name="INCLUDE_xEventGroupSetBitFromISR" value="true"/>
                           <setting name="INCLUDE_xTimerPendFunctionCall" value="true"/>
                           <setting name="INCLUDE_xTaskAbortDelay" value="true"/>
                           <setting name="INCLUDE_xTaskGetHandle" value="true"/>
                           <setting name="INCLUDE_xTaskResumeFromISR" value="true"/>
                           <setting name="INCLUDE_xQueueGetMutexHolder" value="true"/>
                        </struct>
                        <struct name="us_tab">
                           <setting name="configUSER_SETTINGS" value=""/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="POWER" uuid="44d1c702-1541-4596-a536-e8a217c8774a" type="POWER" type_id="POWER" mode="power" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="POWER">
                        <setting name="Name" value="POWER"/>
                        <struct name="PowerUserCfgRef">
                           <setting name="Name" value="PowerConfig"/>
                           <struct name="McuGeneralConfiguration">
                              <setting name="Name" value="McuGeneralConfig"/>
                              <setting name="PowerIpDevErrorDetect" value="false"/>
                              <setting name="McuEnterLowPowerMode" value="true"/>
                              <setting name="McuPerformResetApi" value="true"/>
                              <setting name="McuAlternateResetIsrUsed" value="false"/>
                              <setting name="McuVoltageErrorIsrUsed" value="false"/>
                              <setting name="McuDisableRgmInit" value="false"/>
                              <setting name="McuDisablePmcInit" value="false"/>
                              <setting name="PowerEnableUserModeSupport" value="false"/>
                              <setting name="McuTimeout" value="50000"/>
                              <setting name="McuTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                              <array name="McuErrorIsrNotification"/>
                           </struct>
                           <struct name="McuModuleConfiguration">
                              <setting name="Name" value="ModuleConfiguration"/>
                              <struct name="McuResetConfig">
                                 <setting name="Name" value="McuResetConfig"/>
                                 <setting name="McuResetType" value="FunctionalReset"/>
                                 <setting name="McuFuncResetEscThreshold" value="0"/>
                                 <setting name="McuDestResetEscThreshold" value="0"/>
                                 <struct name="McuResetSourcesConfig">
                                    <setting name="Name" value="McuResetSourcesConfig"/>
                                    <struct name="McuFCCU_RST_ResetSource">
                                       <setting name="Name" value="McuFCCU_RST_ResetSource"/>
                                       <setting name="McuDisableReset" value="false"/>
                                    </struct>
                                    <struct name="McuSWT0_RST_ResetSource">
                                       <setting name="Name" value="McuSWT0_RST_ResetSource"/>
                                       <setting name="McuDisableReset" value="false"/>
                                    </struct>
                                    <struct name="McuJTAG_RST_ResetSource">
                                       <setting name="Name" value="McuJTAG_RST_ResetSource"/>
                                       <setting name="McuDisableReset" value="false"/>
                                    </struct>
                                    <struct name="McuDEBUG_FUNC_ResetSource">
                                       <setting name="Name" value="McuDEBUG_FUNC_ResetSource"/>
                                       <setting name="McuDisableReset" value="false"/>
                                    </struct>
                                 </struct>
                              </struct>
                              <array name="McuResetReasonConf">
                                 <struct name="0">
                                    <setting name="Name" value="MCU_POWER_ON_RESET"/>
                                    <setting name="McuResetReason" value="0"/>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="MCU_FCCU_FTR_RESET"/>
                                    <setting name="McuResetReason" value="1"/>
                                 </struct>
                                 <struct name="2">
                                    <setting name="Name" value="MCU_STCU_URF_RESET"/>
                                    <setting name="McuResetReason" value="2"/>
                                 </struct>
                                 <struct name="3">
                                    <setting name="Name" value="MCU_MC_RGM_FRE_RESET"/>
                                    <setting name="McuResetReason" value="3"/>
                                 </struct>
                                 <struct name="4">
                                    <setting name="Name" value="MCU_FXOSC_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="4"/>
                                 </struct>
                                 <struct name="5">
                                    <setting name="Name" value="MCU_PLL_LOL_RESET"/>
                                    <setting name="McuResetReason" value="5"/>
                                 </struct>
                                 <struct name="6">
                                    <setting name="Name" value="MCU_CORE_CLK_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="6"/>
                                 </struct>
                                 <struct name="7">
                                    <setting name="Name" value="MCU_AIPS_PLAT_CLK_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="7"/>
                                 </struct>
                                 <struct name="8">
                                    <setting name="Name" value="MCU_HSE_CLK_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="8"/>
                                 </struct>
                                 <struct name="9">
                                    <setting name="Name" value="MCU_SYS_DIV_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="9"/>
                                 </struct>
                                 <struct name="10">
                                    <setting name="Name" value="MCU_CM7_CORE_CLK_FAIL_RESET"/>
                                    <setting name="McuResetReason" value="10"/>
                                 </struct>
                                 <struct name="11">
                                    <setting name="Name" value="MCU_HSE_TMPR_RST_RESET"/>
                                    <setting name="McuResetReason" value="11"/>
                                 </struct>
                                 <struct name="12">
                                    <setting name="Name" value="MCU_HSE_SNVS_RST_RESET"/>
                                    <setting name="McuResetReason" value="12"/>
                                 </struct>
                                 <struct name="13">
                                    <setting name="Name" value="MCU_SW_DEST_RESET"/>
                                    <setting name="McuResetReason" value="13"/>
                                 </struct>
                                 <struct name="14">
                                    <setting name="Name" value="MCU_DEBUG_DEST_RESET"/>
                                    <setting name="McuResetReason" value="14"/>
                                 </struct>
                                 <struct name="15">
                                    <setting name="Name" value="MCU_F_EXR_RESET"/>
                                    <setting name="McuResetReason" value="15"/>
                                 </struct>
                                 <struct name="16">
                                    <setting name="Name" value="MCU_FCCU_RST_RESET"/>
                                    <setting name="McuResetReason" value="16"/>
                                 </struct>
                                 <struct name="17">
                                    <setting name="Name" value="MCU_ST_DONE_RESET"/>
                                    <setting name="McuResetReason" value="17"/>
                                 </struct>
                                 <struct name="18">
                                    <setting name="Name" value="MCU_SWT0_RST_RESET"/>
                                    <setting name="McuResetReason" value="18"/>
                                 </struct>
                                 <struct name="19">
                                    <setting name="Name" value="MCU_SWT1_RST_RESET"/>
                                    <setting name="McuResetReason" value="19"/>
                                 </struct>
                                 <struct name="20">
                                    <setting name="Name" value="MCU_SWT2_RST_RESET"/>
                                    <setting name="McuResetReason" value="20"/>
                                 </struct>
                                 <struct name="21">
                                    <setting name="Name" value="MCU_JTAG_RST_RESET"/>
                                    <setting name="McuResetReason" value="21"/>
                                 </struct>
                                 <struct name="22">
                                    <setting name="Name" value="MCU_SWT3_RST_RESET"/>
                                    <setting name="McuResetReason" value="22"/>
                                 </struct>
                                 <struct name="23">
                                    <setting name="Name" value="MCU_PLL_AUX_RESET"/>
                                    <setting name="McuResetReason" value="23"/>
                                 </struct>
                                 <struct name="24">
                                    <setting name="Name" value="MCU_HSE_SWT_RST_RESET"/>
                                    <setting name="McuResetReason" value="24"/>
                                 </struct>
                                 <struct name="25">
                                    <setting name="Name" value="MCU_HSE_BOOT_RST_RESET"/>
                                    <setting name="McuResetReason" value="25"/>
                                 </struct>
                                 <struct name="26">
                                    <setting name="Name" value="MCU_SW_FUNC_RESET"/>
                                    <setting name="McuResetReason" value="26"/>
                                 </struct>
                                 <struct name="27">
                                    <setting name="Name" value="MCU_DEBUG_FUNC_RESET"/>
                                    <setting name="McuResetReason" value="27"/>
                                 </struct>
                                 <struct name="28">
                                    <setting name="Name" value="MCU_WAKEUP_REASON"/>
                                    <setting name="McuResetReason" value="28"/>
                                 </struct>
                                 <struct name="29">
                                    <setting name="Name" value="MCU_NO_RESET_REASON"/>
                                    <setting name="McuResetReason" value="29"/>
                                 </struct>
                                 <struct name="30">
                                    <setting name="Name" value="MCU_MULTIPLE_RESET_REASON"/>
                                    <setting name="McuResetReason" value="30"/>
                                 </struct>
                                 <struct name="31">
                                    <setting name="Name" value="MCU_RESET_UNDEFINED"/>
                                    <setting name="McuResetReason" value="31"/>
                                 </struct>
                              </array>
                              <struct name="McuPowerControl">
                                 <setting name="Name" value="McuPowerControl"/>
                                 <struct name="McuPMC_Config">
                                    <setting name="Name" value="McuPMC_Config"/>
                                    <setting name="McuLVDIEEnable" value="false"/>
                                    <setting name="McuHVDIEEnable" value="false"/>
                                    <setting name="McuLPM25ENEnable" value="false"/>
                                    <setting name="McuFASTRECEnable" value="false"/>
                                 </struct>
                              </struct>
                              <array name="McuModeSettingConf">
                                 <struct name="0">
                                    <setting name="Name" value="McuModeSettingConf_0"/>
                                    <setting name="McuMode" value="0"/>
                                    <setting name="McuPowerMode" value="RUN"/>
                                    <setting name="McuMainCoreSelect" value="CM7_0"/>
                                    <setting name="McuCoreLockStepEnable" value="false"/>
                                    <setting name="McuEnableSleepOnExit" value="false"/>
                                    <struct name="McuPartitionConfiguration">
                                       <setting name="Name" value="McuPartitionConfiguration"/>
                                       <struct name="McuPartition0Config">
                                          <setting name="Name" value="McuPartition0Config"/>
                                          <setting name="McuPartitionUnderMcuControl" value="true"/>
                                          <setting name="McuPartitionPowerUnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb1UnderMcuControl" value="true"/>
                                          <setting name="McuPartitionClockEnable" value="true"/>
                                          <struct name="McuCore0Configuration">
                                             <setting name="Name" value="McuCore0Configuration"/>
                                             <setting name="McuCoreUnderMcuControl" value="true"/>
                                             <setting name="McuCoreClockEnable" value="false"/>
                                             <setting name="McuCoreBootAddress" value="0"/>
                                             <setting name="McuCoreBootAddressLinkerSym" value=""/>
                                          </struct>
                                       </struct>
                                       <struct name="McuPartition1Config">
                                          <setting name="Name" value="McuPartition1Config"/>
                                          <setting name="McuPartitionUnderMcuControl" value="true"/>
                                          <setting name="McuPartitionPowerUnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb0UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb1UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb2UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb3UnderMcuControl" value="true"/>
                                          <setting name="McuPartitionClockEnable" value="true"/>
                                       </struct>
                                       <array name="McuPeripheral">
                                          <struct name="0">
                                             <setting name="Name" value="McuPeripheral_0"/>
                                             <setting name="McuPeripheralName" value="TRGMUX"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ32"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="1">
                                             <setting name="Name" value="McuPeripheral_1"/>
                                             <setting name="McuPeripheralName" value="BCTU"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ33"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="2">
                                             <setting name="Name" value="McuPeripheral_2"/>
                                             <setting name="McuPeripheralName" value="EMIOS_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ34"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="3">
                                             <setting name="Name" value="McuPeripheral_3"/>
                                             <setting name="McuPeripheralName" value="EMIOS_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ35"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="4">
                                             <setting name="Name" value="McuPeripheral_4"/>
                                             <setting name="McuPeripheralName" value="LCU_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ38"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="5">
                                             <setting name="Name" value="McuPeripheral_5"/>
                                             <setting name="McuPeripheralName" value="LCU_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ39"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="6">
                                             <setting name="Name" value="McuPeripheral_6"/>
                                             <setting name="McuPeripheralName" value="ADC_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ40"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="7">
                                             <setting name="Name" value="McuPeripheral_7"/>
                                             <setting name="McuPeripheralName" value="ADC_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ41"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="8">
                                             <setting name="Name" value="McuPeripheral_8"/>
                                             <setting name="McuPeripheralName" value="PIT_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ44"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="9">
                                             <setting name="Name" value="McuPeripheral_9"/>
                                             <setting name="McuPeripheralName" value="PIT_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ45"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="10">
                                             <setting name="Name" value="McuPeripheral_10"/>
                                             <setting name="McuPeripheralName" value="EDMA"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ3"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="11">
                                             <setting name="Name" value="McuPeripheral_11"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ4"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="12">
                                             <setting name="Name" value="McuPeripheral_12"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ5"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="13">
                                             <setting name="Name" value="McuPeripheral_13"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ6"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="14">
                                             <setting name="Name" value="McuPeripheral_14"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ7"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="15">
                                             <setting name="Name" value="McuPeripheral_15"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ8"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="16">
                                             <setting name="Name" value="McuPeripheral_16"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ9"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="17">
                                             <setting name="Name" value="McuPeripheral_17"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_6"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ10"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="18">
                                             <setting name="Name" value="McuPeripheral_18"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_7"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ11"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="19">
                                             <setting name="Name" value="McuPeripheral_19"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_8"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ12"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="20">
                                             <setting name="Name" value="McuPeripheral_20"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_9"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ13"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="21">
                                             <setting name="Name" value="McuPeripheral_21"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_10"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ14"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="22">
                                             <setting name="Name" value="McuPeripheral_22"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_11"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ15"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="23">
                                             <setting name="Name" value="McuPeripheral_23"/>
                                             <setting name="McuPeripheralName" value="SDA_AP"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ21"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="24">
                                             <setting name="Name" value="McuPeripheral_24"/>
                                             <setting name="McuPeripheralName" value="EIM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ22"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="25">
                                             <setting name="Name" value="McuPeripheral_25"/>
                                             <setting name="McuPeripheralName" value="ERM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ23"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="26">
                                             <setting name="Name" value="McuPeripheral_26"/>
                                             <setting name="McuPeripheralName" value="MSCM"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ24"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="27">
                                             <setting name="Name" value="McuPeripheral_27"/>
                                             <setting name="McuPeripheralName" value="SWT_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ28"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="28">
                                             <setting name="Name" value="McuPeripheral_28"/>
                                             <setting name="McuPeripheralName" value="STM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ29"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="29">
                                             <setting name="Name" value="McuPeripheral_29"/>
                                             <setting name="McuPeripheralName" value="INTM"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ31"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="30">
                                             <setting name="Name" value="McuPeripheral_30"/>
                                             <setting name="McuPeripheralName" value="DMAMUX_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ32"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="31">
                                             <setting name="Name" value="McuPeripheral_31"/>
                                             <setting name="McuPeripheralName" value="DMAMUX_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ33"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="32">
                                             <setting name="Name" value="McuPeripheral_32"/>
                                             <setting name="McuPeripheralName" value="RTC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ34"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="33">
                                             <setting name="Name" value="McuPeripheral_33"/>
                                             <setting name="McuPeripheralName" value="SIUL2_VIRTWRAPPER_PDAC3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ42"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="34">
                                             <setting name="Name" value="McuPeripheral_34"/>
                                             <setting name="McuPeripheralName" value="WKPU"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ45"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="35">
                                             <setting name="Name" value="McuPeripheral_35"/>
                                             <setting name="McuPeripheralName" value="CMUs"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ47"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="36">
                                             <setting name="Name" value="McuPeripheral_36"/>
                                             <setting name="McuPeripheralName" value="TSPC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ49"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="37">
                                             <setting name="Name" value="McuPeripheral_37"/>
                                             <setting name="McuPeripheralName" value="SXOSC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ51"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="38">
                                             <setting name="Name" value="McuPeripheral_38"/>
                                             <setting name="McuPeripheralName" value="FXOSC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ53"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="39">
                                             <setting name="Name" value="McuPeripheral_39"/>
                                             <setting name="McuPeripheralName" value="PLL"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ56"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="40">
                                             <setting name="Name" value="McuPeripheral_40"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ65"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="41">
                                             <setting name="Name" value="McuPeripheral_41"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ66"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="42">
                                             <setting name="Name" value="McuPeripheral_42"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ67"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="43">
                                             <setting name="Name" value="McuPeripheral_43"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ68"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="44">
                                             <setting name="Name" value="McuPeripheral_44"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ69"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="45">
                                             <setting name="Name" value="McuPeripheral_45"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ70"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="46">
                                             <setting name="Name" value="McuPeripheral_46"/>
                                             <setting name="McuPeripheralName" value="FlexIO"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ73"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="47">
                                             <setting name="Name" value="McuPeripheral_47"/>
                                             <setting name="McuPeripheralName" value="LPUART_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ74"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="48">
                                             <setting name="Name" value="McuPeripheral_48"/>
                                             <setting name="McuPeripheralName" value="LPUART_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ75"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="49">
                                             <setting name="Name" value="McuPeripheral_49"/>
                                             <setting name="McuPeripheralName" value="LPUART_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ76"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="50">
                                             <setting name="Name" value="McuPeripheral_50"/>
                                             <setting name="McuPeripheralName" value="LPUART_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ77"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="51">
                                             <setting name="Name" value="McuPeripheral_51"/>
                                             <setting name="McuPeripheralName" value="LPUART_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ78"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="52">
                                             <setting name="Name" value="McuPeripheral_52"/>
                                             <setting name="McuPeripheralName" value="LPUART_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ79"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="53">
                                             <setting name="Name" value="McuPeripheral_53"/>
                                             <setting name="McuPeripheralName" value="LPUART_6"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ80"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="54">
                                             <setting name="Name" value="McuPeripheral_54"/>
                                             <setting name="McuPeripheralName" value="LPUART_7"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ81"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="55">
                                             <setting name="Name" value="McuPeripheral_55"/>
                                             <setting name="McuPeripheralName" value="LPI2C_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ84"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="56">
                                             <setting name="Name" value="McuPeripheral_56"/>
                                             <setting name="McuPeripheralName" value="LPI2C_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ85"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="57">
                                             <setting name="Name" value="McuPeripheral_57"/>
                                             <setting name="McuPeripheralName" value="LPSPI_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ86"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="58">
                                             <setting name="Name" value="McuPeripheral_58"/>
                                             <setting name="McuPeripheralName" value="LPSPI_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ87"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="59">
                                             <setting name="Name" value="McuPeripheral_59"/>
                                             <setting name="McuPeripheralName" value="LPSPI_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ88"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="60">
                                             <setting name="Name" value="McuPeripheral_60"/>
                                             <setting name="McuPeripheralName" value="LPSPI_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ89"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="61">
                                             <setting name="Name" value="McuPeripheral_61"/>
                                             <setting name="McuPeripheralName" value="LPCMP_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ92"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="62">
                                             <setting name="Name" value="McuPeripheral_62"/>
                                             <setting name="McuPeripheralName" value="LPCMP_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ93"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="63">
                                             <setting name="Name" value="McuPeripheral_63"/>
                                             <setting name="McuPeripheralName" value="TEMPSENSE"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ95"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="64">
                                             <setting name="Name" value="McuPeripheral_64"/>
                                             <setting name="McuPeripheralName" value="CRC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB3_REQ96"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="65">
                                             <setting name="Name" value="McuPeripheral_65"/>
                                             <setting name="McuPeripheralName" value="STCU_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB3_REQ104"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                       </array>
                                    </struct>
                                    <struct name="McuDcmGprConfiguration">
                                       <setting name="Name" value="McuDcmGprConfiguration"/>
                                       <setting name="McuDcmGprUnderMcuControl" value="false"/>
                                       <setting name="McuBootBaseAddress" value="0"/>
                                       <setting name="McuSIRC_TRIM_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuPMC_TRIM_RGM_DCF_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuFIRC_TRIM_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuDCM_SCAN_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuGlobalPadkeepingEnable" value="false"/>
                                    </struct>
                                 </struct>
                                 <struct name="1">
                                    <setting name="Name" value="McuModeSettingConf_1"/>
                                    <setting name="McuMode" value="1"/>
                                    <setting name="McuPowerMode" value="STANDBY"/>
                                    <setting name="McuMainCoreSelect" value="CM7_0"/>
                                    <setting name="McuCoreLockStepEnable" value="false"/>
                                    <setting name="McuEnableSleepOnExit" value="false"/>
                                    <struct name="McuPartitionConfiguration">
                                       <setting name="Name" value="McuPartitionConfiguration"/>
                                       <struct name="McuPartition0Config">
                                          <setting name="Name" value="McuPartition0Config"/>
                                          <setting name="McuPartitionUnderMcuControl" value="true"/>
                                          <setting name="McuPartitionPowerUnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb1UnderMcuControl" value="true"/>
                                          <setting name="McuPartitionClockEnable" value="true"/>
                                          <struct name="McuCore0Configuration">
                                             <setting name="Name" value="McuCore0Configuration"/>
                                             <setting name="McuCoreUnderMcuControl" value="true"/>
                                             <setting name="McuCoreClockEnable" value="true"/>
                                             <setting name="McuCoreBootAddress" value="0"/>
                                             <setting name="McuCoreBootAddressLinkerSym" value=""/>
                                          </struct>
                                       </struct>
                                       <struct name="McuPartition1Config">
                                          <setting name="Name" value="McuPartition1Config"/>
                                          <setting name="McuPartitionUnderMcuControl" value="true"/>
                                          <setting name="McuPartitionPowerUnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb0UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb1UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb2UnderMcuControl" value="true"/>
                                          <setting name="McuPrtnCofb3UnderMcuControl" value="true"/>
                                          <setting name="McuPartitionClockEnable" value="true"/>
                                       </struct>
                                       <array name="McuPeripheral">
                                          <struct name="0">
                                             <setting name="Name" value="McuPeripheral_0"/>
                                             <setting name="McuPeripheralName" value="TRGMUX"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ32"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="1">
                                             <setting name="Name" value="McuPeripheral_1"/>
                                             <setting name="McuPeripheralName" value="BCTU"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ33"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="2">
                                             <setting name="Name" value="McuPeripheral_2"/>
                                             <setting name="McuPeripheralName" value="EMIOS_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ34"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="3">
                                             <setting name="Name" value="McuPeripheral_3"/>
                                             <setting name="McuPeripheralName" value="EMIOS_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ35"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="4">
                                             <setting name="Name" value="McuPeripheral_4"/>
                                             <setting name="McuPeripheralName" value="LCU_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ38"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="5">
                                             <setting name="Name" value="McuPeripheral_5"/>
                                             <setting name="McuPeripheralName" value="LCU_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ39"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="6">
                                             <setting name="Name" value="McuPeripheral_6"/>
                                             <setting name="McuPeripheralName" value="ADC_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ40"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="7">
                                             <setting name="Name" value="McuPeripheral_7"/>
                                             <setting name="McuPeripheralName" value="ADC_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ41"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="8">
                                             <setting name="Name" value="McuPeripheral_8"/>
                                             <setting name="McuPeripheralName" value="PIT_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ44"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="9">
                                             <setting name="Name" value="McuPeripheral_9"/>
                                             <setting name="McuPeripheralName" value="PIT_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN0_COFB1_REQ45"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="10">
                                             <setting name="Name" value="McuPeripheral_10"/>
                                             <setting name="McuPeripheralName" value="EDMA"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ3"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="11">
                                             <setting name="Name" value="McuPeripheral_11"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ4"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="12">
                                             <setting name="Name" value="McuPeripheral_12"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ5"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="13">
                                             <setting name="Name" value="McuPeripheral_13"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ6"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="14">
                                             <setting name="Name" value="McuPeripheral_14"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ7"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="15">
                                             <setting name="Name" value="McuPeripheral_15"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ8"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="16">
                                             <setting name="Name" value="McuPeripheral_16"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ9"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="17">
                                             <setting name="Name" value="McuPeripheral_17"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_6"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ10"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="18">
                                             <setting name="Name" value="McuPeripheral_18"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_7"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ11"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="19">
                                             <setting name="Name" value="McuPeripheral_19"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_8"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ12"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="20">
                                             <setting name="Name" value="McuPeripheral_20"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_9"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ13"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="21">
                                             <setting name="Name" value="McuPeripheral_21"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_10"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ14"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="22">
                                             <setting name="Name" value="McuPeripheral_22"/>
                                             <setting name="McuPeripheralName" value="EDMA_TCD_11"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ15"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="23">
                                             <setting name="Name" value="McuPeripheral_23"/>
                                             <setting name="McuPeripheralName" value="SDA_AP"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ21"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="24">
                                             <setting name="Name" value="McuPeripheral_24"/>
                                             <setting name="McuPeripheralName" value="EIM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ22"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="25">
                                             <setting name="Name" value="McuPeripheral_25"/>
                                             <setting name="McuPeripheralName" value="ERM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ23"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="26">
                                             <setting name="Name" value="McuPeripheral_26"/>
                                             <setting name="McuPeripheralName" value="MSCM"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ24"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="27">
                                             <setting name="Name" value="McuPeripheral_27"/>
                                             <setting name="McuPeripheralName" value="SWT_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ28"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="28">
                                             <setting name="Name" value="McuPeripheral_28"/>
                                             <setting name="McuPeripheralName" value="STM_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ29"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="29">
                                             <setting name="Name" value="McuPeripheral_29"/>
                                             <setting name="McuPeripheralName" value="INTM"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB0_REQ31"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="30">
                                             <setting name="Name" value="McuPeripheral_30"/>
                                             <setting name="McuPeripheralName" value="DMAMUX_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ32"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="31">
                                             <setting name="Name" value="McuPeripheral_31"/>
                                             <setting name="McuPeripheralName" value="DMAMUX_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ33"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="32">
                                             <setting name="Name" value="McuPeripheral_32"/>
                                             <setting name="McuPeripheralName" value="RTC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ34"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="33">
                                             <setting name="Name" value="McuPeripheral_33"/>
                                             <setting name="McuPeripheralName" value="SIUL2_VIRTWRAPPER_PDAC3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ42"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="34">
                                             <setting name="Name" value="McuPeripheral_34"/>
                                             <setting name="McuPeripheralName" value="WKPU"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ45"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="35">
                                             <setting name="Name" value="McuPeripheral_35"/>
                                             <setting name="McuPeripheralName" value="CMUs"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ47"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="36">
                                             <setting name="Name" value="McuPeripheral_36"/>
                                             <setting name="McuPeripheralName" value="TSPC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ49"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="37">
                                             <setting name="Name" value="McuPeripheral_37"/>
                                             <setting name="McuPeripheralName" value="SXOSC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ51"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="38">
                                             <setting name="Name" value="McuPeripheral_38"/>
                                             <setting name="McuPeripheralName" value="FXOSC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ53"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="39">
                                             <setting name="Name" value="McuPeripheral_39"/>
                                             <setting name="McuPeripheralName" value="PLL"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB1_REQ56"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="40">
                                             <setting name="Name" value="McuPeripheral_40"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ65"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="41">
                                             <setting name="Name" value="McuPeripheral_41"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ66"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="42">
                                             <setting name="Name" value="McuPeripheral_42"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ67"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="43">
                                             <setting name="Name" value="McuPeripheral_43"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ68"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="44">
                                             <setting name="Name" value="McuPeripheral_44"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ69"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="45">
                                             <setting name="Name" value="McuPeripheral_45"/>
                                             <setting name="McuPeripheralName" value="FlexCAN_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ70"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="46">
                                             <setting name="Name" value="McuPeripheral_46"/>
                                             <setting name="McuPeripheralName" value="FlexIO"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ73"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="47">
                                             <setting name="Name" value="McuPeripheral_47"/>
                                             <setting name="McuPeripheralName" value="LPUART_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ74"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="48">
                                             <setting name="Name" value="McuPeripheral_48"/>
                                             <setting name="McuPeripheralName" value="LPUART_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ75"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="49">
                                             <setting name="Name" value="McuPeripheral_49"/>
                                             <setting name="McuPeripheralName" value="LPUART_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ76"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="50">
                                             <setting name="Name" value="McuPeripheral_50"/>
                                             <setting name="McuPeripheralName" value="LPUART_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ77"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="51">
                                             <setting name="Name" value="McuPeripheral_51"/>
                                             <setting name="McuPeripheralName" value="LPUART_4"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ78"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="52">
                                             <setting name="Name" value="McuPeripheral_52"/>
                                             <setting name="McuPeripheralName" value="LPUART_5"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ79"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="53">
                                             <setting name="Name" value="McuPeripheral_53"/>
                                             <setting name="McuPeripheralName" value="LPUART_6"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ80"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="54">
                                             <setting name="Name" value="McuPeripheral_54"/>
                                             <setting name="McuPeripheralName" value="LPUART_7"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ81"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="55">
                                             <setting name="Name" value="McuPeripheral_55"/>
                                             <setting name="McuPeripheralName" value="LPI2C_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ84"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="56">
                                             <setting name="Name" value="McuPeripheral_56"/>
                                             <setting name="McuPeripheralName" value="LPI2C_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ85"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="57">
                                             <setting name="Name" value="McuPeripheral_57"/>
                                             <setting name="McuPeripheralName" value="LPSPI_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ86"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="58">
                                             <setting name="Name" value="McuPeripheral_58"/>
                                             <setting name="McuPeripheralName" value="LPSPI_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ87"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="59">
                                             <setting name="Name" value="McuPeripheral_59"/>
                                             <setting name="McuPeripheralName" value="LPSPI_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ88"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="60">
                                             <setting name="Name" value="McuPeripheral_60"/>
                                             <setting name="McuPeripheralName" value="LPSPI_3"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ89"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="61">
                                             <setting name="Name" value="McuPeripheral_61"/>
                                             <setting name="McuPeripheralName" value="LPCMP_0"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ92"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="62">
                                             <setting name="Name" value="McuPeripheral_62"/>
                                             <setting name="McuPeripheralName" value="LPCMP_1"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ93"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                          <struct name="63">
                                             <setting name="Name" value="McuPeripheral_63"/>
                                             <setting name="McuPeripheralName" value="TEMPSENSE"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB2_REQ95"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="64">
                                             <setting name="Name" value="McuPeripheral_64"/>
                                             <setting name="McuPeripheralName" value="CRC"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB3_REQ96"/>
                                             <setting name="McuPeripheralClockEnable" value="false"/>
                                          </struct>
                                          <struct name="65">
                                             <setting name="Name" value="McuPeripheral_65"/>
                                             <setting name="McuPeripheralName" value="STCU_2"/>
                                             <setting name="McuModeEntrySlot" value="PRTN1_COFB3_REQ104"/>
                                             <setting name="McuPeripheralClockEnable" value="true"/>
                                          </struct>
                                       </array>
                                    </struct>
                                    <struct name="McuDcmGprConfiguration">
                                       <setting name="Name" value="McuDcmGprConfiguration"/>
                                       <setting name="McuDcmGprUnderMcuControl" value="false"/>
                                       <setting name="McuBootBaseAddress" value="0"/>
                                       <setting name="McuSIRC_TRIM_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuPMC_TRIM_RGM_DCF_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuFIRC_TRIM_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuDCM_SCAN_BYP_STDBY_EXTControl" value="false"/>
                                       <setting name="McuGlobalPadkeepingEnable" value="true"/>
                                    </struct>
                                 </struct>
                              </array>
                           </struct>
                           <struct name="McuCoreControlConfiguration">
                              <setting name="Name" value="McuCoreControlConfiguration"/>
                              <setting name="McuCoreBootAddressControl" value="false"/>
                           </struct>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Lpuart_Uart" uuid="ebc13cfe-4f52-46e9-82e8-56a1a56644dc" type="Lpuart_Uart" type_id="Lpuart_Uart" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Lpuart_Uart">
                        <setting name="Name" value="Lpuart_Uart"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-PRE-COMPILE"/>
                        </struct>
                        <struct name="GeneralConfiguration">
                           <setting name="Name" value="GeneralConfiguration"/>
                           <setting name="UartDevErrorDetect" value="true"/>
                           <setting name="UartTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                           <setting name="UartTimeoutDuration" value="100000"/>
                           <setting name="UartDmaEnable" value="true"/>
                           <setting name="UartCallbackCapability" value="true"/>
                           <array name="UartCallback">
                              <setting name="0" value="LPUART_UART_IP_2_Callback"/>
                           </array>
                           <array name="UartCallbackParam"/>
                        </struct>
                        <struct name="UartGlobalConfig">
                           <setting name="Name" value="UartGlobalConfig"/>
                           <array name="UartChannel">
                              <struct name="0">
                                 <setting name="Name" value="UartChannel_2"/>
                                 <setting name="UartHwUsing" value="LPUART_IP"/>
                                 <setting name="UartClockFunctionalGroupRef" value="ClockConfig0"/>
                                 <struct name="DetailModuleConfiguration">
                                    <setting name="Name" value="DetailModuleConfiguration"/>
                                    <setting name="UartHwChannel" value="LPUART_2"/>
                                    <setting name="DesireBaudrate" value="LPUART_UART_BAUDRATE_115200"/>
                                    <setting name="CustomBaudrateMantissa" value="1"/>
                                    <setting name="CustomBaudrateDivisor" value="4"/>
                                    <setting name="UartInteruptDmaMethod" value="LPUART_UART_IP_USING_DMA"/>
                                    <array name="UartDmaTxChannelRef">
                                       <setting name="0" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_UART2_TX"/>
                                    </array>
                                    <array name="UartDmaRxChannelRef">
                                       <setting name="0" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_UART2_RX"/>
                                    </array>
                                    <setting name="UartParityType" value="LPUART_UART_IP_PARITY_DISABLED"/>
                                    <setting name="UartStopBitNumber" value="LPUART_UART_IP_ONE_STOP_BIT"/>
                                    <setting name="UartWordLength" value="LPUART_UART_IP_8_BITS_PER_CHAR"/>
                                    <setting name="UartInternalLoopbackEnable" value="false"/>
                                    <setting name="UartTimeoutEnable" value="true"/>
                                 </struct>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Stm" uuid="5d1fac08-21b4-4de4-962b-cf8cf7b9acb9" type="Stm" type_id="Stm" mode="ip" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Stm">
                        <setting name="Name" value="Stm"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="GptChannelConfigSet">
                           <setting name="Name" value="GptChannelConfigSet"/>
                           <array name="GptStm">
                              <struct name="0">
                                 <setting name="Name" value="Stm0"/>
                                 <setting name="GptStmModule" value="STM_0"/>
                                 <setting name="GptStmPrescaler" value="200"/>
                                 <setting name="GptStmAlternatePrescaler" value="200"/>
                                 <setting name="StmFreezeEnable" value="true"/>
                                 <array name="GptStmChannels">
                                    <struct name="0">
                                       <setting name="Name" value="StmChannel_0"/>
                                       <setting name="GptStmChannel" value="CH_0"/>
                                       <setting name="StmAbsoluteCounting" value="false"/>
                                       <setting name="StmNotification" value="NULL_PTR"/>
                                       <setting name="StmChannelMode" value="STM_IP_CH_MODE_CONTINUOUS"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                        </struct>
                        <array name="GptHwConfiguration">
                           <struct name="0">
                              <setting name="Name" value="GptHwConfiguration_0"/>
                              <setting name="GptIsrHwId" value="STM_0_CH_0"/>
                              <setting name="GptIsrEnable" value="true"/>
                              <setting name="GptChannelIsUsed" value="true"/>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="GptHwConfiguration_1"/>
                              <setting name="GptIsrHwId" value="STM_0_CH_1"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="2">
                              <setting name="Name" value="GptHwConfiguration_2"/>
                              <setting name="GptIsrHwId" value="STM_0_CH_2"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                           <struct name="3">
                              <setting name="Name" value="GptHwConfiguration_3"/>
                              <setting name="GptIsrHwId" value="STM_0_CH_3"/>
                              <setting name="GptIsrEnable" value="false"/>
                              <setting name="GptChannelIsUsed" value="false"/>
                           </struct>
                        </array>
                        <struct name="GptAutosarExt">
                           <setting name="Name" value="GptAutosarExt"/>
                           <setting name="GptEnableDualClockMode" value="false"/>
                           <setting name="GptChangeNextTimeoutValueApi" value="false"/>
                           <setting name="GptEnableUserModeSupport" value="false"/>
                           <setting name="ChainModeApi" value="false"/>
                           <setting name="GptStandbyWakeupSupport" value="false"/>
                           <setting name="GptEnableTriggers" value="false"/>
                        </struct>
                        <struct name="GptDriverConfiguration">
                           <setting name="Name" value="GptDriverConfiguration"/>
                           <setting name="GptDevErrorDetect" value="false"/>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Flexio_Mcl_Ip" uuid="0544c51b-2253-4661-a3c0-576d49fc5b4f" type="Flexio_Mcl_Ip" type_id="Flexio_Mcl_Ip" mode="flexio_mcl" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Flexio_Mcl_Ip">
                        <setting name="Name" value="FlexioMcl"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="MclGeneral">
                           <setting name="Name" value="MclGeneral"/>
                           <setting name="MclEnableUserModeSupport" value="false"/>
                           <struct name="MclFlexioCommon">
                              <setting name="Name" value="MclFlexioCommon"/>
                              <setting name="MclEnableFlexioCommon" value="true"/>
                              <setting name="MclEnableFlexioDevErrorDetect" value="false"/>
                           </struct>
                        </struct>
                        <struct name="MclConfig">
                           <setting name="Name" value="MclConfig"/>
                           <array name="FlexioCommon">
                              <struct name="0">
                                 <setting name="Name" value="FlexioCommon_0"/>
                                 <setting name="FlexioMclInstances" value="FLEXIO_0"/>
                                 <setting name="FlexioDebugEnable" value="false"/>
                                 <array name="FlexioMclLogicChannels">
                                    <struct name="0">
                                       <setting name="Name" value="FlexioMclLogicChannels_0"/>
                                       <setting name="FlexioMclChannelId" value="CHANNEL_0"/>
                                       <setting name="FlexioMclPinId" value="PIN_18"/>
                                       <setting name="FlexioMclAddPinEnable" value="false"/>
                                       <setting name="FlexioMclAddPinId" value="PIN_0"/>
                                       <setting name="FlexioMclAddChannelEnable" value="false"/>
                                       <setting name="FlexioMclAddChannelId" value="CHANNEL_0"/>
                                    </struct>
                                    <struct name="1">
                                       <setting name="Name" value="FlexioMclLogicChannels_1"/>
                                       <setting name="FlexioMclChannelId" value="CHANNEL_1"/>
                                       <setting name="FlexioMclPinId" value="PIN_17"/>
                                       <setting name="FlexioMclAddPinEnable" value="false"/>
                                       <setting name="FlexioMclAddPinId" value="PIN_0"/>
                                       <setting name="FlexioMclAddChannelEnable" value="false"/>
                                       <setting name="FlexioMclAddChannelId" value="CHANNEL_0"/>
                                    </struct>
                                    <struct name="2">
                                       <setting name="Name" value="FlexioMclLogicChannels_2"/>
                                       <setting name="FlexioMclChannelId" value="CHANNEL_2"/>
                                       <setting name="FlexioMclPinId" value="PIN_7"/>
                                       <setting name="FlexioMclAddPinEnable" value="false"/>
                                       <setting name="FlexioMclAddPinId" value="PIN_0"/>
                                       <setting name="FlexioMclAddChannelEnable" value="false"/>
                                       <setting name="FlexioMclAddChannelId" value="CHANNEL_0"/>
                                    </struct>
                                    <struct name="3">
                                       <setting name="Name" value="FlexioMclLogicChannels_3"/>
                                       <setting name="FlexioMclChannelId" value="CHANNEL_3"/>
                                       <setting name="FlexioMclPinId" value="PIN_6"/>
                                       <setting name="FlexioMclAddPinEnable" value="false"/>
                                       <setting name="FlexioMclAddPinId" value="PIN_0"/>
                                       <setting name="FlexioMclAddChannelEnable" value="false"/>
                                       <setting name="FlexioMclAddChannelId" value="CHANNEL_0"/>
                                    </struct>
                                 </array>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
                  <instance name="Flexio_I2c" uuid="c31e8cd9-cc9c-4f87-8e81-d327726098ad" type="Flexio_I2c" type_id="Flexio_I2c" mode="flexio_i2c" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Flexio_I2c">
                        <setting name="Name" value="Flexio_I2c"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="I2cIpGeneralConfig">
                           <setting name="Name" value="I2cIpGeneralConfig"/>
                           <setting name="I2cEnableUserModeSupport" value="false"/>
                           <setting name="I2cDevErrorDetect" value="false"/>
                           <setting name="I2cDmaUsed" value="false"/>
                           <setting name="I2c_UserErrorCallback" value="false"/>
                           <setting name="I2cDmaOptimize" value="false"/>
                           <setting name="I2cTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                           <array name="I2c_UserCallback">
                              <setting name="0" value="I2c_Flexioi2cMasterChannel_Callback"/>
                           </array>
                        </struct>
                        <array name="arrayI2CChannelConfig">
                           <struct name="0">
                              <setting name="Name" value="I2cChannelConfig_0"/>
                              <setting name="I2cChannelId" value="0"/>
                              <setting name="I2cHwChannel" value="FLEXIO_0_CH_0_1"/>
                              <setting name="I2cMasterSlaveConfiguration" value="MASTER_MODE"/>
                              <struct name="I2cFlexIOMasterConfiguration">
                                 <setting name="Name" value="Flexio_I2cMasterChannel0"/>
                                 <setting name="flexio_i2c_master_cfg_slaveAddress" value="0x24"/>
                                 <setting name="I2cAsyncMethod" value="FLEXIO_I2C_USING_INTERRUPTS"/>
                                 <setting name="I2cDmaTxChannelRef" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                 <setting name="I2cDmaRxChannelRef" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                 <setting name="SclFlexioRef" value="/Flexio_Mcl_Ip/FlexioMcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_0"/>
                                 <setting name="SdaFlexioRef" value="/Flexio_Mcl_Ip/FlexioMcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_1"/>
                                 <setting name="I2cClockFunctionalGroupRef" value="ClockConfig0"/>
                                 <setting name="I2cFlexIOCompareValue" value="8"/>
                                 <setting name="I2cFlexIOChannelPrescaler" value="DIV_16"/>
                              </struct>
                           </struct>
                           <struct name="1">
                              <setting name="Name" value="I2cChannelConfig_1"/>
                              <setting name="I2cChannelId" value="1"/>
                              <setting name="I2cHwChannel" value="FLEXIO_0_CH_2_3"/>
                              <setting name="I2cMasterSlaveConfiguration" value="MASTER_MODE"/>
                              <struct name="I2cFlexIOMasterConfiguration">
                                 <setting name="Name" value="Flexio_I2cMasterChannel1"/>
                                 <setting name="flexio_i2c_master_cfg_slaveAddress" value="0x48"/>
                                 <setting name="I2cAsyncMethod" value="FLEXIO_I2C_USING_INTERRUPTS"/>
                                 <setting name="I2cDmaTxChannelRef" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                 <setting name="I2cDmaRxChannelRef" value="/Dma_Ip/Dma/MclConfig/dmaLogicChannel_SPI2_TX"/>
                                 <setting name="SclFlexioRef" value="/Flexio_Mcl_Ip/FlexioMcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_2"/>
                                 <setting name="SdaFlexioRef" value="/Flexio_Mcl_Ip/FlexioMcl/MclConfig/FlexioCommon_0/FlexioMclLogicChannels_3"/>
                                 <setting name="I2cClockFunctionalGroupRef" value="ClockConfig0"/>
                                 <setting name="I2cFlexIOCompareValue" value="8"/>
                                 <setting name="I2cFlexIOChannelPrescaler" value="DIV_16"/>
                              </struct>
                           </struct>
                        </array>
                     </config_set>
                  </instance>
                  <instance name="Lpi2c" uuid="485cdbe1-2f83-4e69-bcb9-391547f43911" type="Lpi2c" type_id="Lpi2c" mode="lpi2c" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
                     <config_set name="Lpi2c">
                        <setting name="Name" value="Lpi2c"/>
                        <struct name="ConfigTimeSupport">
                           <setting name="POST_BUILD_VARIANT_USED" value="false"/>
                           <setting name="IMPLEMENTATION_CONFIG_VARIANT" value="VARIANT-POST-BUILD"/>
                        </struct>
                        <struct name="GeneralConfiguration">
                           <setting name="Name" value="GeneralConfiguration"/>
                           <setting name="I2cEnableUserModeSupport" value="false"/>
                           <setting name="I2cDevErrorDetect" value="false"/>
                           <setting name="I2cDmaUsed" value="false"/>
                           <setting name="I2c_ErrorCallback" value="false"/>
                           <setting name="I2cTimeoutMethod" value="OSIF_COUNTER_DUMMY"/>
                        </struct>
                        <struct name="I2cGlobalConfig">
                           <setting name="Name" value="I2cGlobalConfig"/>
                           <array name="I2cChannel">
                              <struct name="0">
                                 <setting name="Name" value="I2cChannelConfig_0"/>
                                 <setting name="I2cChannelId" value="0"/>
                                 <setting name="I2cHwChannel" value="LPI2C_0"/>
                                 <setting name="I2cOperatingMode" value="LPI2C_STANDARD_MODE"/>
                                 <setting name="I2cMasterSlaveConfiguration" value="MASTER_MODE"/>
                                 <struct name="I2cMasterConfiguration">
                                    <setting name="Name" value="I2c_Lpi2cMasterChannel0"/>
                                    <setting name="I2cSlaveAddress" value="0x61"/>
                                    <setting name="I2cSlaveIs10BitAddress" value="false"/>
                                    <setting name="I2cPrescaler" value="LPI2C_MASTER_PRESC_DIV_8"/>
                                    <setting name="I2cDataValidDelay" value="15"/>
                                    <setting name="I2cSetupHoldDelay" value="29"/>
                                    <setting name="I2cClockHighPeriod" value="15"/>
                                    <setting name="I2cClockLowPeriod" value="20"/>
                                    <setting name="I2cPinLowTimeout" value="0"/>
                                    <setting name="I2cBusIdleTimeout" value="0"/>
                                    <setting name="I2cMasterFilterEnable" value="true"/>
                                    <setting name="I2cGlitchFilterSDA" value="1"/>
                                    <setting name="I2cGlitchFilterSCL" value="1"/>
                                    <setting name="I2cAsyncMethod" value="LPI2C_USING_INTERRUPTS"/>
                                    <array name="I2cDmaTxChannelRef"/>
                                    <array name="I2cDmaRxChannelRef"/>
                                    <setting name="I2cClockFunctionalGroupRef" value="ClockConfig0"/>
                                    <setting name="lpi2c_master_cfg_masterCallback" value="I2c_Lpi2cMasterChannel0_Callback"/>
                                    <setting name="lpi2c_master_cfg_callbackParam" value="0"/>
                                    <struct name="I2cHighSpeedModeConfiguration">
                                       <setting name="Name" value="I2c_Lpi2cMasterHighSpeedMode0"/>
                                       <setting name="I2cMasterCode" value="0"/>
                                       <setting name="I2cDataValidDelay" value="1"/>
                                       <setting name="I2cSetupHoldDelay" value="2"/>
                                       <setting name="I2cClockHighPeriod" value="1"/>
                                       <setting name="I2cClockLowPeriod" value="3"/>
                                    </struct>
                                 </struct>
                                 <struct name="I2cSlaveConfiguration">
                                    <setting name="Name" value="I2c_Lpi2cSlaveChannel0"/>
                                    <setting name="I2cSlaveAddress" value="0x32"/>
                                    <setting name="I2cSlaveIs10BitAddress" value="false"/>
                                    <setting name="Lpi2cSlaveListening" value="false"/>
                                    <setting name="I2cSlaveFilterEnable" value="false"/>
                                    <setting name="I2cGlitchFilterSDA" value="0"/>
                                    <setting name="I2cGlitchFilterSCL" value="0"/>
                                    <setting name="I2cAsyncMethod" value="LPI2C_USING_INTERRUPTS"/>
                                    <array name="I2cSlaveDmaTxChannelRef"/>
                                    <array name="I2cSlaveDmaRxChannelRef"/>
                                    <setting name="lpi2c_slave_cfg_slaveCallback" value="NULL_PTR"/>
                                    <setting name="lpi2c_slave_cfg_callbackParam" value="0"/>
                                 </struct>
                              </struct>
                           </array>
                        </struct>
                     </config_set>
                  </instance>
               </instances>
            </functional_group>
         </functional_groups>
         <components>
            <component name="system" uuid="dad901f7-0eee-486e-b501-0915a8dc0834" type_id="system">
               <config_set_global name="SystemModel" quick_selection="Default">
                  <setting name="Name" value="SystemModel"/>
                  <setting name="EcvdGenerationMethod" value="INDIVIDUAL"/>
                  <setting name="EcvdOutputPath" value=""/>
                  <setting name="EcvdGenerationTrigger" value="Generate Configuration"/>
                  <setting name="SyncFunctionalGroups" value="true"/>
                  <setting name="IgnoreComponentSuffix" value="true"/>
                  <setting name="ComponentGenerationMethod" value="EcucPostBuildVariants"/>
                  <setting name="DefaultFunctionalGroup" value="BOARD_InitPeripherals"/>
                  <struct name="PostBuildSelectable" quick_selection="Default">
                     <setting name="Name" value="PostBuildSelectable"/>
                     <array name="PredefinedVariants">
                        <struct name="0">
                           <setting name="Name" value="BOARD_InitPeripherals"/>
                           <setting name="Path" value="/system/SystemModel/PostBuildSelectable/BOARD_InitPeripherals"/>
                           <array name="PostBuildVariantCriterionValues"/>
                        </struct>
                     </array>
                  </struct>
                  <struct name="Criterions" quick_selection="Default">
                     <setting name="Name" value="Criterions"/>
                     <array name="PostBuildVariantCriterions"/>
                  </struct>
               </config_set_global>
            </component>
         </components>
      </periphs>
   </tools>
</configuration>