#include "lin_manager.h"
#include "uart_handler.h"
#include "versionControl.h"
#include "Lpuart_Lin_Ip_Sa_BOARD_InitPeripherals_PBcfg.h"
#include "Lpuart_Lin_Ip_Types.h"
#include "Lpuart_Lin_Ip.h"
#include "string.h"
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
#include <stdio.h>
#include <stdlib.h>
#include "Siul2_Port_Ip.h"
#include "Siul2_Dio_Ip.h"

#include "IntCtrl_Ip.h"
#include "Lpuart_Uart_Ip_Sa_BOARD_InitPeripherals_PBcfg.h"
#include "Lpuart_Uart_Ip.h"
#include "FreeRTOS.h"

#define FLEXIO_INSTANCE         (0U)
const uint8_t lin0Dl = 2;
const uint8_t lin0Sdu[2]= {0xFF,0xFF};
const uint8_t lin1Dl = 1;
const uint8_t lin1Sdu = 1;
#define BUFFER_SIZE             (3U)
#define T_LIN_TIME_OUT          (400000U)
#define FLEXIO_PID              (0x1A)
#define LPUART_PID              (0x1A)

uint8 LpuartTxBuff[BUFFER_SIZE] = {0x04, 0x05, 0x06};
uint8 FlexioTxBuff[BUFFER_SIZE] = {0x01, 0x02, 0x03};

const Lpuart_Lin_Ip_PduType lin0_frame = {
		.Pid = 0x1A,      /**< @brief LIN frame identifier.*/
		.Cs =  LPUART_LIN_IP_ENHANCED_CS,    /**< @brief Checksum model type.*/
		.Drc = LPUART_LIN_IP_FRAMERESPONSE_TX,     /**< @brief Response type.*/
		.Dl = lin0Dl,      /**< @brief Data length.*/
		.SduPtr = &LpuartTxBuff
};

const Lpuart_Lin_Ip_PduType lin1_frame = {
		.Pid = 0x1A,      /**< @brief LIN frame identifier.*/
		.Cs =  LPUART_LIN_IP_CLASSIC_CS,    /**< @brief Checksum model type.*/
		.Drc = LPUART_LIN_IP_FRAMERESPONSE_TX,     /**< @brief Response type.*/
		.Dl = lin1Dl,      /**< @brief Data length.*/
		.SduPtr = &lin1Sdu
};



const Lpuart_Lin_Ip_PduType lin3_frame = {
                .Pid = (uint8)LPUART_PID,
                .Cs = LPUART_LIN_IP_ENHANCED_CS,
                .SduPtr = LpuartTxBuff,
                .Drc = LPUART_LIN_IP_FRAMERESPONSE_TX,
                .Dl = (uint8)BUFFER_SIZE
};




int init_lin(){
#if INIT_LIN0
	Lpuart_Lin_Ip_StatusType lin0_res;
    Siul2_Dio_Ip_WritePin(PTA_H_HALF, 4, 1);
    Siul2_Port_Ip_SetOutputBuffer(PORTA_H_HALF, 2, TRUE, PORT_MUX_ALT3);
    //Siul2_Port_Ip_SetInputBuffer(PORTA_H_HALF, 3, FALSE, 180, PORT_INPUT_MUX_ALT0);
    Siul2_Port_Ip_SetInputBuffer(PORTA_H_HALF, 3, FALSE, 17, PORT_INPUT_MUX_ALT1);
    Siul2_Port_Ip_SetInputBuffer(PORTA_H_HALF, 3, TRUE, 188, PORT_INPUT_MUX_ALT5);

	lin0_res = Lpuart_Lin_Ip_Init(Lpuart_Lin_Ip_Sa_pHwConfigPB_0_BOARD_INITPERIPHERALS.Instance, &Lpuart_Lin_Ip_Sa_pHwConfigPB_0_BOARD_INITPERIPHERALS);
#endif
#if INIT_LIN1
	Lpuart_Lin_Ip_StatusType lin1_res;
    Siul2_Dio_Ip_WritePin(PTB_L_HALF, 11, 1);
    Siul2_Port_Ip_SetOutputBuffer(PORTB_L_HALF, 10, TRUE, PORT_MUX_ALT5);
    Siul2_Port_Ip_SetInputBuffer(PORTB_L_HALF, 9, FALSE, 180, PORT_INPUT_MUX_ALT0);
    Siul2_Port_Ip_SetInputBuffer(PORTB_L_HALF, 9, FALSE, 31, PORT_INPUT_MUX_ALT1);
    Siul2_Port_Ip_SetInputBuffer(PORTB_L_HALF, 9, TRUE, 196, PORT_INPUT_MUX_ALT1);

    lin1_res = Lpuart_Lin_Ip_Init(Lpuart_Lin_Ip_Sa_pHwConfigPB_1_BOARD_INITPERIPHERALS.Instance, &Lpuart_Lin_Ip_Sa_pHwConfigPB_1_BOARD_INITPERIPHERALS);
#endif

#if INIT_LIN0 && INIT_LIN1
	if(lin0_res == LPUART_LIN_IP_STATUS_SUCCESS && lin1_res == LPUART_LIN_IP_STATUS_SUCCESS){
		return 1;
	} else {
		return 0;
	}
#elif INIT_LIN0
	if(lin0_res == LPUART_LIN_IP_STATUS_SUCCESS){
		return 1;
	} else {
		return 0;
	}
#elif INIT_LIN1
	if(lin1_res == LPUART_LIN_IP_STATUS_SUCCESS){
		return 1;
	} else {
		return 0;
	}
#endif
	 IntCtrl_Ip_Init(&IntCtrlConfig_0);
	 IntCtrl_Ip_ConfigIrqRouting(&intRouteConfig);
}

void send_lin0_test_frame(){
	Lpuart_Lin_Ip_StatusType sendStatus;
	Lpuart_Lin_Ip_TransferStatusType LpuartMasterStatus;
    uint8 *DummyBuffer;
    uint32 TimeoutValue = 0u;
    char test[16];


	sendStatus = Lpuart_Lin_Ip_SendFrame(Lpuart_Lin_Ip_Sa_pHwConfigPB_0_BOARD_INITPERIPHERALS.Instance, &lin3_frame);
	if(sendStatus == LPUART_LIN_IP_STATUS_SUCCESS) {
		println_to_console("LIN0 SEND SUCCESS");
	} else {
		println_to_console("LIN0 SEND FAILED");
	}
    TimeoutValue = 4*T_LIN_TIME_OUT;

    /*Wait for the transmission done */
    do
    {
        LpuartMasterStatus = Lpuart_Lin_Ip_GetStatus(Lpuart_Lin_Ip_Sa_pHwConfigPB_0_BOARD_INITPERIPHERALS.Instance, (uint8 **)&DummyBuffer);
    }
    while ((LPUART_LIN_IP_STATUS_TX_OK != LpuartMasterStatus) && (TimeoutValue-- > 1));




	//transferStatus = Lpuart_Lin_Ip_GetStatus(0,&receiveBuffer);
	sprintf(test,"0x%02X",LpuartMasterStatus);
	print_to_console("Done0: ");
	println_to_console(test);
}

void send_lin1_test_frame(){
	Lpuart_Lin_Ip_StatusType sendStatus;
		Lpuart_Lin_Ip_TransferStatusType LpuartMasterStatus;
	    uint8 *DummyBuffer;
	    uint32 TimeoutValue = 0u;
	    char test[16];


		sendStatus = Lpuart_Lin_Ip_SendFrame(Lpuart_Lin_Ip_Sa_pHwConfigPB_1_BOARD_INITPERIPHERALS.Instance, &lin3_frame);
		if(sendStatus == LPUART_LIN_IP_STATUS_SUCCESS) {
			println_to_console("LIN1 SEND SUCCESS");
		} else {
			println_to_console("LIN1 SEND FAILED");
		}
	    TimeoutValue = 4*T_LIN_TIME_OUT;

	    /*Wait for the transmission done */
	    do
	    {
	        LpuartMasterStatus = Lpuart_Lin_Ip_GetStatus(0, (uint8 **)&DummyBuffer);
	    }
	    while ((LPUART_LIN_IP_STATUS_TX_OK != LpuartMasterStatus) && (TimeoutValue-- > 1));




		//transferStatus = Lpuart_Lin_Ip_GetStatus(0,&receiveBuffer);
		sprintf(test,"0x%02X",LpuartMasterStatus);
		print_to_console("Done1: ");
		println_to_console(test);
}


void lin_interrupt(){

	print_to_console("Test");




}