/* ################################################################### ** Filename : main.c ** Processor : S32K1xx ** Abstract : ** Main module. ** This module contains user's application code. ** Settings : ** Contents : ** No public methods ** ** ###################################################################*/ /*! ** @file main.c ** @version 01.00 ** @brief ** Main module. ** This module contains user's application code. */ /*! ** @addtogroup main_module main module documentation ** @{ */ /* MODULE main */ /* Including necessary module. Cpu.h contains other modules needed for compiling.*/ #include "Cpu.h" #include "clockMan1.h" #include "pin_mux.h" #include "lpit1.h" #include "flexTimer_ic1.h" #include "adConv1.h" #include "adConv2.h" volatile int exit_code = 0; /* User includes (#include below this line is not maintained by Processor Expert) */ #define LPIT0_Channel0 0UL #define LPIT0_Channel0_IRQn LPIT0_Ch0_IRQn uint16_t ADC_result[13]; ftm_state_t ftm1StateStruct; /* Configure TX message buffer with index TX_MSG_ID and TX_MAILBOX*/ void LPIT_ISR(void) { LPIT_DRV_ClearInterruptFlagTimerChannels(INST_LPIT1,1<<0); } float ADC0_ch0_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 0, &adConv1_ChnConfig0); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,0,&ADC_result); } float ADC0_ch1_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 1, &adConv1_ChnConfig1); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,1,ADC_result+1); } float ADC0_ch2_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 2, &adConv1_ChnConfig2); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,2,&ADC_result+2); } float ADC0_ch3_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 3, &adConv1_ChnConfig3); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,3,&ADC_result+3); } float ADC0_ch4_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 4, &adConv1_ChnConfig4); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,4,&ADC_result+4); } float ADC0_ch5_read(void) { ADC_DRV_ConfigChan(INST_ADCONV1, 5, &adConv1_ChnConfig5); ADC_DRV_WaitConvDone(INST_ADCONV1); ADC_DRV_GetChanResult(INST_ADCONV1,5,&ADC_result+5); } float ADC1_ch0_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 0, &adConv1_ChnConfig0); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,0,&ADC_result+6); } float ADC1_ch1_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 1, &adConv2_ChnConfig1); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,1,&ADC_result+7); } float ADC1_ch2_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 2, &adConv2_ChnConfig2); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,2,&ADC_result+8); } float ADC1_ch3_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 3, &adConv2_ChnConfig3); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,3,&ADC_result+9); } float ADC1_ch4_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 4, &adConv2_ChnConfig4); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,4,&ADC_result+10); } float ADC1_ch5_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 5, &adConv2_ChnConfig5); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,5,&ADC_result+11); } float ADC1_ch6_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 6, &adConv2_ChnConfig6); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,6,&ADC_result+12); } float ADC1_ch7_read(void) { ADC_DRV_ConfigChan(INST_ADCONV2, 7, &adConv2_ChnConfig7); ADC_DRV_WaitConvDone(INST_ADCONV2); ADC_DRV_GetChanResult(INST_ADCONV2,7,&ADC_result+13); } /*! \brief The main function for the project. \details The startup initialization sequence is the following: * - startup asm routine * - main() */ int main(void) { /* Write your local variable definition here */ /*** Processor Expert internal initialization. DON'T REMOVE THIS CODE!!! ***/ #ifdef PEX_RTOS_INIT PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */ #endif /*** End of Processor Expert internal initialization. ***/ /* Write your code here */ /*CLOCK_DRV_Init(&clockMan1_InitConfig0);*/ CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT); CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT); PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr); // ADC_DRV_InitConverterStruct(&adConv1_ConvConfig0); ADC_DRV_ConfigConverter(INST_ADCONV1, &adConv1_ConvConfig0); ADC_DRV_AutoCalibration(INST_ADCONV1); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig0); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig1); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig2); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig3); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig4); //ADC_DRV_InitChanStruct(&adConv1_ChnConfig5); /*INT_SYS_InstallHandler(ADC0_IRQn, &ADC1_IRQHandler, (isr_t*) 0); INT_SYS_EnableIRQ(ADC0_IRQn);*/ ADC_DRV_ConfigConverter(INST_ADCONV2, &adConv2_ConvConfig0); ADC_DRV_AutoCalibration(INST_ADCONV2); /* INT_SYS_InstallHandler(ADC1_IRQn, &ADC2_IRQHandler, (isr_t*) 0); INT_SYS_EnableIRQ(ADC1_IRQn);*/ /* For example: for(;;) { } */ /*FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0); FLEXCAN_DRV_Init(INST_CANCOM2, &canCom2_State, &canCom2_InitConfig0); FLEXCAN_DRV_Init(INST_CANCOM3, &canCom3_State, &canCom3_InitConfig0);*/ /*FLEXCAN_DRV_SetRxMbGlobalMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, 0); // 使用MB1接收 FLEXCAN_DRV_SetRxMbGlobalMask(INST_CANCOM2, FLEXCAN_MSG_ID_STD, 0); // 使用MB2接收 FLEXCAN_DRV_SetRxMbGlobalMask(INST_CANCOM3, FLEXCAN_MSG_ID_STD, 0); // 使用MB3接收 FLEXCAN_DRV_InstallEventCallback(INST_CANCOM1, canRxCallback, NULL); FLEXCAN_DRV_InstallEventCallback(INST_CANCOM2, canRxCallback, NULL); FLEXCAN_DRV_InstallEventCallback(INST_CANCOM3, canRxCallback, NULL); FLEXCAN_DRV_ConfigRxMb(INST_CANCOM1, 0, &flexcan1_data_std_info, 0); // 0不过滤ID !0为接收到的ID FLEXCAN_DRV_ConfigRxMb(INST_CANCOM2, 0, &flexcan2_data_std_info, 0); // 0不过滤ID !0为接收到的ID FLEXCAN_DRV_ConfigRxMb(INST_CANCOM3, 0, &flexcan3_data_std_info, 0); // 0不过滤ID !0为接收到的ID FLEXCAN_DRV_Receive(INST_CANCOM1, RX_MAILBOX_FLEXCAN1, &recvMsg1); // 配置接收 FLEXCAN_DRV_Receive(INST_CANCOM2, RX_MAILBOX_FLEXCAN2, &recvMsg2); // 配置接收 FLEXCAN_DRV_Receive(INST_CANCOM3, RX_MAILBOX_FLEXCAN3, &recvMsg3); // 配置接收*/ FTM_DRV_Init(INST_FLEXTIMER_IC1, &flexTimer_ic1_InitConfig,&ftm1StateStruct); FTM_DRV_InitInputCapture(INST_FLEXTIMER_IC1, &flexTimer_ic1_InputCaptureConfig); LPSPI_DRV_MasterInit(LPSPICOM1,&lpspiCom1State,&lpspiCom1_MasterConfig0); LPIT_DRV_Init(INST_LPIT1, &lpit1_InitConfig); LPIT_DRV_InitChannel(INST_LPIT1, 0, &lpit1_ChnConfig0); INT_SYS_InstallHandler(LPIT0_Channel0_IRQn, &LPIT_ISR, (isr_t*)0); LPIT_DRV_StartTimerChannels(INST_LPIT1, 1); for(;;) { ADC0_ch0_read(); ADC0_ch1_read(); ADC0_ch2_read(); ADC0_ch3_read(); ADC0_ch4_read(); ADC0_ch5_read(); ADC1_ch0_read(); ADC1_ch1_read(); ADC1_ch2_read(); ADC1_ch3_read(); ADC1_ch4_read(); ADC1_ch5_read(); ADC1_ch6_read(); ADC1_ch7_read(); } /*** Don't write any code pass this line, or it will be deleted during code generation. ***/ /*** RTOS startup code. Macro PEX_RTOS_START is defined by the RTOS component. DON'T MODIFY THIS CODE!!! ***/ #ifdef PEX_RTOS_START PEX_RTOS_START(); /* Startup of the selected RTOS. Macro is defined by the RTOS component. */ #endif /*** End of RTOS startup code. ***/ /*** Processor Expert end of main routine. DON'T MODIFY THIS CODE!!! ***/ for(;;) { if(exit_code != 0) { break; } } return exit_code; /*** Processor Expert end of main routine. DON'T WRITE CODE BELOW!!! ***/ } /*** End of main routine. DO NOT MODIFY THIS TEXT!!! ***/ /* END main */ /*! ** @} */ /* ** ################################################################### ** ** This file was created by Processor Expert 10.1 [05.21] ** for the NXP S32K series of microcontrollers. ** ** ################################################################### */