//----------------------------------------------------------------------------------- // // A1 - Sample Configuration (Manual OTP Programming) // //----------------------------------------------------------------------------------- WRITE_I2C:7F:01 // Access PF4210 EXT Page1 //----------------------------------------------------------------------------------- WRITE_I2C:FF:08 // I2C Device Address = 0x08,added 6/3/2015 //[Extended Page 1 Registers: 0xA0 - 0xAF] ------------------------------------------ WRITE_I2C:A0:18 // Sw1AB Voltage=0.9V WRITE_I2C:A1:04 // Sw1AB Sequence=4 WRITE_I2C:A2:05 // Sw1AB Freq=2MHZ, Mode=A/B single phase, C independent mode WRITE_I2C:A8:18 // Sw1c Voltage=0.9V WRITE_I2C:A9:04 // Sw1c Sequence=4 WRITE_I2C:AA:01 // Sw1c Freq=2MHZ WRITE_I2C:AC:1C // Sw2 Voltage=1.1V WRITE_I2C:AD:06 // Sw2 Sequence=6 WRITE_I2C:AE:01 // Sw2 Freq=2MHZ //[Extended Page 1 Registers: 0xB0 - 0xBF] ------------------------------------------ WRITE_I2C:B0:18 // Sw3A Voltage=1.000V WRITE_I2C:B1:04 // Sw3A Sequence=4 WRITE_I2C:B2:01 // Sw3A Freq=2MHZ, Mode=single phase WRITE_I2C:B4:18 // Sw3B Voltage=1.0V WRITE_I2C:B5:04 // Sw3B Sequence=4 WRITE_I2C:B6:01 // Sw3B Freq=2MHZ WRITE_I2C:B8:38 // Sw4 Voltage=1.8V WRITE_I2C:B9:06 // Sw4 Sequence=6 WRITE_I2C:BA:01 // Sw4 Freq=2MHZ WRITE_I2C:BC:00 // Swbst Voltage=5V WRITE_I2C:BD:00 // Swbst Sequence=off //[Extended Page 1 Registers: 0xC0 - 0xCF] ------------------------------------------ WRITE_I2C:C0:00 // Vsnvs Voltage=1V WRITE_I2C:C4:06 // Vrefddr Sequence=6 WRITE_I2C:C8:0E // Vgen1 Voltage=1.50V WRITE_I2C:C9:1F // Vgen1 Sequence=31 WRITE_I2C:CC:02 // Vgen2 Voltage=0.9V WRITE_I2C:CD:07 // Vgen2 Sequence=7 //[Extended Page 1 Registers: 0xD0 - 0xDF] ------------------------------------------ WRITE_I2C:D0:00 // Vgen3 Voltage=1.8V WRITE_I2C:D1:07 // Vgen3 Sequence=7 WRITE_I2C:D4:00 // Vgen4 Voltage=1.8V WRITE_I2C:D5:05 // Vgen4 Sequence=5 WRITE_I2C:D8:0F // Vgen5 Voltage=3.3V WRITE_I2C:D9:07 // Vgen5 Sequence=7 WRITE_I2C:DC:0A // Vgen6 Voltage=2.8V WRITE_I2C:DD:1F // Vgen6 Sequence=31 //[Extended Page 1 Registers: 0xE0 - 0xEF] ------------------------------------------ WRITE_I2C:E0:0E // Power up DVS=25mV/16us, Seq CLK=2000us, PWRON config=0 //----------------------------------------------------------------------------------- WRITE_I2C:E4:02 // FUSE POR=1 (This Enables OTP Programming) VPGM:ON // Turn ON 8V SWBST //VPGM:DOWN:n //VPGM:UP:n DELAY:500 // Adds 500msec delay to allow VPGM time to ramp up WRITE_I2C:7F:02 // Access PF0100 EXT Page2 //----------------------------------------------------------------------------------- // PF0100 OTP MANUAL-PROGRAMMING (BANK 1 thru 10) //----------------------------------------------------------------------------------- // BANK 1 //----------------------------------------------------------------------------------- WRITE_I2C:F1:00 // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F1:03 // Set Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F1:0B // Set Bank 1 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F1:03 // Reset Bank 1 ANTIFUSE_EN WRITE_I2C:F1:00 // Reset Bank 1 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 2 //----------------------------------------------------------------------------------- WRITE_I2C:F2:00 // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F2:03 // Set Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F2:0B // Set Bank 2 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F2:03 // Reset Bank 2 ANTIFUSE_EN WRITE_I2C:F2:00 // Reset Bank 2 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 3 //----------------------------------------------------------------------------------- WRITE_I2C:F3:00 // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F3:03 // Set Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F3:0B // Set Bank 3 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F3:03 // Reset Bank 3 ANTIFUSE_EN WRITE_I2C:F3:00 // Reset Bank 3 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 4 //----------------------------------------------------------------------------------- WRITE_I2C:F4:00 // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:03 // Set Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F4:0B // Set Bank 4 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F4:03 // Reset Bank 4 ANTIFUSE_EN WRITE_I2C:F4:00 // Reset Bank 4 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 5 //----------------------------------------------------------------------------------- WRITE_I2C:F5:00 // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F5:03 // Set Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F5:0B // Set Bank 5 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F5:03 // Reset Bank 5 ANTIFUSE_EN WRITE_I2C:F5:00 // Reset Bank 5 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 6 //----------------------------------------------------------------------------------- WRITE_I2C:F6:00 // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F6:03 // Set Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F6:0B // Set Bank 6 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F6:03 // Reset Bank 6 ANTIFUSE_EN WRITE_I2C:F6:00 // Reset Bank 6 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 7 //----------------------------------------------------------------------------------- WRITE_I2C:F7:00 // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F7:03 // Set Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F7:0B // Set Bank 7 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F7:03 // Reset Bank 7 ANTIFUSE_EN WRITE_I2C:F7:00 // Reset Bank 7 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 8 //----------------------------------------------------------------------------------- WRITE_I2C:F8:00 // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F8:03 // Set Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F8:0B // Set Bank 8 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F8:03 // Reset Bank 8 ANTIFUSE_EN WRITE_I2C:F8:00 // Reset Bank 8 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 9 //----------------------------------------------------------------------------------- WRITE_I2C:F9:00 // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F9:03 // Set Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:F9:0B // Set Bank 9 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:F9:03 // Reset Bank 9 ANTIFUSE_EN WRITE_I2C:F9:00 // Reset Bank 9 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- // BANK 10 //----------------------------------------------------------------------------------- WRITE_I2C:FA:00 // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:FA:03 // Set Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits WRITE_I2C:FA:0B // Set Bank 10 ANTIFUSE_EN DELAY:10 // Allow time for bank programming to complete WRITE_I2C:FA:03 // Reset Bank 10 ANTIFUSE_EN WRITE_I2C:FA:00 // Reset Bank 10 ANTIFUSE_RW and ANTIFUSE_BYPASS bits //----------------------------------------------------------------------------------- VPGM:OFF // Turn off 8V SWBST DELAY:500 // Adds delay to allow VPGM to bleed off PWRON:LOW // PWRON LOW to reload new OTP data DELAY:500 PWRON:HIGH