#define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00140000)
#define CONFIG_SYS_FSL_PEX_LUT_BE 
#define CONFIG_SPI_FLASH_WINBOND 1
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_MXC_I2C2_SPEED 100000
#define CONFIG_SCRIPTHRADDR 0x80080000
#define CONFIG_SYS_FMAN_FW_ADDR 0x40020000
#define CONFIG_PHY_REALTEK 1
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
#define CONFIG_EFI_DEVICE_PATH_UTIL 1
#define CONFIG_BOOTM_NETBSD 1
#define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0xe80200)
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_CMD_FDT 1
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000)
#define CONFIG_CMD_ITEST 1
#define CONFIG_SYS_FSL_IFC_CLK_DIV 1
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000)
#define CONFIG_BOOTM_VXWORKS 1
#define CONFIG_SYS_FSL_DSPI_BE 
#define CONFIG_SYS_MXC_I2C3_SLAVE 0
#define CONFIG_ERR_PTR_OFFSET 0x0
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FMAN_V3 
#define CONFIG_CMD_EDITENV 1
#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x10000
#define CONFIG_EFI_PLATFORM_LANG_CODES "en-US"
#define CONFIG_ARM_PSCI_FW 1
#define CONFIG_CMD_SETEXPR 1
#define CONFIG_CMD_BOOTP 1
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
#define CONFIG_AUTOBOOT_STOP_STR_SHA256 "6d97c31f38fceecd95105d5b9e096e28d6f6cec1dab4dd0bbbdb1012e749cd28"
#define CONFIG_SYS_MXC_I2C1_SLAVE 0
#define CONFIG_SPI_FLASH_SST 
#define CONFIG_CMD_PART 1
#define CONFIG_MISC 1
#define CONFIG_ENV_SUPPORT 1
#define CONFIG_SPL_LOGLEVEL 4
#define CONFIG_CMD_ENV_EXISTS 1
#define CONFIG_CMD_CRC32 1
#define CONFIG_SF_DEFAULT_MODE 0x3
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMD_NVME 1
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
#define CONFIG_HASH 1
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_ENV_IS_IN_EEPROM 1
#define CONFIG_CMD_XIMG 1
#define CONFIG_CMD_CACHE 1
#define CONFIG_EXPERT 1
#define CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH 1
#define CONFIG_CMDLINE 1
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL
#define CONFIG_BOOTDELAY 3
#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x10000
#define CONFIG_CMD_BOOTEFI 1
#define CONFIG_SPI_FLASH 1
#define CONFIG_SYS_FSL_DDRC_GEN4 1
#define CONFIG_DM_PCI 1
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_EFI_PARTITION 1
#define CONFIG_ARCH_LS1043A 1
#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT 1
#define CONFIG_FS_FAT 1
#define CONFIG_BOOTM_RTEMS 1
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SKIP_LOWLEVEL_INIT 
#define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000
#define CONFIG_MD5 1
#define CONFIG_DM_PCI_COMPAT 1
#define CONFIG_BOOTM_LINUX 1
#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00020000
#define CONFIG_BOARD_LATE_INIT 1
#define CONFIG_CREATE_ARCH_SYMLINK 1
#define CONFIG_CMD_CONSOLE 1
#define CONFIG_SUPPORT_OF_CONTROL 1
#define CONFIG_BLK 1
#define CONFIG_SYS_CPU "armv8"
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x16
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_MMC 1
#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
#define CONFIG_SYS_CSPR0 CONFIG_SYS_CPLD_CSPR
#define CONFIG_SYS_FSL_FM1_DTSEC1_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
#define CONFIG_SYS_DCSRBAR 0x20000000
#define CONFIG_SYS_FSL_CLK 1
#define CONFIG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
#define CONFIG_SYS_CCI400_OFFSET 0x180000
#define CONFIG_SYS_ARM_CACHE_WRITEBACK 1
#define CONFIG_SYS_CPLD_BASE 0x7fb00000
#define CONFIG_ARM_SMCCC 1
#define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000
#define CONFIG_PCI_BOOTDELAY 1000
#define CONFIG_SYS_CPLD_AMASK IFC_AMASK(64 * 1024)
#define CONFIG_SYS_XTRACE "y"
#define CONFIG_FIT 1
#define CONFIG_MISC_INIT_R 1
#define CONFIG_ENV_OFFSET 0x400
#define CONFIG_DISTRO_DEFAULTS 1
#define CONFIG_DM_DEVICE_REMOVE 1
#define CONFIG_SCRIPTADDR 0x80000000
#define CONFIG_CMD_HASH 1
#define CONFIG_SPI_FLASH_EON 
#define CONFIG_MMC_WRITE 1
#define CONFIG_SYS_SRAM_BASE 0x0
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_CMD_NET 1
#define CONFIG_CMD_LZMADEC 1
#define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040)
#define CONFIG_CMD_NFS 1
#define CONFIG_DDR_SPD 
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_FSL_BLOB 1
#define CONFIG_SYS_FSL_FMAN_ADDR (CONFIG_SYS_IMMR + 0x00a00000)
#define CONFIG_USB_XHCI_DWC3 1
#define CONFIG_SUPPORT_RAW_INITRD 1
#define CONFIG_SYS_CPLD_FTIM1 (FTIM1_GPCM_TACO(0xff) | FTIM1_GPCM_TRAD(0x3f))
#define CONFIG_SYS_IMMR 0x01000000
#define CONFIG_CMD_FS_GENERIC 1
#define CONFIG_CMD_PING 1
#define CONFIG_SYS_MEM_RESERVE_SECURE (66 * 1024 * 1024)
#define CONFIG_CMD_GREPENV 1
#define CONFIG_PHY_VITESSE 1
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_SYS_BMAN_MEM_SIZE 0x08000000
#define CONFIG_SYS_FSL_WDOG_BE 
#define CONFIG_EFI_VARIABLE_FILE_STORE 1
#define CONFIG_EFI_VAR_BUF_SIZE 16384
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_FSL_ERRATUM_A009942 1
#define CONFIG_EFI_LOADER_BOUNCE_BUFFER 1
#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
#define CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS 100
#define CONFIG_PCIE1 
#define CONFIG_PCIE2 
#define CONFIG_PCIE3 
#define CONFIG_SPI_FLASH_SPANSION 1
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_LOCALVERSION ""
#define CONFIG_CMD_MEMINFO 1
#define CONFIG_SYS_FSL_DSPI_CLK_DIV 1
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
#define CONFIG_SYS_LS_PPA_FW_ADDR 0x40400000
#define CONFIG_SYS_TEXT_BASE 0x40100000
#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x4000000000ULL
#define CONFIG_CMD_NVM 
#define CONFIG_CC_OPTIMIZE_FOR_SIZE 1
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define CONFIG_ARCH_EARLY_INIT_R 1
#define CONFIG_TFTP_WINDOWSIZE 1
#define CONFIG_REGEX 1
#define CONFIG_EFI_PARTITION_ENTRIES_NUMBERS 128
#define CONFIG_SYS_CONFIG_NAME "yy_ls1043a"
#define CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET 0xa8d000
#define CONFIG_EXTRA_ENV_UPDATE "mmcdev=0\0" "rcwaddr=0\0" "ubootaddr="__stringify(CONFIG_UBOOTADDR)"\0" "itbaddr=0x200000\0" "envaddr="__stringify(CONFIG_ENV_OFFSET)"\0" "envsize="__stringify(CONFIG_ENV_SIZE)"\0" "frcw=sf probe && sf update $loadaddr $rcwaddr $filesize\0" "fb=sf probe && sf update $loadaddr $ubootaddr $filesize\0" "fi=mmc dev $mmcdev && mmc write $loadaddr 800 20000\0" "ee=mw.l $loadaddr 0; eeprom write " __stringify(CONFIG_SYS_I2C_EEPROM_BUS) " " __stringify(CONFIG_SYS_I2C_EEPROM_ADDR) " $loadaddr " __stringify(CONFIG_ENV_OFFSET) " 4\0" "yi=sf probe && sf update $loadaddr $itbaddr $filesize\0"
#define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
#define CONFIG_SYS_FSL_SRK_LE 
#define CONFIG_CMD_SAVEENV 1
#define CONFIG_MKIMAGE_DTC_PATH "dtc"
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_FSL_IFC 
#define CONFIG_SYS_FSL_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
#define CONFIG_BOOTM_PLAN9 1
#define CONFIG_SYS_FSL_IFC_BE 
#define CONFIG_SYS_NS16550_SERIAL 
#define CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2 1
#define CONFIG_DM_MMC 1
#define CONFIG_DDR_ECC 
#define CONFIG_SYS_FSL_DDR_BE 1
#define CONFIG_FIT_ENABLE_SHA256_SUPPORT 1
#define CONFIG_SYS_CCSRBAR_PHYS_LOW 0x01000000
#define CONFIG_LZMA 1
#define CONFIG_BUILD_TARGET ""
#define CONFIG_CMD_GPT 1
#define CONFIG_SYS_FSL_DCFG_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
#define CONFIG_SCSI_AHCI 1
#define CONFIG_SYS_BMAN_MEM_BASE 0x508000000
#define CONFIG_USE_BOOTARGS 1
#define CONFIG_UBOOTADDR 0x100000
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
#define CONFIG_DM_DEV_READ_INLINE 1
#define CONFIG_SYS_FSL_SEC_BE 1
#define CONFIG_SYS_CPLD_CSPR_EXT (0x0)
#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_DM_WARN 1
#define CONFIG_BOOTP_DNS 1
#define CONFIG_SYS_CACHE_SHIFT_6 1
#define CONFIG_CMD_MEMORY 1
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_MMC_HW_PARTITIONING 1
#define CONFIG_SYS_FSL_TIMER_ADDR 0x02b00000
#define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=fsl_ddr:bank_intlv=auto\0" "fdt_high=0xffffffffffffffff\0" "initrd_high=0xffffffffffffffff\0" "scriptaddr="__stringify(CONFIG_SCRIPTADDR)"\0" "scripthdraddr="__stringify(CONFIG_SCRIPTHRADDR)"\0" "boot_os=y\0" "console=ttyS0,115200\0" "sataargs=setenv bootargs console=$console root=/dev/sda2 rootwait rw $othbootargs $customargs\0" "ramargs=setenv bootargs console=$console root=/dev/ram rw $othbootargs $customargs\0" "emmcargs=setenv bootargs console=$console root=/dev/mmcblk0p2 rootwait rw $othbootargs $customargs\0" "loaditb_qspi=sf read $loadaddr $itbaddr 0x1800000\0" "recoveryboot=run ramargs && run loaditb_qspi && iminfo $loadaddr && bootm $loadaddr\0" "emmcbootram=run ramargs && iminfo $loadaddr && bootm $loadaddr\0" "emmcbootext4=run emmcargs && iminfo $loadaddr && bootm $loadaddr#config@sata\0" "satabootext4=run sataargs && iminfo $loadaddr && bootm $loadaddr#config@sata;\0" "satabootram=run ramargs && iminfo $loadaddr && bootm $loadaddr\0" CONFIG_EXTRA_ENV_UPDATE CONFIG_EXTRA_ENV_BOOTSEQ
#define CONFIG_SUPPORT_SPL 1
#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000)
#define CONFIG_SYS_HAS_SERDES 1
#define CONFIG_CMD_RUN 1
#define CONFIG_IPADDR 192.168.0.42
#define CONFIG_ENV_VARS_UBOOT_CONFIG 1
#define CONFIG_SPL_SYS_STACK_F_CHECK_BYTE 0xaa
#define CONFIG_SYS_FSL_SEC_COMPAT 5
#define CONFIG_DM_SPI_FLASH 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_SYS_FSL_SEC_COMPAT_5 1
#define CONFIG_USB 1
#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_IMMR + 0x011d0500)
#define CONFIG_SYS_FSL_DDR_VER_50 1
#define CONFIG_BOOTP_HOSTNAME 1
#define CONFIG_CMD_SLEEP 1
#define CONFIG_BOARDDIR board/yytek/yy_ls1043a
#define CONFIG_TPL_LOGLEVEL 4
#define CONFIG_LAYERSCAPE_NS_ACCESS 
#define CONFIG_SATA_CEVA 1
#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_CPLD_FTIM2
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_CPLD_FTIM3
#define CONFIG_SYS_RTC_BUS_NUM 0
#define CONFIG_NET 1
#define CONFIG_BLOCK_CACHE 1
#define CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET 0xa89000
#define CONFIG_AUTOBOOT_PROMPT "Enter CODE in %d seconds\n"
#define CONFIG_SPI_FLASH_STMICRO 1
#define CONFIG_OF_LIBFDT 1
#define CONFIG_TFTP_BLOCKSIZE 1468
#define CONFIG_PSCI_RESET 1
#define CONFIG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x00880000)
#define CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT 1
#define CONFIG_PHYLIB 1
#define CONFIG_GENERATE_SMBIOS_TABLE 1
#define CONFIG_SYS_FSL_DDR 1
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_CMD_USB 1
#define CONFIG_SYS_NUM_DDR_CTLRS 1
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
#define CONFIG_EXTRA_ENV_BOOTSEQ "bootcmd=sf probe; usb start; scsi scan; mmc dev $mmcdev; run bootseq\0" "devicetree=board.dtb\0" "kerneladdr=0xa0000000\0" "fdtaddr=0x85000000\0" "ramdiskaddr=0x90000000\0" "boottype=scsi\0" "load_p2_itb=echo \"load itb from $boottype p2\";ext2load $boottype 0:2 $loadaddr boot/board.itb\0" "load_p1_itb=echo \"load itb from $boottype p1\";ext2load $boottype 0:1 $loadaddr board.itb\0" "load_split_image=echo \"load itb from $boottype p1\";" "       ext2load $boottype 0:1 $kerneladdr Image;" "       ext2load $boottype 0:1 $fdtaddr $devicetree;" "       ext2load $boottype 0:1 $ramdiskaddr initrd.gz\0" "bootseq=" " if fatload usb 0 $loadaddr recovery.scr; then " " 		source $loadaddr;" " else;" "       setenv boottype scsi;run load_p2_itb && run satabootext4; " "       setenv boottype scsi;run load_p1_itb && run satabootram; " "       setenv boottype mmc;run load_p2_itb && run emmcbootext4; " "       setenv boottype mmc;run load_p1_itb && run emmcbootram; " "       setenv boottype scsi;run load_split_image && run ramargs && booti $kerneladdr $ramdiskaddr::0x4000000 $fdtaddr; " "       setenv boottype mmc;run load_split_image && run ramargs && booti $kerneladdr $ramdiskaddr::0x4000000 $fdtaddr; " "       echo \"recoveryboot...\";run recoveryboot; " " fi\0"
#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_AHCI 1
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER 
#define CONFIG_PHYS_64BIT 1
#define CONFIG_CMD_EXT2 1
#define CONFIG_CMD_EXT4 1
#define CONFIG_BOOTCOMMAND "run distro_bootcmd"
#define CONFIG_ARCH_FIXUP_FDT_MEMORY 1
#define CONFIG_EFI_GET_TIME 1
#define CONFIG_SYS_FSL_ERRATUM_A009660 1
#define CONFIG_SYS_FSL_ERRATUM_A009663 1
#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0x3680
#define CONFIG_EFI_DT_FIXUP 1
#define CONFIG_ISO_PARTITION 1
#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000)
#define CONFIG_SYS_CPLD_CSOR CSOR_NOR_ADM_SHIFT(16)
#define CONFIG_REMAKE_ELF 
#define CONFIG_SYS_FSL_SFP_VER_3_2 
#define CONFIG_SYS_MALLOC_CLEAR_ON_INIT 1
#define CONFIG_SYS_CPLD_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | CSPR_PORT_SIZE_8 | CSPR_MSEL_GPCM | CSPR_V)
#define CONFIG_CMD_EEPROM 
#define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000)
#define CONFIG_SYS_EXTRA_OPTIONS "QSPI_BOOT"
#define CONFIG_CMD_RANDOM 1
#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
#define CONFIG_SYS_BOOT_RAMDISK_HIGH 
#define CONFIG_CMD_BOOTEFI_HELLO_COMPILE 1
#define CONFIG_CAAM_64BIT 1
#define CONFIG_HUSH_PARSER 1
#define CONFIG_DEFAULT_FDT_FILE ""
#define CONFIG_SYS_FSL_ESDHC_BE 
#define CONFIG_ARMV8_MULTIENTRY 1
#define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8"
#define CONFIG_DM_SCSI 1
#define CONFIG_DM 1
#define CONFIG_ZLIB 1
#define CONFIG_OF_LIBFDT_ASSUME_MASK 0x0
#define CONFIG_SYS_CPLD_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | FTIM0_GPCM_TEADC(0x0e) | FTIM0_GPCM_TEAHC(0x0e))
#define CONFIG_SYS_CPLD_FTIM2 (FTIM2_GPCM_TCS(0xf) | FTIM2_GPCM_TCH(0xf) | FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CPLD_FTIM3 0x0
#define CONFIG_LIB_UUID 1
#define CONFIG_GICV2 
#define CONFIG_CMD_GO 1
#define CONFIG_SYS_MXC_I2C3_SPEED 100000
#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0
#define CONFIG_USB_HOST 1
#define CONFIG_SYS_FSL_BOOTROM_BASE 0x0
#define CONFIG_CMD_BOOTD 1
#define CONFIG_CMD_BOOTI 1
#define CONFIG_CMD_BOOTM 1
#define CONFIG_EFI_LOADER_HII 1
#define CONFIG_CMD_BOOTZ 1
#define CONFIG_SYS_FSL_DDR4 1
#define CONFIG_SYS_BMAN_NUM_PORTALS 10
#define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_MALLOC_F 1
#define CONFIG_SYS_FSL_CCSR_SCFG_BE 
#define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000)
#define CONFIG_SYS_SRAM_SIZE 0x0
#define CONFIG_FSL_QSPI 1
#define CONFIG_PCIE_LAYERSCAPE_RC 1
#define CONFIG_FSL_CAAM 1
#define CONFIG_AUTO_COMPLETE 1
#define CONFIG_SYS_MXC_I2C1_SPEED 100000
#define CONFIG_SPI_FLASH_USE_4K_SECTORS 1
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
#define CONFIG_SPRINTF 1
#define CONFIG_CMD_SYSBOOT 1
#define CONFIG_FSL_LS_PPA 1
#define CONFIG_MP 1
#define CONFIG_SYS_SOC "fsl-layerscape"
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_SYS_MXC_I2C4_SLAVE 0
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_FSL_SEC_OFFSET 0x700000ull
#define CONFIG_GZIP 1
#define CONFIG_SYS_VENDOR "yytek"
#define CONFIG_IMX_DCD_ADDR 0x00910000
#define CONFIG_DM_USB 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 10
#define CONFIG_CMD_SF 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_MXC_I2C2_SLAVE 0
#define CONFIG_IDENT_STRING ""
#define CONFIG_IN112525_S03_25G 1
#define CONFIG_SCSI 1
#define CONFIG_TARGET_YY_LS1043A 1
#define CONFIG_MTDIDS_DEFAULT ""
#define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000)
#define CONFIG_PRINTF 1
#define CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET 0xa8c000
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011c0600)
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_IMMR + 0x011d0600)
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
#define CONFIG_VAL(option) config_val(option)
#define CONFIG_PCI_SCAN_SHOW 
#define CONFIG_SYS_FSL_FM1_OFFSET 0xa00000
#define CONFIG_DM_STDIO 1
#define CONFIG_LOCALVERSION_AUTO 1
#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000)
#define CONFIG_FMAN_ENET 1
#define CONFIG_SYS_FSL_SRDS_1 1
#define CONFIG_CMD_TFTPBOOT 1
#define CONFIG_PHYLIB_10G 1
#define CONFIG_SYS_FSL_BMAN_ADDR (CONFIG_SYS_IMMR + 0x00890000)
#define CONFIG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0xe90000)
#define CONFIG_TPL_OF_LIBFDT_ASSUME_MASK 0xff
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_ARCH_MISC_INIT 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
#define CONFIG_MMC_VERBOSE 1
#define CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET 0xa8a000
#define CONFIG_SYS_FSL_HAS_SEC 1
#define CONFIG_NET_TFTP_VARS 1
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
#define CONFIG_STACK_SIZE 0x1000000
#define CONFIG_FSL_LAYERSCAPE 1
#define CONFIG_SYS_FSL_CCSR_GUR_BE 
#define CONFIG_PHY_MOTORCOMM 1
#define CONFIG_CMD_DHCP 1
#define CONFIG_SYS_FSL_ERRATUM_A008850 1
#define CONFIG_HAS_FSL_XHCI_USB 1
#define CONFIG_LEGACY_IMAGE_FORMAT 1
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_FSL_QMAN_CLK_DIV 1
#define CONFIG_SYS_FSL_SDHC_CLK_DIV 1
#define CONFIG_CMD_ECHO 1
#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + CONFIG_SYS_QMAN_CENA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_STRTO 1
#define CONFIG_PLATFORM_ELFENTRY "_start"
#define CONFIG_FAT_WRITE 1
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#define CONFIG_PCIE_LAYERSCAPE 1
#define CONFIG_SYS_AMASK0 CONFIG_SYS_CPLD_AMASK
#define CONFIG_SYS_I2C 
#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SHA_HW_ACCEL 1
#define CONFIG_FIT_PRINT 1
#define CONFIG_LINKER_LIST_ALIGN 8
#define CONFIG_OF_CONTROL 1
#define CONFIG_EFI_PARTITION_ENTRIES_OFF 0
#define CONFIG_SPL_OF_LIBFDT_ASSUME_MASK 0xff
#define CONFIG_CMD_SCSI 1
#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET 0xa88000
#define CONFIG_SYS_CCSRBAR 0x01000000
#define CONFIG_ARM_ERRATA_855873 1
#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80
#define CONFIG_BOOTP_PXE 1
#define CONFIG_INPUT 1
#define CONFIG_YY_SUB_EEPROM_ADDR 0x55
#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE
#define CONFIG_VERY_BIG_RAM 
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
#define CONFIG_FSL_ESDHC 1
#define CONFIG_FIT_EXTERNAL_OFFSET 0x0
#define CONFIG_SPI_MEM 1
#define CONFIG_SYS_FSL_HAS_CCI400 1
#define CONFIG_BOOTSTAGE_STASH_SIZE 0x1000
#define CONFIG_SYS_ARCH "arm"
#define CONFIG_E1000 1
#define CONFIG_SYS_DPAA_QBMAN 1
#define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000)
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_BOARD "yy_ls1043a"
#define CONFIG_CMD_QSPIHDR 1
#define CONFIG_PARTITION_UUIDS 1
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 
#define CONFIG_ARCH_SUPPORT_TFABOOT 1
#define CONFIG_DM_GPIO 1
#define CONFIG_MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
#define CONFIG_CMD_UNZIP 1
#define CONFIG_NETMASK 252.252.252.0
#define CONFIG_DM_RTC 1
#define CONFIG_301_0020 1
#define CONFIG_DTC 1
#define CONFIG_CMDLINE_TAG 
#define CONFIG_FIRMWARE 1
#define CONFIG_SYS_ARM_ARCH 8
#define CONFIG_NET_RANDOM_ETHADDR 
#define CONFIG_SYS_FSL_ERRATUM_A009798 1
#define CONFIG_SYS_FSL_FM1_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_OFFSET)
#define CONFIG_HWCONFIG 
#define CONFIG_ARM64_SUPPORT_AARCH32 1
#define CONFIG_CMD_IMPORTENV 1
#define CONFIG_OF_BOARD_SETUP 1
#define CONFIG_MMC_QUIRKS 1
#define CONFIG_CMD_EXPORTENV 1
#define CONFIG_CMD_PCI 1
#define CONFIG_AUTOBOOT_ENCRYPTION 1
#define CONFIG_PARTITIONS 1
#define CONFIG_ARM64 1
#define CONFIG_OF_TRANSLATE 1
#define CONFIG_SCSI_AHCI_PLAT 
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_MEMTEST_END 0x9fffffff
#define CONFIG_CMD_I2C 1
#define CONFIG_FIT_VERBOSE 1
#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000)
#define CONFIG_MAX_CPUS 4
#define CONFIG_CMD_ELF 1
#define CONFIG_CMD_MDIO 1
#define CONFIG_LIB_DATE 1
#define CONFIG_LIBATA 1
#define CONFIG_SYS_FSL_ERRATUM_A009007 1
#define CONFIG_SYS_FSL_ERRATUM_A009008 1
#define CONFIG_USB_XHCI_FSL 1
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
#define CONFIG_SYS_FSL_ERRATUM_A010315 1
#define CONFIG_EFI_LOADER 1
#define CONFIG_QSPI_BOOT 1
#define CONFIG_CMD_DATE 1
#define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x00400000)
#define CONFIG_YY_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR
#define CONFIG_RANDOM_UUID 1
#define CONFIG_CMD_MEMTEST 1
#define CONFIG_CMD_BOOTEFI_BOOTMGR 1
#define CONFIG_SYS_FSL_BOOTROM_SIZE 0x1000000
#define CONFIG_SYS_FSL_QMAN_V3 
#define CONFIG_DM_SEQ_ALIAS 1
#define CONFIG_YY_NVM 
#define CONFIG_SYS_FSL_I2C_CLK_DIV 1
#define CONFIG_SYS_RELOC_GD_ENV_ADDR 1
#define CONFIG_FS_EXT4 1
#define CONFIG_AVB_WARNING_TIME_LAST 0x3
#define CONFIG_HASH_VERIFY 
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000
#define CONFIG_SYS_FSL_SEC_MON_BE 
#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_BOOTSTAGE_STASH_ADDR 0x0
#define CONFIG_SPI 1
#define CONFIG_EFI_DEVICE_PATH_TO_TEXT 1
#define CONFIG_SYS_FSL_PCLK_DIV 1
#define CONFIG_BOOTM_EFI 1
#define CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET 0xae0000
#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_CPLD_FTIM1
#define CONFIG_CMD_SOURCE 1
#define CONFIG_PCI_PNP 1
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_BOOTP_BOOTPATH 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_CMD_PXE 1
#define CONFIG_SYS_FSL_DUART_CLK_DIV 1
#define CONFIG_SYS_LS_PPA_FW_IN_XIP 1
#define CONFIG_SYS_FSL_DDR_VER 50
#define CONFIG_LOADADDR 0xa0000000
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_LOGLEVEL 4
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
#define CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET 0xa8b000
#define CONFIG_SHA1 1
#define CONFIG_SAVEENV 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000
#define CONFIG_FSL_DSPI 1
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_CMD_LOADB 1
#define CONFIG_HAVE_SYS_TEXT_BASE 1
#define CONFIG_CMD_LOADS 1
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_CPLD_CSPR_EXT
#define CONFIG_SYS_FSL_RST_ADDR (CONFIG_SYS_IMMR + 0x00ee00b0)
#define CONFIG_FS_FAT_MAX_CLUSTSIZE 65536
#define CONFIG_SYS_FSL_ERRATUM_A010539 1
#define CONFIG_CMD_IMI 1
#define CONFIG_FSL_PCIE_EP_COMPAT "fsl,ls-pcie-ep"
#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_HAS_FEATURE_ENHANCED_MSI 1
#define CONFIG_CONS_INDEX 1
#define CONFIG_EFI_HAVE_RUNTIME_RESET 1
#define CONFIG_LMB 
#define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000)
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_AUTOBOOT 1
#define CONFIG_ARM 1
#define CONFIG_SYS_DPAA_FMAN 
#define CONFIG_SYS_NUM_FM1_DTSEC 7
#define CONFIG_MPC8XXX_GPIO 
#define CONFIG_SYS_I2C_MXC 1
#define CONFIG_SYS_BMAN_MEM_PHYS (0xf00000000ull + CONFIG_SYS_BMAN_MEM_BASE)
#define CONFIG_HAVE_BLOCK_DEVICE 1
#define CONFIG_SYS_CSOR0 CONFIG_SYS_CPLD_CSOR
#define CONFIG_SYS_FSL_LPUART_CLK_DIV 1
#define CONFIG_IS_ENABLED(option,...) __concat(__CONFIG_IS_ENABLED_, __count_args(option, ##__VA_ARGS__)) (option, ##__VA_ARGS__)
#define CONFIG_EFI_UNICODE_CAPITALIZATION 1
#define CONFIG_USB_XHCI_HCD 1
#define CONFIG_FSL_LSCH2 1
#define CONFIG_SYS_FSL_HAS_DDR3 1
#define CONFIG_SYS_FSL_HAS_DDR4 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_CMD_BLOCK_CACHE 1
#define CONFIG_HAS_FEATURE_GIC64K_ALIGN 1
#define CONFIG_OF_SEPARATE 1
#define CONFIG_CMD_GPIO 1
#define CONFIG_CMD_BDI 1
#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + CONFIG_SYS_BMAN_CENA_SIZE)
#define CONFIG_SYS_I2C_MXC_I2C1 1
#define CONFIG_SYS_I2C_MXC_I2C2 1
#define CONFIG_SYS_I2C_MXC_I2C3 1
#define CONFIG_SYS_I2C_MXC_I2C4 1
#define CONFIG_SERVERIP 192.168.0.252
#define CONFIG_SYS_FSL_SFP_BE 
#define CONFIG_STATIC_RELA 1
#define CONFIG_SYS_FSL_ERRATUM_A008997 1
#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
#define CONFIG_SYS_FSL_JR0_OFFSET 0x710000ull
#define CONFIG_SHA256 1
#define CONFIG_BOOTP_SUBNETMASK 1
#define CONFIG_LZ4 1
#define CONFIG_SYS_QMAN_MEM_BASE 0x500000000
#define CONFIG_LIB_ELF 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_PCI 1
#define CONFIG_MENU 1
#define CONFIG_NETDEVICES 1
#define CONFIG_DEFAULT_DEVICE_TREE "yy-ls1043a"
#define CONFIG_FSL_DDR_INTERACTIVE 1
#define CONFIG_CMD_UNLZ4 1
#define CONFIG_CMD_MII 1
#define CONFIG_NVME 1
#define CONFIG_LIB_RAND 1
#define CONFIG_SIMPLE_BUS 1
#define CONFIG_ARMV8_SET_SMPEN 1
#define CONFIG_KEY_REVOCATION 
#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_CPLD_FTIM0
#define CONFIG_ARM_ASM_UNIFIED 1
#define CONFIG_IN112525_S05_100G 1
#define CONFIG_CMD_MMC 1
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_ARCH_TIMER 1
#define CONFIG_DMA_ADDR_T_64BIT 1
#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE
#define CONFIG_FIT_FULL_CHECK 1
#define CONFIG_SEC_FIRMWARE_ARMV8_PSCI 1
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SPI_FLASH_UNLOCK_ALL 1
#define CONFIG_SPECIFY_CONSOLE_INDEX 1
#define CONFIG_DM_SPI 1
#define CONFIG_SYS_MXC_I2C4_SPEED 100000