word setupExternalMemory(void) {

  // EBICTL0
  EBICTL0_ASIZ  = 0b10011;   // External Address Bus Size : 10011 -> ADDR[18:1], UDS'
  EBICTL0_HDBE  = 1;         // High Data Byte Enable - UDS' e LDS' signals : 0 Disabled / 1 Enabled
  EBICTL0_ITHRS = 0;         // Reduced Input Threshold : 0 5V / 1 3V3

  // EBICTL1
  EBICTL1_EXSTR0    = 0b000; // External Access Stretch Option 0 
  EBICTL1_EXSTR_10  = 0b000; // External Access Stretch Option 1 
  
  // MMCCTL0
  MMCCTL0_CS0E = 0b00;       // Chip Select 0 Enables : 00 -> Disabled / 01, 10 or 11 -> Enabled
  MMCCTL0_CS1E = 0b01;       // Chip Select 1 Enables : 00 -> Disabled / 01, 10 or 11 -> Enabled
  MMCCTL0_CS2E = 0b00;       // Chip Select 2 Enables : 00 -> Disabled / 01, 10 or 11 -> Enabled
  MMCCTL0_CS3E = 0b00;       // Chip Select 3 Enables : 00 -> Disabled / 01, 10 or 11 -> Enabled
  
  // MMCCTL1
  MMCCTL1_ROMON    = 0b1;    // Enable FLASH or ROM in the memory map
  MMCCTL1_ROMHM    = 0b0;    // FLASH or ROM only in higher Half of Memory Map : 1 -> Accesses to 0x4000-0x7FFF will be mapped to 0x14_4000-0x14_7FFF in the global memory space (external access).
  MMCCTL1_EROMON   = 0b1;    // Enables emulated Flash or ROM memory in the memory map : 0 - Disable / 1 - Enable
  MMCCTL1_RAMHM    = 0b0;    // RAM only in higher Half of the memory map : 1 Accesses to $4000-$7FFF will be mapped to $0F_C000-$0F_FFFF in the global memory space (RAM area)
  MMCCTL1_PGMIFRON = 0b0;    // Program IFR visible in the memory map : 0 Not Visible / 1 Visible 
  MMCCTL1_EEEIFRON = 0b0;    // EEE IFR visible in the memory map : 0 Not Visible / 1 Visible 
  MMCCTL1_TGMRAMON = 0b0;    // EEE Tag RAM and FTM SCRATCH RAM visible in the memory map : 0 Not Visible / 1 Visible
  
  // MODE
  MODE_MODx = 0b101; // MODC MODB MODA : 101 -> Normal Expanded
 
  
}