Hello
I have read the hardware interupt and software interupt mode of MPC5744P.
In the example of the HW mode, Example MPC5744P HardwareVectoreMode S32DS
The IVOR1_Handler has been defined as the exception handler.
In Vector.c:
In MPC5744P-HardwareVectoreMode-S32DS.c:
In the other example of SW mode , IVOR4_Handler is used to do the interupt service rountine.
So, my question is :
1. What is the usage of IVOR1-IVOR15?
I have read that IVOR4 is used in the software mode in MPC5744PRM.pdf.
But other IVORn is not mentioned.
How the software interupt go to IVOR4 and not others?
2. In hardware interupt mode, how the cpu know the exception should go to IVOR1 in the example, why not IVOR0 and other ones?
And can anyone can explain the difference between interupt and exception?
And I have noticed that there is no exception management in the example using software interupt mode.
Thanks a lot!
Hi,
You are quite confused by terms interrupt and exception.
Exceptions are referred to as events, which when enabled, will cause the processor to take an interrupt.
Multiple exception conditions can map to a single interrupt vector, and may be distinguished by examining registers associated with the interrupt. The Exception Syndrome register (ESR) is updated with information specific to the exception type when an interrupt occurs.
For details on IVORx exception you must refer to core reference manual as every core implement different IVORx schema.
For MPC5744P it is e200z4 core:
https://www.nxp.com/docs/en/reference-manual/e200z4RM.pdf?fsrch=1&sr=1&pageNum=1
I recommend you to first read Chapter 7 Interrupts and Exceptions and then I can clarify you your doubts.
Also in reference manual there is Chapter 21 Interrupt Controller (INTC) - which leads to IVOR4 you are referring to.
Peter
