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i.MX6ULL DDR calibration issues

Question asked by J S on Aug 30, 2017
Latest reply on Sep 5, 2017 by Yuri Muhin

Hi, we have a custom board where i.MX6UL was previously used. We've replaced it with i.MX6ULL and cannot get LPDDR2 to work reliably. Stress test from DDR test tool passes, but using another stress test from Linux either shows memory errors or produces full system hang for most boards (some boards pass the test). U-boot configuration registers are the same as in the test tool script. Using lower DDR frequency does not help.


Script aid says that MMDC_MPPDCMPR2 register must be provided from calibration, but the calibration only provides values for MPRDDLCTL and MPWRDLCTL, so what value should we put into MMDC_MPPDCMPR2?