I would like to know how to configure the different peripherals (SPI/DMA/DMAMUX/GPIO) to build the following mechanism:
- I have SPI0 configured as master @25Mhz (to an external ADC).
- I have an external interrupt firing at 42 Khz on port D.
- This interrupt is a trigger to extract 12 bytes each time the interrupt fires.
- Each 16 interrupts, I need another interrupt (DMA finish for example) to send the received data to an external memory.
Of course at this frequency, I don't want to handle each interrupt in my application. I already tried that and I can't handle more than 16Khz.
So I would like to configure the DMA minor loop at 12 bytes and the DMA major loop at 16 times.
In other words, I would like to handle a data block size equal to 16 times * 12 bytes.
Please how can I build this complex mechanism ?
Until now I succeeded to configure my DMA to be triggered by the GPIO pin, but only for memory to memory transfer.
SPI to memory and memory to SPI transfer seems to be more complex and doesn't work me at all.
The fsl_dspi_edma driver is not good for me because it doesn't allow me to configure minor and major loop.