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MAC57D54H - data exchange mechanism between A5 and M4

Question asked by Alvaro Martinez on May 16, 2017
Latest reply on May 19, 2017 by jamesbone
Hi all,
We are working on a project based on MAC57D54H and have some doubts on how to implement data exchange mechanism between cores A5 and M4: for instance speed variable is read from CAN bus and updated by M4 but it is displayed by A5. How is this variable shared by both cores? Could you please provide an example?

Thank you in advance for your collaboration.