IMX6UL EVK ethernet ENETx_NANDTREE# / ENETx_nINT PU/PD

[forumuser]

Hello,

does anybody know why ENETx_NANDTREE# / ENETx_nINT are pulled up AND down by 1k resistors on the IMX6UL eval board (R1508/R1534 ENET1 and R1606/R1632 ENET2)?

And even more important: Is the KSZ8081 expected to see a low or a high on reset?

Best regards,

Ralf

[Yuri]

Hello,

  from the KSZ8081 DataSheet about INTRP pin : it is open drain, requires 

an external pull up resistor. Also this is one of configuration options NAND tree 

support for fault detection.

http://ww1.microchip.com/downloads/en/DeviceDoc/KSZ8081MNX-RNB.pdf 

Have a great day,

Yuri

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[forumuser]

Hello,

this is all fine, but when using pull up AND pull down resistors on the same signal there will be neither a reliable logical low for enabling NANDTREE support nor will there be a reliable high for interrupt de-asserted or am i missing something here? How do you ensure that NANDTREE enable and no interrupt condition are properly detected?

I would expect a forced low (e.g. IMX6 output driven low) during KSZ8081 reset and a pull up during normal operation (e.g. IMX6 input floating).

Best regards,

Ralf

[Yuri]

Hello,

   I think it makes sense to apply to KSZ8081 manufacturer regarding proper resistor's values.

Regards,

Yuri.