Using an FRDM-KW41Z/my own PCB with a R41Z module, DCDC setup for Auto-Buck at V1P8 == 2.8V.
I've looked at the power consumpion on both my own app and the bare metal HRS example in the Connectivity Suite, and the power seems to be higher than I expect, running on the KW41Z. The figures are comparable to the KW40Z, and there is some documentation provided for that:
http://www.nxp.com/assets/documents/data/en/application-notes/AN5272.pdf (relates to the KW40Z)
p22, in LLS3/Idle there are regular power spikes at 100ms intervals. These spikes are the DCDC refreshing. I observe these spikes on my setup, and they draw more total current than I expect - comparable to the figure indicated on p25 (8.3uA in LLS3/Idle). The datasheet for the KW40Z indicates that LLS3 draws 3uA, and the RTC will be another 357nA.
Where is the other 5uA average current draw going? This is pretty big.....
I have tried, with no apparent effect:
* Putting my board into sleep mode 4 (VLSS1/Idle) to see if this had any noticeable effect on sleep mode current - it did not.
* Setting Half FET (the MK41Z Reference Manual mentions this) and Half frequency in DCDC REG3 when going into pulsed mode.