Question, i.MX6SX eMMC boot

[SLICE]

Dear team,

I would like to ask about eMMC BOOT of i.MX6SX.

My customer is trying to boot-up i.MX6SX from eMMC.

And they saw that boot cannot be done in the following case.

- LCD1_DATA04(SRC_BOOT_CFG04)=H, LCD1_DATA15(SRC_BOOT_CFG15)=H

For the other settings such as below, the boot from eMMC can be done.

- LCD1_DATA04(SRC_BOOT_CFG04)=L, LCD1_DATA15(SRC_BOOT_CFG15)=L

- LCD1_DATA04(SRC_BOOT_CFG04)=L, LCD1_DATA15(SRC_BOOT_CFG15)=H

- LCD1_DATA04(SRC_BOOT_CFG04)=H, LCD1_DATA15(SRC_BOOT_CFG15)=L

They are using eMMC 4.41 compliant chip, and they believe that FastBoot mode and DDR mode can be enabled simultaneously for i.MX6SX eMMC boot.

Is it true?

If yes, please let me know what they should do to achieve enabling both of FastBoot mode and DDR mode.

Thanks,

Miyamoto

[SLICE]

Hello jimmychan‌

Sorry for my late response.

Can I understand as below?

- i.MX6SX cannot operate eMMC boot when the boot setting is as below(eMMC FastBoot & DDR).

boot_cfg1[7:0] = b'01110000

boot_cfg2[7:0] = b'11010000

- But one can use eMMC's ECSD register setting for DDR mode.

I think boot_cfg setting for DDR mode is needed in addition to eMMC ECSD setting.

Then, it means that i.MX6SX cannot operate in FastBoot and DDR simultaneously.

Thanks,

Miyamoto

[jimmychan]

could you tell me who is the customer?

[SLICE]

jimmychan‌

I have sent a message to you.

[jimmychan]

thanks for your reply. I will ask the expert team for helping this issue. I will let you know when I get the reply.

[jimmychan]

could you show me all the boot_cfg1[0:7], bootcfg_2[0-7] setting?

thanks.