U-boot add spi problem

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U-boot add spi problem

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jarvisjiang
Contributor I

I.MX6UL add spi device in u-boot use ECSPI3,

//#ifdef CONFIG_ST7789_SPI
static iomux_v3_cfg_t const spi3_st7789_init[] = {
    MX6_PAD_UART2_TX_DATA__ECSPI3_SS0 | MUX_PAD_CTRL

(SPI_PAD_CTRL),
    MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL

(SPI_PAD_CTRL),
    MX6_PAD_UART2_RTS_B__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
    MX6_PAD_UART2_CTS_B__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
};


void st7789_init_board(void)
{
    imx_iomux_v3_setup_multiple_pads(spi3_st7789_init, ARRAY_SIZE

(spi3_st7789_init));
    printf("imx_iomux_v3_setup_multiple_pads\r\n");

    enable_cspi_clock(1,2);

}

******************************************************************************************

and call the spi_xfer() int uboot/drivers/spi/mxs_spi.c
when I burn the image into target
the error is "spi_xchg_single: Timeout!"

I find this error in the spi_xchg_single,
so add some printf in the spi_xchg_single

printf("regs->rxdata =%x\n",(int)&regs->rxdata);
printf("regs->cfg =%x\n",(int)&regs->cfg);

burn it and the log is

regs->rxdata =2010000
regs->cfg =201000c

I check the processer pdf, find the resigter is right.

I detect the spi config pin by Oscilloscope, but do not have any wave form.

How can I solve the problem?

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4 Replies

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igorpadykov
NXP Employee
NXP Employee

Hi jarvis

for i.MX6UL and eCSPI uboot/drivers/spi/mxc_spi.c should be used,

mxs_spi.c is i.MX23/28 driver.

Best regards
igor
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jarvisjiang
Contributor I

Hi igor

Thank you reply, I use uboot/drivers/spi/mxc_spi.c , the question  still  like the one above!

Best regards

jarvis

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rustyr
Contributor I

Hi Jarvis,

Were you able to solve this problem?

I am having the same issue.

Thanks,

Rusty

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tengri
Contributor IV

If you're using a different ecspi bus, make sure you have enabled the clock for it in u-boot !

i.e. 

static void setup_spi(void)
{
      u32 reg;
      struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;

      // Enable ECSPI3 clocks
      reg = readl(&ccm->CCGR1);
      reg |= 0x30;
      writel(reg, &ccm->CCGR1);
}

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