Hello, I am working with the Freedom K64F, using the eDMA. I am properly able to configure a chain of software TCDs using Scatter/Gather, and they each call the next SGA. Once the major count is completed, I want to trigger an interrupt, perform some processing in the DMA0 ISR, then within the ISR; I want to signal the channel to start on the next TCD that "hopefully" has loaded with the last SGA from the previous SGA.
When I run the debug, the 1st DMA0 ISR gets called, I perform the processing, clear the DMA0 Interrupt in the CR_CINT register and then trigger the channel. However, the ISR appears to be stuck in an ISR of some sort.
!) Am I missing something in my flow?
2) Is the SGA compatible with using int_major/int_half? Do I have to instead push the next software TCD within the ISR?
3) Does clearing the DMA Channel Interrupt with CR_CINT also clear the NVIC or does it automatically clear the NVIC when the CR_INT is cleared?