Not Getting Wakeup Interrupt

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Not Getting Wakeup Interrupt

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arvindupadhyay
Contributor II

Hi Fiends,

 

I am using kinetis microcontroller , I enable CAN_MCR_SLFWAK,CAN_MCR_WAKMSK,CAN_MCR_WRNEN bits but after CPU enters into stop mode [Not FlexCAN Disable] I am not getting wakeup interrupt.

 

Please suggest some answer.

 

Regards,

Arvind

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Arvind,

      From the reference manual, the flexcan wake up condition is :

In the Self Wake mechanism, if the SLFWAK bit in MCR Register was set at the time FlexCAN entered Stop mode, then upon detection of a recessive to dominant transition
on the CAN bus, FlexCAN sets the WAKINT bit in the ESR Register and, if enabled by the WAKMSK bit in MCR, generates a Wake Up interrupt to the CPU.

FlexCAN will then wait for 11 consecutive recessive bits to synchronize to the CAN bus. As a consequence, it will not receive the frame that woke it up.

    So, if you want to get the wake up interrupt, except to enable the according bit, you should use the CAN node to send the data to the can bus which connect to you chip.

    About the code,  you also can refer to this post:

Flexcan Acceptance filter mechanism 

   Kan li already share the flexcan validation code for your reference.

Wish it helps you!


Have a great day,
Kerry

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2,506 Views
arvindupadhyay
Contributor II

Hi Kerry,

Thank you so much for your help.

Still I am facing same issue.

I am using S32K144 microcontroller and FlexCAN master example given in SDK.

I modified 


/*FUNCTION**********************************************************************
*
* Function Name : FLEXCAN_HAL_Init
* Description : Initialize FlexCAN module.
* This function will reset FlexCAN module, enable self wakeup mechanism, select
* wakeup source filter, enable wakeup interrupt set maximum number of message
* enable bussoff, error and warrning interrupt buffers, initialize all message
* buffers as inactive, enable RX FIFO if needed, mask all mask bits, and
* disable all MB interrupts.
*
*END**************************************************************************/
flexcan_status_t FLEXCAN_HAL_Init(CAN_Type * base)
{
/* Reset the FLEXCAN*/
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_SOFTRST_SHIFT) = (0x1);

/* Wait for reset cycle to complete*/
while (BITBAND_ACCESS32(&(base->MCR), CAN_MCR_SOFTRST_SHIFT)){}

/* Disable the CAN clock */
FLEXCAN_HAL_Disable(base);

FLEXCAN_HAL_EnableWakeUp(base);

/* Enable the CAN clock */
FLEXCAN_HAL_Enable(base);

/* Set Freeze, Halt*/
FLEXCAN_HAL_EnterFreezeMode(base);

/* Select Wakeup Source filter for RX input */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WAKSRC_SHIFT) = (0x1);

/* Enable Wakeup Interrupt Source */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WAKMSK_SHIFT) = (0x1);

/* Set the WRNEN bit in CAN_MCR register */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WRNEN_SHIFT) = (0x1);

/* Set the BOFFMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_BOFFMSK_SHIFT) = (0x1);

/* Set the ERRMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_ERRMSK_SHIFT) = (0x1);

/* Set the TWRNMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_TWRNMSK_SHIFT) = (0x1);

/* Set the RWRNMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_RWRNMSK_SHIFT) = (0x1);

/* Clear the BOFFREC bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_BOFFREC_SHIFT) = (0x0);

/* Set the BOFFDONEMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL2), CAN_CTRL2_BOFFDONEMSK_SHIFT) = (0x1);

/* Rx global mask*/
(base->RXMGMASK) = (((uint32_t)(((uint32_t)(CAN_RXMGMASK_MG_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));

/* Rx reg 14 mask*/
(base->RX14MASK) = (((uint32_t)(((uint32_t)(CAN_RX14MASK_RX14M_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));

/* Rx reg 15 mask*/
(base->RX15MASK) = (((uint32_t)(((uint32_t)(CAN_RX15MASK_RX15M_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));

/* De-assert Freeze Mode*/
FLEXCAN_HAL_ExitFreezeMode(base);

/* Disable all MB interrupts*/
(base->IMASK1) = 0x0;

return FLEXCAN_STATUS_SUCCESS;
}

this function and after set bit rate   FLEXCAN_DRV_SetBitrate(FSL_CANCOM1, &myBitRate);

I am calling POWER_SYS_SetMode(0,POWER_MANAGER_POLICY_AGREEMENT);

as a stop mode.

Am I doing correct, Because of as per your earlier reply  " Kan li already share the flexcan validation code for your reference." it seems same.

Please suggest if I am doing rong anything.

Regards,

Arvind.

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PetrS
NXP TechSupport
NXP TechSupport

Hi Arvind,

Per my understanding, looking the latest RM, the Self Wakeup as indicated by MCR register is not available on the S32K144.

Instead the Pretended Networking mode adds specific wake up functionality in low power mode

(Stop mode) and it is available only on CAN_0 module.

I see that older RMs describe Self Wakeup functionality, so let me some time to check this with the Apps.

BR, Petr

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arvindupadhyay
Contributor II

Hi Petr,

Thank you for your reply, Yes you can take your time. I am waiting for your next reply.

Regards,

Arvind

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arvindupadhyay
Contributor II

Can I get any reference code for this?

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PetrS
NXP TechSupport
NXP TechSupport

I was informed the Self Wake-up is not available on FlexCAN. Pretending network mode is functional and can be used to wake-up from STOP mode.

 

Or you can use an external pin to wake-up the MCU from low power mode.

 

Unfortunately, I did not find any demo code. Still waiting if will receive some from Apps.

I will try to create simple for Pretending mode, but in 1-2 weeks earlier.

BR, Petr

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arvindupadhyay
Contributor II

Ok fine, No Problem Petr. I will also try to get some information regarding Pretending network mode.

Thank you for your quick reply.

Ragards,

Arvind.

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arvindupadhyay
Contributor II

Hi Petr ,

 

Is there any update regarding Pretending network mode ?

Regards,

Arvind

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arvindupadhyay
Contributor II

Hi Petr ,

As per above discussion you mentioned that you will give some solution or example code for Pretending network mode , So I just wanted to remind you, Is there any possibilities to share any source code or not. I am waiting for reply. 

Regards,

Arvind

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PetrS
NXP TechSupport
NXP TechSupport

Hi Arvind,

sorry for not replying. Unfortunately I haven't any done, had no time...

Petr

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Arvind Upadhyay,

    For the S32k question, please create a new post in the S32K area:

https://community.nxp.com/community/s32/s32k/content

   This area which you post the question is for the kinetis, and I also don't have the S32K board.

   Please post the question in the correct s32k area, there will have the according engineer help you to check it.

 

Best Regards,

Kerry

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arvindupadhyay
Contributor II

Thank you Kerry.

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