ISP support for MCS9S12G128F0MLH

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ISP support for MCS9S12G128F0MLH

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durgaprasadvenk
Contributor II

Hi, I am using MCS9S12G128F0MLH controller. I would like to know whether this controller supports ISP or not. If supports then will it use UART interface to program the controller? I found from the reference manual like "external host communicates to controller via BKGD pin". 

 

Could you please share how to program the controller using ISP (In Circuit programming). Or is it possible to program using UART from a processor.  The processor has Linux OS.

 

Thanks in advance.

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RadekS
NXP Employee
NXP Employee

Hi Durgaprasad,

It seems that your question is the same as topic discussed below:

https://community.nxp.com/thread/433074

Please look at my answers there.

 

So, possible solutions are

1. bootloader inside S12G MCU and load application e.g via UART/SPI interface

2. program your processor with Linux OS as BDM interface.

I hope it helps you.

Have a great day,
Radek

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durgaprasadvenk
Contributor II

Hi Radek,

Thanks for the quick reply, and the info is very much helpful. I have a few questions, Could you please give some idea.

If I write one simple application (in processor) to send application firmware to the controller. Is Start12.c file necessary? Or main.c is sufficient?

After which point I can start sending application firmware to the controller?. I am supposed to send after BDM enabled, i.e., after BDM_Active_mode () function. Am I correct?

Is the application firmware Imaze for the controller should be in S-record format?

Could you please share any flow diagram which describes how to send FW to the controller from the processor. Which will really help me.

Once again thanks for the reply, please correct me if I am wrong.

Thanks in advance.

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RadekS
NXP Employee
NXP Employee

Hi Durgaprasad,

The Start12.c file contains code for initializing of MCU after reset – it is mainly initializing of the stack, load default values of variables from flash and clear zero variables. You may skip this code when you will manage that yourself in the main code.

The c files have to be compiled/linked to the machine code readable by S12 core. Typically we send to MCU file with S-record (contains only flash content, the typical file is with .sx or .s19 file extension). The abs file contains also additional debug information, however, this file is not in simple readable format (it is not a text file).

 

So, the flow is

1. Write your code in c/assembler

2. Make your project (compiler/linker/…)

3. Load s19/abs file content into MCU

    a. by BDM interface

    b. by UART or any other channel. The S12 MCU must be already preloaded by bootloader code. The bootloader code will receive application code and write it into flash.

 

Unfortunately, I haven’t any personal experience with any S12 toolchain for Linux.

 

Could you please share little bit more details about your project?

Do you really need load code into empty S12 MCUs by linux processor? Or S12 MCUs may be already preloaded by bootloader code from assembly site?

If you are able to load bootloader code by BDM interface, the main application might be later updated anytime trough UART. See AN4258 for more details.

I hope it helps you.

Have a great day,
Radek

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jagxin
Contributor III

Dear sir 

Thanks for the quick reply, Let me explain the project details regarding the requirement.

If our case we are having a stack up board which is having micro controller MCS9S12G128 and it is mated to the main board which has the host processor .The interface between the host and the controller is SPI.(through stack up connector )

the BKGD pin and reset pin of the mc is connected to the host processor GPIO through Level translator since we have not exposed the BKGD pin in the stack up board  through a connector we need to do it from the processor 

Is it possible to load application firmware  S19 image through the BKGD pin connected to the processor? , 

If it is possible .please share any doc or procedure ,

if it is not possible 

Can i program the boot loader through any peripheral interface UART or SPI  connected to the host processor ? (assuming no boot loader is present in mc )

Does the controller will be shipped with boot loader flashed internally ?

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RadekS
NXP Employee
NXP Employee

Hi Agxin,

Thank you very much for clarification of your application.

 

About you questions)

Yes, it is possible to load application firmware  S19 image through the BKGD pin connected to the processor. However, it may also depend on your implementation of your processor pin and level translator. As I already wrote in the previous thread, the BKGD pin is bidirectional. So, the processor pin and level translator have to be able to configure to the digital output (generate log0 and log1) and the digital input state (with High Impedance).

 

The BDM communication is described in MCU reference manual – chapter 7 Background Debug Module (S12SBDMV1):

http://www.nxp.com/files/32bit/doc/ref_manual/MC9S12GRMV1.pdf

 

Optionally you may use AN4365 Qorivva MPC56xx Flash Programming Through Nexus/JTAG as general guidance how such programming works (with exception in different MCU core type and communication interface)

http://www.nxp.com/files/32bit/doc/app_note/AN4365.pdf

 

The Standard Software Driver for NVM (flash operations) you can download here:

http://www.nxp.com/files/microcontrollers/software/device_drivers/S12G_VR_NVM_SSD.exe

 

 

No, you cannot program the boot loader through any peripheral interface as UART or SPI  connected to the host processor (assuming no boot loader is present in mc ).

Typically we deliver MCU with erased flash. For some bigger projects, you may order MCUs with already preprogrammed bootloader (or any other flash content) or use one of our partners (third party companies) for such task.

http://www.nxp.com/products/software-and-tools/mcu-programming:MCU_PROGRAMMING_CENTER

http://www.nxp.com/webapp/connect/memberDirSearch.sp#

Anyway, you may contact your sales representative or distributor with your question about such services.

I hope it helps you.

Have a great day,
Radek

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durgaprasadvenk
Contributor II

Hi Radek,

Thanks for clarifying doubts in detail. As you mentioned "Yes, it is possible to load application firmware  S19 image through the BKGD pin connected to the processor". Could you please share any document or reference code to achieve this.

And one more question regarding BKGD pin. I would like to use BKGD pin after the application firmware started. Will it affect anything by using BKGD pin?

Thanks in advance.

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RadekS
NXP Employee
NXP Employee

Hi Durgaprasad,

Unfortunately I am not aware about any specific example code focused directly only on code loading.

 

As I already mentioned, the OSBDM or USBDM debuggers might be taken as inspiration.

I attached there also simple example code just for demonstrating of BDM communication (just load CPU registers).

https://community.nxp.com/thread/433074

 

 

As example of flash command routine you may look at PEmicro unsecure script automatically generated by CW – it will complete erase whole MCU flash and program security byte (at address 0xFF0F) to default value 0xFE (it program by phrase = 8 bytes).

For example:

WB 0x10A 0xFF means Write Byte 0xFF at address 0x10A (FCCOBHI register).

 

I am afraid that using processor pin connected to BKGD pin as GPIO will not work correctly. The BDM communication is possible even when MCU is in normal mode. So signal which are not relevant to S12G MCU may confuse this MCU and the MCU responses may interfere with processors levels.

Is it possible to disable/inhibit the voltage level translator for isolating processor and MCU signals?  

I hope it helps you.

Have a great day,
Radek

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durgaprasadvenk
Contributor II

Hi Radek,

Thanks for the info. I have a couple of questions, Could you please clarify.

  • Is the Controller having arm architecture?
  • While porting the example code (mentioned in433074 thread) to arm arch (Linux OS), I am facing compilation errors. Most of the errors are based on delay statements. "asm LDD #BC150; asm DBNE D,*+0;". The errors are like " error: unknown type name 'DBNE' ", "error: expected identifier or '(' before '+' token ", "error: 'LDD' undeclared (first use in this function) ".
  • Is it necessary to add delay in terms of Target clocks? Or Can I introduce delay using sleep/usleep?
  • If I am sending a firmware image from the processor, shall i select flash address 0x4000 to 0x7fff (page D 16KB), i.e., assigning 0x4000 to index X register and write 16bit and next 16bit will be written using WRITE_NEXT. Is this approach correct?

Thanks in advance, Please correct me if I am wrong.

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RadekS
NXP Employee
NXP Employee

Hi Durgaprasad,

  • No, the MCS9S12G128F0MLH controller has HCS12 (or S12) core.
  • The LDD and DBNE are assembler instructions for S12(X) core. It just loads number into accumulator D and decreases it until 0. So, you may use any other processor tool/feature which will provide defined delay. The assembler instructions in source code are used mainly for deterministic reason – The assembler instructions are not optimized by the S12 compiler and their execution takes every time the same time. The BC150 definitions are related to DBNE instruction length and bus clock for achieving requested waveforms at the pin.
  • The bits (1s or 0s) which we sending to MCU by BKGD pin are defined by specific waveforms. If your processor provides any hardware/software feature which may be used instead of such simply waiting in code, you don’t need such delay loops.
  • No, you have to use Flash controller for write into flash. So, you have to initialize flash controller by write into FCLKDIV register (configure flash clock) and execute sequentially appropriate flash commands. See Figure 24-25. Generic Flash Command Write Sequence Flowchart in S12G RM.

    For example: for executing Program P-Flash command (FCMD=0x06) you have to increment FCCOBIX index register from 0 to 5 and every time enter right value into FCCOB register (command 0x06, global address (0x034000~0x037FFF, see attached memory map) and 4 data words). After that, you have to launch this command by clearing CCIF flag in FSTAT register and wait until this command finish (CCIF flag is set again).

    For inspiration about how such flash commands code should look like, you may look into in SSD driver, or you may check our simple example code here: G240-Flash-CW51
    https://community.nxp.com/docs/DOC-93792
    Note: This is example code for programming flash by MCU code itself. When you program MCU in special mode by BKGD, you don’t care about execution code from the same flash block and you can ignore part related waiting loop in RAM.

I hope it helps you.

Have a great day,
Radek

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