Device Tree Pin Mux Values

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Device Tree Pin Mux Values

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simonlocke
Contributor III

Hi,

I am in the process of porting the iMX6SX Sabre BSP to my own board. However, I have found something that puzzles me in the device tree files for this board.

I'm using imx6 4.1.15, and with reference to the kernel source, the file arch/arm/boot/dts/imx6sx-sdb.dtsi contains some fsl,pins entries that have bits set that I cannot explain. For example pinctrl_i2c1 is set to 0x4001b8b1. I can explain bits 0 to 16, but what about the bit at bit 30? With reference to section 35 of the Reference Manual I can map the low 17 bits, but not the top bit.

This is also something I can see in other imx6 sabre dtsi files, so there is more to pin muxing than I can see at the moment. I was wondering if because the Reference Manual is generic for all imx6 that it was 'incomplete' depending on the exact silicon. I've looked in the imx6SX data sheet but this doesn't detail any extra information.

What am I missing? Can anyone explain these pin-mux values?

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Simon Locke,   

I confirmed that the information on the Reference Manual is correct and that you should not set these bits as this is the best practice in this scenario. You may change the dts files to reflect this and you will see no negative impact on your design.

As for the reason why some reserved bits are set (like bit 30 on the PINCTRL_I2C1) I couldn’t find more information but may be due to a preliminary configuration and it should have no effect as these bits will hold their pre-programmed value.

Regards,

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Simon Locke,   

I confirmed that the information on the Reference Manual is correct and that you should not set these bits as this is the best practice in this scenario. You may change the dts files to reflect this and you will see no negative impact on your design.

As for the reason why some reserved bits are set (like bit 30 on the PINCTRL_I2C1) I couldn’t find more information but may be due to a preliminary configuration and it should have no effect as these bits will hold their pre-programmed value.

Regards,

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simonlocke
Contributor III

I have just noted a comment on the following thread:

i.MX6 output gpio value behaviour

This references setting the SION bit 0x40000000. This may be the answer to the question.

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Simon Locke,       

                                                                                                                                                 

I’ve also noticed that and I’m investigating. Hopefully I can find more information on this soon.

In the meantime, I would recommend not changing the reserved bits, but I’m also curious on why some reserved bits do have certain values on the dtsi files.

Regards,

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