MC9S08SL8CTL  Inernal Bus Clock? / Trim?

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MC9S08SL8CTL  Inernal Bus Clock? / Trim?

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kazbi
Contributor I

I needs to trim the internal reference clock in order to generate exactly 20MHz Frequency. (and not greater than 20Mhz)

The problem: I become three frequency 20026178Hz , 19921875Hz and 19818652Hz after every Reset.

 

My internal Oscillator frequency is 390625 kHz.

The Trim Control at the Code Warior connection Manager is 39062,50 Hz

 

The 9S08SL8CTL Internal Reference Clock has a accuracy of up to +/- 0.2%, so the Internal ferequency schould be max 20020000Hz and min 19980000Hz ???

 

are there some other configuration?

what can I do to become a frequency equal and not greater than 20Mhz? 

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bigmac
Specialist III

Hello, and welcome to the forum.

 

I am not sure what the three different frequencies that you list represent, and how these frequencies are actually measured, and over what measurement period.  Keep in mind that, when the FLL is utilised, its output will have a substantial amount of short term jitter, as is the nature of FLL operation.  As the time period over which the frequency measurement occurs is increased, the amount of jitter will steadily reduce.

 

The small frequency variations that you indicated should not be a problem for the MCU.  The potential variation of reference oscillator frequency, with change of operating temperature, is likely to be considerably greater.

 

If slightly exceeding the specified upper bus frequency limit is of concern, you might consider a reduced trim frequency for the internal reference.

 

Regards,

Mac

 

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kazbi
Contributor I

Hello Big Mac,

Thank you for reply : )

 

The real problem in my system is the LIN communication.

The LIN Communication can be disabled with a frequency over 20MHz ==> 20,026178MHz (20Mhz +~ 0,2%(jitter)) + (2% over voltage and temperature)

 

 I will work with a max 19569471,62Hz frequency so that the frequency in worst case don´t exceed 20Mhz  

 

  

 

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bigmac
Specialist III

Hello,

 

If the LIN module is so critical, I would tend to simplify the setup.  I might choose an internal reference trim frequency of 38.0 kHz.  This will produce a bus frequency of 19.46 MHz, (i.e. nominally 2.7 percent below the maximum allowable frequency).  This will easily allow for the initial trim error, plus worst case drift due to temperature and voltage.

 

There would seem little point in expressing the nominal trim frequency to a precision less than 50 or 100 Hz because of the possible initial trim error.

 

Regards,

Mac

 

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